4162bb66c6
* cgen.sh: Mark generated files read-only. * epiphany-asm.c: Regenerate. * epiphany-desc.c: Regenerate. * epiphany-desc.h: Regenerate. * epiphany-dis.c: Regenerate. * epiphany-ibld.c: Regenerate. * epiphany-opc.c: Regenerate. * epiphany-opc.h: Regenerate. * fr30-asm.c: Regenerate. * fr30-desc.c: Regenerate. * fr30-desc.h: Regenerate. * fr30-dis.c: Regenerate. * fr30-ibld.c: Regenerate. * fr30-opc.c: Regenerate. * fr30-opc.h: Regenerate. * frv-asm.c: Regenerate. * frv-desc.c: Regenerate. * frv-desc.h: Regenerate. * frv-dis.c: Regenerate. * frv-ibld.c: Regenerate. * frv-opc.c: Regenerate. * frv-opc.h: Regenerate. * ip2k-asm.c: Regenerate. * ip2k-desc.c: Regenerate. * ip2k-desc.h: Regenerate. * ip2k-dis.c: Regenerate. * ip2k-ibld.c: Regenerate. * ip2k-opc.c: Regenerate. * ip2k-opc.h: Regenerate. * iq2000-asm.c: Regenerate. * iq2000-desc.c: Regenerate. * iq2000-desc.h: Regenerate. * iq2000-dis.c: Regenerate. * iq2000-ibld.c: Regenerate. * iq2000-opc.c: Regenerate. * iq2000-opc.h: Regenerate. * lm32-asm.c: Regenerate. * lm32-desc.c: Regenerate. * lm32-desc.h: Regenerate. * lm32-dis.c: Regenerate. * lm32-ibld.c: Regenerate. * lm32-opc.c: Regenerate. * lm32-opc.h: Regenerate. * lm32-opinst.c: Regenerate. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate. * m32r-asm.c: Regenerate. * m32r-desc.c: Regenerate. * m32r-desc.h: Regenerate. * m32r-dis.c: Regenerate. * m32r-ibld.c: Regenerate. * m32r-opc.c: Regenerate. * m32r-opc.h: Regenerate. * m32r-opinst.c: Regenerate. * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate. * mt-asm.c: Regenerate. * mt-desc.c: Regenerate. * mt-desc.h: Regenerate. * mt-dis.c: Regenerate. * mt-ibld.c: Regenerate. * mt-opc.c: Regenerate. * mt-opc.h: Regenerate. * or1k-asm.c: Regenerate. * or1k-desc.c: Regenerate. * or1k-desc.h: Regenerate. * or1k-dis.c: Regenerate. * or1k-ibld.c: Regenerate. * or1k-opc.c: Regenerate. * or1k-opc.h: Regenerate. * or1k-opinst.c: Regenerate. * xc16x-asm.c: Regenerate. * xc16x-desc.c: Regenerate. * xc16x-desc.h: Regenerate. * xc16x-dis.c: Regenerate. * xc16x-ibld.c: Regenerate. * xc16x-opc.c: Regenerate. * xc16x-opc.h: Regenerate. * xstormy16-asm.c: Regenerate. * xstormy16-desc.c: Regenerate. * xstormy16-desc.h: Regenerate. * xstormy16-dis.c: Regenerate. * xstormy16-ibld.c: Regenerate. * xstormy16-opc.c: Regenerate. * xstormy16-opc.h: Regenerate.
591 lines
27 KiB
C
591 lines
27 KiB
C
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Semantic operand instances for or1k.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996-2017 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include "sysdep.h"
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#include "ansidecl.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "or1k-desc.h"
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#include "or1k-opc.h"
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/* Operand references. */
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#define OP_ENT(op) OR1K_OPERAND_##op
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#define INPUT CGEN_OPINST_INPUT
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#define OUTPUT CGEN_OPINST_OUTPUT
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#define END CGEN_OPINST_END
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#define COND_REF CGEN_OPINST_COND_REF
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static const CGEN_OPINST sfmt_empty_ops[] ATTRIBUTE_UNUSED = {
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_j_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, 0 },
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{ INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_jal_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, 0 },
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{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 },
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{ INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "h_gpr_UDI_9", HW_H_GPR, CGEN_MODE_UDI, 0, 9, 0 },
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{ OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_jr_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
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{ INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_jalr_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 },
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{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
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{ INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "h_gpr_UDI_9", HW_H_GPR, CGEN_MODE_UDI, 0, 9, 0 },
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{ OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_bnf_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, COND_REF },
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{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF },
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{ INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, COND_REF },
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{ INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_trap_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_msync_ops[] ATTRIBUTE_UNUSED = {
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_nop_imm_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_movhi_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_macrc_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_mfspr_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_mtspr_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
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{ INPUT, "uimm16_split", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16_SPLIT), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_lwz_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "h_memory_USI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_lws_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "h_memory_SI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_lwa_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "h_memory_USI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
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{ OUTPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 },
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{ OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_lbz_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "h_memory_UQI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_1", HW_H_MEMORY, CGEN_MODE_UQI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_lbs_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "h_memory_QI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_1", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_lhz_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "h_memory_UHI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_2", HW_H_MEMORY, CGEN_MODE_UHI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_lhs_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "h_memory_HI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
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{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_sw_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
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{ INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 },
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{ OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF },
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{ OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_sb_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
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{ INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 },
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{ OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF },
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{ OUTPUT, "h_memory_UQI_addr", HW_H_MEMORY, CGEN_MODE_UQI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_sh_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
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{ INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 },
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{ OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF },
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{ OUTPUT, "h_memory_UHI_addr", HW_H_MEMORY, CGEN_MODE_UHI, 0, 0, 0 },
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{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
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};
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static const CGEN_OPINST sfmt_l_swa_ops[] ATTRIBUTE_UNUSED = {
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{ INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 },
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{ INPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 },
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{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
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{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, COND_REF },
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{ INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 },
|
|
{ INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 },
|
|
{ OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, COND_REF },
|
|
{ OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_sll_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_slli_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "uimm6", HW_H_UIMM6, CGEN_MODE_UINT, OP_ENT (UIMM6), 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_and_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_add_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF },
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
|
|
{ INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_addc_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF },
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
|
|
{ INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_div_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF },
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, COND_REF },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
|
|
{ INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, COND_REF },
|
|
{ OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, COND_REF },
|
|
{ OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_ff1_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_xori_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_addi_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF },
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
|
|
{ INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_addic_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF },
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
|
|
{ INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_exths_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_cmov_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, COND_REF },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, COND_REF },
|
|
{ INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, COND_REF },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_sfgts_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
|
|
{ OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_sfgtsi_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
|
|
{ OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_mac_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 },
|
|
{ OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_l_maci_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
|
|
{ OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_add_s_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 },
|
|
{ INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 },
|
|
{ OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_add_d_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 },
|
|
{ INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 },
|
|
{ OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_itof_s_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_itof_d_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 },
|
|
{ INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_ftoi_s_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 },
|
|
{ INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_ftoi_d_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 },
|
|
{ INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_eq_s_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 },
|
|
{ INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 },
|
|
{ OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_eq_d_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 },
|
|
{ INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 },
|
|
{ OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_madd_s_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 },
|
|
{ INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 },
|
|
{ INPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 },
|
|
{ OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
static const CGEN_OPINST sfmt_lf_madd_d_ops[] ATTRIBUTE_UNUSED = {
|
|
{ INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 },
|
|
{ INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 },
|
|
{ INPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 },
|
|
{ OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 },
|
|
{ END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
|
|
};
|
|
|
|
#undef OP_ENT
|
|
#undef INPUT
|
|
#undef OUTPUT
|
|
#undef END
|
|
#undef COND_REF
|
|
|
|
/* Operand instance lookup table. */
|
|
|
|
static const CGEN_OPINST *or1k_cgen_opinst_table[MAX_INSNS] = {
|
|
0,
|
|
& sfmt_l_j_ops[0],
|
|
& sfmt_l_jal_ops[0],
|
|
& sfmt_l_jr_ops[0],
|
|
& sfmt_l_jalr_ops[0],
|
|
& sfmt_l_bnf_ops[0],
|
|
& sfmt_l_bnf_ops[0],
|
|
& sfmt_l_trap_ops[0],
|
|
& sfmt_l_trap_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_nop_imm_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_movhi_ops[0],
|
|
& sfmt_l_macrc_ops[0],
|
|
& sfmt_l_mfspr_ops[0],
|
|
& sfmt_l_mtspr_ops[0],
|
|
& sfmt_l_lwz_ops[0],
|
|
& sfmt_l_lws_ops[0],
|
|
& sfmt_l_lwa_ops[0],
|
|
& sfmt_l_lbz_ops[0],
|
|
& sfmt_l_lbs_ops[0],
|
|
& sfmt_l_lhz_ops[0],
|
|
& sfmt_l_lhs_ops[0],
|
|
& sfmt_l_sw_ops[0],
|
|
& sfmt_l_sb_ops[0],
|
|
& sfmt_l_sh_ops[0],
|
|
& sfmt_l_swa_ops[0],
|
|
& sfmt_l_sll_ops[0],
|
|
& sfmt_l_slli_ops[0],
|
|
& sfmt_l_sll_ops[0],
|
|
& sfmt_l_slli_ops[0],
|
|
& sfmt_l_sll_ops[0],
|
|
& sfmt_l_slli_ops[0],
|
|
& sfmt_l_sll_ops[0],
|
|
& sfmt_l_slli_ops[0],
|
|
& sfmt_l_and_ops[0],
|
|
& sfmt_l_and_ops[0],
|
|
& sfmt_l_and_ops[0],
|
|
& sfmt_l_add_ops[0],
|
|
& sfmt_l_add_ops[0],
|
|
& sfmt_l_addc_ops[0],
|
|
& sfmt_l_add_ops[0],
|
|
& sfmt_l_add_ops[0],
|
|
& sfmt_l_div_ops[0],
|
|
& sfmt_l_div_ops[0],
|
|
& sfmt_l_ff1_ops[0],
|
|
& sfmt_l_ff1_ops[0],
|
|
& sfmt_l_mfspr_ops[0],
|
|
& sfmt_l_mfspr_ops[0],
|
|
& sfmt_l_xori_ops[0],
|
|
& sfmt_l_addi_ops[0],
|
|
& sfmt_l_addic_ops[0],
|
|
& sfmt_l_addi_ops[0],
|
|
& sfmt_l_exths_ops[0],
|
|
& sfmt_l_exths_ops[0],
|
|
& sfmt_l_exths_ops[0],
|
|
& sfmt_l_exths_ops[0],
|
|
& sfmt_l_exths_ops[0],
|
|
& sfmt_l_exths_ops[0],
|
|
& sfmt_l_cmov_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_sfgts_ops[0],
|
|
& sfmt_l_sfgtsi_ops[0],
|
|
& sfmt_l_mac_ops[0],
|
|
& sfmt_l_mac_ops[0],
|
|
& sfmt_l_maci_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_lf_add_s_ops[0],
|
|
& sfmt_lf_add_d_ops[0],
|
|
& sfmt_lf_add_s_ops[0],
|
|
& sfmt_lf_add_d_ops[0],
|
|
& sfmt_lf_add_s_ops[0],
|
|
& sfmt_lf_add_d_ops[0],
|
|
& sfmt_lf_add_s_ops[0],
|
|
& sfmt_lf_add_d_ops[0],
|
|
& sfmt_lf_add_s_ops[0],
|
|
& sfmt_lf_add_d_ops[0],
|
|
& sfmt_lf_itof_s_ops[0],
|
|
& sfmt_lf_itof_d_ops[0],
|
|
& sfmt_lf_ftoi_s_ops[0],
|
|
& sfmt_lf_ftoi_d_ops[0],
|
|
& sfmt_lf_eq_s_ops[0],
|
|
& sfmt_lf_eq_d_ops[0],
|
|
& sfmt_lf_eq_s_ops[0],
|
|
& sfmt_lf_eq_d_ops[0],
|
|
& sfmt_lf_eq_s_ops[0],
|
|
& sfmt_lf_eq_d_ops[0],
|
|
& sfmt_lf_eq_s_ops[0],
|
|
& sfmt_lf_eq_d_ops[0],
|
|
& sfmt_lf_eq_s_ops[0],
|
|
& sfmt_lf_eq_d_ops[0],
|
|
& sfmt_lf_eq_s_ops[0],
|
|
& sfmt_lf_eq_d_ops[0],
|
|
& sfmt_lf_madd_s_ops[0],
|
|
& sfmt_lf_madd_d_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
& sfmt_l_msync_ops[0],
|
|
};
|
|
|
|
/* Function to call before using the operand instance table. */
|
|
|
|
void
|
|
or1k_cgen_init_opinst_table (CGEN_CPU_DESC cd)
|
|
{
|
|
int i;
|
|
const CGEN_OPINST **oi = & or1k_cgen_opinst_table[0];
|
|
CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries;
|
|
for (i = 0; i < MAX_INSNS; ++i)
|
|
insns[i].opinst = oi[i];
|
|
}
|