0c115f8483
More nonsense fixing "bugs" with left shifts of signed values. Yes, the C standard does say this is undefined (and right shifts of signed values are implementation defined BTW) but in practice there is no problem with current machines. 1's complement is a thing of the past. cpu/ * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting. (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise. (f-dst32-rn-prefixed-QI): Likewise. (f-dsp-32-s32): Mask before shifting left. (f-dsp-48-u32, f-dsp-48-s32): Likewise. (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than shifting left. (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise. (h-gr-SI): Mask before shifting. opcodes/ * m32c-ibld.c: Regenerate. |
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bpf.cpu | ||
bpf.opc | ||
ChangeLog | ||
cris.cpu | ||
epiphany.cpu | ||
epiphany.opc | ||
fr30.cpu | ||
fr30.opc | ||
frv.cpu | ||
frv.opc | ||
ip2k.cpu | ||
ip2k.opc | ||
iq10.cpu | ||
iq2000.cpu | ||
iq2000.opc | ||
iq2000m.cpu | ||
lm32.cpu | ||
lm32.opc | ||
m32c.cpu | ||
m32c.opc | ||
m32r.cpu | ||
m32r.opc | ||
mep-avc2.cpu | ||
mep-avc.cpu | ||
mep-c5.cpu | ||
mep-core.cpu | ||
mep-default.cpu | ||
mep-ext-cop.cpu | ||
mep-fmax.cpu | ||
mep-h1.cpu | ||
mep-ivc2.cpu | ||
mep-rhcop.cpu | ||
mep-sample-ucidsp.cpu | ||
mep.cpu | ||
mep.opc | ||
mt.cpu | ||
mt.opc | ||
or1k.cpu | ||
or1k.opc | ||
or1kcommon.cpu | ||
or1korbis.cpu | ||
or1korfpx.cpu | ||
sh64-compact.cpu | ||
sh64-media.cpu | ||
sh.cpu | ||
sh.opc | ||
simplify.inc | ||
xc16x.cpu | ||
xc16x.opc | ||
xstormy16.cpu | ||
xstormy16.opc |