67ac975911
struct target_waitstatus. Change status argument to target_wait to be struct target_waitstatus * instead of int *. * target.h, infrun.c, all targets: Change type of signal arguments to resume(), proceed(), and target_resume() from int to enum target_signal. * All targets (*_wait, *_resume): Change accordingly. * infcmd.c (program_info, signal_command), throughout infrun.c, * fork-child.c, solib.c, hppa-tdep.c, osfsolib.c: Use this stuff. * convex-xdep.c, convex-tdep.c: Add FIXME's (getting the Convex signal code stuff right with the new signals would be non-trivial). * inferior.h (stop_signal): Make it enum target_signal not int. * target.c, target.h (target_signal_to_string, target_signal_to_name, target_signal_from_name): New functions. * inftarg.c, target.h (target_signal_to_host, target_signal_from_host, store_waitstatus): New functions. * procfs.c (procfs_notice_signals): Use them. * i960-tdep.c (i960_fault_to_signal): New function, to replace print_fault. * config/i960/tm-i960.h: Don't define PRINT_RANDOM_SIGNAL.
371 lines
11 KiB
C
371 lines
11 KiB
C
/* Native-dependent code for Sparc running LynxOS.
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Copyright (C) 1989, 1992, Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "target.h"
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#include <signal.h>
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#include <sys/ptrace.h>
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#include <sys/wait.h>
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#if 0
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#include <machine/reg.h>
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#endif
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/* We don't store all registers immediately when requested, since they
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get sent over in large chunks anyway. Instead, we accumulate most
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of the changes and send them over once. "deferred_stores" keeps
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track of which sets of registers we have locally-changed copies of,
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so we only need send the groups that have changed. */
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#define INT_REGS 1
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#define STACK_REGS 2
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#define FP_REGS 4
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/* Fetch one or more registers from the inferior. REGNO == -1 to get
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them all. We actually fetch more than requested, when convenient,
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marking them as valid so we won't fetch them again. */
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void
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fetch_inferior_registers (regno)
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int regno;
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{
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#if 0
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struct regs inferior_registers;
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struct fp_status inferior_fp_registers;
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int i;
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/* We should never be called with deferred stores, because a prerequisite
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for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */
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if (deferred_stores) abort();
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DO_DEFERRED_STORES;
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/* Global and Out regs are fetched directly, as well as the control
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registers. If we're getting one of the in or local regs,
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and the stack pointer has not yet been fetched,
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we have to do that first, since they're found in memory relative
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to the stack pointer. */
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if (regno < O7_REGNUM /* including -1 */
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|| regno >= Y_REGNUM
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|| (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
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{
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if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
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(PTRACE_ARG3_TYPE) &inferior_registers, 0))
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perror("ptrace_getregs");
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registers[REGISTER_BYTE (0)] = 0;
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memcpy (®isters[REGISTER_BYTE (1)], &inferior_registers.r_g1,
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15 * REGISTER_RAW_SIZE (G0_REGNUM));
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*(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps;
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*(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
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*(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
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*(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;
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for (i = G0_REGNUM; i <= O7_REGNUM; i++)
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register_valid[i] = 1;
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register_valid[Y_REGNUM] = 1;
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register_valid[PS_REGNUM] = 1;
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register_valid[PC_REGNUM] = 1;
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register_valid[NPC_REGNUM] = 1;
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/* If we don't set these valid, read_register_bytes() rereads
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all the regs every time it is called! FIXME. */
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register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */
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register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */
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register_valid[FPS_REGNUM] = 1; /* Not true yet, FIXME */
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register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */
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}
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/* Floating point registers */
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if (regno == -1 || (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
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{
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if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
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(PTRACE_ARG3_TYPE) &inferior_fp_registers,
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0))
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perror("ptrace_getfpregs");
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memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
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sizeof inferior_fp_registers.fpu_fr);
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/* memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)],
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&inferior_fp_registers.Fpu_fsr,
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sizeof (FPU_FSR_TYPE)); FIXME??? -- gnu@cyg */
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for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
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register_valid[i] = 1;
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register_valid[FPS_REGNUM] = 1;
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}
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/* These regs are saved on the stack by the kernel. Only read them
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all (16 ptrace calls!) if we really need them. */
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if (regno == -1)
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{
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target_xfer_memory (*(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)],
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®isters[REGISTER_BYTE (L0_REGNUM)],
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16*REGISTER_RAW_SIZE (L0_REGNUM), 0);
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for (i = L0_REGNUM; i <= I7_REGNUM; i++)
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register_valid[i] = 1;
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}
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else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
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{
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CORE_ADDR sp = *(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)];
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i = REGISTER_BYTE (regno);
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if (register_valid[regno])
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printf("register %d valid and read\n", regno);
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target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
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®isters[i], REGISTER_RAW_SIZE (regno), 0);
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register_valid[regno] = 1;
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}
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#endif
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}
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/* Store our register values back into the inferior.
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If REGNO is -1, do this for all registers.
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Otherwise, REGNO specifies which register (so we can save time). */
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void
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store_inferior_registers (regno)
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int regno;
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{
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#if 0
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struct regs inferior_registers;
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struct fp_status inferior_fp_registers;
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int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
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/* First decide which pieces of machine-state we need to modify.
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Default for regno == -1 case is all pieces. */
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if (regno >= 0)
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if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
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{
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wanna_store = FP_REGS;
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}
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else
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{
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if (regno == SP_REGNUM)
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wanna_store = INT_REGS + STACK_REGS;
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else if (regno < L0_REGNUM || regno > I7_REGNUM)
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wanna_store = INT_REGS;
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else
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wanna_store = STACK_REGS;
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}
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/* See if we're forcing the stores to happen now, or deferring. */
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if (regno == -2)
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{
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wanna_store = deferred_stores;
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deferred_stores = 0;
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}
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else
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{
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if (wanna_store == STACK_REGS)
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{
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/* Fall through and just store one stack reg. If we deferred
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it, we'd have to store them all, or remember more info. */
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}
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else
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{
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deferred_stores |= wanna_store;
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return;
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}
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}
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if (wanna_store & STACK_REGS)
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{
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CORE_ADDR sp = *(CORE_ADDR *)®isters[REGISTER_BYTE (SP_REGNUM)];
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if (regno < 0 || regno == SP_REGNUM)
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{
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if (!register_valid[L0_REGNUM+5]) abort();
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target_xfer_memory (sp,
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®isters[REGISTER_BYTE (L0_REGNUM)],
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16*REGISTER_RAW_SIZE (L0_REGNUM), 1);
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}
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else
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{
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if (!register_valid[regno]) abort();
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target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
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®isters[REGISTER_BYTE (regno)],
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REGISTER_RAW_SIZE (regno), 1);
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}
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}
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if (wanna_store & INT_REGS)
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{
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if (!register_valid[G1_REGNUM]) abort();
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memcpy (&inferior_registers.r_g1, ®isters[REGISTER_BYTE (G1_REGNUM)],
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15 * REGISTER_RAW_SIZE (G1_REGNUM));
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inferior_registers.r_ps =
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*(int *)®isters[REGISTER_BYTE (PS_REGNUM)];
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inferior_registers.r_pc =
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*(int *)®isters[REGISTER_BYTE (PC_REGNUM)];
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inferior_registers.r_npc =
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*(int *)®isters[REGISTER_BYTE (NPC_REGNUM)];
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inferior_registers.r_y =
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*(int *)®isters[REGISTER_BYTE (Y_REGNUM)];
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if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
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(PTRACE_ARG3_TYPE) &inferior_registers, 0))
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perror("ptrace_setregs");
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}
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if (wanna_store & FP_REGS)
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{
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if (!register_valid[FP0_REGNUM+9]) abort();
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/* Initialize inferior_fp_registers members that gdb doesn't set
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by reading them from the inferior. */
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if (0 !=
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ptrace (PTRACE_GETFPREGS, inferior_pid,
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(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
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perror("ptrace_getfpregs");
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memcpy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)],
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sizeof inferior_fp_registers.fpu_fr);
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/* memcpy (&inferior_fp_registers.Fpu_fsr,
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®isters[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
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****/
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if (0 !=
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ptrace (PTRACE_SETFPREGS, inferior_pid,
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(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
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perror("ptrace_setfpregs");
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}
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#endif
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}
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void
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fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
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char *core_reg_sect;
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unsigned core_reg_size;
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int which;
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unsigned int ignore; /* reg addr, unused in this version */
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{
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#if 0
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if (which == 0) {
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/* Integer registers */
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#define gregs ((struct regs *)core_reg_sect)
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/* G0 *always* holds 0. */
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*(int *)®isters[REGISTER_BYTE (0)] = 0;
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/* The globals and output registers. */
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memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1,
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15 * REGISTER_RAW_SIZE (G1_REGNUM));
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*(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
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*(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
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*(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
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*(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;
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/* My best guess at where to get the locals and input
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registers is exactly where they usually are, right above
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the stack pointer. If the core dump was caused by a bus error
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from blowing away the stack pointer (as is possible) then this
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won't work, but it's worth the try. */
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{
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int sp;
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sp = *(int *)®isters[REGISTER_BYTE (SP_REGNUM)];
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if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)],
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16 * REGISTER_RAW_SIZE (L0_REGNUM)))
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{
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/* fprintf so user can still use gdb */
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fprintf (stderr,
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"Couldn't read input and local registers from core file\n");
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}
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}
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} else if (which == 2) {
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/* Floating point registers */
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#define fpuregs ((struct fpu *) core_reg_sect)
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if (core_reg_size >= sizeof (struct fpu))
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{
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memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
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sizeof (fpuregs->fpu_regs));
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memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
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sizeof (FPU_FSR_TYPE));
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}
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else
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fprintf (stderr, "Couldn't read float regs from core file\n");
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}
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#endif
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}
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/* Wait for child to do something. Return pid of child, or -1 in case
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of error; store status through argument pointer STATUS. */
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/* FIXME: Not sparc-specific. Should be using lynx-nat.c instead; the
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child_wait's are identical. */
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int
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child_wait (pid, status)
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int pid;
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struct target_waitstatus *ourstatus;
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{
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int save_errno;
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int thread;
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while (1)
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{
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int sig;
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if (attach_flag)
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set_sigint_trap(); /* Causes SIGINT to be passed on to the
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attached process. */
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pid = wait (status);
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save_errno = errno;
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if (attach_flag)
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clear_sigint_trap();
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if (pid == -1)
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{
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if (save_errno == EINTR)
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continue;
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fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
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safe_strerror (save_errno));
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/* Claim it exited with unknown signal. */
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ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
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ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
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return -1;
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}
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if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
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continue;
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/* thread = WIFTID (*status);*/
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thread = *status >> 16;
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/* Initial thread value can only be acquired via wait, so we have to
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resort to this hack. */
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if (TIDGET (inferior_pid) == 0)
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{
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inferior_pid = BUILDPID (inferior_pid, thread);
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add_thread (inferior_pid);
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}
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pid = BUILDPID (pid, thread);
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store_waitstatus (ourstatus, status);
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return pid;
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}
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}
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