Mike Frysinger fa8f87e53b sim: trace: add a basic cpu register class ... The bfin/msp430 ports already had trace logic set up for reading/writing cpu registers, albeit using different unrelated levels (core & vpu). Add a proper register class for these and for other ports.		2015-06-24 10:40:17 -04:00
..
bfroms	sim: bfin: add bf526-0.2/bf54x-0.4 rom regions	2011-05-25 12:35:05 +00:00
ChangeLog	sim: trace: add a basic cpu register class	2015-06-24 10:40:17 -04:00
Makefile.in	sim: unify sim-cpu usage	2015-04-15 02:19:52 -04:00
TODO	sim: bfin: add flush/HWERR todo	2013-06-17 04:43:22 +00:00
aclocal.m4	sim: rename tconfig.in to tconfig.h	2015-03-16 01:23:52 -04:00
bfin-sim.c	sim: trace: add common macros for logging info	2015-06-12 06:34:20 -04:00
bfin-sim.h	sim: trace: add common macros for logging info	2015-06-12 06:34:20 -04:00
config.in	sim: update zlib handling	2015-04-01 01:07:57 -04:00
configure	sim: use AS_HELP_STRING everywhere	2015-06-23 15:02:08 -04:00
configure.ac	sim: dv-sockser: move build to common dir	2015-03-23 04:40:07 -04:00
devices.c	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
devices.h	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
dv-bfin_cec.c	sim: trace: add common macros for logging info	2015-06-12 06:34:20 -04:00
dv-bfin_cec.h	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
dv-bfin_ctimer.c	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
dv-bfin_ctimer.h	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
dv-bfin_dma.c	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
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dv-bfin_uart.c	sim: dv-sockser: add stub funcs when not available	2015-03-23 04:14:27 -04:00
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insn_list.def	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
interp.c	sim: trace: add a basic cpu register class	2015-06-24 10:40:17 -04:00
linux-fixed-code.h	sim: bfin: fix brace style	2011-03-15 20:44:11 +00:00
linux-fixed-code.s	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
linux-targ-map.h	sim: callback: add human readable strings for debugging to maps	2015-06-17 13:19:51 -04:00
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sim-main.h	sim: trace: add a basic cpu register class	2015-06-24 10:40:17 -04:00
tconfig.h	sim: rename tconfig.in to tconfig.h	2015-03-16 01:23:52 -04:00