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binutils-gdb/cpu
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Nathan Sidwell 6f84a2a649 bfd: 
Add ms2.
	* archures.c (bfd_mach_ms2): Define.
	* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
	* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
	(ms1_elf_merge_private_bfd_data): Remove unused variables.  Add
	correct merging logic, with workaround.
	(ms1_elf_print_private_bfd_data): Add ms2 case.
	* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.

cpu:
	Add ms2
	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
	model.
	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
	f-cb2incr, f-rc3): New fields.
	(LOOP): New instruction.
	(JAL-HAZARD): New hazard.
	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
	New operands.
	(mul, muli, dbnz, iflush): Enable for ms2
	(jal, reti): Has JAL-HAZARD.
	(ldctxt, ldfb, stfb): Only ms1.
	(fbcb): Only ms1,ms1-003.
	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
	fbcbincrs, mfbcbincrs): Enable for ms2.
	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
	* ms1.opc (parse_loopsize): New.
	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
	(print_pcrel): New.

gas:
	Add ms2.
	* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
	(ms1_architectures): Add ms2.
	(md_parse_option): Add ms2.
	(md_show_usage): Add ms2.
	(md_assemble): Add JAL_HAZARD detection logic.
	(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
	* doc/c-ms1.texi: New.
	* doc/all.texi: Add MS1.
	* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
	* doc/Makefile.in: Rebuilt.
	* doc/Makefile: Rebuilt.

gas/testsuite:
	Add ms2.
	* gas/ms1/allinsn.d: Adjust pcrel disassembly.
	* gas/ms1/errors.exp: Fix target triplet.
	* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
	* gas/ms1/ms1-16-003.s: Tweak label.
	* gas/ms1/ms1.exp: Adjust target triplet.  Add ms2 test.
	* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
	* gas/ms1/relocs.d: Adjust expected machine name and pcrel
	disassembly.
	* gas/ms1/relocs.exp: Adjust target triplet.

include:
	Add ms2.
	* elf/ms1.h (EF_MS1_CPU_MS2): New.


opcodes:
	Add ms2.
	* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
	ms1-opc.c, ms1-opc.h: Regenerated.
 		2005-11-08 11:15:13 +00:00
..
ChangeLog bfd: 2005-11-08 11:15:13 +00:00
cris.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
frv.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
frv.opc 2005-10-28 Dave Brolley <brolley@redhat.com> 2005-10-28 19:33:06 +00:00
iq10.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
iq2000.cpu * iq2000.cpu: Include from binutils cpu dir. 2005-07-06 08:18:52 +00:00
iq2000.opc Fix compile time warnings from a GCC 4.0 compiler 2005-07-05 15:07:46 +00:00
iq2000m.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
m32c.cpu * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 2005-10-27 23:54:17 +00:00
m32c.opc 2005-10-28 Dave Brolley <brolley@redhat.com> 2005-10-28 19:33:06 +00:00
m32r.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
m32r.opc * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 2005-10-26 07:49:05 +00:00
ms1.cpu bfd: 2005-11-08 11:15:13 +00:00
ms1.opc bfd: 2005-11-08 11:15:13 +00:00
sh.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
sh.opc Update function declarations to ISO C90 formatting 2005-07-01 11:16:33 +00:00
sh64-compact.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
sh64-media.cpu Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
simplify.inc Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00