binutils-gdb/include/opcode
Andrew Pinski dd6a37e700 opcode/
2011-11-29  Andrew Pinski  <apinski@cavium.com>

        * mips-dis.c (mips_arch_choices): Add Octeon+.
        * mips-opc.c (IOCT): Include Octeon+.
        (IOCTP): New macro.
        (mips_builtin_opcodes): Add "saa" and "saad".
bfd/
2011-11-29  Andrew Pinski  <apinski@cavium.com>

        * archures.c (bfd_mach_mips_octeonp): New macro.
        * bfd-in2.h: Regenerate.
        * bfd/cpu-mips.c (I_mipsocteonp): New enum value.
        (arch_info_struct): Add bfd_mach_mips_octeonp.
        * elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp.
        (mips_mach_extensions): Add bfd_mach_mips_octeonp.
include/opcodes/
2011-11-29  Andrew Pinski  <apinski@cavium.com>

        * mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
        (INSN_OCTEONP): New macro.
        (CPU_OCTEONP): New macro.
        (OPCODE_IS_MEMBER): Add Octeon+.
        (M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
gas/
2011-11-29  Andrew Pinski  <apinski@cavium.com>

        * config/tc-mips.c (CPU_IS_OCTEON): New macro function.
        (CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
        (NO_ISA_COP): Likewise.
        (macro) <ld_st>: Add support when off0 is true.
        Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
        (mips_cpu_info_table): Add octeon+.
        * doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
gas/testsuite/
2011-11-29  Andrew Pinski  <apinski@cavium.com>

        * gas/mips/mips.exp: Add octeon+ for an architecture.
        Run octeon-saa-saad test.
        (run_dump_test_arch): For Octeon architectures, also try octeon@.
        * gas/mips/octeon-pref.d: Remove -march=octeon from command line.
        * gas/mips/octeon.d: Likewise.
        * gas/mips/octeon-saa-saad.d: New file.
        * gas/mips/octeon-saa-saad.s: New file
2011-11-29 20:28:55 +00:00
..
alpha.h
arc.h
arm.h 2011-05-31 Paul Brook <paul@codesourcery.com> 2011-05-31 14:12:55 +00:00
avr.h 2011-07-01 Eric B. Weddington <eric.weddington@atmel.com> 2011-07-01 17:14:03 +00:00
bfin.h sim: bfin: fix sign extension in dsp insns with MM flag 2011-06-18 19:42:55 +00:00
cgen.h
ChangeLog opcode/ 2011-11-29 20:28:55 +00:00
ChangeLog-9103
convex.h
cr16.h
cris.h
crx.h
d10v.h
d30v.h
dlx.h
h8300.h
hppa.h
i370.h
i386.h
i860.h
i960.h
ia64.h
m68hc11.h
m68k.h
m88k.h
mips.h opcode/ 2011-11-29 20:28:55 +00:00
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430.h
np1.h
ns32k.h
or32.h
pdp11.h
pj.h
pn.h
ppc.h
pyr.h
rl78.h [.] 2011-11-02 03:09:11 +00:00
rx.h
s390.h
score-datadep.h
score-inst.h
sparc.h Annotate sparc objects with cpu hardware capabilities used. 2011-09-21 20:49:16 +00:00
spu-insns.h
spu.h
tahoe.h
tic4x.h
tic6x-control-registers.h
tic6x-insn-formats.h
tic6x-opcode-table.h
tic6x.h
tic30.h
tic54x.h
tic80.h
tilegx.h * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. 2011-06-13 15:18:54 +00:00
tilepro.h * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. 2011-06-13 15:18:54 +00:00
v850.h
vax.h