Steve Ellcey 37cb8f8e70 2012-10-04 Chao-ying Fu <fu@mips.com> ...

Steve Ellcey  <sellcey@mips.com>

	* mips/mips3264r2.igen (rdhwr): New.

2012-10-03 21:11:46 +00:00

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arm

PR sim/14540

2012-09-03 10:13:11 +00:00

avr

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bfin

sim: bfin: set bfrom alias field to correct size

2012-08-01 03:31:55 +00:00

common

sim: cr16: update syscall list

2012-08-30 07:05:19 +00:00

cr16

sim: cr16: improve trap handling

2012-08-30 06:10:28 +00:00

cris

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d10v

include "config.h" instead of BFD's sysdep.h in d10v/interp.c

2012-06-19 22:46:57 +00:00

erc32

oops - acxidentally omitted from previous delta.

2012-08-16 08:38:45 +00:00

frv

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h8300

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igen

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iq2000

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lm32

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m32c

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m32r

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m68hc11

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mcore

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microblaze

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mips

2012-10-04 Chao-ying Fu <fu@mips.com>

2012-10-03 21:11:46 +00:00

mn10300

* interp.c: Include config.h first. Do not include sysdep.h.

2012-06-17 18:56:31 +00:00

moxie

Adjust for branch target encoding change

2012-09-08 01:26:07 +00:00

ppc

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rl78

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rx

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sh

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sh64

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testsuite

2012-09-24 Steve Ellcey <sellcey@mips.com>

2012-09-24 18:03:18 +00:00

v850

* v850.igen (W,WWWW): Correct computation of register number.

2012-09-13 08:09:26 +00:00

.gitignore

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ChangeLog

Forgot to include ChangeLog in last checkin.

2012-09-24 18:04:03 +00:00

configure

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configure.ac

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configure.tgt

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MAINTAINERS

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Makefile.in

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README-HACKING

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