fbaf61ad52
We have not only removed all unsupported and obsolete code, but also supported lost of new features, including better link-time relaxations and TLS implementations. Besides, the files generated by the newly assembler and linker usually get higher performance and more optimized code size. ld * emultempl/nds32elf.em (hyper_relax): New variable. (nds32_elf_create_output_section_statements): the parameters of bfd_elf32_nds32_set_target_option (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Add new option --mhyper-relax. * emultempl/nds32elf.em (nds32_elf_after_open): Updated. * emultempl/nds32elf.em (tls_desc_trampoline): New variable. * (nds32_elf_create_output_section_statements): Updated. * (nds32_elf_after_parse): Disable relaxations when PIC is enable. * (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Add new option --m[no-]tlsdesc-trampoline. include * elf/nds32.h: Remove the unused target features. * dis-asm.h (disassemble_init_nds32): Declared. * elf/nds32.h (E_NDS32_NULL): Removed. (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New. * opcode/nds32.h: Ident. (N32_SUB6, INSN_LW): New macros. (enum n32_opcodes): Updated. * elf/nds32.h: Doc fixes. * elf/nds32.h: Add R_NDS32_LSI. * elf/nds32.h: Add new relocations for TLS. gas * config/tc-nds32.c: Remove the unused target features. (nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp, nds32_set_elf_flags_by_insn, nds32_insert_relax_entry, nds32_apply_fix): Likewise. (nds32_no_ex9_begin): Removed. * config/tc-nds32.c (add_mapping_symbol_for_align, make_mapping_symbol, add_mapping_symbol): New functions. * config/tc-nds32.h (enum mstate): New. (nds32_segment_info_type): Likewise. * configure.ac (--enable-dsp-ext, --enable-zol-ext): New options. * config.in: Regenerated. * configure: Regenerated. * config/tc-nds32.c (nds32_dx_regs): Set the value according to the configuration. (nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext): Likewise. (nds32_dsp_ext): New variable. Set the value according to the configuration. (nds32_zol_ext): Likewise. (asm_desc, nds32_pseudo_opcode_table): Make them static. (nds32_set_elf_flags_by_insn): Updated. (nds32_check_insn_available): Updated. (nds32_str_tolower): New function. * config/tc-nds32.c (relax_table): Updated. (md_begin): Updated. (md_assemble): Use XNEW macro to allocate space for `insn.info', and then remember to free it. (md_section_align): Cast (-1) to ValueT. (nds32_get_align): Cast (~0U) to addressT. (nds32_relax_branch_instructions): Updated. (md_convert_frag): Add new local variable `final_r_type'. (invalid_prev_frag): Add new bfd_boolean parameter `relax'. All callers changed. * config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field. (struct nds32_hint_map): Add `option_list' field. (struct suffix_name, suffix_table): Remove the unused `pic' field. (do_pseudo_b, do_pseudo_bal): Remove the suffix checking. (do_pseudo_la_internal, do_pseudo_pushpopm): Indent. (relax_hint_bias, relax_hint_id_current): New static variables. (reset_bias, relax_hint_begin): New variables. (nds_itoa): New function. (CLEAN_REG, GET_OPCODE): New macros. (struct relax_hint_id): New. (nds32_relax_hint): For .relax_hint directive, we can use `begin' and `end' to mark the relax pattern without giving exactly id number. (nds32_elf_append_relax_relocs): Handle the case that the .relax_hint directives are attached to pseudo instruction. (nds32_elf_save_pseudo_pattern): Change the second parameter from instruction's opcode to byte code. (nds32_elf_build_relax_relation): Add new bfd_boolean parameter `pseudo_hint'. (nds32_lookup_pseudo_opcode): Fix the overflow issue. (enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT. (nds32_elf_record_fixup_exp, relax_ls_table, hint_map, nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name): Updated. * config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6. (enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and NDS32_RELAX_HINT_LA_GOTOFF. * config/tc-nds32.h (relax_ls_table): Add floating load/store to gp relax pattern. (hint_map, nds32_find_reloc_table): Likewise. * configure.ac: Define NDS32_LINUX_TOOLCHAIN. * configure: Regenerated. * config.in: Regenerated. * config/tc-nds32.h (enum nds32_ramp): Updated. (enum nds32_relax_hint_type): Likewise. * config/tc-nds32.c: Include "errno.h" and "limits.h". (relax_ls_table): Add TLS relax patterns. (nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on each instructions of TLS patterns. (nds32_elf_record_fixup_exp): Updated. (nds32_apply_fix): Likewise. (suffix_table): Add TLSDESC suffix. binutils* testsuite/binutils-all/objcopy.exp: Set the unsupported reloc number from 215 to 255 for NDS32. bfd * elf32-nds32.c (nds32_elf_relax_loadstore): Remove the unused target features. (bfd_elf32_nds32_set_target_option): Remove the unused parameters. (nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12, nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls, nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff nds32_elf_relax_gotoff_suff, calculate_plt_memory_address, calculate_plt_offset, calculate_got_memory_address, nds32_elf_check_dup_relocs): Removed. All callers changed. * elf32-nds32.h: Remove the unused macros and defines. (elf_nds32_link_hash_table): Remove the unused variable. (bfd_elf32_nds32_set_target_option): Update prototype. (nds32_elf_ex9_init): Removed. * elf32-nds32.c (nds32_convert_32_to_16): Updated. * elf32-nds32.c (HOWTO2, HOWTO3): Define new HOWTO macros to initialize array nds32_elf_howto_table in any order without lots of EMPTY_HOWTO. (nds32_reloc_map): Updated. * reloc.c: Add BFD_RELOC_NDS32_LSI. * bfd-in2.h: Regenerated. * bfd/libbfd.h: Regenerated. * elf32-nds32.c (nds32_elf_relax_howto_table): Add R_NDS32_LSI. (nds32_reloc_map): Likewise. (nds32_elf_relax_flsi): New function. (nds32_elf_relax_section): Support floating load/store relaxation. * elf32-nds32.c (NDS32_GUARD_SEC_P, elf32_nds32_local_gp_offset): New macro. (struct elf_nds32_link_hash_entry): New `offset_to_gp' field. (struct elf_nds32_obj_tdata): New `offset_to_gp' and `hdr_size' fields. (elf32_nds32_allocate_local_sym_info, nds32_elf_relax_guard, nds32_elf_is_target_special_symbol, nds32_elf_maybe_function_sym): New functions. (nds32_info_to_howto_rel): Add BFD_ASSERT. (bfd_elf32_bfd_reloc_type_table_lookup, nds32_elf_link_hash_newfunc, nds32_elf_link_hash_table_create, nds32_elf_relocate_section, nds32_elf_relax_loadstore, nds32_elf_relax_lo12, nds32_relax_adjust_label, bfd_elf32_nds32_set_target_option, nds32_fag_mark_relax): Updated. (nds32_elf_final_sda_base): Improve it to find the better gp value. (insert_nds32_elf_blank): Must consider `len' when inserting blanks. * elf32-nds32.h (bfd_elf32_nds32_set_target_option): Update prototype. (struct elf_nds32_link_hash_table): Add new variable `hyper_relax'. * elf32-nds32.c (elf32_nds32_allocate_dynrelocs): New function. (create_got_section): Likewise. (allocate_dynrelocs, nds32_elf_size_dynamic_sections, nds32_elf_relocate_section, nds32_elf_finish_dynamic_symbol): Updated. (nds32_elf_check_relocs): Fix the issue that the shared library may has TEXTREL entry in the dynamic section. (nds32_elf_create_dynamic_sections): Enable to call readonly_dynrelocs since the TEXTREL issue is fixed in the nds32_elf_check_relocs. (nds32_elf_finish_dynamic_sections): Update and add DT_RELASZ dynamic entry. (calculate_offset): Remove the unused parameter `pic_ext_target' and related codes. All callers changed. (elf_backend_dtrel_excludes_plt): Disable it temporarily since it will cause some errors for our test cases. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Allow to link the generic object. * reloc.c: Add TLS relocations. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. * elf32-nds32.h (struct section_id_list_t): New. (elf32_nds32_lookup_section_id, elf32_nds32_check_relax_group, elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New prototypes. (elf32_nds32_compute_jump_table_size, elf32_nds32_local_tlsdesc_gotent): New macro. (nds32_insertion_sort, bfd_elf32_nds32_set_target_option, elf_nds32_link_hash_table): Updated. * elf32-nds32.c (enum elf_nds32_tls_type): New. (struct elf32_nds32_relax_group_t, struct relax_group_list_t): New. (elf32_nds32_add_dynreloc, patch_tls_desc_to_ie, get_tls_type, fls, ones32, list_insert, list_insert_sibling, dump_chain, elf32_nds32_check_relax_group, elf32_nds32_lookup_section_id, elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New functions. (elf_nds32_obj_tdata): Add new fields. (elf32_nds32_relax_group_ptr, nds32_elf_local_tlsdesc_gotent): New macros. (nds32_elf_howto_table): Add TLS relocations. (nds32_reloc_map): Likewise. (nds32_elf_copy_indirect_symbol, nds32_elf_size_dynamic_sections, nds32_elf_finish_dynamic_symbol, elf32_nds32_allocate_local_sym_info, nds32_elf_relocate_section, bfd_elf32_nds32_set_target_option, nds32_elf_check_relocs, allocate_dynrelocs): Updated. (nds32_elf_relax_section): Call nds32_elf_unify_tls_model. (dtpoff_base): Rename it to `gottpof' and then update it. opcodes * nds32-asm.c (operand_fields): Remove the unused fields. (nds32_opcodes): Remove the unused instructions. * nds32-dis.c (nds32_ex9_info): Removed. (nds32_parse_opcode): Updated. (print_insn_nds32): Likewise. * nds32-asm.c (config.h, stdlib.h, string.h): New includes. (LEX_SET_FIELD, LEX_GET_FIELD): Update defines. (nds32_asm_init, build_operand_hash_table, build_keyword_hash_table, build_opcode_hash_table): New functions. (nds32_keyword_table, nds32_keyword_count_table, nds32_field_table, nds32_opcode_table): New. (hw_ktabs): Declare it to a pointer rather than an array. (build_hash_table): Removed. * nds32-asm.h (enum): Add SYN_INPUT, SYN_OUTPUT, SYN_LOPT, SYN_ROPT and upadte HW_GPR and HW_INT. * nds32-dis.c (keywords): Remove const. (match_field): New function. (nds32_parse_opcode): Updated. * disassemble.c (disassemble_init_for_target): Add disassemble_init_nds32. * nds32-dis.c (eum map_type): New. (nds32_private_data): Likewise. (get_mapping_symbol_type, is_mapping_symbol, nds32_symbol_is_valid, nds32_add_opcode_hash_table, disassemble_init_nds32): New functions. (print_insn_nds32): Updated. * nds32-asm.c (parse_aext_reg): Add new parameter. (parse_re, parse_re2, parse_aext_reg): Only reduced registers are allowed to use. All callers changed. * nds32-asm.c (keyword_usr, keyword_sr): Updated. (operand_fields): Add new fields. (nds32_opcodes): Add new instructions. (keyword_aridxi_mx): New keyword. * nds32-asm.h (enum): Add NASM_ATTR_DSP_ISAEXT, HW_AEXT_ARIDXI_MX and NASM_ATTR_ZOL. (ALU2_1, ALU2_2, ALU2_3): New macros. * nds32-dis.c (nds32_filter_unknown_insn): Updated.
742 lines
16 KiB
C
742 lines
16 KiB
C
/* Select disassembly routine for specified architecture.
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Copyright (C) 1994-2018 Free Software Foundation, Inc.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "disassemble.h"
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#include "safe-ctype.h"
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#include <assert.h>
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#ifdef ARCH_all
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#define ARCH_aarch64
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#define ARCH_alpha
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#define ARCH_arc
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#define ARCH_arm
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#define ARCH_avr
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#define ARCH_bfin
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#define ARCH_cr16
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#define ARCH_cris
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#define ARCH_crx
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#define ARCH_csky
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#define ARCH_d10v
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#define ARCH_d30v
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#define ARCH_dlx
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#define ARCH_epiphany
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#define ARCH_fr30
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#define ARCH_frv
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#define ARCH_ft32
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#define ARCH_h8300
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#define ARCH_hppa
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#define ARCH_i386
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#define ARCH_ia64
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#define ARCH_ip2k
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#define ARCH_iq2000
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#define ARCH_lm32
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#define ARCH_m32c
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#define ARCH_m32r
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#define ARCH_m68hc11
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#define ARCH_m68hc12
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#define ARCH_m68k
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#define ARCH_mcore
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#define ARCH_mep
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#define ARCH_metag
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#define ARCH_microblaze
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#define ARCH_mips
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#define ARCH_mmix
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#define ARCH_mn10200
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#define ARCH_mn10300
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#define ARCH_moxie
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#define ARCH_mt
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#define ARCH_msp430
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#define ARCH_nds32
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#define ARCH_nfp
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#define ARCH_nios2
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#define ARCH_ns32k
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#define ARCH_or1k
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#define ARCH_pdp11
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#define ARCH_pj
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#define ARCH_powerpc
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#define ARCH_pru
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#define ARCH_riscv
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#define ARCH_rs6000
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#define ARCH_rl78
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#define ARCH_rx
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#define ARCH_s12z
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#define ARCH_s390
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#define ARCH_score
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#define ARCH_sh
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#define ARCH_sparc
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#define ARCH_spu
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#define ARCH_tic30
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#define ARCH_tic4x
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#define ARCH_tic54x
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#define ARCH_tic6x
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#define ARCH_tic80
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#define ARCH_tilegx
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#define ARCH_tilepro
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#define ARCH_v850
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#define ARCH_vax
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#define ARCH_visium
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#define ARCH_wasm32
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#define ARCH_xstormy16
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#define ARCH_xc16x
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#define ARCH_xgate
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#define ARCH_xtensa
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#define ARCH_z80
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#define ARCH_z8k
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#endif
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#ifdef ARCH_m32c
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#include "m32c-desc.h"
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#endif
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disassembler_ftype
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disassembler (enum bfd_architecture a,
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bfd_boolean big ATTRIBUTE_UNUSED,
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unsigned long mach ATTRIBUTE_UNUSED,
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bfd *abfd ATTRIBUTE_UNUSED)
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{
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disassembler_ftype disassemble;
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switch (a)
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{
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/* If you add a case to this table, also add it to the
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ARCH_all definition right above this function. */
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#ifdef ARCH_aarch64
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case bfd_arch_aarch64:
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disassemble = print_insn_aarch64;
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break;
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#endif
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#ifdef ARCH_alpha
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case bfd_arch_alpha:
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disassemble = print_insn_alpha;
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break;
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#endif
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#ifdef ARCH_arc
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case bfd_arch_arc:
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disassemble = arc_get_disassembler (abfd);
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break;
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#endif
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#ifdef ARCH_arm
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case bfd_arch_arm:
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if (big)
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disassemble = print_insn_big_arm;
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else
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disassemble = print_insn_little_arm;
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break;
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#endif
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#ifdef ARCH_avr
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case bfd_arch_avr:
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disassemble = print_insn_avr;
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break;
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#endif
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#ifdef ARCH_bfin
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case bfd_arch_bfin:
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disassemble = print_insn_bfin;
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break;
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#endif
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#ifdef ARCH_cr16
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case bfd_arch_cr16:
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disassemble = print_insn_cr16;
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break;
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#endif
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#ifdef ARCH_cris
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case bfd_arch_cris:
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disassemble = cris_get_disassembler (abfd);
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break;
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#endif
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#ifdef ARCH_crx
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case bfd_arch_crx:
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disassemble = print_insn_crx;
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break;
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#endif
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#ifdef ARCH_csky
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case bfd_arch_csky:
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disassemble = csky_get_disassembler (abfd);
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break;
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#endif
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#ifdef ARCH_d10v
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case bfd_arch_d10v:
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disassemble = print_insn_d10v;
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break;
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#endif
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#ifdef ARCH_d30v
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case bfd_arch_d30v:
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disassemble = print_insn_d30v;
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break;
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#endif
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#ifdef ARCH_dlx
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case bfd_arch_dlx:
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/* As far as I know we only handle big-endian DLX objects. */
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disassemble = print_insn_dlx;
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break;
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#endif
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#ifdef ARCH_h8300
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case bfd_arch_h8300:
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if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
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disassemble = print_insn_h8300h;
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else if (mach == bfd_mach_h8300s
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|| mach == bfd_mach_h8300sn
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|| mach == bfd_mach_h8300sx
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|| mach == bfd_mach_h8300sxn)
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disassemble = print_insn_h8300s;
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else
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disassemble = print_insn_h8300;
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break;
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#endif
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#ifdef ARCH_hppa
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case bfd_arch_hppa:
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disassemble = print_insn_hppa;
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break;
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#endif
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#ifdef ARCH_i386
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case bfd_arch_i386:
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case bfd_arch_iamcu:
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case bfd_arch_l1om:
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case bfd_arch_k1om:
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disassemble = print_insn_i386;
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break;
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#endif
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#ifdef ARCH_ia64
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case bfd_arch_ia64:
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disassemble = print_insn_ia64;
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break;
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#endif
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#ifdef ARCH_ip2k
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case bfd_arch_ip2k:
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disassemble = print_insn_ip2k;
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break;
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#endif
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#ifdef ARCH_epiphany
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case bfd_arch_epiphany:
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disassemble = print_insn_epiphany;
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break;
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#endif
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#ifdef ARCH_fr30
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case bfd_arch_fr30:
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disassemble = print_insn_fr30;
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break;
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#endif
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#ifdef ARCH_lm32
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case bfd_arch_lm32:
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disassemble = print_insn_lm32;
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break;
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#endif
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#ifdef ARCH_m32r
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case bfd_arch_m32r:
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disassemble = print_insn_m32r;
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break;
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#endif
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#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
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|| defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
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case bfd_arch_m68hc11:
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disassemble = print_insn_m68hc11;
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break;
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case bfd_arch_m68hc12:
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disassemble = print_insn_m68hc12;
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break;
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case bfd_arch_m9s12x:
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disassemble = print_insn_m9s12x;
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break;
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case bfd_arch_m9s12xg:
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disassemble = print_insn_m9s12xg;
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break;
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#endif
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#if defined(ARCH_s12z)
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case bfd_arch_s12z:
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disassemble = print_insn_s12z;
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break;
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#endif
|
|
#ifdef ARCH_m68k
|
|
case bfd_arch_m68k:
|
|
disassemble = print_insn_m68k;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mt
|
|
case bfd_arch_mt:
|
|
disassemble = print_insn_mt;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_microblaze
|
|
case bfd_arch_microblaze:
|
|
disassemble = print_insn_microblaze;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_msp430
|
|
case bfd_arch_msp430:
|
|
disassemble = print_insn_msp430;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_nds32
|
|
case bfd_arch_nds32:
|
|
disassemble = print_insn_nds32;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_nfp
|
|
case bfd_arch_nfp:
|
|
disassemble = print_insn_nfp;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_ns32k
|
|
case bfd_arch_ns32k:
|
|
disassemble = print_insn_ns32k;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mcore
|
|
case bfd_arch_mcore:
|
|
disassemble = print_insn_mcore;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mep
|
|
case bfd_arch_mep:
|
|
disassemble = print_insn_mep;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_metag
|
|
case bfd_arch_metag:
|
|
disassemble = print_insn_metag;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mips
|
|
case bfd_arch_mips:
|
|
if (big)
|
|
disassemble = print_insn_big_mips;
|
|
else
|
|
disassemble = print_insn_little_mips;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mmix
|
|
case bfd_arch_mmix:
|
|
disassemble = print_insn_mmix;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mn10200
|
|
case bfd_arch_mn10200:
|
|
disassemble = print_insn_mn10200;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mn10300
|
|
case bfd_arch_mn10300:
|
|
disassemble = print_insn_mn10300;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_nios2
|
|
case bfd_arch_nios2:
|
|
if (big)
|
|
disassemble = print_insn_big_nios2;
|
|
else
|
|
disassemble = print_insn_little_nios2;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_or1k
|
|
case bfd_arch_or1k:
|
|
disassemble = print_insn_or1k;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_pdp11
|
|
case bfd_arch_pdp11:
|
|
disassemble = print_insn_pdp11;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_pj
|
|
case bfd_arch_pj:
|
|
disassemble = print_insn_pj;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_powerpc
|
|
case bfd_arch_powerpc:
|
|
#endif
|
|
#ifdef ARCH_rs6000
|
|
case bfd_arch_rs6000:
|
|
#endif
|
|
#if defined ARCH_powerpc || defined ARCH_rs6000
|
|
if (big)
|
|
disassemble = print_insn_big_powerpc;
|
|
else
|
|
disassemble = print_insn_little_powerpc;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_pru
|
|
case bfd_arch_pru:
|
|
disassemble = print_insn_pru;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_riscv
|
|
case bfd_arch_riscv:
|
|
disassemble = print_insn_riscv;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_rl78
|
|
case bfd_arch_rl78:
|
|
disassemble = rl78_get_disassembler (abfd);
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_rx
|
|
case bfd_arch_rx:
|
|
disassemble = print_insn_rx;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_s390
|
|
case bfd_arch_s390:
|
|
disassemble = print_insn_s390;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_score
|
|
case bfd_arch_score:
|
|
if (big)
|
|
disassemble = print_insn_big_score;
|
|
else
|
|
disassemble = print_insn_little_score;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_sh
|
|
case bfd_arch_sh:
|
|
disassemble = print_insn_sh;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_sparc
|
|
case bfd_arch_sparc:
|
|
disassemble = print_insn_sparc;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_spu
|
|
case bfd_arch_spu:
|
|
disassemble = print_insn_spu;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tic30
|
|
case bfd_arch_tic30:
|
|
disassemble = print_insn_tic30;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tic4x
|
|
case bfd_arch_tic4x:
|
|
disassemble = print_insn_tic4x;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tic54x
|
|
case bfd_arch_tic54x:
|
|
disassemble = print_insn_tic54x;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tic6x
|
|
case bfd_arch_tic6x:
|
|
disassemble = print_insn_tic6x;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tic80
|
|
case bfd_arch_tic80:
|
|
disassemble = print_insn_tic80;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_ft32
|
|
case bfd_arch_ft32:
|
|
disassemble = print_insn_ft32;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_v850
|
|
case bfd_arch_v850:
|
|
case bfd_arch_v850_rh850:
|
|
disassemble = print_insn_v850;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_wasm32
|
|
case bfd_arch_wasm32:
|
|
disassemble = print_insn_wasm32;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_xgate
|
|
case bfd_arch_xgate:
|
|
disassemble = print_insn_xgate;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_xstormy16
|
|
case bfd_arch_xstormy16:
|
|
disassemble = print_insn_xstormy16;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_xc16x
|
|
case bfd_arch_xc16x:
|
|
disassemble = print_insn_xc16x;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_xtensa
|
|
case bfd_arch_xtensa:
|
|
disassemble = print_insn_xtensa;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_z80
|
|
case bfd_arch_z80:
|
|
disassemble = print_insn_z80;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_z8k
|
|
case bfd_arch_z8k:
|
|
if (mach == bfd_mach_z8001)
|
|
disassemble = print_insn_z8001;
|
|
else
|
|
disassemble = print_insn_z8002;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_vax
|
|
case bfd_arch_vax:
|
|
disassemble = print_insn_vax;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_visium
|
|
case bfd_arch_visium:
|
|
disassemble = print_insn_visium;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_frv
|
|
case bfd_arch_frv:
|
|
disassemble = print_insn_frv;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_moxie
|
|
case bfd_arch_moxie:
|
|
disassemble = print_insn_moxie;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_iq2000
|
|
case bfd_arch_iq2000:
|
|
disassemble = print_insn_iq2000;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_m32c
|
|
case bfd_arch_m32c:
|
|
disassemble = print_insn_m32c;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tilegx
|
|
case bfd_arch_tilegx:
|
|
disassemble = print_insn_tilegx;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tilepro
|
|
case bfd_arch_tilepro:
|
|
disassemble = print_insn_tilepro;
|
|
break;
|
|
#endif
|
|
default:
|
|
return 0;
|
|
}
|
|
return disassemble;
|
|
}
|
|
|
|
void
|
|
disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
|
|
{
|
|
#ifdef ARCH_aarch64
|
|
print_aarch64_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_arc
|
|
print_arc_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_arm
|
|
print_arm_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_mips
|
|
print_mips_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_nfp
|
|
print_nfp_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_powerpc
|
|
print_ppc_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_riscv
|
|
print_riscv_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_i386
|
|
print_i386_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_s390
|
|
print_s390_disassembler_options (stream);
|
|
#endif
|
|
#ifdef ARCH_wasm32
|
|
print_wasm32_disassembler_options (stream);
|
|
#endif
|
|
|
|
return;
|
|
}
|
|
|
|
void
|
|
disassemble_init_for_target (struct disassemble_info * info)
|
|
{
|
|
if (info == NULL)
|
|
return;
|
|
|
|
switch (info->arch)
|
|
{
|
|
#ifdef ARCH_aarch64
|
|
case bfd_arch_aarch64:
|
|
info->symbol_is_valid = aarch64_symbol_is_valid;
|
|
info->disassembler_needs_relocs = TRUE;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_arm
|
|
case bfd_arch_arm:
|
|
info->symbol_is_valid = arm_symbol_is_valid;
|
|
info->disassembler_needs_relocs = TRUE;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_csky
|
|
case bfd_arch_csky:
|
|
info->symbol_is_valid = csky_symbol_is_valid;
|
|
info->disassembler_needs_relocs = TRUE;
|
|
break;
|
|
#endif
|
|
|
|
#ifdef ARCH_ia64
|
|
case bfd_arch_ia64:
|
|
info->skip_zeroes = 16;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_tic4x
|
|
case bfd_arch_tic4x:
|
|
info->skip_zeroes = 32;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_mep
|
|
case bfd_arch_mep:
|
|
info->skip_zeroes = 256;
|
|
info->skip_zeroes_at_end = 0;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_metag
|
|
case bfd_arch_metag:
|
|
info->disassembler_needs_relocs = TRUE;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_m32c
|
|
case bfd_arch_m32c:
|
|
/* This processor in fact is little endian. The value set here
|
|
reflects the way opcodes are written in the cgen description. */
|
|
info->endian = BFD_ENDIAN_BIG;
|
|
if (! info->insn_sets)
|
|
{
|
|
info->insn_sets = cgen_bitset_create (ISA_MAX);
|
|
if (info->mach == bfd_mach_m16c)
|
|
cgen_bitset_set (info->insn_sets, ISA_M16C);
|
|
else
|
|
cgen_bitset_set (info->insn_sets, ISA_M32C);
|
|
}
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_pru
|
|
case bfd_arch_pru:
|
|
info->disassembler_needs_relocs = TRUE;
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_powerpc
|
|
case bfd_arch_powerpc:
|
|
#endif
|
|
#ifdef ARCH_rs6000
|
|
case bfd_arch_rs6000:
|
|
#endif
|
|
#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
|
|
disassemble_init_powerpc (info);
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_wasm32
|
|
case bfd_arch_wasm32:
|
|
disassemble_init_wasm32 (info);
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_s390
|
|
case bfd_arch_s390:
|
|
disassemble_init_s390 (info);
|
|
break;
|
|
#endif
|
|
#ifdef ARCH_nds32
|
|
case bfd_arch_nds32:
|
|
disassemble_init_nds32 (info);
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Remove whitespace and consecutive commas from OPTIONS. */
|
|
|
|
char *
|
|
remove_whitespace_and_extra_commas (char *options)
|
|
{
|
|
char *str;
|
|
size_t i, len;
|
|
|
|
if (options == NULL)
|
|
return NULL;
|
|
|
|
/* Strip off all trailing whitespace and commas. */
|
|
for (len = strlen (options); len > 0; len--)
|
|
{
|
|
if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
|
|
break;
|
|
options[len - 1] = '\0';
|
|
}
|
|
|
|
/* Convert all remaining whitespace to commas. */
|
|
for (i = 0; options[i] != '\0'; i++)
|
|
if (ISSPACE (options[i]))
|
|
options[i] = ',';
|
|
|
|
/* Remove consecutive commas. */
|
|
for (str = options; *str != '\0'; str++)
|
|
if (*str == ',' && (*(str + 1) == ',' || str == options))
|
|
{
|
|
char *next = str + 1;
|
|
while (*next == ',')
|
|
next++;
|
|
len = strlen (next);
|
|
if (str != options)
|
|
str++;
|
|
memmove (str, next, len);
|
|
next[len - (size_t)(next - str)] = '\0';
|
|
}
|
|
return (strlen (options) != 0) ? options : NULL;
|
|
}
|
|
|
|
/* Like STRCMP, but treat ',' the same as '\0' so that we match
|
|
strings like "foobar" against "foobar,xxyyzz,...". */
|
|
|
|
int
|
|
disassembler_options_cmp (const char *s1, const char *s2)
|
|
{
|
|
unsigned char c1, c2;
|
|
|
|
do
|
|
{
|
|
c1 = (unsigned char) *s1++;
|
|
if (c1 == ',')
|
|
c1 = '\0';
|
|
c2 = (unsigned char) *s2++;
|
|
if (c2 == ',')
|
|
c2 = '\0';
|
|
if (c1 == '\0')
|
|
return c1 - c2;
|
|
}
|
|
while (c1 == c2);
|
|
|
|
return c1 - c2;
|
|
}
|