Jan Beulich 5437a02abc Arm64: correct address index operands for LD1RO{H,W,D}
Just like their LD1RQ{H,W,D} counterparts, as per the specification the
index registers get scaled by element size.
2020-01-03 10:16:44 +01:00
..
2020-01-01 18:12:08 +10:30
2019-12-17 16:36:54 +10:30