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binutils-gdb/gas/ChangeLog
Maciej W. Rozycki 1e3f554897 MIPS/GAS: Correct `mips-*-windiss' target emulation configuration 
Fix a commit 0a44bf6950 ("mips-vxworks support"),
<https://sourceware.org/ml/binutils/2006-03/msg00179.html>, regression
and override the choice of the `vxworks' target environment introduced
with commit ea3eed1500 ("Add generic vxworks GAS target."),
<https://sourceware.org/ml/binutils/2005-01/msg00052.html>, for
`mips-*-windiss' targets as they have not been converted to the VxWorks
target format introduced with the former commit, removing a GAS target
format selection failure:

Assembler messages:
Fatal error: selected target format 'elf32-bigmips-vxworks' unknown

on any assembly attempt with `mips-windiss' and equivalent target
configurations.

	gas/
	* configure.tgt: Use generic emulation for `mips-*-windiss',
	overriding the blanket choice made for `*-*-windiss'.
2018-01-26 23:05:05 +00:00

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2018-01-26 Maciej W. Rozycki <macro@mips.com>
* configure.tgt: Use generic emulation for `mips-*-windiss',
overriding the blanket choice made for `*-*-windiss'.
2018-01-26 Maciej W. Rozycki <macro@mips.com>
* configure.tgt: Use `mips-*-sysv4*' rather than
`mips-*-sysv4*MP*'.
2018-01-24 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): add entries for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
(md_apply_fix): Likewise
* testsuite/gas/aarch64/prel_g0.s: New.
* testsuite/gas/aarch64/prel_g0.d: New.
* testsuite/gas/aarch64/prel_g0_nc.s: New.
* testsuite/gas/aarch64/prel_g0_nc.d: New.
* testsuite/gas/aarch64/prel_g1.s: New.
* testsuite/gas/aarch64/prel_g1.d: New.
* testsuite/gas/aarch64/prel_g1_nc.s: New.
* testsuite/gas/aarch64/prel_g1_nc.d: New.
* testsuite/gas/aarch64/prel_g2.s: New.
* testsuite/gas/aarch64/prel_g2.d: New.
* testsuite/gas/aarch64/prel_g2_nc.s: New.
* testsuite/gas/aarch64/prel_g2_nc.d: New.
* testsuite/gas/aarch64/prel_g3.s: New.
* testsuite/gas/aarch64/prel_g3.d: New.
2018-01-23 Maciej W. Rozycki <macro@mips.com>
* configure.ac: Also set `mips_default_abi' to N32_ABI for
`mips64*-ps2-elf*'.
* configure: Regenerate.
2018-01-23 Maciej W. Rozycki <macro@mips.com>
* config/tc-mips.c (options): Remove OPTION_COMPAT_ARCH_BASE
enum value.
2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* config/tc-i386.c (cpu_arch): Add .pconfig.
* doc/c-i386.texi: Document .pconfig.
* testsuite/gas/i386/i386.exp: Add PCONFIG tests.
* testsuite/gas/i386/pconfig-intel.d: New test.
* testsuite/gas/i386/pconfig.d: Likewise.
* testsuite/gas/i386/pconfig.s: Likewise.
* testsuite/gas/i386/x86-64-pconfig-intel.d: Likewise.
* testsuite/gas/i386/x86-64-pconfig.d: Likewise.
* testsuite/gas/i386/x86-64-pconfig.s: Likewise.
2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* config/tc-i386.c (cpu_arch): Add .wbnoinvd.
* doc/c-i386.texi: Document .wbnoinvd.
* testsuite/gas/i386/i386.exp: Add WBNOINVD tests.
* testsuite/gas/i386/wbnoinvd-intel.d: New test.
* testsuite/gas/i386/wbnoinvd.d: Likewise.
* testsuite/gas/i386/wbnoinvd.s: Likewise.
* testsuite/gas/i386/x86-64-wbnoinvd-intel.d: Likewise.
* testsuite/gas/i386/x86-64-wbnoinvd.d: Likewise.
* testsuite/gas/i386/x86-64-wbnoinvd.s: Likewise.
2018-01-23 Maciej W. Rozycki <macro@mips.com>
* config/tc-mips.c (md_show_usage): Correctly indicate the
configuration-specific default ABI.
2018-01-23 Maciej W. Rozycki <macro@mips.com>
* config/tc-mips.c (md_show_usage): Report `-mmips16e2' and
`-mno-mips16e2' options.
2018-01-22 Maciej W. Rozycki <macro@mips.com>
* doc/c-mips.texi (MIPS ASE Instruction Generation Overrides):
Correct syntax of the `.set nomips16e2' directive description.
2018-01-22 Oleg Endo <olegendo@gcc.gnu.org>
PR 22737
* config/tc-rx.c (rx_start_line): Handle escaped double-quote character.
* testsuite/gas/rx/pr22737.s: New test.
* testsuite/gas/rx/pr22737.d: Likewise.
* testsuite/gas/rx/rx.exp: Run the new test.
2018-01-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (ToC macro): Remove spurious comment.
(ToU macro): Likewise.
2018-01-17 Jim Wilson <jimw@sifive.com>
* config/tc-riscv.c (validate_riscv_insn) <'z'>: New.
(riscv_ip) <'z'>: New.
2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* config/tc-i386.c (cpu_arch): Delete .cet. Add .ibt, .shstk.
(cpu_noarch): Add noibt, noshstk.
(parse_insn): Change cpucet to cpuibt.
* doc/c-i386.texi: Delete .cet. Add .ibt, .shstk.
* testsuite/gas/i386/cet-ibt-inval.l: New test.
* testsuite/gas/i386/cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/cet-shstk-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.s: Likewise.
2018-01-16 Nick Clifton <nickc@redhat.com>
* po/fr.po: Updated French translation.
2018-01-15 Jim Wilson <jimw@sifive.com>
* testsuite/gas/riscv/c-zero-imm.s: Test addi that compresses to c.nop.
* testsuite/gas/riscv/c-zero-imm.d: Likewise.
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (ToC): Define macro.
(ToU): Likewise.
(insns): Make use of above macros for new instructions introduced in
Armv8-M.
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (insns): Make blxns, bxns, tt, ttt, tta, ttat, vlldm
and vlstm conditionally executable and reindent parameters.
* testsuite/gas/arm/archv8m-cmse-main.s: Add conditional version of
aforementionned instructions.
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (it_fsm_post_encode): Do not warn if targeting M
profile architecture or if in autodetection mode. Clarify that
deprecation is for performance reason and concerns Armv8-A and Armv8-R.
* testsuite/gas/arm/armv8-ar-bad.l: Adapt to new IT deprecation warning
message.
* testsuite/gas/arm/armv8-ar-it-bad.l: Likewise.
* testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l: Likewise.
* testsuite/gas/arm/udf.l: Likewise.
* testsuite/gas/arm/udf.d: Assemble for Armv8-A explicitely.
2018-01-15 Nick Clifton <nickc@redhat.com>
* po/uk.po: Updated Ukranian translation.
2018-01-13 Nick Clifton <nickc@redhat.com>
* po/gas.pot: Regenerated.
2018-01-13 Nick Clifton <nickc@redhat.com>
* configure: Regenerate.
2018-01-13 Nick Clifton <nickc@redhat.com>
2.30 branch created.
* NEWS: Add marker for 2.30.
2018-01-12 Gunther Nikl <gnikl@users.sourceforge.net>
* gas/config/aout_gnu.h (USE_EXTENDED_RELOC): Explicitly
define to 0 and 1. Remove a dangling reference to "AMD 29000"
in a comment.
2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* testsuite/i386/avx512_4fmaps_vl-warn.l: Likewise.
* testsuite/i386/avx512_4fmaps_vl-warn.s: Likewise.
* testsuite/i386/avx512_4fmaps_vl.d: Likewise.
* testsuite/i386/avx512_4fmaps_vl.s: Likewise.
* testsuite/i386/avx512_4vnniw_vl-intel.d: Likewise.
* testsuite/i386/avx512_4vnniw_vl.d: Likewise.
* testsuite/i386/avx512_4vnniw_vl.s: Likewise.
* testsuite/i386/i386.exp: Removed _vl tests for 4fmaps an 4vnniw
tests.
* testsuite/i386/x86-64-avx512_4fmaps_vl-intel.d: Removed.
* testsuite/i386/x86-64-avx512_4fmaps_vl-warn.l: Likewise.
* testsuite/i386/x86-64-avx512_4fmaps_vl-warn.s: Likewise.
* testsuite/i386/x86-64-avx512_4fmaps_vl.d: Likewise.
* testsuite/i386/x86-64-avx512_4fmaps_vl.s: Likewise.
* testsuite/i386/x86-64-avx512_4vnniw_vl-intel.d: Likewise.
* testsuite/i386/x86-64-avx512_4vnniw_vl.d: Likewise.
* testsuite/i386/x86-64-avx512_4vnniw_vl.s: Likewise.
2018-01-11 Alan Modra <amodra@gmail.com>
* config/tc-arm.c (aeabi_set_public_attributes): Avoid false
positive "‘profile’ may be used uninitialized".
2018-01-10 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/avx512_4fmaps.s,
testsuite/gas/i386/avx512_4fmaps_vl.s,
testsuite/gas/i386/x86-64-avx512_4fmaps.s,
testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Actually test
Disp8 forms (and the transition happening at the right
boundary).
* testsuite/gas/i386/avx512_4fmaps.d,
testsuite/gas/i386/avx512_4fmaps-intel.d,
testsuite/gas/i386/avx512_4fmaps_vl.d,
testsuite/gas/i386/avx512_4fmaps_vl-intel.d,
testsuite/gas/i386/x86-64-avx512_4fmaps.d,
testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d,
testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d,
testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Adjust
expectations.
2018-01-10 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/avx512bw.s,
testsuite/gas/i386/avx512bw_vl.s: Add VPCMP* tests with memory
operands.
* testsuite/gas/i386/avx512bw-intel.d,
testsuite/gas/i386/avx512bw.d,
testsuite/gas/i386/avx512bw_vl-intel.d.
testsuite/gas/i386/avx512bw_vl.d: Adjust expectations.
2018-01-09 Jim Wilson <jimw@sifive.com>
* testsuite/gas/riscv/auipc-x0.d: New.
* testsuite/gas/riscv/auipc-x0.s: New.
2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
* config/tc-arm.c (insns): Add csdb, enable for Armv3 and above
in Arm execution state, and Armv6T2 and above in Thumb execution
state.
* testsuite/gas/arm/csdb.s: New.
* testsuite/gas/arm/csdb.d: New.
* testsuite/gas/arm/thumb2_it_bad.l: Add csdb.
* testsuite/gas/arm/thumb2_it_bad.s: Add csdb.
2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
* testsuite/gas/aarch64/system.d: Update expected results to expect
CSDB for hint 0x14.
2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
PR gas/22681
* testsuite/gas/i386/i386.exp: Run x86-64-movd and
x86-64-movd-intel.
* testsuite/gas/i386/x86-64-movd-intel.d: New file.
* testsuite/gas/i386/x86-64-movd.d: Likewise.
* testsuite/gas/i386/x86-64-movd.s: Likewise.
2018-01-08 Nick Clifton <nickc@redhat.com>
PR 22553
* doc/c-i386.texi (i386-Directives): Document the .largecomm
directive.
2018-01-04 Jim Wilson <jimw@sifive.com>
* testsuite/gas/riscv/priv-reg.s: Add missing stval and mtval.
* testsuite/gas/riscv/priv-reg.d: Likewise.
2018-01-03 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
2018-01-02 Nick Clifton <nickc@redhat.com>
PR 18119
* config/tc-arm.c (do_mrs): Fix test of bits 16-19 in non-banked
version of ARM MRS instruction.
For older changes see ChangeLog-2017
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