2018-01-27 00:05:05 +01:00
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2018-01-26 Maciej W. Rozycki <macro@mips.com>
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* configure.tgt: Use generic emulation for `mips-*-windiss',
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overriding the blanket choice made for `*-*-windiss'.
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2018-01-27 00:05:05 +01:00
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2018-01-26 Maciej W. Rozycki <macro@mips.com>
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* configure.tgt: Use `mips-*-sysv4*' rather than
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`mips-*-sysv4*MP*'.
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[GAS][AARCH64]Add group relocations to create PC-relative offset.
This is a patch to add the gas support for group relocations to create a
16, 32, 48, or 64 bit PC-relative offset inline.
The following relocations are added along with the test cases:
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
bfd/
2018-01-24 Renlin Li <renlin.li@arm.com>
* reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0,
BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1,
BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2,
BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
gas/
2018-01-24 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): add entries for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
(md_apply_fix): Likewise
* testsuite/gas/aarch64/prel_g0.s: New.
* testsuite/gas/aarch64/prel_g0.d: New.
* testsuite/gas/aarch64/prel_g0_nc.s: New.
* testsuite/gas/aarch64/prel_g0_nc.d: New.
* testsuite/gas/aarch64/prel_g1.s: New.
* testsuite/gas/aarch64/prel_g1.d: New.
* testsuite/gas/aarch64/prel_g1_nc.s: New.
* testsuite/gas/aarch64/prel_g1_nc.d: New.
* testsuite/gas/aarch64/prel_g2.s: New.
* testsuite/gas/aarch64/prel_g2.d: New.
* testsuite/gas/aarch64/prel_g2_nc.s: New.
* testsuite/gas/aarch64/prel_g2_nc.d: New.
* testsuite/gas/aarch64/prel_g3.s: New.
* testsuite/gas/aarch64/prel_g3.d: New.
2018-01-18 13:08:40 +01:00
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2018-01-24 Renlin Li <renlin.li@arm.com>
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* config/tc-aarch64.c (reloc_table): add entries for
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BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
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BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
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BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
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BFD_RELOC_AARCH64_MOVW_PREL_G3.
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(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
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(md_apply_fix): Likewise
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* testsuite/gas/aarch64/prel_g0.s: New.
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* testsuite/gas/aarch64/prel_g0.d: New.
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* testsuite/gas/aarch64/prel_g0_nc.s: New.
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* testsuite/gas/aarch64/prel_g0_nc.d: New.
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* testsuite/gas/aarch64/prel_g1.s: New.
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* testsuite/gas/aarch64/prel_g1.d: New.
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* testsuite/gas/aarch64/prel_g1_nc.s: New.
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* testsuite/gas/aarch64/prel_g1_nc.d: New.
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* testsuite/gas/aarch64/prel_g2.s: New.
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* testsuite/gas/aarch64/prel_g2.d: New.
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* testsuite/gas/aarch64/prel_g2_nc.s: New.
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* testsuite/gas/aarch64/prel_g2_nc.d: New.
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* testsuite/gas/aarch64/prel_g3.s: New.
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* testsuite/gas/aarch64/prel_g3.d: New.
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2018-01-23 22:18:24 +01:00
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2018-01-23 Maciej W. Rozycki <macro@mips.com>
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* configure.ac: Also set `mips_default_abi' to N32_ABI for
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`mips64*-ps2-elf*'.
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* configure: Regenerate.
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2018-01-23 20:01:35 +01:00
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2018-01-23 Maciej W. Rozycki <macro@mips.com>
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* config/tc-mips.c (options): Remove OPTION_COMPAT_ARCH_BASE
|
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enum value.
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2018-01-23 17:56:30 +01:00
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2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* config/tc-i386.c (cpu_arch): Add .pconfig.
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* doc/c-i386.texi: Document .pconfig.
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* testsuite/gas/i386/i386.exp: Add PCONFIG tests.
|
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* testsuite/gas/i386/pconfig-intel.d: New test.
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* testsuite/gas/i386/pconfig.d: Likewise.
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* testsuite/gas/i386/pconfig.s: Likewise.
|
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* testsuite/gas/i386/x86-64-pconfig-intel.d: Likewise.
|
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|
* testsuite/gas/i386/x86-64-pconfig.d: Likewise.
|
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* testsuite/gas/i386/x86-64-pconfig.s: Likewise.
|
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|
2018-01-23 17:39:05 +01:00
|
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|
2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
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* config/tc-i386.c (cpu_arch): Add .wbnoinvd.
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* doc/c-i386.texi: Document .wbnoinvd.
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* testsuite/gas/i386/i386.exp: Add WBNOINVD tests.
|
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* testsuite/gas/i386/wbnoinvd-intel.d: New test.
|
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* testsuite/gas/i386/wbnoinvd.d: Likewise.
|
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* testsuite/gas/i386/wbnoinvd.s: Likewise.
|
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* testsuite/gas/i386/x86-64-wbnoinvd-intel.d: Likewise.
|
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* testsuite/gas/i386/x86-64-wbnoinvd.d: Likewise.
|
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* testsuite/gas/i386/x86-64-wbnoinvd.s: Likewise.
|
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|
2018-01-23 15:51:22 +01:00
|
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|
2018-01-23 Maciej W. Rozycki <macro@mips.com>
|
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* config/tc-mips.c (md_show_usage): Correctly indicate the
|
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|
configuration-specific default ABI.
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2018-01-23 15:51:22 +01:00
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|
2018-01-23 Maciej W. Rozycki <macro@mips.com>
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* config/tc-mips.c (md_show_usage): Report `-mmips16e2' and
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|
`-mno-mips16e2' options.
|
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|
2018-01-22 22:06:35 +01:00
|
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2018-01-22 Maciej W. Rozycki <macro@mips.com>
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* doc/c-mips.texi (MIPS ASE Instruction Generation Overrides):
|
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|
Correct syntax of the `.set nomips16e2' directive description.
|
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2018-01-22 15:31:10 +01:00
|
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|
2018-01-22 Oleg Endo <olegendo@gcc.gnu.org>
|
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|
|
PR 22737
|
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|
|
* config/tc-rx.c (rx_start_line): Handle escaped double-quote character.
|
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|
|
* testsuite/gas/rx/pr22737.s: New test.
|
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* testsuite/gas/rx/pr22737.d: Likewise.
|
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* testsuite/gas/rx/rx.exp: Run the new test.
|
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|
2018-01-19 15:17:24 +01:00
|
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2018-01-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
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* config/tc-arm.c (ToC macro): Remove spurious comment.
|
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|
(ToU macro): Likewise.
|
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|
2018-01-17 23:04:16 +01:00
|
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|
2018-01-17 Jim Wilson <jimw@sifive.com>
|
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|
* config/tc-riscv.c (validate_riscv_insn) <'z'>: New.
|
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|
|
(riscv_ip) <'z'>: New.
|
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|
|
Replace CET bit with IBT and SHSTK bits.
The latest specification for Intel CET technology defined two
new bits instead of previously used CET bit. These are IBT and
SHSTK bits. The patch replaces CET bit with IBT and SHSTK bits.
gas/
* config/tc-i386.c (cpu_arch): Delete .cet. Add .ibt, .shstk.
(cpu_noarch): Add noibt, noshstk.
(parse_insn): Change cpucet to cpuibt.
* doc/c-i386.texi: Delete .cet. Add .ibt, .shstk.
* testsuite/gas/i386/cet-ibt-inval.l: New test.
* testsuite/gas/i386/cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/cet-shstk-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.s: Likewise.
opcodes/
* i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS,
CpuCET. Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
(cpu_flags): Add CpuIBT, CpuSHSTK.
* i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
(i386_cpu_flags): Add cpuibt, cpushstk.
* i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
2018-01-17 17:45:52 +01:00
|
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|
|
2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
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|
|
|
|
|
|
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|
|
* config/tc-i386.c (cpu_arch): Delete .cet. Add .ibt, .shstk.
|
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|
|
(cpu_noarch): Add noibt, noshstk.
|
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|
|
|
(parse_insn): Change cpucet to cpuibt.
|
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|
|
|
* doc/c-i386.texi: Delete .cet. Add .ibt, .shstk.
|
|
|
|
|
|
* testsuite/gas/i386/cet-ibt-inval.l: New test.
|
|
|
|
|
|
* testsuite/gas/i386/cet-ibt-inval.s: Likewise.
|
|
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|
|
|
* testsuite/gas/i386/cet-shstk-inval.l: Likewise.
|
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|
|
|
* testsuite/gas/i386/cet-shstk-inval.s: Likewise.
|
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|
|
|
|
* testsuite/gas/i386/x86-64-cet-ibt-inval.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet-ibt-inval.s: Likewise.
|
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|
|
|
|
* testsuite/gas/i386/x86-64-cet-shstk-inval.l: Likewise.
|
|
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|
|
|
* testsuite/gas/i386/x86-64-cet-shstk-inval.s: Likewise.
|
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|
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|
|
2018-01-16 13:45:44 +01:00
|
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|
|
2018-01-16 Nick Clifton <nickc@redhat.com>
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* po/fr.po: Updated French translation.
|
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|
2018-01-15 23:53:44 +01:00
|
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|
|
2018-01-15 Jim Wilson <jimw@sifive.com>
|
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|
* testsuite/gas/riscv/c-zero-imm.s: Test addi that compresses to c.nop.
|
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|
|
* testsuite/gas/riscv/c-zero-imm.d: Likewise.
|
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|
|
2018-01-15 15:13:33 +01:00
|
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|
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
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* config/tc-arm.c (ToC): Define macro.
|
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|
|
(ToU): Likewise.
|
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|
|
(insns): Make use of above macros for new instructions introduced in
|
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|
|
|
Armv8-M.
|
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|
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|
|
[ARM] Enable conditional Armv8-M instructions
Newly introduced instructions common to ARMv8-M Baseline and Mainline
are currently all marked as unconditional. However, all instructions but
sg (ie. blxns, bxns, tt, ttt, tta, ttat, vlldm and vlstm) do actually
support conditional execution. This patch fixes the definition of these
instructions accordingly.
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (insns): Make blxns, bxns, tt, ttt, tta, ttat, vlldm
and vlstm conditionally executable and reindent parameters.
* testsuite/gas/arm/archv8m-cmse-main.s: Add conditional version of
aforementionned instructions.
2018-01-15 15:11:02 +01:00
|
|
|
|
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
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|
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|
|
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|
|
* config/tc-arm.c (insns): Make blxns, bxns, tt, ttt, tta, ttat, vlldm
|
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|
|
|
and vlstm conditionally executable and reindent parameters.
|
|
|
|
|
|
* testsuite/gas/arm/archv8m-cmse-main.s: Add conditional version of
|
|
|
|
|
|
aforementionned instructions.
|
|
|
|
|
|
|
2018-01-15 15:09:28 +01:00
|
|
|
|
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (it_fsm_post_encode): Do not warn if targeting M
|
|
|
|
|
|
profile architecture or if in autodetection mode. Clarify that
|
|
|
|
|
|
deprecation is for performance reason and concerns Armv8-A and Armv8-R.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar-bad.l: Adapt to new IT deprecation warning
|
|
|
|
|
|
message.
|
|
|
|
|
|
* testsuite/gas/arm/armv8-ar-it-bad.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/udf.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/udf.d: Assemble for Armv8-A explicitely.
|
|
|
|
|
|
|
2018-01-15 13:09:11 +01:00
|
|
|
|
2018-01-15 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/uk.po: Updated Ukranian translation.
|
|
|
|
|
|
|
2018-01-13 14:56:48 +01:00
|
|
|
|
2018-01-13 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
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|
|
* po/gas.pot: Regenerated.
|
|
|
|
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|
|
2018-01-13 14:31:12 +01:00
|
|
|
|
2018-01-13 Nick Clifton <nickc@redhat.com>
|
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|
|
|
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|
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|
|
* configure: Regenerate.
|
|
|
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|
|
2018-01-13 14:20:55 +01:00
|
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|
|
2018-01-13 Nick Clifton <nickc@redhat.com>
|
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|
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|
|
2018-01-13 14:26:38 +01:00
|
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|
|
2.30 branch created.
|
2018-01-13 14:20:55 +01:00
|
|
|
|
* NEWS: Add marker for 2.30.
|
|
|
|
|
|
|
2018-01-12 14:12:17 +01:00
|
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|
|
2018-01-12 Gunther Nikl <gnikl@users.sourceforge.net>
|
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|
|
* gas/config/aout_gnu.h (USE_EXTENDED_RELOC): Explicitly
|
|
|
|
|
|
define to 0 and 1. Remove a dangling reference to "AMD 29000"
|
|
|
|
|
|
in a comment.
|
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|
|
|
|
2018-01-11 00:56:45 +01:00
|
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|
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2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* testsuite/i386/avx512_4fmaps_vl-warn.l: Likewise.
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* testsuite/i386/avx512_4fmaps_vl-warn.s: Likewise.
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* testsuite/i386/avx512_4fmaps_vl.d: Likewise.
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* testsuite/i386/avx512_4fmaps_vl.s: Likewise.
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* testsuite/i386/avx512_4vnniw_vl-intel.d: Likewise.
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* testsuite/i386/avx512_4vnniw_vl.d: Likewise.
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* testsuite/i386/avx512_4vnniw_vl.s: Likewise.
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* testsuite/i386/i386.exp: Removed _vl tests for 4fmaps an 4vnniw
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tests.
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* testsuite/i386/x86-64-avx512_4fmaps_vl-intel.d: Removed.
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* testsuite/i386/x86-64-avx512_4fmaps_vl-warn.l: Likewise.
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* testsuite/i386/x86-64-avx512_4fmaps_vl-warn.s: Likewise.
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* testsuite/i386/x86-64-avx512_4fmaps_vl.d: Likewise.
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* testsuite/i386/x86-64-avx512_4fmaps_vl.s: Likewise.
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* testsuite/i386/x86-64-avx512_4vnniw_vl-intel.d: Likewise.
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* testsuite/i386/x86-64-avx512_4vnniw_vl.d: Likewise.
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* testsuite/i386/x86-64-avx512_4vnniw_vl.s: Likewise.
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2018-01-11 00:04:58 +01:00
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2018-01-11 Alan Modra <amodra@gmail.com>
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* config/tc-arm.c (aeabi_set_public_attributes): Avoid false
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positive "‘profile’ may be used uninitialized".
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2018-01-10 14:53:43 +01:00
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2018-01-10 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/avx512_4fmaps.s,
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testsuite/gas/i386/avx512_4fmaps_vl.s,
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testsuite/gas/i386/x86-64-avx512_4fmaps.s,
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testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Actually test
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Disp8 forms (and the transition happening at the right
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boundary).
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* testsuite/gas/i386/avx512_4fmaps.d,
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testsuite/gas/i386/avx512_4fmaps-intel.d,
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testsuite/gas/i386/avx512_4fmaps_vl.d,
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testsuite/gas/i386/avx512_4fmaps_vl-intel.d,
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testsuite/gas/i386/x86-64-avx512_4fmaps.d,
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testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d,
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testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d,
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testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Adjust
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expectations.
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2018-01-10 14:53:05 +01:00
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2018-01-10 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/avx512bw.s,
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testsuite/gas/i386/avx512bw_vl.s: Add VPCMP* tests with memory
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operands.
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* testsuite/gas/i386/avx512bw-intel.d,
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testsuite/gas/i386/avx512bw.d,
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testsuite/gas/i386/avx512bw_vl-intel.d.
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testsuite/gas/i386/avx512bw_vl.d: Adjust expectations.
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2018-01-10 01:40:06 +01:00
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2018-01-09 Jim Wilson <jimw@sifive.com>
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* testsuite/gas/riscv/auipc-x0.d: New.
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* testsuite/gas/riscv/auipc-x0.s: New.
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2018-01-09 15:15:00 +01:00
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2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* config/tc-arm.c (insns): Add csdb, enable for Armv3 and above
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in Arm execution state, and Armv6T2 and above in Thumb execution
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state.
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* testsuite/gas/arm/csdb.s: New.
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* testsuite/gas/arm/csdb.d: New.
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* testsuite/gas/arm/thumb2_it_bad.l: Add csdb.
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* testsuite/gas/arm/thumb2_it_bad.s: Add csdb.
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2018-01-09 12:28:04 +01:00
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2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* testsuite/gas/aarch64/system.d: Update expected results to expect
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CSDB for hint 0x14.
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2018-01-08 13:36:59 +01:00
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2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22681
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* testsuite/gas/i386/i386.exp: Run x86-64-movd and
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x86-64-movd-intel.
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* testsuite/gas/i386/x86-64-movd-intel.d: New file.
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* testsuite/gas/i386/x86-64-movd.d: Likewise.
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* testsuite/gas/i386/x86-64-movd.s: Likewise.
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2018-01-08 10:29:17 +01:00
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2018-01-08 Nick Clifton <nickc@redhat.com>
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PR 22553
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* doc/c-i386.texi (i386-Directives): Document the .largecomm
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directive.
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2018-01-04 23:17:53 +01:00
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2018-01-04 Jim Wilson <jimw@sifive.com>
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* testsuite/gas/riscv/priv-reg.s: Add missing stval and mtval.
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* testsuite/gas/riscv/priv-reg.d: Likewise.
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2018-01-03 06:17:27 +01:00
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2018-01-03 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2018-01-02 13:13:17 +01:00
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2018-01-02 Nick Clifton <nickc@redhat.com>
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PR 18119
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* config/tc-arm.c (do_mrs): Fix test of bits 16-19 in non-banked
|
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version of ARM MRS instruction.
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2018-01-03 06:15:17 +01:00
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For older changes see ChangeLog-2017
|
2016-01-01 11:44:31 +01:00
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2018-01-03 06:15:17 +01:00
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Copyright (C) 2018 Free Software Foundation, Inc.
|
2016-01-01 11:44:31 +01:00
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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