binutils-gdb/sim/aarch64
Nick Clifton 7517e550ce Fix more bugs in AArch64 simulator.
* cpustate.c (aarch64_set_reg_s32): New function.
	(aarch64_set_reg_u32): New function.
	(aarch64_get_FP_half): Place half precision value into the correct
	slot of the union.
	(aarch64_set_FP_half): Likewise.
	* cpustate.h: Add prototypes for aarch64_set_reg_s32 and
	aarch64_set_reg_u32.
	* memory.c (FETCH_FUNC): Cast the read value to the access type
	before converting it to the return type.  Rename to FETCH_FUNC64.
	(FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
	accesses.  Use for 32-bit memory access functions.
	* simulator.c (ldrsb_wb): Use sign extension not zero extension.
	(ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
	(ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
	(ldrsh_scale_ext, ldrsw_abs): Likewise.
	(ldrh32_abs): Store 32 bit value not 64-bits.
	(ldrh32_wb, ldrh32_scale_ext): Likewise.
	(do_vec_MOV_immediate): Fix computation of val.
	(do_vec_MVNI): Likewise.
	(DO_VEC_WIDENING_MUL): New macro.
	(do_vec_mull): Use new macro.
	(do_vec_mul): Use new macro.
	(do_vec_MLA): Read values before writing.
	(do_vec_xtl): Likewise.
	(do_vec_SSHL): Select correct shift value.
	(do_vec_USHL): Likewise.
	(do_scalar_UCVTF): New function.
	(do_scalar_vec): Call new function.
	(store_pair_u64): Treat reads of SP as reads of XZR.
2016-03-30 10:29:04 +01:00
..
ChangeLog Fix more bugs in AArch64 simulator. 2016-03-30 10:29:04 +01:00
Makefile.in GDB copyright headers update after running GDB's copyright.py script. 2016-01-01 08:43:22 +04:00
aclocal.m4 Add an AArch64 simulator to GDB. 2015-11-24 08:47:59 +00:00
config.in sim: move many common settings from CPPFLAGS to config.h 2016-01-10 18:54:41 -05:00
configure sim: move many common settings from CPPFLAGS to config.h 2016-01-10 18:54:41 -05:00
configure.ac sim: allow the environment configure option everywhere 2016-01-10 17:03:36 -05:00
cpustate.c Fix more bugs in AArch64 simulator. 2016-03-30 10:29:04 +01:00
cpustate.h Fix more bugs in AArch64 simulator. 2016-03-30 10:29:04 +01:00
decode.h Tidy up AArch64 simulator code. 2016-03-29 11:34:22 +01:00
interp.c sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly 2016-01-06 21:48:59 -05:00
memory.c Fix more bugs in AArch64 simulator. 2016-03-30 10:29:04 +01:00
memory.h Add simulation of MUL and NEG instructions to AArch64 simulator. 2016-03-18 09:32:32 +00:00
sim-main.h More AArch64 simulator improvements. 2016-03-23 17:37:30 +00:00
simulator.c Fix more bugs in AArch64 simulator. 2016-03-30 10:29:04 +01:00
simulator.h sim: aarch64: switch to common disassembler tracing 2016-01-05 14:37:46 -05:00