104fefeebb
This patch is part of the patch series to add support for ARMv8.5-A extensions. (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) The encodings can be found in the System Register XML. This patch adds support for the mitigation for Spectre Variant 4 by adding the PSTATE bit SSBS which are accessible using MSR and MRS instructions. Although this is a mandatory addition to the ARMv8.5-A, it is permitted to be added to any version of the ARMv8 architecture. This is enabled using the command line option of +ssbs for older versions. *** include/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New. (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default. *** opcodes/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * aarch64-opc.c (operand_general_constraint_met_p): Add SSBS in the check for one-bit immediate. (aarch64_sys_regs): New entry for SSBS. (aarch64_sys_reg_supported_p): New check for above. (aarch64_pstatefields): New entry for SSBS. (aarch64_pstatefield_supported_p): New check for above. *** gas/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * config/tc-aarch64.c (aarch64_features): Add new "ssbs". * doc/c-aarch64.texi: Document the same. * testsuite/gas/aarch64/ssbs-illegal1.d: New test. * testsuite/gas/aarch64/ssbs-illegal1.l: New test. * testsuite/gas/aarch64/ssbs-illegal2.d: New test. * testsuite/gas/aarch64/ssbs-illegal2.l: New test. * testsuite/gas/aarch64/ssbs.s: New test. * testsuite/gas/aarch64/ssbs1.d: Test with +ssbs * testsuite/gas/aarch64/ssbs2.d: Test with armv8.5-a.
742 lines
22 KiB
Plaintext
742 lines
22 KiB
Plaintext
2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
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(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
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(AARCH64_FEATURE_ID_PFR2): New.
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(AARCH64_ARCH_V8_5): Add both by default.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
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(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
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(aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
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(HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
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define HINT #imm values.
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(HINT_OPD_JC, HINT_OPD_NULL): Likewise.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
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(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
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(aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
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(aarch64_sys_regs_sr): Declare new table.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_SB): New.
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(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
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(AARCH64_FEATURE_FRINTTS): New.
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(AARCH64_ARCH_V8_5): Add both by default.
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2018-10-09 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
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(AARCH64_ARCH_V8_5): New.
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2018-10-08 Alan Modra <amodra@gmail.com>
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* bfdlink.h (struct bfd_link_info): Add load_phdrs field.
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2018-10-05 Sudakshina Das <sudi.das@arm.com>
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* opcode/arm.h (ARM_EXT2_PREDRES): New.
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(ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
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2018-10-05 Sudakshina Das <sudi.das@arm.com>
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* opcode/arm.h (ARM_EXT2_SB): New.
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(ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
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2018-10-05 Sudakshina Das <sudi.das@arm.com>
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* opcode/arm.h (ARM_EXT2_V8_5A): New.
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(ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
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2018-10-05 Richard Henderson <rth@twiddle.net>
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* elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
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R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
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R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
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R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
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R_OR1K_SLO13, R_OR1K_PLTA26.
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2018-10-05 Richard Henderson <rth@twiddle.net>
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* elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
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R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
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R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
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2018-10-03 Tamar Christina <tamar.christina@arm.com>
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* opcode/aarch64.h (aarch64_inst): Remove.
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(enum err_type): Add ERR_VFI.
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(aarch64_is_destructive_by_operands): New.
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(init_insn_sequence): New.
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(aarch64_decode_insn): Remove param name.
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2018-10-03 Tamar Christina <tamar.christina@arm.com>
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* opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
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more arguments.
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2018-10-03 Tamar Christina <tamar.christina@arm.com>
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* opcode/aarch64.h (enum err_type): New.
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(aarch64_decode_insn): Use it.
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2018-10-03 Tamar Christina <tamar.christina@arm.com>
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* opcode/aarch64.h (struct aarch64_instr_sequence): New.
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(aarch64_opcode_encode): Use it.
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2018-10-03 Tamar Christina <tamar.christina@arm.com>
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* opcode/aarch64.h (struct aarch64_opcode): Add constraints,
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extend flags field size.
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(F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
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2018-10-03 John Darrington <john@darrington.wattle.id.au>
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* dis-asm.h (print_insn_s12z): New declaration.
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2018-10-02 Palmer Dabbelt <palmer@sifive.com>
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* opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
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(MASK_FENCE_TSO): Likewise.
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2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
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* arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
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2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/23694
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* include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
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include zero size sections at start of PT_NOTE segment.
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2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
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* elf/nds32.h: Remove the unused target features.
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* dis-asm.h (disassemble_init_nds32): Declared.
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* elf/nds32.h (E_NDS32_NULL): Removed.
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(E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
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* opcode/nds32.h: Ident.
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(N32_SUB6, INSN_LW): New macros.
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(enum n32_opcodes): Updated.
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* elf/nds32.h: Doc fixes.
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* elf/nds32.h: Add R_NDS32_LSI.
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* elf/nds32.h: Add new relocations for TLS.
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2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* elf/common.h (AT_SUN_HWCAP): Rename to ...
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(AT_SUN_CAP_HW1): ... this. Retain old name for backward
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compatibility.
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(AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
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(AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
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2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
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* diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
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2018-08-31 Alan Modra <amodra@gmail.com>
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* elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
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(R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
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(R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
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(R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
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2018-08-30 Kito Cheng <kito@andestech.com>
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* opcode/riscv.h (MAX_SUBSET_NUM): New.
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(riscv_opcode): Add xlen_requirement field and change type of
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subset.
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2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
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* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
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* opcode/mips.h (CPU_XXX): New CPU_GS264E.
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2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
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* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
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* opcode/mips.h (CPU_XXX): New CPU_GS464E.
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2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
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* elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
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E_MIPS_MACH_GS464.
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(AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
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* opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
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(CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
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* opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
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2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
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* elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
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(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
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* opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
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2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
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* elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
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(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
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* opcode/mips.h (ASE_LOONGSON_EXT): New macro.
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2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
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* elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
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(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
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* opcode/mips.h (ASE_LOONGSON_CAM): New macro.
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2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
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* elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
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(GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
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(GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
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(GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
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(GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
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(GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
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(GNU_PROPERTY_X86_UINT32_AND_LO): New.
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(GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
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(GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
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(GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
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(GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
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(GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
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(GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
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(GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
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(GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
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(GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
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(GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
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(GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
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(GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
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(GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
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(GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
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(GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
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(GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
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(GNU_PROPERTY_X86_UINT32_AND_LO + 0).
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(GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
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(GNU_PROPERTY_X86_UINT32_OR_LO + 0).
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(GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
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(GNU_PROPERTY_X86_UINT32_OR_LO + 1).
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(GNU_PROPERTY_X86_ISA_1_USED): Defined to
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(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
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(GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
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(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
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2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
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* elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
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2018-08-21 John Darrington <john@darrington.wattle.id.au>
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* elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
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2018-08-21 Alan Modra <amodra@gmail.com>
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* opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
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Mention use of "extract" function to provide default value.
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(PPC_OPERAND_OPTIONAL_VALUE): Delete.
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(ppc_optional_operand_value): Rewrite to use extract function.
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2018-08-18 John Darrington <john@darrington.wattle.id.au>
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* opcode/s12z.h: New file.
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2018-08-09 Richard Earnshaw <rearnsha@arm.com>
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* elf/arm.h: Updated comments for e_flags definitions.
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2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
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* elf/arc.h (Tag_ARC_ATR_version): New tag.
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2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
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* opcode/arc.h (ARC_OPCODE_ARCV1): Define.
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2018-08-01 Richard Earnshaw <rearnsha@arm.com>
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Copy over from GCC
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2018-07-26 Martin Liska <mliska@suse.cz>
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PR lto/86548
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* libiberty.h (make_temp_file_with_prefix): New function.
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2018-07-30 Jim Wilson <jimw@sifive.com>
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* opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
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(INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
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(INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
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2018-07-30 Andrew Jenner <andrew@codesourcery.com>
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* elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
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* elf/csky.h: New file.
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2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
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Maciej W. Rozycki <macro@linux-mips.org>
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* elf/mips.h (AFL_ASE_MASK): Correct typo.
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2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
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* opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
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2018-07-26 Alan Modra <amodra@gmail.com>
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* elf/ppc64.h: Specify byte offset to local entry for values
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of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
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value for such functions when entering via global entry point.
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Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
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2018-07-24 Alan Modra <amodra@gmail.com>
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|
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PR 23430
|
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* elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
|
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2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
|
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Maciej W. Rozycki <macro@mips.com>
|
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|
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* elf/mips.h (AFL_ASE_MMI): New macro.
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(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
|
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* opcode/mips.h (ASE_LOONGSON_MMI): New macro.
|
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|
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2018-07-17 Maciej W. Rozycki <macro@mips.com>
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|
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* bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
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2018-07-06 Alan Modra <amodra@gmail.com>
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* diagnostics.h: Comment on macro usage.
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2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
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|
||
* diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
|
||
Define for clang.
|
||
|
||
2018-07-02 Maciej W. Rozycki <macro@mips.com>
|
||
|
||
PR tdep/8282
|
||
* dis-asm.h (disasm_option_arg_t): New typedef.
|
||
(disasm_options_and_args_t): Likewise.
|
||
(disasm_options_t): Add `arg' member, document members.
|
||
(disassembler_options_mips): New prototype.
|
||
(disassembler_options_arm, disassembler_options_powerpc)
|
||
(disassembler_options_s390): Update prototypes.
|
||
|
||
2018-06-29 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR binutils/23192
|
||
*opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
|
||
|
||
2018-06-26 Alan Modra <amodra@gmail.com>
|
||
|
||
* elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
|
||
|
||
2018-06-24 Nick Clifton <nickc@redhat.com>
|
||
|
||
2.31 branch created.
|
||
|
||
2018-06-21 Alan Hayward <alan.hayward@arm.com>
|
||
|
||
* elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
|
||
for non SHT_NOBITS.
|
||
|
||
2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
|
||
|
||
Sync with GCC
|
||
|
||
2018-05-24 Tom Rix <trix@juniper.net>
|
||
|
||
* dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
|
||
|
||
2017-11-20 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* longlong.h [__riscv] (__umulsidi3): Define.
|
||
[__riscv] (umul_ppmm): Likewise.
|
||
[__riscv] (__muluw3): Likewise.
|
||
|
||
2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
|
||
|
||
* elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
|
||
(AFL_ASE_MASK): Update to include AFL_ASE_GINV.
|
||
* opcode/mips.h: Document "+\" operand format.
|
||
(ASE_GINV): New macro.
|
||
|
||
2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
|
||
Faraz Shahbazker <Faraz.Shahbazker@mips.com>
|
||
|
||
* elf/mips.h (AFL_ASE_CRC): New macro.
|
||
(AFL_ASE_MASK): Update to include AFL_ASE_CRC.
|
||
* opcode/mips.h (ASE_CRC): New macro.
|
||
* opcode/mips.h (ASE_CRC64): Likewise.
|
||
|
||
2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
|
||
|
||
* elf/xtensa.h (xtensa_read_table_entries)
|
||
(xtensa_compute_fill_extra_space): New declarations.
|
||
|
||
2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
|
||
define for GCC.
|
||
|
||
2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
|
||
(DIAGNOSTIC_STRINGIFY): Likewise.
|
||
(DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
|
||
(DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
|
||
(DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
|
||
(DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
|
||
(DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
|
||
(DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
|
||
|
||
2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* diagnostics.h: Moved from ../gdb/common/diagnostics.h.
|
||
|
||
2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
||
|
||
* splay-tree.h (splay_tree_compare_strings,
|
||
splay_tree_delete_pointers): Declare new utility functions.
|
||
|
||
2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
|
||
|
||
* opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
|
||
|
||
2018-05-18 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* elf/riscv.h (EF_RISCV_RVE): New define.
|
||
|
||
2018-05-18 John Darrington <john@darrington.wattle.id.au>
|
||
|
||
* elf/s12z.h: New header.
|
||
|
||
2018-05-15 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR binutils/21446
|
||
* opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
|
||
|
||
2018-05-15 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR binutils/21446
|
||
* opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
|
||
(aarch64_print_operand): Support notes.
|
||
|
||
2018-05-15 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR binutils/21446
|
||
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
|
||
(aarch64_decode_insn): Accept error struct.
|
||
|
||
2018-05-15 Francois H. Theron <francois.theron@netronome.com>
|
||
|
||
* opcode/nfp.h: Use uint64_t instead of bfd_vma.
|
||
|
||
2018-05-10 John Darrington <john@darrington.wattle.id.au>
|
||
|
||
* elf/common.h (EM_S12Z): New macro.
|
||
|
||
2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
|
||
|
||
* mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
|
||
Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
|
||
(MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
|
||
MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
|
||
|
||
2018-05-08 Jim Wilson <jimw@sifive.com>
|
||
|
||
* opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
|
||
(MATCH_C_SRAI64, MASK_C_SRAI64): New.
|
||
(MATCH_C_SLLI64, MASK_C_SLLI64): New.
|
||
|
||
2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
|
||
|
||
* opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
|
||
(vle_num_opcodes): Likewise.
|
||
(spe2_num_opcodes): Likewise.
|
||
|
||
2018-05-04 Alan Modra <amodra@gmail.com>
|
||
|
||
* ansidecl.h: Import from gcc.
|
||
* coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
|
||
to s_name.
|
||
(struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
|
||
|
||
2018-04-30 Francois H. Theron <francois.theron@netronome.com>
|
||
|
||
* dis-asm.h: Added print_nfp_disassembler_options prototype.
|
||
* elf/common.h: Added EM_NFP, officially assigned. See Google Group
|
||
Generic System V Application Binary Interface.
|
||
* elf/nfp.h: New, for NFP support.
|
||
* opcode/nfp.h: New, for NFP support.
|
||
|
||
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
|
||
Mickaël Guêné <mickael.guene@st.com>
|
||
|
||
* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
|
||
R_ARM_TLS_IE32_FDPIC.
|
||
|
||
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
|
||
Mickaël Guêné <mickael.guene@st.com>
|
||
|
||
* elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
|
||
(R_ARM_FUNCDESC)
|
||
(R_ARM_FUNCDESC_VALUE): Define new relocations.
|
||
|
||
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
|
||
Mickaël Guêné <mickael.guene@st.com>
|
||
|
||
* elf/arm.h (EF_ARM_FDPIC): New.
|
||
|
||
2018-04-18 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/mipspe.h: Delete.
|
||
|
||
2018-04-18 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/dynix3.h: Delete.
|
||
|
||
2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
|
||
|
||
Microblaze Target: PIC data text relative
|
||
|
||
* bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
|
||
* elf/microblaze.h (Add 3 new relocations):
|
||
R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
|
||
and R_MICROBLAZE_TEXTREL_32_LO for relax function.
|
||
|
||
2018-04-17 Alan Modra <amodra@gmail.com>
|
||
|
||
* elf/i370.h: Revert removal.
|
||
* elf/i860.h: Likewise.
|
||
* elf/i960.h: Likewise.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/sparc.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/host.h: Remove m68k-aout and m68k-coff support.
|
||
* aout/hp300hpux.h: Delete.
|
||
* coff/apollo.h: Delete.
|
||
* coff/aux-coff.h: Delete.
|
||
* coff/m68k.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* dis-asm.h: Remove sh5 and sh64 support.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/internal.h: Remove w65 support.
|
||
* coff/w65.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/we32k.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/internal.h: Remove m88k support.
|
||
* coff/m88k.h: Delete.
|
||
* opcode/m88k.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* elf/i370.h: Delete.
|
||
* opcode/i370.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/h8500.h: Delete.
|
||
* coff/internal.h: Remove h8500 support.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/h8300.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* ieee.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/host.h: Remove newsos3 support.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* nlm/ChangeLog-9315: Delete.
|
||
* nlm/alpha-ext.h: Delete.
|
||
* nlm/common.h: Delete.
|
||
* nlm/external.h: Delete.
|
||
* nlm/i386-ext.h: Delete.
|
||
* nlm/internal.h: Delete.
|
||
* nlm/ppc-ext.h: Delete.
|
||
* nlm/sparc32-ext.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* opcode/tahoe.h: Delete.
|
||
|
||
2018-04-11 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/adobe.h: Delete.
|
||
* aout/reloc.h: Delete.
|
||
* coff/i860.h: Delete.
|
||
* coff/i960.h: Delete.
|
||
* elf/i860.h: Delete.
|
||
* elf/i960.h: Delete.
|
||
* opcode/i860.h: Delete.
|
||
* opcode/i960.h: Delete.
|
||
* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
|
||
* aout/ar.h (ARMAGB): Remove.
|
||
* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
|
||
union internal_auxent): Remove i960 support.
|
||
|
||
2018-04-09 Alan Modra <amodra@gmail.com>
|
||
|
||
* elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
|
||
* elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
|
||
|
||
2018-03-28 Renlin Li <renlin.li@arm.com>
|
||
|
||
PR ld/22970
|
||
* elf/aarch64.h: Add relocation number for
|
||
R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
|
||
R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
|
||
R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
|
||
R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
|
||
|
||
2018-03-28 Nick Clifton <nickc@redhat.com>
|
||
|
||
PR 22988
|
||
* opcode/aarch64.h (enum aarch64_opnd): Add
|
||
AARCH64_OPND_SVE_ADDR_R.
|
||
|
||
2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* elf/common.h (DF_1_KMOD): New.
|
||
(DF_1_WEAKFILTER): Likewise.
|
||
(DF_1_NOCOMMON): Likewise.
|
||
|
||
2018-03-14 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* opcode/riscv.h (OP_MASK_FUNCT3): New.
|
||
(OP_SH_FUNCT3): Likewise.
|
||
(OP_MASK_FUNCT7): Likewise.
|
||
(OP_SH_FUNCT7): Likewise.
|
||
(OP_MASK_OP2): Likewise.
|
||
(OP_SH_OP2): Likewise.
|
||
(OP_MASK_CFUNCT4): Likewise.
|
||
(OP_SH_CFUNCT4): Likewise.
|
||
(OP_MASK_CFUNCT3): Likewise.
|
||
(OP_SH_CFUNCT3): Likewise.
|
||
(riscv_insn_types): Likewise.
|
||
|
||
2018-03-13 Nick Clifton <nickc@redhat.com>
|
||
|
||
PR 22113
|
||
* coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
|
||
field.
|
||
|
||
2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* opcode/i386 (OLDGCC_COMPAT): Removed.
|
||
|
||
2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
|
||
|
||
2018-02-20 Maciej W. Rozycki <macro@mips.com>
|
||
|
||
* opcode/mips.h: Remove `M' operand code.
|
||
|
||
2018-02-12 Zebediah Figura <z.figura12@gmail.com>
|
||
|
||
* coff/msdos.h: New header.
|
||
* coff/pe.h: Move common defines to msdos.h.
|
||
* coff/powerpc.h: Likewise.
|
||
|
||
2018-01-13 Nick Clifton <nickc@redhat.com>
|
||
|
||
2.30 branch created.
|
||
|
||
2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR ld/22393
|
||
* bfdlink.h (bfd_link_info): Add separate_code.
|
||
|
||
2018-01-04 Jim Wilson <jimw@sifive.com>
|
||
|
||
* opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
|
||
DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
|
||
(CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
|
||
Add alias to map mbadaddr to CSR_MTVAL.
|
||
|
||
2018-01-03 Alan Modra <amodra@gmail.com>
|
||
|
||
Update year range in copyright notice of all files.
|
||
|
||
For older changes see ChangeLog-2017
|
||
|
||
Copyright (C) 2018 Free Software Foundation, Inc.
|
||
|
||
Copying and distribution of this file, with or without modification,
|
||
are permitted in any medium without royalty provided the copyright
|
||
notice and this notice are preserved.
|
||
|
||
Local Variables:
|
||
mode: change-log
|
||
left-margin: 8
|
||
fill-column: 74
|
||
version-control: never
|
||
End:
|