1991-11-06 00:39:50 +01:00
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/* Compute register class preferences for pseudo-registers.
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1998-02-14 02:13:58 +01:00
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Copyright (C) 1987, 88, 91-97, 1998 Free Software Foundation, Inc.
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1991-11-06 00:39:50 +01:00
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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1995-06-15 14:04:37 +02:00
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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1991-11-06 00:39:50 +01:00
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/* This file contains two passes of the compiler: reg_scan and reg_class.
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It also defines some tables of information about the hardware registers
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and a function init_reg_sets to initialize the tables. */
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#include "config.h"
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1997-11-02 22:19:36 +01:00
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#include <stdio.h>
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c-lex.c: Include <stdlib.h> and <string.h>/<strings.h>.
* c-lex.c: Include <stdlib.h> and <string.h>/<strings.h>. Add
prototype for `handle_sysv_pragma', and make it static. Add
parentheses around assignment used as truth value.
* combine.c (combine_instructions): Protect variable `prev' with
macro HAVE_cc0.
(can_combine_p): Protect variable `link' with AUTO_INC_DEC.
(extract_left_shift): Add parentheses around operand of &.
(merge_outer_ops): Avoid an empty body in an else-statement.
(gen_rtx_combine): Remove unused variable `i'.
* sparc/gmon-sol2.c: Include <fcntl.h>. Make return type of
function monstartup `void'. Likewise for internal_mcount. Add
`static void' prototype for moncontrol. Reconcile sprintf format
vs. args.
* sparc/sparc.c: Include <stdlib.h> and <string.h>/<strings.h>.
Make return type of function_arg_slotno explicitly `int'.
(reg_unused_after): Add parentheses around assignment used as
truth value.
(save_regs): Add explicit braces to avoid ambiguous `else'.
(function_arg_slotno): Add parentheses around && within ||.
(function_arg_pass_by_reference): Likewise.
(sparc_flat_output_function_prologue): Reconcile fprintf format
vs. args.
* svr4.h (ASM_OUTPUT_LIMITED_STRING): Add parentheses around
assignment used as truth value.
* cplus-dem.c: Include <stdlib.h>.
(demangle_signature): Avoid an empty body in an else-statement.
(do_type): Remove unused variable `lvl'.
* cppexp.c: Don't have <stdlib.h> depend on MULTIBYTE_CHARS.
Include <string.h>/<strings.h>.
(cpp_lex): Remove unused variable `namelen'.
(cpp_lex): Explicitly declare `num_chars' as an int.
* cpplib.c: Avoid duplicate inclusion of <stdlib.h>, include
<unistd.h> instead. Explicitly declare is_system_include
returning int.
(make_assertion): Remove unused variable `kt'.
(cpp_expand_to_buffer): Hide variable `obuf'.
(output_line_command): Remove unused variables, `line_end',
`line_cmd_buf' and `len'.
(macarg): Remove unused variable `arg_start'.
(special_symbol): Remove unused variable `i'. Add parentheses
around assignment used as truth value.
(do_include): Remove unused variables `pcfname' and `retried',
hide `pcf' and `pcfbuflimit'.
(do_line): Remove unused variable `i'.
(finclude): Hide variable `missing_newline'.
(cpp_handle_options): Remove unused variable `j'.
(read_token_list): Remove unused variable `eofp'.
(cpp_error_with_line): Remove unused variable `i'.
(cpp_warning_with_line): Likewise.
(cpp_pedwarn_with_line): Explicitly declare `column' as int.
(cpp_error_from_errno): Remove unused variable `i'.
* cse.c (invalidate): Add parentheses around assignment used as
truth value.
(find_best_addr): Move declaration of variable `our_cost' inside
the conditional macro where its used.
(fold_rtx): Avoid an empty body in an if-statement.
(cse_insn): Wrap variables `this_insn_cc0_mode' and
`this_insn_cc0' in macro HAVE_cc0.
* dwarf2out.c: Include <stdlib.h> and <string.h>/<string.h>.
(ASM_OUTPUT_DWARF_DATA8): Reconcile format vs. args in fprintf's.
(output_uleb128): Likewise.
(output_sleb128): Likewise.
(output_cfi): Likewise.
(output_call_frame_info): Remove unused variables `j', `fde_size'
and `fde_pad'.
(comp_unit_has_inlines): Hide declaration as per rest of file.
(size_of_line_prolog): Correct typo in prototype.
(add_arange): Likewise.
(output_aranges): Likewise.
(add_name_and_src_coords_attributes): Likewise.
(gen_array_type_die): Likewise.
(gen_inlined_subroutine_die): Likewise.
(equate_decl_number_to_die): Remove unused variable `i'.
(print_die): Reconcile format vs. args in fprintf's.
(print_dwarf_line_table): Likewise.
(output_die): Likewise.
(output_line_info): Likewise.
(add_subscript_info): Avoid an empty body in an else-statement.
(gen_subprogram_die): Remove unused variable `fp_loc'.
* dwarfout.c: Explicitly declare `next_pubname_number' as int.
Protect `ordering_attribute' prototype with USE_ORDERING_ATTRIBUTE
macro. Protect `src_coords_attribute' prototype with
DWARF_DECL_COORDINATES macro. Hide `output_entry_point_die'
prototype as in the rest of the file. Likewise for
`output_pointer_type_die' and `output_reference_type_die'. Remove
prototype for `type_of_for_scope'.
(output_unsigned_leb128): Reconcile format vs. args in fprintf.
(type_attribute): Add explicit braces to avoid ambiguous `else'.
* final.c: Include <stdlib.h> and <string.h>/<strings.h>.
(shorten_branches): Protect declaration of tmp_length with
SHORTEN_WITH_ADJUST_INSN_LENGTH and ADJUST_INSN_LENGTH macros.
(profile_function): Protect declaration of `sval' and `cxt'
variables with appropriate macros.
(final_scan_insn): Likewise for `note' variable. Add explicit
braces to avoid empty body in an if-statement.
(output_asm_insn): Move variable `i' inside macro conditional
where it is used. Add parentheses around assignment used as truth
value.
(asm_fprintf) Likewise, likewise.
* fix-header.c (main): Remove unused variable `done'. Protect
declaration of `i' with FIXPROTO_IGNORE_LIST.
* pexecute.c: Include <unistd.h>. Prototype `my_strerror'.
* print-rtl.c (print_inline_rtx): Explicitly declare the parameter
`ind'.
* profile.c: Include <string.h>/<strings.h>.
(instrument_arcs): Remove unused variables `note', `inverted',
`zero' and `neg_one'.
(branch_prob): Avoid empty body in an if-statement.
* regclass.c: Include <stdlib.h>.
(reg_alternate_class): Explicitly declare parameter `regno'.
* regmove.c (regmove_optimize): Remove unused variable `p'. Add
parentheses around assignment used as truth value.
(find_matches): Remove unused variables `output_operand' and
`matching_operand'.
(fixup_match_1): Remove statement with no effect: "if (0) ;".
* scan.c (sstring_append): Explicitly declare `count' as int.
(scan_string): Explicitly declare parameter `init' as int.
* sched.c: Include <stdlib.h>.
(BLOCKAGE_RANGE): Add parentheses around arithmetic in operand of |.
(rank_for_schedule): Add parentheses around assignment used as
truth value.
(schedule_block): Likewise.
(regno_use_in): Likewise.
(schedule_insns): Remove unused variable `i'.
* toplev.c: Include <stdlib.h> and <string.h>/<strings.h>.
(v_message_with_decl): Remove unused variable `n'.
(botch): Explicitly declare parameter `s' as char *.
(main): Add parentheses around assignment used as truth value.
* tree.c (make_node): Protect the variable `kind' with the
GATHER_STATISTICS macro.
(real_value_from_int_cst): Move variable `e' inside conditional
macro area where it is used.
(tree_last): Add parentheses around assignment used as truth value.
(build1): Protect the variable `kind' with the GATHER_STATISTICS
macro.
(print_obstack_statistics): Reconcile format vs. args in fprintf.
Protect variables `i', `total_nodes', and `total_bytes' with the
GATHER_STATISTICS macro.
Lots more -W -Wall warnings disappear.
From-SVN: r17516
1998-01-27 23:11:45 +01:00
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#if HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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1991-11-06 00:39:50 +01:00
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#include "rtl.h"
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#include "hard-reg-set.h"
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#include "flags.h"
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#include "basic-block.h"
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#include "regs.h"
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#include "insn-config.h"
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#include "recog.h"
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1992-06-27 19:49:28 +02:00
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#include "reload.h"
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#include "real.h"
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1991-11-06 00:39:50 +01:00
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#ifndef REGISTER_MOVE_COST
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#define REGISTER_MOVE_COST(x, y) 2
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#endif
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1992-09-24 12:30:43 +02:00
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/* If we have auto-increment or auto-decrement and we can have secondary
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reloads, we are not allowed to use classes requiring secondary
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1995-05-16 14:39:54 +02:00
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reloads for pseudos auto-incremented since reload can't handle it. */
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1992-09-24 12:30:43 +02:00
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#ifdef AUTO_INC_DEC
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1992-11-25 06:48:35 +01:00
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#if defined(SECONDARY_INPUT_RELOAD_CLASS) || defined(SECONDARY_OUTPUT_RELOAD_CLASS)
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1992-09-24 12:30:43 +02:00
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#define FORBIDDEN_INC_DEC_CLASSES
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#endif
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#endif
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1991-11-06 00:39:50 +01:00
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/* Register tables used by many passes. */
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use (stack pointer, pc, frame pointer, etc.).
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These are the registers that cannot be used to allocate
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a pseudo reg whose life does not cross calls. */
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char fixed_regs[FIRST_PSEUDO_REGISTER];
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/* Same info as a HARD_REG_SET. */
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HARD_REG_SET fixed_reg_set;
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/* Data for initializing the above. */
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static char initial_fixed_regs[] = FIXED_REGISTERS;
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use or are clobbered by function calls.
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These are the registers that cannot be used to allocate
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a pseudo reg whose life crosses calls. */
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char call_used_regs[FIRST_PSEUDO_REGISTER];
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/* Same info as a HARD_REG_SET. */
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HARD_REG_SET call_used_reg_set;
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1996-01-01 03:32:57 +01:00
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/* HARD_REG_SET of registers we want to avoid caller saving. */
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HARD_REG_SET losing_caller_save_reg_set;
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1991-11-06 00:39:50 +01:00
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/* Data for initializing the above. */
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static char initial_call_used_regs[] = CALL_USED_REGISTERS;
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/* Indexed by hard register number, contains 1 for registers that are
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fixed use -- i.e. in fixed_regs -- or a function value return register
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or STRUCT_VALUE_REGNUM or STATIC_CHAIN_REGNUM. These are the
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registers that cannot hold quantities across calls even if we are
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willing to save and restore them. */
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char call_fixed_regs[FIRST_PSEUDO_REGISTER];
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/* The same info as a HARD_REG_SET. */
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HARD_REG_SET call_fixed_reg_set;
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/* Number of non-fixed registers. */
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int n_non_fixed_regs;
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/* Indexed by hard register number, contains 1 for registers
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that are being used for global register decls.
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These must be exempt from ordinary flow analysis
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and are also considered fixed. */
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char global_regs[FIRST_PSEUDO_REGISTER];
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/* Table of register numbers in the order in which to try to use them. */
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#ifdef REG_ALLOC_ORDER
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int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
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#endif
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/* For each reg class, a HARD_REG_SET saying which registers are in it. */
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1992-07-08 12:28:26 +02:00
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HARD_REG_SET reg_class_contents[N_REG_CLASSES];
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1993-02-02 23:25:11 +01:00
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/* The same information, but as an array of unsigned ints. We copy from
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these unsigned ints to the table above. We do this so the tm.h files
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do not have to be aware of the wordsize for machines with <= 64 regs. */
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1992-07-08 12:28:26 +02:00
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#define N_REG_INTS \
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((FIRST_PSEUDO_REGISTER + (HOST_BITS_PER_INT - 1)) / HOST_BITS_PER_INT)
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1993-02-02 23:25:11 +01:00
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static unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
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1992-07-08 12:28:26 +02:00
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= REG_CLASS_CONTENTS;
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1991-11-06 00:39:50 +01:00
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/* For each reg class, number of regs it contains. */
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int reg_class_size[N_REG_CLASSES];
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/* For each reg class, table listing all the containing classes. */
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enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
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/* For each reg class, table listing all the classes contained in it. */
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enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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a largest reg class contained in their union. */
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enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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the smallest reg class containing their union. */
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enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
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1992-10-12 23:21:04 +01:00
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/* Array containing all of the register names */
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char *reg_names[] = REGISTER_NAMES;
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|
1994-04-20 05:36:49 +02:00
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/* For each hard register, the widest mode object that it can contain.
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This will be a MODE_INT mode if the register can hold integers. Otherwise
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it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
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register. */
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enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
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1992-06-27 19:49:28 +02:00
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/* Maximum cost of moving from a register in one class to a register in
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another class. Based on REGISTER_MOVE_COST. */
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static int move_cost[N_REG_CLASSES][N_REG_CLASSES];
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/* Similar, but here we don't have to move if the first index is a subset
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of the second so in that case the cost is zero. */
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static int may_move_cost[N_REG_CLASSES][N_REG_CLASSES];
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1992-09-24 12:30:43 +02:00
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#ifdef FORBIDDEN_INC_DEC_CLASSES
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/* These are the classes that regs which are auto-incremented or decremented
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cannot be put in. */
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static int forbidden_inc_dec_class[N_REG_CLASSES];
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/* Indexed by n, is non-zero if (REG n) is used in an auto-inc or auto-dec
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context. */
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static char *in_inc_dec;
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|
1992-09-29 21:08:08 +01:00
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#endif /* FORBIDDEN_INC_DEC_CLASSES */
|
1992-09-24 12:30:43 +02:00
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|
1991-11-06 00:39:50 +01:00
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/* Function called only once to initialize the above data on reg usage.
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Once this is done, various switches may override. */
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void
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init_reg_sets ()
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{
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register int i, j;
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|
1992-07-08 12:28:26 +02:00
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/* First copy the register information from the initial int form into
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the regsets. */
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for (i = 0; i < N_REG_CLASSES; i++)
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{
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CLEAR_HARD_REG_SET (reg_class_contents[i]);
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for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
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if (int_reg_class_contents[i][j / HOST_BITS_PER_INT]
|
1993-02-02 23:25:11 +01:00
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& ((unsigned) 1 << (j % HOST_BITS_PER_INT)))
|
1992-07-08 12:28:26 +02:00
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SET_HARD_REG_BIT (reg_class_contents[i], j);
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}
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|
1991-11-06 00:39:50 +01:00
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|
bcopy (initial_fixed_regs, fixed_regs, sizeof fixed_regs);
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bcopy (initial_call_used_regs, call_used_regs, sizeof call_used_regs);
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bzero (global_regs, sizeof global_regs);
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|
|
|
/* Compute number of hard regs in each class. */
|
|
|
|
|
|
1994-06-15 00:19:28 +02:00
|
|
|
|
bzero ((char *) reg_class_size, sizeof reg_class_size);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
|
|
|
|
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
|
|
|
|
|
reg_class_size[i]++;
|
|
|
|
|
|
|
|
|
|
/* Initialize the table of subunions.
|
|
|
|
|
reg_class_subunion[I][J] gets the largest-numbered reg-class
|
|
|
|
|
that is contained in the union of classes I and J. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
{
|
|
|
|
|
for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
|
|
{
|
|
|
|
|
#ifdef HARD_REG_SET
|
|
|
|
|
register /* Declare it register if it's a scalar. */
|
|
|
|
|
#endif
|
|
|
|
|
HARD_REG_SET c;
|
|
|
|
|
register int k;
|
|
|
|
|
|
|
|
|
|
COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
|
|
|
|
IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
|
|
|
|
for (k = 0; k < N_REG_CLASSES; k++)
|
|
|
|
|
{
|
|
|
|
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[k], c,
|
|
|
|
|
subclass1);
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
subclass1:
|
|
|
|
|
/* keep the largest subclass */ /* SPEE 900308 */
|
|
|
|
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[k],
|
|
|
|
|
reg_class_contents[(int) reg_class_subunion[i][j]],
|
|
|
|
|
subclass2);
|
|
|
|
|
reg_class_subunion[i][j] = (enum reg_class) k;
|
|
|
|
|
subclass2:
|
|
|
|
|
;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Initialize the table of superunions.
|
|
|
|
|
reg_class_superunion[I][J] gets the smallest-numbered reg-class
|
|
|
|
|
containing the union of classes I and J. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
{
|
|
|
|
|
for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
|
|
{
|
|
|
|
|
#ifdef HARD_REG_SET
|
|
|
|
|
register /* Declare it register if it's a scalar. */
|
|
|
|
|
#endif
|
|
|
|
|
HARD_REG_SET c;
|
|
|
|
|
register int k;
|
|
|
|
|
|
|
|
|
|
COPY_HARD_REG_SET (c, reg_class_contents[i]);
|
|
|
|
|
IOR_HARD_REG_SET (c, reg_class_contents[j]);
|
|
|
|
|
for (k = 0; k < N_REG_CLASSES; k++)
|
|
|
|
|
GO_IF_HARD_REG_SUBSET (c, reg_class_contents[k], superclass);
|
|
|
|
|
|
|
|
|
|
superclass:
|
|
|
|
|
reg_class_superunion[i][j] = (enum reg_class) k;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Initialize the tables of subclasses and superclasses of each reg class.
|
|
|
|
|
First clear the whole table, then add the elements as they are found. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
{
|
|
|
|
|
for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
|
|
{
|
|
|
|
|
reg_class_superclasses[i][j] = LIM_REG_CLASSES;
|
|
|
|
|
reg_class_subclasses[i][j] = LIM_REG_CLASSES;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
{
|
|
|
|
|
if (i == (int) NO_REGS)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
for (j = i + 1; j < N_REG_CLASSES; j++)
|
|
|
|
|
{
|
|
|
|
|
enum reg_class *p;
|
|
|
|
|
|
|
|
|
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[i], reg_class_contents[j],
|
|
|
|
|
subclass);
|
|
|
|
|
continue;
|
|
|
|
|
subclass:
|
|
|
|
|
/* Reg class I is a subclass of J.
|
|
|
|
|
Add J to the table of superclasses of I. */
|
|
|
|
|
p = ®_class_superclasses[i][0];
|
|
|
|
|
while (*p != LIM_REG_CLASSES) p++;
|
|
|
|
|
*p = (enum reg_class) j;
|
|
|
|
|
/* Add I to the table of superclasses of J. */
|
|
|
|
|
p = ®_class_subclasses[j][0];
|
|
|
|
|
while (*p != LIM_REG_CLASSES) p++;
|
|
|
|
|
*p = (enum reg_class) i;
|
|
|
|
|
}
|
|
|
|
|
}
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
1997-07-14 12:50:48 +02:00
|
|
|
|
/* Do any additional initialization regsets may need */
|
|
|
|
|
INIT_ONCE_REG_SET ();
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* After switches have been processed, which perhaps alter
|
|
|
|
|
`fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
|
|
|
|
|
|
1994-04-21 01:38:22 +02:00
|
|
|
|
static void
|
1991-11-06 00:39:50 +01:00
|
|
|
|
init_reg_sets_1 ()
|
|
|
|
|
{
|
1998-03-12 01:02:52 +01:00
|
|
|
|
register unsigned int i, j;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
/* This macro allows the fixed or call-used registers
|
|
|
|
|
to depend on target flags. */
|
|
|
|
|
|
|
|
|
|
#ifdef CONDITIONAL_REGISTER_USAGE
|
|
|
|
|
CONDITIONAL_REGISTER_USAGE;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/* Initialize "constant" tables. */
|
|
|
|
|
|
|
|
|
|
CLEAR_HARD_REG_SET (fixed_reg_set);
|
|
|
|
|
CLEAR_HARD_REG_SET (call_used_reg_set);
|
|
|
|
|
CLEAR_HARD_REG_SET (call_fixed_reg_set);
|
|
|
|
|
|
|
|
|
|
bcopy (fixed_regs, call_fixed_regs, sizeof call_fixed_regs);
|
|
|
|
|
|
|
|
|
|
n_non_fixed_regs = 0;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
|
|
{
|
|
|
|
|
if (fixed_regs[i])
|
|
|
|
|
SET_HARD_REG_BIT (fixed_reg_set, i);
|
|
|
|
|
else
|
|
|
|
|
n_non_fixed_regs++;
|
|
|
|
|
|
|
|
|
|
if (call_used_regs[i])
|
|
|
|
|
SET_HARD_REG_BIT (call_used_reg_set, i);
|
|
|
|
|
if (call_fixed_regs[i])
|
|
|
|
|
SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
1996-01-01 03:32:57 +01:00
|
|
|
|
if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (i)))
|
|
|
|
|
SET_HARD_REG_BIT (losing_caller_save_reg_set, i);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
1998-02-26 14:45:45 +01:00
|
|
|
|
|
|
|
|
|
/* Initialize the move cost table. Find every subset of each class
|
|
|
|
|
and take the maximum cost of moving any subset to any other. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
|
|
{
|
|
|
|
|
int cost = i == j ? 2 : REGISTER_MOVE_COST (i, j);
|
|
|
|
|
enum reg_class *p1, *p2;
|
|
|
|
|
|
|
|
|
|
for (p2 = ®_class_subclasses[j][0]; *p2 != LIM_REG_CLASSES; p2++)
|
|
|
|
|
if (*p2 != i)
|
|
|
|
|
cost = MAX (cost, REGISTER_MOVE_COST (i, *p2));
|
|
|
|
|
|
|
|
|
|
for (p1 = ®_class_subclasses[i][0]; *p1 != LIM_REG_CLASSES; p1++)
|
|
|
|
|
{
|
|
|
|
|
if (*p1 != j)
|
|
|
|
|
cost = MAX (cost, REGISTER_MOVE_COST (*p1, j));
|
|
|
|
|
|
|
|
|
|
for (p2 = ®_class_subclasses[j][0];
|
|
|
|
|
*p2 != LIM_REG_CLASSES; p2++)
|
|
|
|
|
if (*p1 != *p2)
|
|
|
|
|
cost = MAX (cost, REGISTER_MOVE_COST (*p1, *p2));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
move_cost[i][j] = cost;
|
|
|
|
|
|
|
|
|
|
if (reg_class_subset_p (i, j))
|
|
|
|
|
cost = 0;
|
|
|
|
|
|
|
|
|
|
may_move_cost[i][j] = cost;
|
|
|
|
|
}
|
1994-04-21 01:38:22 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Compute the table of register modes.
|
|
|
|
|
These values are used to record death information for individual registers
|
|
|
|
|
(as opposed to a multi-register mode). */
|
1994-04-20 05:36:49 +02:00
|
|
|
|
|
1994-04-21 01:38:22 +02:00
|
|
|
|
static void
|
|
|
|
|
init_reg_modes ()
|
|
|
|
|
{
|
|
|
|
|
register int i;
|
1994-04-20 05:36:49 +02:00
|
|
|
|
|
|
|
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
1994-05-28 01:29:18 +02:00
|
|
|
|
{
|
|
|
|
|
reg_raw_mode[i] = choose_hard_reg_mode (i, 1);
|
|
|
|
|
|
1997-10-07 20:36:48 +02:00
|
|
|
|
/* If we couldn't find a valid mode, just use the previous mode.
|
1994-05-28 01:29:18 +02:00
|
|
|
|
??? One situation in which we need to do this is on the mips where
|
|
|
|
|
HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
|
|
|
|
|
to use DF mode for the even registers and VOIDmode for the odd
|
1995-05-16 14:39:54 +02:00
|
|
|
|
(for the cpu models where the odd ones are inaccessible). */
|
1994-05-28 01:29:18 +02:00
|
|
|
|
if (reg_raw_mode[i] == VOIDmode)
|
1997-10-07 20:36:48 +02:00
|
|
|
|
reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
|
1994-05-28 01:29:18 +02:00
|
|
|
|
}
|
1994-04-20 05:36:49 +02:00
|
|
|
|
}
|
|
|
|
|
|
1994-04-21 01:38:22 +02:00
|
|
|
|
/* Finish initializing the register sets and
|
|
|
|
|
initialize the register modes. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
init_regs ()
|
|
|
|
|
{
|
|
|
|
|
/* This finishes what was started by init_reg_sets, but couldn't be done
|
|
|
|
|
until after register usage was specified. */
|
1998-01-20 09:55:07 +01:00
|
|
|
|
init_reg_sets_1 ();
|
1994-04-21 01:38:22 +02:00
|
|
|
|
|
|
|
|
|
init_reg_modes ();
|
|
|
|
|
}
|
|
|
|
|
|
1998-03-16 12:56:25 +01:00
|
|
|
|
#ifdef HAVE_SECONDARY_RELOADS
|
|
|
|
|
/* Compute extra cost of moving registers to/from memory due to reloads.
|
|
|
|
|
Only needed if secondary reloads are required for memory moves. */
|
|
|
|
|
int
|
|
|
|
|
memory_move_secondary_cost (mode, class, in)
|
|
|
|
|
enum machine_mode mode;
|
|
|
|
|
enum reg_class class;
|
|
|
|
|
int in;
|
|
|
|
|
{
|
|
|
|
|
enum reg_class altclass;
|
|
|
|
|
int partial_cost = 0;
|
|
|
|
|
rtx mem;
|
|
|
|
|
|
|
|
|
|
/* We need a memory reference to feed to SECONDARY... macros. */
|
|
|
|
|
mem = gen_rtx (MEM, mode, stack_pointer_rtx);
|
|
|
|
|
|
|
|
|
|
if (in)
|
1998-03-19 01:16:37 +01:00
|
|
|
|
#ifdef SECONDARY_INPUT_RELOAD_CLASS
|
1998-03-16 12:56:25 +01:00
|
|
|
|
altclass = SECONDARY_INPUT_RELOAD_CLASS (class, mode, mem);
|
1998-03-19 01:16:37 +01:00
|
|
|
|
#else
|
|
|
|
|
altclass = NO_REGS;
|
|
|
|
|
#endif
|
1998-03-16 12:56:25 +01:00
|
|
|
|
else
|
1998-03-19 01:16:37 +01:00
|
|
|
|
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
|
1998-03-16 12:56:25 +01:00
|
|
|
|
altclass = SECONDARY_OUTPUT_RELOAD_CLASS (class, mode, mem);
|
1998-03-19 01:16:37 +01:00
|
|
|
|
#else
|
|
|
|
|
altclass = NO_REGS;
|
|
|
|
|
#endif
|
1998-03-16 12:56:25 +01:00
|
|
|
|
if (altclass == NO_REGS)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
if (in)
|
|
|
|
|
partial_cost = REGISTER_MOVE_COST (altclass, class);
|
|
|
|
|
else
|
|
|
|
|
partial_cost = REGISTER_MOVE_COST (class, altclass);
|
|
|
|
|
|
|
|
|
|
if (class == altclass)
|
|
|
|
|
/* This isn't simply a copy-to-temporary situation. Can't guess
|
|
|
|
|
what it is, so MEMORY_MOVE_COST really ought not to be calling
|
|
|
|
|
here in that case.
|
|
|
|
|
|
|
|
|
|
I'm tempted to put in an abort here, but returning this will
|
|
|
|
|
probably only give poor estimates, which is what we would've
|
|
|
|
|
had before this code anyways. */
|
|
|
|
|
return partial_cost;
|
|
|
|
|
|
|
|
|
|
/* Check if the secondary reload register will also need a
|
|
|
|
|
secondary reload. */
|
|
|
|
|
return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
1994-04-20 05:36:49 +02:00
|
|
|
|
/* Return a machine mode that is legitimate for hard reg REGNO and large
|
|
|
|
|
enough to save nregs. If we can't find one, return VOIDmode. */
|
|
|
|
|
|
|
|
|
|
enum machine_mode
|
|
|
|
|
choose_hard_reg_mode (regno, nregs)
|
|
|
|
|
int regno;
|
|
|
|
|
int nregs;
|
|
|
|
|
{
|
|
|
|
|
enum machine_mode found_mode = VOIDmode, mode;
|
|
|
|
|
|
|
|
|
|
/* We first look for the largest integer mode that can be validly
|
|
|
|
|
held in REGNO. If none, we look for the largest floating-point mode.
|
|
|
|
|
If we still didn't find a valid mode, try CCmode. */
|
|
|
|
|
|
|
|
|
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
|
|
|
|
|
mode != VOIDmode;
|
|
|
|
|
mode = GET_MODE_WIDER_MODE (mode))
|
|
|
|
|
if (HARD_REGNO_NREGS (regno, mode) == nregs
|
|
|
|
|
&& HARD_REGNO_MODE_OK (regno, mode))
|
|
|
|
|
found_mode = mode;
|
|
|
|
|
|
|
|
|
|
if (found_mode != VOIDmode)
|
|
|
|
|
return found_mode;
|
|
|
|
|
|
|
|
|
|
for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
|
|
|
|
|
mode != VOIDmode;
|
|
|
|
|
mode = GET_MODE_WIDER_MODE (mode))
|
|
|
|
|
if (HARD_REGNO_NREGS (regno, mode) == nregs
|
|
|
|
|
&& HARD_REGNO_MODE_OK (regno, mode))
|
|
|
|
|
found_mode = mode;
|
|
|
|
|
|
|
|
|
|
if (found_mode != VOIDmode)
|
|
|
|
|
return found_mode;
|
|
|
|
|
|
|
|
|
|
if (HARD_REGNO_NREGS (regno, CCmode) == nregs
|
|
|
|
|
&& HARD_REGNO_MODE_OK (regno, CCmode))
|
|
|
|
|
return CCmode;
|
|
|
|
|
|
|
|
|
|
/* We can't find a mode valid for this register. */
|
|
|
|
|
return VOIDmode;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Specify the usage characteristics of the register named NAME.
|
|
|
|
|
It should be a fixed register if FIXED and a
|
|
|
|
|
call-used register if CALL_USED. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
fix_register (name, fixed, call_used)
|
|
|
|
|
char *name;
|
|
|
|
|
int fixed, call_used;
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
/* Decode the name and update the primary form of
|
|
|
|
|
the register info. */
|
|
|
|
|
|
1992-03-05 21:07:30 +01:00
|
|
|
|
if ((i = decode_reg_name (name)) >= 0)
|
|
|
|
|
{
|
|
|
|
|
fixed_regs[i] = fixed;
|
|
|
|
|
call_used_regs[i] = call_used;
|
|
|
|
|
}
|
|
|
|
|
else
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
|
|
|
|
warning ("unknown register name: %s", name);
|
|
|
|
|
}
|
|
|
|
|
}
|
1994-01-11 01:16:27 +01:00
|
|
|
|
|
|
|
|
|
/* Mark register number I as global. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
globalize_reg (i)
|
|
|
|
|
int i;
|
|
|
|
|
{
|
|
|
|
|
if (global_regs[i])
|
|
|
|
|
{
|
|
|
|
|
warning ("register used for two global register variables");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (call_used_regs[i] && ! fixed_regs[i])
|
|
|
|
|
warning ("call-clobbered register used for global register variable");
|
|
|
|
|
|
|
|
|
|
global_regs[i] = 1;
|
|
|
|
|
|
|
|
|
|
/* If already fixed, nothing else to do. */
|
|
|
|
|
if (fixed_regs[i])
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
|
|
|
|
|
n_non_fixed_regs--;
|
|
|
|
|
|
|
|
|
|
SET_HARD_REG_BIT (fixed_reg_set, i);
|
|
|
|
|
SET_HARD_REG_BIT (call_used_reg_set, i);
|
|
|
|
|
SET_HARD_REG_BIT (call_fixed_reg_set, i);
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
/* Now the data and code for the `regclass' pass, which happens
|
|
|
|
|
just before local-alloc. */
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* The `costs' struct records the cost of using a hard register of each class
|
|
|
|
|
and of using memory for each pseudo. We use this data to set up
|
|
|
|
|
register class preferences. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
struct costs
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
int cost[N_REG_CLASSES];
|
|
|
|
|
int mem_cost;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
};
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Record the cost of each class for each pseudo. */
|
|
|
|
|
|
|
|
|
|
static struct costs *costs;
|
|
|
|
|
|
|
|
|
|
/* Record the same data by operand number, accumulated for each alternative
|
|
|
|
|
in an insn. The contribution to a pseudo is that of the minimum-cost
|
|
|
|
|
alternative. */
|
|
|
|
|
|
|
|
|
|
static struct costs op_costs[MAX_RECOG_OPERANDS];
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
/* (enum reg_class) prefclass[R] is the preferred class for pseudo number R.
|
|
|
|
|
This is available after `regclass' is run. */
|
|
|
|
|
|
|
|
|
|
static char *prefclass;
|
|
|
|
|
|
1992-06-27 19:52:16 +02:00
|
|
|
|
/* altclass[R] is a register class that we should use for allocating
|
|
|
|
|
pseudo number R if no register in the preferred class is available.
|
|
|
|
|
If no register in this class is available, memory is preferred.
|
|
|
|
|
|
|
|
|
|
It might appear to be more general to have a bitmask of classes here,
|
|
|
|
|
but since it is recommended that there be a class corresponding to the
|
|
|
|
|
union of most major pair of classes, that generality is not required.
|
|
|
|
|
|
1991-11-06 00:39:50 +01:00
|
|
|
|
This is available after `regclass' is run. */
|
|
|
|
|
|
1992-06-27 19:52:16 +02:00
|
|
|
|
static char *altclass;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:52:16 +02:00
|
|
|
|
/* Record the depth of loops that we are in. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
static int loop_depth;
|
|
|
|
|
|
1992-06-27 19:52:16 +02:00
|
|
|
|
/* Account for the fact that insns within a loop are executed very commonly,
|
|
|
|
|
but don't keep doing this as loops go too deep. */
|
|
|
|
|
|
|
|
|
|
static int loop_cost;
|
|
|
|
|
|
1994-02-02 00:22:21 +01:00
|
|
|
|
static void record_reg_classes PROTO((int, int, rtx *, enum machine_mode *,
|
|
|
|
|
char **, rtx));
|
|
|
|
|
static int copy_cost PROTO((rtx, enum machine_mode,
|
|
|
|
|
enum reg_class, int));
|
|
|
|
|
static void record_address_regs PROTO((rtx, enum reg_class, int));
|
1997-12-20 12:31:54 +01:00
|
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
|
|
static int auto_inc_dec_reg_p PROTO((rtx, enum machine_mode));
|
|
|
|
|
#endif
|
1994-02-02 00:22:21 +01:00
|
|
|
|
static void reg_scan_mark_refs PROTO((rtx, rtx, int));
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
/* Return the reg_class in which pseudo reg number REGNO is best allocated.
|
|
|
|
|
This function is sometimes called before the info has been computed.
|
|
|
|
|
When that happens, just return GENERAL_REGS, which is innocuous. */
|
|
|
|
|
|
|
|
|
|
enum reg_class
|
|
|
|
|
reg_preferred_class (regno)
|
|
|
|
|
int regno;
|
|
|
|
|
{
|
|
|
|
|
if (prefclass == 0)
|
|
|
|
|
return GENERAL_REGS;
|
|
|
|
|
return (enum reg_class) prefclass[regno];
|
|
|
|
|
}
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
enum reg_class
|
|
|
|
|
reg_alternate_class (regno)
|
c-lex.c: Include <stdlib.h> and <string.h>/<strings.h>.
* c-lex.c: Include <stdlib.h> and <string.h>/<strings.h>. Add
prototype for `handle_sysv_pragma', and make it static. Add
parentheses around assignment used as truth value.
* combine.c (combine_instructions): Protect variable `prev' with
macro HAVE_cc0.
(can_combine_p): Protect variable `link' with AUTO_INC_DEC.
(extract_left_shift): Add parentheses around operand of &.
(merge_outer_ops): Avoid an empty body in an else-statement.
(gen_rtx_combine): Remove unused variable `i'.
* sparc/gmon-sol2.c: Include <fcntl.h>. Make return type of
function monstartup `void'. Likewise for internal_mcount. Add
`static void' prototype for moncontrol. Reconcile sprintf format
vs. args.
* sparc/sparc.c: Include <stdlib.h> and <string.h>/<strings.h>.
Make return type of function_arg_slotno explicitly `int'.
(reg_unused_after): Add parentheses around assignment used as
truth value.
(save_regs): Add explicit braces to avoid ambiguous `else'.
(function_arg_slotno): Add parentheses around && within ||.
(function_arg_pass_by_reference): Likewise.
(sparc_flat_output_function_prologue): Reconcile fprintf format
vs. args.
* svr4.h (ASM_OUTPUT_LIMITED_STRING): Add parentheses around
assignment used as truth value.
* cplus-dem.c: Include <stdlib.h>.
(demangle_signature): Avoid an empty body in an else-statement.
(do_type): Remove unused variable `lvl'.
* cppexp.c: Don't have <stdlib.h> depend on MULTIBYTE_CHARS.
Include <string.h>/<strings.h>.
(cpp_lex): Remove unused variable `namelen'.
(cpp_lex): Explicitly declare `num_chars' as an int.
* cpplib.c: Avoid duplicate inclusion of <stdlib.h>, include
<unistd.h> instead. Explicitly declare is_system_include
returning int.
(make_assertion): Remove unused variable `kt'.
(cpp_expand_to_buffer): Hide variable `obuf'.
(output_line_command): Remove unused variables, `line_end',
`line_cmd_buf' and `len'.
(macarg): Remove unused variable `arg_start'.
(special_symbol): Remove unused variable `i'. Add parentheses
around assignment used as truth value.
(do_include): Remove unused variables `pcfname' and `retried',
hide `pcf' and `pcfbuflimit'.
(do_line): Remove unused variable `i'.
(finclude): Hide variable `missing_newline'.
(cpp_handle_options): Remove unused variable `j'.
(read_token_list): Remove unused variable `eofp'.
(cpp_error_with_line): Remove unused variable `i'.
(cpp_warning_with_line): Likewise.
(cpp_pedwarn_with_line): Explicitly declare `column' as int.
(cpp_error_from_errno): Remove unused variable `i'.
* cse.c (invalidate): Add parentheses around assignment used as
truth value.
(find_best_addr): Move declaration of variable `our_cost' inside
the conditional macro where its used.
(fold_rtx): Avoid an empty body in an if-statement.
(cse_insn): Wrap variables `this_insn_cc0_mode' and
`this_insn_cc0' in macro HAVE_cc0.
* dwarf2out.c: Include <stdlib.h> and <string.h>/<string.h>.
(ASM_OUTPUT_DWARF_DATA8): Reconcile format vs. args in fprintf's.
(output_uleb128): Likewise.
(output_sleb128): Likewise.
(output_cfi): Likewise.
(output_call_frame_info): Remove unused variables `j', `fde_size'
and `fde_pad'.
(comp_unit_has_inlines): Hide declaration as per rest of file.
(size_of_line_prolog): Correct typo in prototype.
(add_arange): Likewise.
(output_aranges): Likewise.
(add_name_and_src_coords_attributes): Likewise.
(gen_array_type_die): Likewise.
(gen_inlined_subroutine_die): Likewise.
(equate_decl_number_to_die): Remove unused variable `i'.
(print_die): Reconcile format vs. args in fprintf's.
(print_dwarf_line_table): Likewise.
(output_die): Likewise.
(output_line_info): Likewise.
(add_subscript_info): Avoid an empty body in an else-statement.
(gen_subprogram_die): Remove unused variable `fp_loc'.
* dwarfout.c: Explicitly declare `next_pubname_number' as int.
Protect `ordering_attribute' prototype with USE_ORDERING_ATTRIBUTE
macro. Protect `src_coords_attribute' prototype with
DWARF_DECL_COORDINATES macro. Hide `output_entry_point_die'
prototype as in the rest of the file. Likewise for
`output_pointer_type_die' and `output_reference_type_die'. Remove
prototype for `type_of_for_scope'.
(output_unsigned_leb128): Reconcile format vs. args in fprintf.
(type_attribute): Add explicit braces to avoid ambiguous `else'.
* final.c: Include <stdlib.h> and <string.h>/<strings.h>.
(shorten_branches): Protect declaration of tmp_length with
SHORTEN_WITH_ADJUST_INSN_LENGTH and ADJUST_INSN_LENGTH macros.
(profile_function): Protect declaration of `sval' and `cxt'
variables with appropriate macros.
(final_scan_insn): Likewise for `note' variable. Add explicit
braces to avoid empty body in an if-statement.
(output_asm_insn): Move variable `i' inside macro conditional
where it is used. Add parentheses around assignment used as truth
value.
(asm_fprintf) Likewise, likewise.
* fix-header.c (main): Remove unused variable `done'. Protect
declaration of `i' with FIXPROTO_IGNORE_LIST.
* pexecute.c: Include <unistd.h>. Prototype `my_strerror'.
* print-rtl.c (print_inline_rtx): Explicitly declare the parameter
`ind'.
* profile.c: Include <string.h>/<strings.h>.
(instrument_arcs): Remove unused variables `note', `inverted',
`zero' and `neg_one'.
(branch_prob): Avoid empty body in an if-statement.
* regclass.c: Include <stdlib.h>.
(reg_alternate_class): Explicitly declare parameter `regno'.
* regmove.c (regmove_optimize): Remove unused variable `p'. Add
parentheses around assignment used as truth value.
(find_matches): Remove unused variables `output_operand' and
`matching_operand'.
(fixup_match_1): Remove statement with no effect: "if (0) ;".
* scan.c (sstring_append): Explicitly declare `count' as int.
(scan_string): Explicitly declare parameter `init' as int.
* sched.c: Include <stdlib.h>.
(BLOCKAGE_RANGE): Add parentheses around arithmetic in operand of |.
(rank_for_schedule): Add parentheses around assignment used as
truth value.
(schedule_block): Likewise.
(regno_use_in): Likewise.
(schedule_insns): Remove unused variable `i'.
* toplev.c: Include <stdlib.h> and <string.h>/<strings.h>.
(v_message_with_decl): Remove unused variable `n'.
(botch): Explicitly declare parameter `s' as char *.
(main): Add parentheses around assignment used as truth value.
* tree.c (make_node): Protect the variable `kind' with the
GATHER_STATISTICS macro.
(real_value_from_int_cst): Move variable `e' inside conditional
macro area where it is used.
(tree_last): Add parentheses around assignment used as truth value.
(build1): Protect the variable `kind' with the GATHER_STATISTICS
macro.
(print_obstack_statistics): Reconcile format vs. args in fprintf.
Protect variables `i', `total_nodes', and `total_bytes' with the
GATHER_STATISTICS macro.
Lots more -W -Wall warnings disappear.
From-SVN: r17516
1998-01-27 23:11:45 +01:00
|
|
|
|
int regno;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
|
|
|
|
if (prefclass == 0)
|
1992-06-27 19:49:28 +02:00
|
|
|
|
return ALL_REGS;
|
|
|
|
|
|
|
|
|
|
return (enum reg_class) altclass[regno];
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This prevents dump_flow_info from losing if called
|
|
|
|
|
before regclass is run. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
regclass_init ()
|
|
|
|
|
{
|
|
|
|
|
prefclass = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This is a pass of the compiler that scans all instructions
|
|
|
|
|
and calculates the preferred class for each pseudo-register.
|
|
|
|
|
This information can be accessed later by calling `reg_preferred_class'.
|
|
|
|
|
This pass comes just before local register allocation. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
regclass (f, nregs)
|
|
|
|
|
rtx f;
|
|
|
|
|
int nregs;
|
|
|
|
|
{
|
|
|
|
|
#ifdef REGISTER_CONSTRAINTS
|
|
|
|
|
register rtx insn;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
register int i, j;
|
|
|
|
|
struct costs init_cost;
|
|
|
|
|
rtx set;
|
|
|
|
|
int pass;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
init_recog ();
|
|
|
|
|
|
1992-09-24 12:30:43 +02:00
|
|
|
|
costs = (struct costs *) alloca (nregs * sizeof (struct costs));
|
|
|
|
|
|
|
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
|
|
|
|
|
|
|
in_inc_dec = (char *) alloca (nregs);
|
|
|
|
|
|
|
|
|
|
/* Initialize information about which register classes can be used for
|
|
|
|
|
pseudos that are auto-incremented or auto-decremented. It would
|
|
|
|
|
seem better to put this in init_reg_sets, but we need to be able
|
|
|
|
|
to allocate rtx, which we can't do that early. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
{
|
alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO...
* alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO;
change gen_rtx(expr...) to gen_rtx_fmt_foo(expr...).
* caller-save.c, calls.c, combine.c, cse.c: Likewise.
* dwarf2out.c, except.c, explow.c, expmed.c, expr.c: Likewise.
* final.c, flow.c, function.c, genpeep.c, haifa-sched.c: Likewise.
* halfpic.c, integrate.c, jump.c, local-alloc.c, loop.c: Likewise.
* profile.c, recog.c, reg-stack.c, regclass.c, regmove.c: Likewise.
* reload.c, reload1.c, reorg.c, sched.c, stmt.c, stupid.c: Likewise.
* unroll.c, varasm.c: Likewise.
* config/alpha/alpha.c, config/alpha/alpha.md: Likewise.
From-SVN: r17357
1998-01-15 00:10:50 +01:00
|
|
|
|
rtx r = gen_rtx_REG (VOIDmode, 0);
|
1992-09-24 12:30:43 +02:00
|
|
|
|
enum machine_mode m;
|
|
|
|
|
|
|
|
|
|
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
|
|
|
|
|
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
|
|
|
|
|
{
|
|
|
|
|
REGNO (r) = j;
|
|
|
|
|
|
|
|
|
|
for (m = VOIDmode; (int) m < (int) MAX_MACHINE_MODE;
|
1993-05-25 19:30:34 +02:00
|
|
|
|
m = (enum machine_mode) ((int) m + 1))
|
1992-09-24 12:30:43 +02:00
|
|
|
|
if (HARD_REGNO_MODE_OK (j, m))
|
|
|
|
|
{
|
|
|
|
|
PUT_MODE (r, m);
|
1994-02-02 00:22:21 +01:00
|
|
|
|
|
|
|
|
|
/* If a register is not directly suitable for an
|
|
|
|
|
auto-increment or decrement addressing mode and
|
|
|
|
|
requires secondary reloads, disallow its class from
|
|
|
|
|
being used in such addresses. */
|
|
|
|
|
|
|
|
|
|
if ((0
|
1995-12-17 18:17:23 +01:00
|
|
|
|
#ifdef SECONDARY_RELOAD_CLASS
|
|
|
|
|
|| (SECONDARY_RELOAD_CLASS (BASE_REG_CLASS, m, r)
|
|
|
|
|
!= NO_REGS)
|
|
|
|
|
#else
|
1992-09-24 12:30:43 +02:00
|
|
|
|
#ifdef SECONDARY_INPUT_RELOAD_CLASS
|
1994-02-02 00:22:21 +01:00
|
|
|
|
|| (SECONDARY_INPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r)
|
|
|
|
|
!= NO_REGS)
|
1992-09-24 12:30:43 +02:00
|
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|
|
#endif
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|
|
|
|
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
|
1994-02-02 00:22:21 +01:00
|
|
|
|
|| (SECONDARY_OUTPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r)
|
|
|
|
|
!= NO_REGS)
|
1995-12-17 18:17:23 +01:00
|
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|
|
#endif
|
1992-09-24 12:30:43 +02:00
|
|
|
|
#endif
|
1994-02-02 00:22:21 +01:00
|
|
|
|
)
|
|
|
|
|
&& ! auto_inc_dec_reg_p (r, m))
|
1992-09-24 12:30:43 +02:00
|
|
|
|
forbidden_inc_dec_class[i] = 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
#endif /* FORBIDDEN_INC_DEC_CLASSES */
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
init_cost.mem_cost = 10000;
|
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
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|
init_cost.cost[i] = 10000;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Normally we scan the insns once and determine the best class to use for
|
|
|
|
|
each register. However, if -fexpensive_optimizations are on, we do so
|
|
|
|
|
twice, the second time using the tentative best classes to guide the
|
|
|
|
|
selection. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (pass = 0; pass <= flag_expensive_optimizations; pass++)
|
|
|
|
|
{
|
|
|
|
|
/* Zero out our accumulation of the cost of each class for each reg. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1994-06-15 00:19:28 +02:00
|
|
|
|
bzero ((char *) costs, nregs * sizeof (struct costs));
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-09-24 12:30:43 +02:00
|
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
|
|
bzero (in_inc_dec, nregs);
|
|
|
|
|
#endif
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
loop_depth = 0, loop_cost = 1;
|
|
|
|
|
|
|
|
|
|
/* Scan the instructions and record each time it would
|
|
|
|
|
save code to put a certain register in a certain class. */
|
|
|
|
|
|
|
|
|
|
for (insn = f; insn; insn = NEXT_INSN (insn))
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
char *constraints[MAX_RECOG_OPERANDS];
|
|
|
|
|
enum machine_mode modes[MAX_RECOG_OPERANDS];
|
|
|
|
|
int nalternatives;
|
|
|
|
|
int noperands;
|
|
|
|
|
|
|
|
|
|
/* Show that an insn inside a loop is likely to be executed three
|
1993-01-10 23:49:32 +01:00
|
|
|
|
times more than insns outside a loop. This is much more aggressive
|
1992-06-27 19:49:28 +02:00
|
|
|
|
than the assumptions made elsewhere and is being tried as an
|
|
|
|
|
experiment. */
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (insn) == NOTE
|
|
|
|
|
&& NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
|
|
|
|
|
loop_depth++, loop_cost = 1 << (2 * MIN (loop_depth, 5));
|
|
|
|
|
else if (GET_CODE (insn) == NOTE
|
|
|
|
|
&& NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
|
|
|
|
|
loop_depth--, loop_cost = 1 << (2 * MIN (loop_depth, 5));
|
|
|
|
|
|
|
|
|
|
else if ((GET_CODE (insn) == INSN
|
|
|
|
|
&& GET_CODE (PATTERN (insn)) != USE
|
|
|
|
|
&& GET_CODE (PATTERN (insn)) != CLOBBER
|
|
|
|
|
&& GET_CODE (PATTERN (insn)) != ASM_INPUT)
|
|
|
|
|
|| (GET_CODE (insn) == JUMP_INSN
|
|
|
|
|
&& GET_CODE (PATTERN (insn)) != ADDR_VEC
|
|
|
|
|
&& GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
|
|
|
|
|
|| GET_CODE (insn) == CALL_INSN)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (GET_CODE (insn) == INSN
|
|
|
|
|
&& (noperands = asm_noperands (PATTERN (insn))) >= 0)
|
|
|
|
|
{
|
1992-07-06 22:14:57 +02:00
|
|
|
|
decode_asm_operands (PATTERN (insn), recog_operand, NULL_PTR,
|
1992-06-27 19:49:28 +02:00
|
|
|
|
constraints, modes);
|
1992-08-13 22:48:40 +02:00
|
|
|
|
nalternatives = (noperands == 0 ? 0
|
|
|
|
|
: n_occurrences (',', constraints[0]) + 1);
|
1992-06-27 19:49:28 +02:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
int insn_code_number = recog_memoized (insn);
|
|
|
|
|
rtx note;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
set = single_set (insn);
|
|
|
|
|
insn_extract (insn);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
nalternatives = insn_n_alternatives[insn_code_number];
|
|
|
|
|
noperands = insn_n_operands[insn_code_number];
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* If this insn loads a parameter from its stack slot, then
|
|
|
|
|
it represents a savings, rather than a cost, if the
|
|
|
|
|
parameter is stored in memory. Record this fact. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (set != 0 && GET_CODE (SET_DEST (set)) == REG
|
|
|
|
|
&& GET_CODE (SET_SRC (set)) == MEM
|
1992-07-06 22:14:57 +02:00
|
|
|
|
&& (note = find_reg_note (insn, REG_EQUIV,
|
|
|
|
|
NULL_RTX)) != 0
|
1992-06-27 19:49:28 +02:00
|
|
|
|
&& GET_CODE (XEXP (note, 0)) == MEM)
|
|
|
|
|
{
|
|
|
|
|
costs[REGNO (SET_DEST (set))].mem_cost
|
1998-03-16 12:56:25 +01:00
|
|
|
|
-= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set)),
|
|
|
|
|
GENERAL_REGS, 1)
|
1992-06-27 19:49:28 +02:00
|
|
|
|
* loop_cost);
|
|
|
|
|
record_address_regs (XEXP (SET_SRC (set), 0),
|
|
|
|
|
BASE_REG_CLASS, loop_cost * 2);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Improve handling of two-address insns such as
|
|
|
|
|
(set X (ashift CONST Y)) where CONST must be made to
|
|
|
|
|
match X. Change it into two insns: (set X CONST)
|
|
|
|
|
(set X (ashift X Y)). If we left this for reloading, it
|
|
|
|
|
would probably get three insns because X and Y might go
|
|
|
|
|
in the same place. This prevents X and Y from receiving
|
|
|
|
|
the same hard reg.
|
|
|
|
|
|
|
|
|
|
We can only do this if the modes of operands 0 and 1
|
|
|
|
|
(which might not be the same) are tieable and we only need
|
|
|
|
|
do this during our first pass. */
|
|
|
|
|
|
|
|
|
|
if (pass == 0 && optimize
|
|
|
|
|
&& noperands >= 3
|
|
|
|
|
&& insn_operand_constraint[insn_code_number][1][0] == '0'
|
|
|
|
|
&& insn_operand_constraint[insn_code_number][1][1] == 0
|
|
|
|
|
&& CONSTANT_P (recog_operand[1])
|
|
|
|
|
&& ! rtx_equal_p (recog_operand[0], recog_operand[1])
|
|
|
|
|
&& ! rtx_equal_p (recog_operand[0], recog_operand[2])
|
|
|
|
|
&& GET_CODE (recog_operand[0]) == REG
|
|
|
|
|
&& MODES_TIEABLE_P (GET_MODE (recog_operand[0]),
|
|
|
|
|
insn_operand_mode[insn_code_number][1]))
|
|
|
|
|
{
|
|
|
|
|
rtx previnsn = prev_real_insn (insn);
|
|
|
|
|
rtx dest
|
|
|
|
|
= gen_lowpart (insn_operand_mode[insn_code_number][1],
|
|
|
|
|
recog_operand[0]);
|
|
|
|
|
rtx newinsn
|
|
|
|
|
= emit_insn_before (gen_move_insn (dest,
|
|
|
|
|
recog_operand[1]),
|
|
|
|
|
insn);
|
|
|
|
|
|
|
|
|
|
/* If this insn was the start of a basic block,
|
1992-06-30 02:40:57 +02:00
|
|
|
|
include the new insn in that block.
|
|
|
|
|
We need not check for code_label here;
|
|
|
|
|
while a basic block can start with a code_label,
|
|
|
|
|
INSN could not be at the beginning of that block. */
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (previnsn == 0 || GET_CODE (previnsn) == JUMP_INSN)
|
|
|
|
|
{
|
|
|
|
|
int b;
|
|
|
|
|
for (b = 0; b < n_basic_blocks; b++)
|
|
|
|
|
if (insn == basic_block_head[b])
|
|
|
|
|
basic_block_head[b] = newinsn;
|
|
|
|
|
}
|
|
|
|
|
|
1996-07-04 00:07:53 +02:00
|
|
|
|
/* This makes one more setting of new insns's dest. */
|
1997-05-30 20:19:19 +02:00
|
|
|
|
REG_N_SETS (REGNO (recog_operand[0]))++;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
1992-06-30 04:19:44 +02:00
|
|
|
|
*recog_operand_loc[1] = recog_operand[0];
|
|
|
|
|
for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
|
|
|
|
|
if (recog_dup_num[i] == 1)
|
|
|
|
|
*recog_dup_loc[i] = recog_operand[0];
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
insn = PREV_INSN (newinsn);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (i = 0; i < noperands; i++)
|
|
|
|
|
{
|
|
|
|
|
constraints[i]
|
|
|
|
|
= insn_operand_constraint[insn_code_number][i];
|
|
|
|
|
modes[i] = insn_operand_mode[insn_code_number][i];
|
|
|
|
|
}
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* If we get here, we are set up to record the costs of all the
|
|
|
|
|
operands for this insn. Start by initializing the costs.
|
|
|
|
|
Then handle any address registers. Finally record the desired
|
|
|
|
|
classes for any pseudos, doing it twice if some pair of
|
|
|
|
|
operands are commutative. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < noperands; i++)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
op_costs[i] = init_cost;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (recog_operand[i]) == SUBREG)
|
|
|
|
|
recog_operand[i] = SUBREG_REG (recog_operand[i]);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (recog_operand[i]) == MEM)
|
|
|
|
|
record_address_regs (XEXP (recog_operand[i], 0),
|
|
|
|
|
BASE_REG_CLASS, loop_cost * 2);
|
|
|
|
|
else if (constraints[i][0] == 'p')
|
|
|
|
|
record_address_regs (recog_operand[i],
|
|
|
|
|
BASE_REG_CLASS, loop_cost * 2);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* Check for commutative in a separate loop so everything will
|
1993-11-03 21:36:59 +01:00
|
|
|
|
have been initialized. We must do this even if one operand
|
|
|
|
|
is a constant--see addsi3 in m68k.md. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-08-13 22:48:40 +02:00
|
|
|
|
for (i = 0; i < noperands - 1; i++)
|
1993-11-03 21:36:59 +01:00
|
|
|
|
if (constraints[i][0] == '%')
|
1992-06-27 19:49:28 +02:00
|
|
|
|
{
|
|
|
|
|
char *xconstraints[MAX_RECOG_OPERANDS];
|
|
|
|
|
int j;
|
|
|
|
|
|
|
|
|
|
/* Handle commutative operands by swapping the constraints.
|
|
|
|
|
We assume the modes are the same. */
|
|
|
|
|
|
|
|
|
|
for (j = 0; j < noperands; j++)
|
|
|
|
|
xconstraints[j] = constraints[j];
|
|
|
|
|
|
|
|
|
|
xconstraints[i] = constraints[i+1];
|
|
|
|
|
xconstraints[i+1] = constraints[i];
|
|
|
|
|
record_reg_classes (nalternatives, noperands,
|
|
|
|
|
recog_operand, modes, xconstraints,
|
1991-11-06 00:39:50 +01:00
|
|
|
|
insn);
|
1992-06-27 19:49:28 +02:00
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
record_reg_classes (nalternatives, noperands, recog_operand,
|
|
|
|
|
modes, constraints, insn);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Now add the cost for each operand to the total costs for
|
|
|
|
|
its register. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (i = 0; i < noperands; i++)
|
|
|
|
|
if (GET_CODE (recog_operand[i]) == REG
|
|
|
|
|
&& REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
|
|
|
|
|
{
|
|
|
|
|
int regno = REGNO (recog_operand[i]);
|
|
|
|
|
struct costs *p = &costs[regno], *q = &op_costs[i];
|
|
|
|
|
|
|
|
|
|
p->mem_cost += q->mem_cost * loop_cost;
|
|
|
|
|
for (j = 0; j < N_REG_CLASSES; j++)
|
|
|
|
|
p->cost[j] += q->cost[j] * loop_cost;
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Now for each register look at how desirable each class is
|
|
|
|
|
and find which class is preferred. Store that in
|
|
|
|
|
`prefclass[REGNO]'. Record in `altclass[REGNO]' the largest register
|
|
|
|
|
class any of whose registers is better than memory. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (pass == 0)
|
|
|
|
|
{
|
|
|
|
|
prefclass = (char *) oballoc (nregs);
|
|
|
|
|
altclass = (char *) oballoc (nregs);
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-28 00:25:43 +02:00
|
|
|
|
register int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
enum reg_class best = ALL_REGS, alt = NO_REGS;
|
|
|
|
|
/* This is an enum reg_class, but we call it an int
|
|
|
|
|
to save lots of casts. */
|
|
|
|
|
register int class;
|
|
|
|
|
register struct costs *p = &costs[i];
|
|
|
|
|
|
|
|
|
|
for (class = (int) ALL_REGS - 1; class > 0; class--)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-09-24 12:30:43 +02:00
|
|
|
|
/* Ignore classes that are too small for this operand or
|
|
|
|
|
invalid for a operand that was auto-incremented. */
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (CLASS_MAX_NREGS (class, PSEUDO_REGNO_MODE (i))
|
1992-09-24 12:30:43 +02:00
|
|
|
|
> reg_class_size[class]
|
|
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
|
|
|| (in_inc_dec[i] && forbidden_inc_dec_class[class])
|
|
|
|
|
#endif
|
|
|
|
|
)
|
1992-06-27 19:49:28 +02:00
|
|
|
|
;
|
|
|
|
|
else if (p->cost[class] < best_cost)
|
|
|
|
|
{
|
|
|
|
|
best_cost = p->cost[class];
|
|
|
|
|
best = (enum reg_class) class;
|
|
|
|
|
}
|
|
|
|
|
else if (p->cost[class] == best_cost)
|
|
|
|
|
best = reg_class_subunion[(int)best][class];
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Record the alternate register class; i.e., a class for which
|
|
|
|
|
every register in it is better than using memory. If adding a
|
|
|
|
|
class would make a smaller class (i.e., no union of just those
|
|
|
|
|
classes exists), skip that class. The major unions of classes
|
|
|
|
|
should be provided as a register class. Don't do this if we
|
|
|
|
|
will be doing it again later. */
|
|
|
|
|
|
|
|
|
|
if (pass == 1 || ! flag_expensive_optimizations)
|
|
|
|
|
for (class = 0; class < N_REG_CLASSES; class++)
|
|
|
|
|
if (p->cost[class] < p->mem_cost
|
1992-11-18 15:58:42 +01:00
|
|
|
|
&& (reg_class_size[(int) reg_class_subunion[(int) alt][class]]
|
1992-09-24 12:30:43 +02:00
|
|
|
|
> reg_class_size[(int) alt])
|
|
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
|
|
&& ! (in_inc_dec[i] && forbidden_inc_dec_class[class])
|
|
|
|
|
#endif
|
|
|
|
|
)
|
1992-06-27 19:49:28 +02:00
|
|
|
|
alt = reg_class_subunion[(int) alt][class];
|
|
|
|
|
|
|
|
|
|
/* If we don't add any classes, nothing to try. */
|
|
|
|
|
if (alt == best)
|
1996-01-16 14:08:21 +01:00
|
|
|
|
alt = NO_REGS;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* We cast to (int) because (char) hits bugs in some compilers. */
|
|
|
|
|
prefclass[i] = (int) best;
|
|
|
|
|
altclass[i] = (int) alt;
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
#endif /* REGISTER_CONSTRAINTS */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef REGISTER_CONSTRAINTS
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Record the cost of using memory or registers of various classes for
|
|
|
|
|
the operands in INSN.
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
N_ALTS is the number of alternatives.
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
N_OPS is the number of operands.
|
|
|
|
|
|
|
|
|
|
OPS is an array of the operands.
|
|
|
|
|
|
|
|
|
|
MODES are the modes of the operands, in case any are VOIDmode.
|
|
|
|
|
|
|
|
|
|
CONSTRAINTS are the constraints to use for the operands. This array
|
|
|
|
|
is modified by this procedure.
|
|
|
|
|
|
|
|
|
|
This procedure works alternative by alternative. For each alternative
|
|
|
|
|
we assume that we will be able to allocate all pseudos to their ideal
|
|
|
|
|
register class and calculate the cost of using that alternative. Then
|
|
|
|
|
we compute for each operand that is a pseudo-register, the cost of
|
|
|
|
|
having the pseudo allocated to each register class and using it in that
|
|
|
|
|
alternative. To this cost is added the cost of the alternative.
|
|
|
|
|
|
|
|
|
|
The cost of each class for this insn is its lowest cost among all the
|
|
|
|
|
alternatives. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn)
|
|
|
|
|
int n_alts;
|
|
|
|
|
int n_ops;
|
|
|
|
|
rtx *ops;
|
|
|
|
|
enum machine_mode *modes;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
char **constraints;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
rtx insn;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
int alt;
|
|
|
|
|
enum op_type {OP_READ, OP_WRITE, OP_READ_WRITE} op_types[MAX_RECOG_OPERANDS];
|
|
|
|
|
int i, j;
|
1994-11-17 01:11:55 +01:00
|
|
|
|
rtx set;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* By default, each operand is an input operand. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < n_ops; i++)
|
|
|
|
|
op_types[i] = OP_READ;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Process each alternative, each time minimizing an operand's cost with
|
|
|
|
|
the cost for each operand in that alternative. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (alt = 0; alt < n_alts; alt++)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
struct costs this_op_costs[MAX_RECOG_OPERANDS];
|
|
|
|
|
int alt_fail = 0;
|
|
|
|
|
int alt_cost = 0;
|
|
|
|
|
enum reg_class classes[MAX_RECOG_OPERANDS];
|
|
|
|
|
int class;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (i = 0; i < n_ops; i++)
|
|
|
|
|
{
|
|
|
|
|
char *p = constraints[i];
|
|
|
|
|
rtx op = ops[i];
|
|
|
|
|
enum machine_mode mode = modes[i];
|
|
|
|
|
int allows_mem = 0;
|
|
|
|
|
int win = 0;
|
|
|
|
|
char c;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* If this operand has no constraints at all, we can conclude
|
|
|
|
|
nothing about it since anything is valid. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (*p == 0)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)
|
|
|
|
|
bzero ((char *) &this_op_costs[i], sizeof this_op_costs[i]);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
continue;
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-09-15 06:47:08 +02:00
|
|
|
|
if (*p == '%')
|
|
|
|
|
p++;
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* If this alternative is only relevant when this operand
|
|
|
|
|
matches a previous operand, we do different things depending
|
|
|
|
|
on whether this operand is a pseudo-reg or not. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (p[0] >= '0' && p[0] <= '0' + i && (p[1] == ',' || p[1] == 0))
|
|
|
|
|
{
|
|
|
|
|
j = p[0] - '0';
|
|
|
|
|
classes[i] = classes[j];
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (op) != REG || REGNO (op) < FIRST_PSEUDO_REGISTER)
|
|
|
|
|
{
|
|
|
|
|
/* If this matches the other operand, we have no added
|
1994-02-11 23:30:20 +01:00
|
|
|
|
cost and we win. */
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (rtx_equal_p (ops[j], op))
|
1994-02-11 23:30:20 +01:00
|
|
|
|
win = 1;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
1993-03-24 02:18:04 +01:00
|
|
|
|
/* If we can put the other operand into a register, add to
|
|
|
|
|
the cost of this alternative the cost to copy this
|
|
|
|
|
operand to the register used for the other operand. */
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
1994-02-11 23:30:20 +01:00
|
|
|
|
else if (classes[j] != NO_REGS)
|
1993-03-24 02:18:04 +01:00
|
|
|
|
alt_cost += copy_cost (op, mode, classes[j], 1), win = 1;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
}
|
1992-09-07 07:56:52 +02:00
|
|
|
|
else if (GET_CODE (ops[j]) != REG
|
|
|
|
|
|| REGNO (ops[j]) < FIRST_PSEUDO_REGISTER)
|
|
|
|
|
{
|
|
|
|
|
/* This op is a pseudo but the one it matches is not. */
|
|
|
|
|
|
|
|
|
|
/* If we can't put the other operand into a register, this
|
|
|
|
|
alternative can't be used. */
|
|
|
|
|
|
|
|
|
|
if (classes[j] == NO_REGS)
|
|
|
|
|
alt_fail = 1;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
1992-09-07 07:56:52 +02:00
|
|
|
|
/* Otherwise, add to the cost of this alternative the cost
|
|
|
|
|
to copy the other operand to the register used for this
|
|
|
|
|
operand. */
|
|
|
|
|
|
|
|
|
|
else
|
|
|
|
|
alt_cost += copy_cost (ops[j], mode, classes[j], 1);
|
|
|
|
|
}
|
1992-06-27 19:49:28 +02:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* The costs of this operand are the same as that of the
|
|
|
|
|
other operand. However, if we cannot tie them, this
|
|
|
|
|
alternative needs to do a copy, which is one
|
|
|
|
|
instruction. */
|
|
|
|
|
|
|
|
|
|
this_op_costs[i] = this_op_costs[j];
|
1993-10-06 11:58:50 +01:00
|
|
|
|
if (REGNO (ops[i]) != REGNO (ops[j])
|
|
|
|
|
&& ! find_reg_note (insn, REG_DEAD, op))
|
|
|
|
|
alt_cost += 2;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
1992-09-15 06:47:08 +02:00
|
|
|
|
/* This is in place of ordinary cost computation
|
1993-10-02 19:09:01 +01:00
|
|
|
|
for this operand, so skip to the end of the
|
|
|
|
|
alternative (should be just one character). */
|
|
|
|
|
while (*p && *p++ != ',')
|
|
|
|
|
;
|
|
|
|
|
|
|
|
|
|
constraints[i] = p;
|
1992-09-15 06:47:08 +02:00
|
|
|
|
continue;
|
|
|
|
|
}
|
1992-06-27 19:49:28 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Scan all the constraint letters. See if the operand matches
|
|
|
|
|
any of the constraints. Collect the valid register classes
|
|
|
|
|
and see if this operand accepts memory. */
|
|
|
|
|
|
|
|
|
|
classes[i] = NO_REGS;
|
|
|
|
|
while (*p && (c = *p++) != ',')
|
|
|
|
|
switch (c)
|
|
|
|
|
{
|
|
|
|
|
case '=':
|
|
|
|
|
op_types[i] = OP_WRITE;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case '+':
|
|
|
|
|
op_types[i] = OP_READ_WRITE;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case '*':
|
|
|
|
|
/* Ignore the next letter for this pass. */
|
|
|
|
|
p++;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case '%':
|
|
|
|
|
case '?': case '!': case '#':
|
|
|
|
|
case '&':
|
|
|
|
|
case '0': case '1': case '2': case '3': case '4':
|
|
|
|
|
case 'p':
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'm': case 'o': case 'V':
|
1993-01-10 23:49:32 +01:00
|
|
|
|
/* It doesn't seem worth distinguishing between offsettable
|
1992-06-27 19:49:28 +02:00
|
|
|
|
and non-offsettable addresses here. */
|
|
|
|
|
allows_mem = 1;
|
|
|
|
|
if (GET_CODE (op) == MEM)
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case '<':
|
|
|
|
|
if (GET_CODE (op) == MEM
|
|
|
|
|
&& (GET_CODE (XEXP (op, 0)) == PRE_DEC
|
|
|
|
|
|| GET_CODE (XEXP (op, 0)) == POST_DEC))
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case '>':
|
|
|
|
|
if (GET_CODE (op) == MEM
|
|
|
|
|
&& (GET_CODE (XEXP (op, 0)) == PRE_INC
|
|
|
|
|
|| GET_CODE (XEXP (op, 0)) == POST_INC))
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'E':
|
1995-04-10 23:39:56 +02:00
|
|
|
|
#ifndef REAL_ARITHMETIC
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Match any floating double constant, but only if
|
|
|
|
|
we can examine the bits of it reliably. */
|
|
|
|
|
if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
|
1992-07-06 22:14:57 +02:00
|
|
|
|
|| HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
|
1992-06-27 19:49:28 +02:00
|
|
|
|
&& GET_MODE (op) != VOIDmode && ! flag_pretend_float)
|
|
|
|
|
break;
|
1995-04-10 23:39:56 +02:00
|
|
|
|
#endif
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (GET_CODE (op) == CONST_DOUBLE)
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'F':
|
|
|
|
|
if (GET_CODE (op) == CONST_DOUBLE)
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'G':
|
|
|
|
|
case 'H':
|
|
|
|
|
if (GET_CODE (op) == CONST_DOUBLE
|
|
|
|
|
&& CONST_DOUBLE_OK_FOR_LETTER_P (op, c))
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 's':
|
|
|
|
|
if (GET_CODE (op) == CONST_INT
|
|
|
|
|
|| (GET_CODE (op) == CONST_DOUBLE
|
|
|
|
|
&& GET_MODE (op) == VOIDmode))
|
|
|
|
|
break;
|
|
|
|
|
case 'i':
|
|
|
|
|
if (CONSTANT_P (op)
|
|
|
|
|
#ifdef LEGITIMATE_PIC_OPERAND_P
|
|
|
|
|
&& (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
|
|
|
|
|
#endif
|
|
|
|
|
)
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'n':
|
|
|
|
|
if (GET_CODE (op) == CONST_INT
|
|
|
|
|
|| (GET_CODE (op) == CONST_DOUBLE
|
|
|
|
|
&& GET_MODE (op) == VOIDmode))
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'I':
|
|
|
|
|
case 'J':
|
|
|
|
|
case 'K':
|
|
|
|
|
case 'L':
|
|
|
|
|
case 'M':
|
|
|
|
|
case 'N':
|
|
|
|
|
case 'O':
|
|
|
|
|
case 'P':
|
|
|
|
|
if (GET_CODE (op) == CONST_INT
|
|
|
|
|
&& CONST_OK_FOR_LETTER_P (INTVAL (op), c))
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'X':
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
#ifdef EXTRA_CONSTRAINT
|
1992-06-27 19:49:28 +02:00
|
|
|
|
case 'Q':
|
|
|
|
|
case 'R':
|
|
|
|
|
case 'S':
|
|
|
|
|
case 'T':
|
|
|
|
|
case 'U':
|
|
|
|
|
if (EXTRA_CONSTRAINT (op, c))
|
|
|
|
|
win = 1;
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
case 'g':
|
|
|
|
|
if (GET_CODE (op) == MEM
|
|
|
|
|
|| (CONSTANT_P (op)
|
|
|
|
|
#ifdef LEGITIMATE_PIC_OPERAND_P
|
|
|
|
|
&& (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))
|
1991-11-06 00:39:50 +01:00
|
|
|
|
#endif
|
1992-06-27 19:49:28 +02:00
|
|
|
|
))
|
|
|
|
|
win = 1;
|
|
|
|
|
allows_mem = 1;
|
|
|
|
|
case 'r':
|
|
|
|
|
classes[i]
|
|
|
|
|
= reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS];
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
classes[i]
|
|
|
|
|
= reg_class_subunion[(int) classes[i]]
|
|
|
|
|
[(int) REG_CLASS_FROM_LETTER (c)];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
constraints[i] = p;
|
|
|
|
|
|
|
|
|
|
/* How we account for this operand now depends on whether it is a
|
|
|
|
|
pseudo register or not. If it is, we first check if any
|
|
|
|
|
register classes are valid. If not, we ignore this alternative,
|
|
|
|
|
since we want to assume that all pseudos get allocated for
|
|
|
|
|
register preferencing. If some register class is valid, compute
|
|
|
|
|
the costs of moving the pseudo into that class. */
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)
|
1992-01-31 06:14:10 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (classes[i] == NO_REGS)
|
|
|
|
|
alt_fail = 1;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
struct costs *pp = &this_op_costs[i];
|
|
|
|
|
|
|
|
|
|
for (class = 0; class < N_REG_CLASSES; class++)
|
|
|
|
|
pp->cost[class] = may_move_cost[class][(int) classes[i]];
|
|
|
|
|
|
|
|
|
|
/* If the alternative actually allows memory, make things
|
|
|
|
|
a bit cheaper since we won't need an extra insn to
|
|
|
|
|
load it. */
|
|
|
|
|
|
1998-03-16 12:56:25 +01:00
|
|
|
|
pp->mem_cost = (MEMORY_MOVE_COST (mode, classes[i], 1)
|
|
|
|
|
- allows_mem);
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* If we have assigned a class to this register in our
|
|
|
|
|
first pass, add a cost to this alternative corresponding
|
|
|
|
|
to what we would add if this register were not in the
|
|
|
|
|
appropriate class. */
|
|
|
|
|
|
|
|
|
|
if (prefclass)
|
|
|
|
|
alt_cost
|
|
|
|
|
+= may_move_cost[prefclass[REGNO (op)]][(int) classes[i]];
|
|
|
|
|
}
|
1992-01-31 06:14:10 +01:00
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* Otherwise, if this alternative wins, either because we
|
|
|
|
|
have already determined that or if we have a hard register of
|
|
|
|
|
the proper class, there is no cost for this alternative. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
else if (win
|
|
|
|
|
|| (GET_CODE (op) == REG
|
1992-07-12 23:42:39 +02:00
|
|
|
|
&& reg_fits_class_p (op, classes[i], 0, GET_MODE (op))))
|
1992-06-27 19:49:28 +02:00
|
|
|
|
;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* If registers are valid, the cost of this alternative includes
|
|
|
|
|
copying the object to and/or from a register. */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
else if (classes[i] != NO_REGS)
|
|
|
|
|
{
|
|
|
|
|
if (op_types[i] != OP_WRITE)
|
|
|
|
|
alt_cost += copy_cost (op, mode, classes[i], 1);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (op_types[i] != OP_READ)
|
|
|
|
|
alt_cost += copy_cost (op, mode, classes[i], 0);
|
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* The only other way this alternative can be used is if this is a
|
|
|
|
|
constant that could be placed into memory. */
|
|
|
|
|
|
|
|
|
|
else if (CONSTANT_P (op) && allows_mem)
|
1998-03-16 12:56:25 +01:00
|
|
|
|
alt_cost += MEMORY_MOVE_COST (mode, classes[i], 1);
|
1992-06-27 19:49:28 +02:00
|
|
|
|
else
|
|
|
|
|
alt_fail = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (alt_fail)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* Finally, update the costs with the information we've calculated
|
|
|
|
|
about this alternative. */
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < n_ops; i++)
|
|
|
|
|
if (GET_CODE (ops[i]) == REG
|
|
|
|
|
&& REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
struct costs *pp = &op_costs[i], *qq = &this_op_costs[i];
|
|
|
|
|
int scale = 1 + (op_types[i] == OP_READ_WRITE);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
pp->mem_cost = MIN (pp->mem_cost,
|
|
|
|
|
(qq->mem_cost + alt_cost) * scale);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (class = 0; class < N_REG_CLASSES; class++)
|
|
|
|
|
pp->cost[class] = MIN (pp->cost[class],
|
|
|
|
|
(qq->cost[class] + alt_cost) * scale);
|
|
|
|
|
}
|
|
|
|
|
}
|
1994-11-17 01:11:55 +01:00
|
|
|
|
|
|
|
|
|
/* If this insn is a single set copying operand 1 to operand 0
|
|
|
|
|
and one is a pseudo with the other a hard reg that is in its
|
|
|
|
|
own register class, set the cost of that register class to -1. */
|
|
|
|
|
|
|
|
|
|
if ((set = single_set (insn)) != 0
|
|
|
|
|
&& ops[0] == SET_DEST (set) && ops[1] == SET_SRC (set)
|
|
|
|
|
&& GET_CODE (ops[0]) == REG && GET_CODE (ops[1]) == REG)
|
|
|
|
|
for (i = 0; i <= 1; i++)
|
|
|
|
|
if (REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
|
|
|
|
|
{
|
|
|
|
|
int regno = REGNO (ops[!i]);
|
|
|
|
|
enum machine_mode mode = GET_MODE (ops[!i]);
|
|
|
|
|
int class;
|
1994-11-19 00:23:49 +01:00
|
|
|
|
int nr;
|
1994-11-17 01:11:55 +01:00
|
|
|
|
|
|
|
|
|
if (regno >= FIRST_PSEUDO_REGISTER && prefclass != 0
|
|
|
|
|
&& (reg_class_size[prefclass[regno]]
|
|
|
|
|
== CLASS_MAX_NREGS (prefclass[regno], mode)))
|
|
|
|
|
op_costs[i].cost[prefclass[regno]] = -1;
|
|
|
|
|
else if (regno < FIRST_PSEUDO_REGISTER)
|
|
|
|
|
for (class = 0; class < N_REG_CLASSES; class++)
|
|
|
|
|
if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
|
|
|
|
|
&& reg_class_size[class] == CLASS_MAX_NREGS (class, mode))
|
1994-11-19 00:23:49 +01:00
|
|
|
|
{
|
|
|
|
|
if (reg_class_size[class] == 1)
|
|
|
|
|
op_costs[i].cost[class] = -1;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
for (nr = 0; nr < HARD_REGNO_NREGS(regno, mode); nr++)
|
|
|
|
|
{
|
|
|
|
|
if (!TEST_HARD_REG_BIT (reg_class_contents[class], regno + nr))
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (nr == HARD_REGNO_NREGS(regno,mode))
|
|
|
|
|
op_costs[i].cost[class] = -1;
|
|
|
|
|
}
|
|
|
|
|
}
|
1994-11-17 01:11:55 +01:00
|
|
|
|
}
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* Compute the cost of loading X into (if TO_P is non-zero) or from (if
|
|
|
|
|
TO_P is zero) a register of class CLASS in mode MODE.
|
|
|
|
|
|
|
|
|
|
X must not be a pseudo. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
copy_cost (x, mode, class, to_p)
|
|
|
|
|
rtx x;
|
|
|
|
|
enum machine_mode mode;
|
|
|
|
|
enum reg_class class;
|
|
|
|
|
int to_p;
|
|
|
|
|
{
|
1998-02-14 02:13:58 +01:00
|
|
|
|
#ifdef HAVE_SECONDARY_RELOADS
|
1992-06-27 19:49:28 +02:00
|
|
|
|
enum reg_class secondary_class = NO_REGS;
|
1998-02-14 02:13:58 +01:00
|
|
|
|
#endif
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* If X is a SCRATCH, there is actually nothing to move since we are
|
|
|
|
|
assuming optimal allocation. */
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == SCRATCH)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* Get the class we will actually use for a reload. */
|
|
|
|
|
class = PREFERRED_RELOAD_CLASS (x, class);
|
|
|
|
|
|
|
|
|
|
#ifdef HAVE_SECONDARY_RELOADS
|
|
|
|
|
/* If we need a secondary reload (we assume here that we are using
|
|
|
|
|
the secondary reload as an intermediate, not a scratch register), the
|
|
|
|
|
cost is that to load the input into the intermediate register, then
|
|
|
|
|
to copy them. We use a special value of TO_P to avoid recursion. */
|
|
|
|
|
|
|
|
|
|
#ifdef SECONDARY_INPUT_RELOAD_CLASS
|
|
|
|
|
if (to_p == 1)
|
|
|
|
|
secondary_class = SECONDARY_INPUT_RELOAD_CLASS (class, mode, x);
|
|
|
|
|
#endif
|
|
|
|
|
|
1992-11-25 06:48:35 +01:00
|
|
|
|
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (! to_p)
|
|
|
|
|
secondary_class = SECONDARY_OUTPUT_RELOAD_CLASS (class, mode, x);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
if (secondary_class != NO_REGS)
|
|
|
|
|
return (move_cost[(int) secondary_class][(int) class]
|
|
|
|
|
+ copy_cost (x, mode, secondary_class, 2));
|
1992-11-25 06:48:35 +01:00
|
|
|
|
#endif /* HAVE_SECONDARY_RELOADS */
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* For memory, use the memory move cost, for (hard) registers, use the
|
|
|
|
|
cost to move between the register classes, and use 2 for everything
|
|
|
|
|
else (constants). */
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == MEM || class == NO_REGS)
|
1998-03-16 12:56:25 +01:00
|
|
|
|
return MEMORY_MOVE_COST (mode, class, to_p);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
else if (GET_CODE (x) == REG)
|
|
|
|
|
return move_cost[(int) REGNO_REG_CLASS (REGNO (x))][(int) class];
|
|
|
|
|
|
|
|
|
|
else
|
|
|
|
|
/* If this is a constant, we may eventually want to call rtx_cost here. */
|
|
|
|
|
return 2;
|
|
|
|
|
}
|
|
|
|
|
|
1991-11-06 00:39:50 +01:00
|
|
|
|
/* Record the pseudo registers we must reload into hard registers
|
|
|
|
|
in a subexpression of a memory address, X.
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
CLASS is the class that the register needs to be in and is either
|
|
|
|
|
BASE_REG_CLASS or INDEX_REG_CLASS.
|
|
|
|
|
|
|
|
|
|
SCALE is twice the amount to multiply the cost by (it is twice so we
|
|
|
|
|
can represent half-cost adjustments). */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-28 14:53:30 +02:00
|
|
|
|
static void
|
1992-06-27 19:49:28 +02:00
|
|
|
|
record_address_regs (x, class, scale)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
rtx x;
|
1992-06-27 19:49:28 +02:00
|
|
|
|
enum reg_class class;
|
|
|
|
|
int scale;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
|
|
|
|
register enum rtx_code code = GET_CODE (x);
|
|
|
|
|
|
|
|
|
|
switch (code)
|
|
|
|
|
{
|
|
|
|
|
case CONST_INT:
|
|
|
|
|
case CONST:
|
|
|
|
|
case CC0:
|
|
|
|
|
case PC:
|
|
|
|
|
case SYMBOL_REF:
|
|
|
|
|
case LABEL_REF:
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case PLUS:
|
|
|
|
|
/* When we have an address that is a sum,
|
|
|
|
|
we must determine whether registers are "base" or "index" regs.
|
|
|
|
|
If there is a sum of two registers, we must choose one to be
|
|
|
|
|
the "base". Luckily, we can use the REGNO_POINTER_FLAG
|
1992-06-27 19:49:28 +02:00
|
|
|
|
to make a good choice most of the time. We only need to do this
|
|
|
|
|
on machines that can have two registers in an address and where
|
|
|
|
|
the base and index register classes are different.
|
|
|
|
|
|
|
|
|
|
??? This code used to set REGNO_POINTER_FLAG in some cases, but
|
|
|
|
|
that seems bogus since it should only be set when we are sure
|
|
|
|
|
the register is being used as a pointer. */
|
|
|
|
|
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
|
|
|
|
rtx arg0 = XEXP (x, 0);
|
|
|
|
|
rtx arg1 = XEXP (x, 1);
|
|
|
|
|
register enum rtx_code code0 = GET_CODE (arg0);
|
|
|
|
|
register enum rtx_code code1 = GET_CODE (arg1);
|
|
|
|
|
|
|
|
|
|
/* Look inside subregs. */
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (code0 == SUBREG)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
arg0 = SUBREG_REG (arg0), code0 = GET_CODE (arg0);
|
1992-06-27 19:49:28 +02:00
|
|
|
|
if (code1 == SUBREG)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
arg1 = SUBREG_REG (arg1), code1 = GET_CODE (arg1);
|
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
/* If this machine only allows one register per address, it must
|
|
|
|
|
be in the first operand. */
|
|
|
|
|
|
|
|
|
|
if (MAX_REGS_PER_ADDRESS == 1)
|
|
|
|
|
record_address_regs (arg0, class, scale);
|
|
|
|
|
|
|
|
|
|
/* If index and base registers are the same on this machine, just
|
|
|
|
|
record registers in any non-constant operands. We assume here,
|
|
|
|
|
as well as in the tests below, that all addresses are in
|
|
|
|
|
canonical form. */
|
|
|
|
|
|
|
|
|
|
else if (INDEX_REG_CLASS == BASE_REG_CLASS)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
record_address_regs (arg0, class, scale);
|
|
|
|
|
if (! CONSTANT_P (arg1))
|
|
|
|
|
record_address_regs (arg1, class, scale);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
/* If the second operand is a constant integer, it doesn't change
|
|
|
|
|
what class the first operand must be. */
|
|
|
|
|
|
|
|
|
|
else if (code1 == CONST_INT || code1 == CONST_DOUBLE)
|
|
|
|
|
record_address_regs (arg0, class, scale);
|
|
|
|
|
|
|
|
|
|
/* If the second operand is a symbolic constant, the first operand
|
|
|
|
|
must be an index register. */
|
|
|
|
|
|
|
|
|
|
else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF)
|
|
|
|
|
record_address_regs (arg0, INDEX_REG_CLASS, scale);
|
|
|
|
|
|
1997-12-07 01:31:01 +01:00
|
|
|
|
/* If both operands are registers but one is already a hard register
|
|
|
|
|
of index or base class, give the other the class that the hard
|
|
|
|
|
register is not. */
|
|
|
|
|
|
1998-01-10 20:30:33 +01:00
|
|
|
|
#ifdef REG_OK_FOR_BASE_P
|
1997-12-07 01:31:01 +01:00
|
|
|
|
else if (code0 == REG && code1 == REG
|
|
|
|
|
&& REGNO (arg0) < FIRST_PSEUDO_REGISTER
|
|
|
|
|
&& (REG_OK_FOR_BASE_P (arg0) || REG_OK_FOR_INDEX_P (arg0)))
|
|
|
|
|
record_address_regs (arg1,
|
|
|
|
|
REG_OK_FOR_BASE_P (arg0)
|
|
|
|
|
? INDEX_REG_CLASS : BASE_REG_CLASS,
|
|
|
|
|
scale);
|
|
|
|
|
else if (code0 == REG && code1 == REG
|
|
|
|
|
&& REGNO (arg1) < FIRST_PSEUDO_REGISTER
|
|
|
|
|
&& (REG_OK_FOR_BASE_P (arg1) || REG_OK_FOR_INDEX_P (arg1)))
|
|
|
|
|
record_address_regs (arg0,
|
|
|
|
|
REG_OK_FOR_BASE_P (arg1)
|
|
|
|
|
? INDEX_REG_CLASS : BASE_REG_CLASS,
|
|
|
|
|
scale);
|
1998-01-10 20:30:33 +01:00
|
|
|
|
#endif
|
1997-12-07 01:31:01 +01:00
|
|
|
|
|
1997-11-02 22:19:36 +01:00
|
|
|
|
/* If one operand is known to be a pointer, it must be the base
|
|
|
|
|
with the other operand the index. Likewise if the other operand
|
|
|
|
|
is a MULT. */
|
1997-10-17 17:46:57 +02:00
|
|
|
|
|
1997-11-02 22:19:36 +01:00
|
|
|
|
else if ((code0 == REG && REGNO_POINTER_FLAG (REGNO (arg0)))
|
|
|
|
|
|| code1 == MULT)
|
1997-10-17 17:46:57 +02:00
|
|
|
|
{
|
|
|
|
|
record_address_regs (arg0, BASE_REG_CLASS, scale);
|
|
|
|
|
record_address_regs (arg1, INDEX_REG_CLASS, scale);
|
|
|
|
|
}
|
1997-11-02 22:19:36 +01:00
|
|
|
|
else if ((code1 == REG && REGNO_POINTER_FLAG (REGNO (arg1)))
|
|
|
|
|
|| code0 == MULT)
|
1997-10-17 17:46:57 +02:00
|
|
|
|
{
|
|
|
|
|
record_address_regs (arg0, INDEX_REG_CLASS, scale);
|
|
|
|
|
record_address_regs (arg1, BASE_REG_CLASS, scale);
|
|
|
|
|
}
|
|
|
|
|
|
1997-11-02 22:19:36 +01:00
|
|
|
|
/* Otherwise, count equal chances that each might be a base
|
1992-06-27 19:49:28 +02:00
|
|
|
|
or index register. This case should be rare. */
|
|
|
|
|
|
1997-11-02 22:19:36 +01:00
|
|
|
|
else
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
record_address_regs (arg0, BASE_REG_CLASS, scale / 2);
|
|
|
|
|
record_address_regs (arg0, INDEX_REG_CLASS, scale / 2);
|
|
|
|
|
record_address_regs (arg1, BASE_REG_CLASS, scale / 2);
|
|
|
|
|
record_address_regs (arg1, INDEX_REG_CLASS, scale / 2);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case POST_INC:
|
|
|
|
|
case PRE_INC:
|
|
|
|
|
case POST_DEC:
|
|
|
|
|
case PRE_DEC:
|
|
|
|
|
/* Double the importance of a pseudo register that is incremented
|
|
|
|
|
or decremented, since it would take two extra insns
|
1992-09-24 12:30:43 +02:00
|
|
|
|
if it ends up in the wrong place. If the operand is a pseudo,
|
|
|
|
|
show it is being used in an INC_DEC context. */
|
|
|
|
|
|
|
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
|
|
if (GET_CODE (XEXP (x, 0)) == REG
|
|
|
|
|
&& REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
|
|
|
|
|
in_inc_dec[REGNO (XEXP (x, 0))] = 1;
|
|
|
|
|
#endif
|
1992-06-27 19:49:28 +02:00
|
|
|
|
|
|
|
|
|
record_address_regs (XEXP (x, 0), class, 2 * scale);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case REG:
|
|
|
|
|
{
|
1992-06-27 19:49:28 +02:00
|
|
|
|
register struct costs *pp = &costs[REGNO (x)];
|
|
|
|
|
register int i;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1998-03-16 12:56:25 +01:00
|
|
|
|
pp->mem_cost += (MEMORY_MOVE_COST (Pmode, class, 1) * scale) / 2;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1992-06-27 19:49:28 +02:00
|
|
|
|
for (i = 0; i < N_REG_CLASSES; i++)
|
|
|
|
|
pp->cost[i] += (may_move_cost[i][(int) class] * scale) / 2;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
{
|
|
|
|
|
register char *fmt = GET_RTX_FORMAT (code);
|
|
|
|
|
register int i;
|
|
|
|
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
|
|
|
|
if (fmt[i] == 'e')
|
1992-06-27 19:49:28 +02:00
|
|
|
|
record_address_regs (XEXP (x, i), class, scale);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
1994-02-02 00:22:21 +01:00
|
|
|
|
|
|
|
|
|
#ifdef FORBIDDEN_INC_DEC_CLASSES
|
|
|
|
|
|
|
|
|
|
/* Return 1 if REG is valid as an auto-increment memory reference
|
|
|
|
|
to an object of MODE. */
|
|
|
|
|
|
1997-12-20 12:31:54 +01:00
|
|
|
|
static int
|
1994-02-02 00:22:21 +01:00
|
|
|
|
auto_inc_dec_reg_p (reg, mode)
|
|
|
|
|
rtx reg;
|
|
|
|
|
enum machine_mode mode;
|
|
|
|
|
{
|
|
|
|
|
#ifdef HAVE_POST_INCREMENT
|
alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO...
* alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO;
change gen_rtx(expr...) to gen_rtx_fmt_foo(expr...).
* caller-save.c, calls.c, combine.c, cse.c: Likewise.
* dwarf2out.c, except.c, explow.c, expmed.c, expr.c: Likewise.
* final.c, flow.c, function.c, genpeep.c, haifa-sched.c: Likewise.
* halfpic.c, integrate.c, jump.c, local-alloc.c, loop.c: Likewise.
* profile.c, recog.c, reg-stack.c, regclass.c, regmove.c: Likewise.
* reload.c, reload1.c, reorg.c, sched.c, stmt.c, stupid.c: Likewise.
* unroll.c, varasm.c: Likewise.
* config/alpha/alpha.c, config/alpha/alpha.md: Likewise.
From-SVN: r17357
1998-01-15 00:10:50 +01:00
|
|
|
|
if (memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
|
1994-02-02 00:22:21 +01:00
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef HAVE_POST_DECREMENT
|
alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO...
* alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO;
change gen_rtx(expr...) to gen_rtx_fmt_foo(expr...).
* caller-save.c, calls.c, combine.c, cse.c: Likewise.
* dwarf2out.c, except.c, explow.c, expmed.c, expr.c: Likewise.
* final.c, flow.c, function.c, genpeep.c, haifa-sched.c: Likewise.
* halfpic.c, integrate.c, jump.c, local-alloc.c, loop.c: Likewise.
* profile.c, recog.c, reg-stack.c, regclass.c, regmove.c: Likewise.
* reload.c, reload1.c, reorg.c, sched.c, stmt.c, stupid.c: Likewise.
* unroll.c, varasm.c: Likewise.
* config/alpha/alpha.c, config/alpha/alpha.md: Likewise.
From-SVN: r17357
1998-01-15 00:10:50 +01:00
|
|
|
|
if (memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg)))
|
1994-02-02 00:22:21 +01:00
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef HAVE_PRE_INCREMENT
|
alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO...
* alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO;
change gen_rtx(expr...) to gen_rtx_fmt_foo(expr...).
* caller-save.c, calls.c, combine.c, cse.c: Likewise.
* dwarf2out.c, except.c, explow.c, expmed.c, expr.c: Likewise.
* final.c, flow.c, function.c, genpeep.c, haifa-sched.c: Likewise.
* halfpic.c, integrate.c, jump.c, local-alloc.c, loop.c: Likewise.
* profile.c, recog.c, reg-stack.c, regclass.c, regmove.c: Likewise.
* reload.c, reload1.c, reorg.c, sched.c, stmt.c, stupid.c: Likewise.
* unroll.c, varasm.c: Likewise.
* config/alpha/alpha.c, config/alpha/alpha.md: Likewise.
From-SVN: r17357
1998-01-15 00:10:50 +01:00
|
|
|
|
if (memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg)))
|
1994-02-02 00:22:21 +01:00
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef HAVE_PRE_DECREMENT
|
alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO...
* alias.c: Change all uses of gen_rtx(FOO...) to gen_rtx_FOO;
change gen_rtx(expr...) to gen_rtx_fmt_foo(expr...).
* caller-save.c, calls.c, combine.c, cse.c: Likewise.
* dwarf2out.c, except.c, explow.c, expmed.c, expr.c: Likewise.
* final.c, flow.c, function.c, genpeep.c, haifa-sched.c: Likewise.
* halfpic.c, integrate.c, jump.c, local-alloc.c, loop.c: Likewise.
* profile.c, recog.c, reg-stack.c, regclass.c, regmove.c: Likewise.
* reload.c, reload1.c, reorg.c, sched.c, stmt.c, stupid.c: Likewise.
* unroll.c, varasm.c: Likewise.
* config/alpha/alpha.c, config/alpha/alpha.md: Likewise.
From-SVN: r17357
1998-01-15 00:10:50 +01:00
|
|
|
|
if (memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg)))
|
1994-02-02 00:22:21 +01:00
|
|
|
|
return 1;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
1991-11-06 00:39:50 +01:00
|
|
|
|
#endif /* REGISTER_CONSTRAINTS */
|
1997-05-30 20:19:19 +02:00
|
|
|
|
|
|
|
|
|
/* Allocate enough space to hold NUM_REGS registers for the tables used for
|
|
|
|
|
reg_scan and flow_analysis that are indexed by the register number. If
|
1997-06-03 00:05:38 +02:00
|
|
|
|
NEW_P is non zero, initialize all of the registers, otherwise only
|
|
|
|
|
initialize the new registers allocated. The same table is kept from
|
|
|
|
|
function to function, only reallocating it when we need more room. If
|
|
|
|
|
RENUMBER_P is non zero, allocate the reg_renumber array also. */
|
1997-05-30 20:19:19 +02:00
|
|
|
|
|
|
|
|
|
void
|
1997-06-03 00:05:38 +02:00
|
|
|
|
allocate_reg_info (num_regs, new_p, renumber_p)
|
1997-05-30 20:19:19 +02:00
|
|
|
|
int num_regs;
|
|
|
|
|
int new_p;
|
1997-06-03 00:05:38 +02:00
|
|
|
|
int renumber_p;
|
1997-05-30 20:19:19 +02:00
|
|
|
|
{
|
|
|
|
|
static int regno_allocated = 0;
|
|
|
|
|
static int regno_max = 0;
|
1997-06-03 00:05:38 +02:00
|
|
|
|
static short *renumber = (short *)0;
|
1997-05-30 20:19:19 +02:00
|
|
|
|
int i;
|
1997-06-03 00:05:38 +02:00
|
|
|
|
int size_info;
|
|
|
|
|
int size_renumber;
|
1997-06-06 23:33:41 +02:00
|
|
|
|
int min = (new_p) ? 0 : regno_max;
|
1997-05-30 20:19:19 +02:00
|
|
|
|
|
1997-06-03 00:05:38 +02:00
|
|
|
|
/* If this message come up, and you want to fix it, then all of the tables
|
|
|
|
|
like reg_renumber, etc. that use short will have to be found and lengthed
|
|
|
|
|
to int or HOST_WIDE_INT. */
|
|
|
|
|
|
|
|
|
|
/* Free up all storage allocated */
|
|
|
|
|
if (num_regs < 0)
|
|
|
|
|
{
|
|
|
|
|
if (reg_n_info)
|
|
|
|
|
{
|
|
|
|
|
free ((char *)reg_n_info);
|
|
|
|
|
free ((char *)renumber);
|
|
|
|
|
reg_n_info = (reg_info *)0;
|
|
|
|
|
renumber = (short *)0;
|
|
|
|
|
}
|
|
|
|
|
regno_allocated = 0;
|
|
|
|
|
regno_max = 0;
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
1997-05-30 20:19:19 +02:00
|
|
|
|
if (num_regs > regno_allocated)
|
|
|
|
|
{
|
|
|
|
|
regno_allocated = num_regs + (num_regs / 20); /* add some slop space */
|
1997-06-03 00:05:38 +02:00
|
|
|
|
size_info = regno_allocated * sizeof (reg_info);
|
|
|
|
|
size_renumber = regno_allocated * sizeof (short);
|
|
|
|
|
|
|
|
|
|
if (!reg_n_info)
|
|
|
|
|
{
|
|
|
|
|
reg_n_info = (reg_info *) xmalloc (size_info);
|
|
|
|
|
renumber = (short *) xmalloc (size_renumber);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (new_p) /* if we're zapping everything, no need to realloc */
|
|
|
|
|
{
|
|
|
|
|
free ((char *)reg_n_info);
|
|
|
|
|
free ((char *)renumber);
|
|
|
|
|
reg_n_info = (reg_info *) xmalloc (size_info);
|
|
|
|
|
renumber = (short *) xmalloc (size_renumber);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
reg_n_info = (reg_info *) xrealloc ((char *)reg_n_info, size_info);
|
|
|
|
|
renumber = (short *) xrealloc ((char *)renumber, size_renumber);
|
|
|
|
|
}
|
1997-05-30 20:19:19 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (min < num_regs)
|
|
|
|
|
{
|
|
|
|
|
bzero ((char *) ®_n_info[min], (num_regs - min) * sizeof (reg_info));
|
|
|
|
|
for (i = min; i < num_regs; i++)
|
1997-06-03 00:05:38 +02:00
|
|
|
|
{
|
|
|
|
|
REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN;
|
|
|
|
|
renumber[i] = -1;
|
|
|
|
|
}
|
1997-05-30 20:19:19 +02:00
|
|
|
|
}
|
|
|
|
|
|
1997-06-03 00:05:38 +02:00
|
|
|
|
if (renumber_p)
|
|
|
|
|
reg_renumber = renumber;
|
|
|
|
|
|
1997-07-14 12:50:48 +02:00
|
|
|
|
/* Tell the regset code about the new number of registers */
|
|
|
|
|
MAX_REGNO_REG_SET (num_regs, new_p, renumber_p);
|
|
|
|
|
|
1997-05-30 20:19:19 +02:00
|
|
|
|
regno_max = num_regs;
|
|
|
|
|
}
|
|
|
|
|
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
/* This is the `regscan' pass of the compiler, run just before cse
|
|
|
|
|
and again just before loop.
|
|
|
|
|
|
|
|
|
|
It finds the first and last use of each pseudo-register
|
|
|
|
|
and records them in the vectors regno_first_uid, regno_last_uid
|
|
|
|
|
and counts the number of sets in the vector reg_n_sets.
|
|
|
|
|
|
|
|
|
|
REPEAT is nonzero the second time this is called. */
|
|
|
|
|
|
|
|
|
|
/* Maximum number of parallel sets and clobbers in any insn in this fn.
|
1995-09-28 20:19:55 +01:00
|
|
|
|
Always at least 3, since the combiner could put that many together
|
1991-11-06 00:39:50 +01:00
|
|
|
|
and we want this to remain correct for all the remaining passes. */
|
|
|
|
|
|
|
|
|
|
int max_parallel;
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
reg_scan (f, nregs, repeat)
|
|
|
|
|
rtx f;
|
|
|
|
|
int nregs;
|
|
|
|
|
int repeat;
|
|
|
|
|
{
|
|
|
|
|
register rtx insn;
|
|
|
|
|
|
1997-06-03 00:05:38 +02:00
|
|
|
|
allocate_reg_info (nregs, TRUE, FALSE);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
max_parallel = 3;
|
|
|
|
|
|
|
|
|
|
for (insn = f; insn; insn = NEXT_INSN (insn))
|
|
|
|
|
if (GET_CODE (insn) == INSN
|
|
|
|
|
|| GET_CODE (insn) == CALL_INSN
|
|
|
|
|
|| GET_CODE (insn) == JUMP_INSN)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (PATTERN (insn)) == PARALLEL
|
|
|
|
|
&& XVECLEN (PATTERN (insn), 0) > max_parallel)
|
|
|
|
|
max_parallel = XVECLEN (PATTERN (insn), 0);
|
1993-10-11 08:02:42 +01:00
|
|
|
|
reg_scan_mark_refs (PATTERN (insn), insn, 0);
|
1993-10-11 15:10:43 +01:00
|
|
|
|
|
|
|
|
|
if (REG_NOTES (insn))
|
|
|
|
|
reg_scan_mark_refs (REG_NOTES (insn), insn, 1);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
1993-10-11 08:02:42 +01:00
|
|
|
|
/* X is the expression to scan. INSN is the insn it appears in.
|
|
|
|
|
NOTE_FLAG is nonzero if X is from INSN's notes rather than its body. */
|
|
|
|
|
|
1994-02-02 00:22:21 +01:00
|
|
|
|
static void
|
1993-10-11 08:02:42 +01:00
|
|
|
|
reg_scan_mark_refs (x, insn, note_flag)
|
1991-11-06 00:39:50 +01:00
|
|
|
|
rtx x;
|
1993-03-03 00:59:33 +01:00
|
|
|
|
rtx insn;
|
1993-10-11 08:02:42 +01:00
|
|
|
|
int note_flag;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
{
|
|
|
|
|
register enum rtx_code code = GET_CODE (x);
|
|
|
|
|
register rtx dest;
|
1993-03-03 00:59:33 +01:00
|
|
|
|
register rtx note;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
switch (code)
|
|
|
|
|
{
|
|
|
|
|
case CONST_INT:
|
|
|
|
|
case CONST:
|
|
|
|
|
case CONST_DOUBLE:
|
|
|
|
|
case CC0:
|
|
|
|
|
case PC:
|
|
|
|
|
case SYMBOL_REF:
|
|
|
|
|
case LABEL_REF:
|
|
|
|
|
case ADDR_VEC:
|
|
|
|
|
case ADDR_DIFF_VEC:
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case REG:
|
|
|
|
|
{
|
|
|
|
|
register int regno = REGNO (x);
|
|
|
|
|
|
1997-05-30 20:19:19 +02:00
|
|
|
|
REGNO_LAST_NOTE_UID (regno) = INSN_UID (insn);
|
1993-10-11 08:02:42 +01:00
|
|
|
|
if (!note_flag)
|
1997-05-30 20:19:19 +02:00
|
|
|
|
REGNO_LAST_UID (regno) = INSN_UID (insn);
|
|
|
|
|
if (REGNO_FIRST_UID (regno) == 0)
|
|
|
|
|
REGNO_FIRST_UID (regno) = INSN_UID (insn);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
1993-10-11 15:10:43 +01:00
|
|
|
|
case EXPR_LIST:
|
1993-10-11 20:55:18 +01:00
|
|
|
|
if (XEXP (x, 0))
|
|
|
|
|
reg_scan_mark_refs (XEXP (x, 0), insn, note_flag);
|
1993-10-11 15:10:43 +01:00
|
|
|
|
if (XEXP (x, 1))
|
|
|
|
|
reg_scan_mark_refs (XEXP (x, 1), insn, note_flag);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INSN_LIST:
|
|
|
|
|
if (XEXP (x, 1))
|
|
|
|
|
reg_scan_mark_refs (XEXP (x, 1), insn, note_flag);
|
|
|
|
|
break;
|
|
|
|
|
|
1991-11-06 00:39:50 +01:00
|
|
|
|
case SET:
|
|
|
|
|
/* Count a set of the destination if it is a register. */
|
|
|
|
|
for (dest = SET_DEST (x);
|
|
|
|
|
GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
|
|
|
|
|
|| GET_CODE (dest) == ZERO_EXTEND;
|
|
|
|
|
dest = XEXP (dest, 0))
|
|
|
|
|
;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (dest) == REG)
|
1997-05-30 20:19:19 +02:00
|
|
|
|
REG_N_SETS (REGNO (dest))++;
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
1993-03-03 00:59:33 +01:00
|
|
|
|
/* If this is setting a pseudo from another pseudo or the sum of a
|
|
|
|
|
pseudo and a constant integer and the other pseudo is known to be
|
|
|
|
|
a pointer, set the destination to be a pointer as well.
|
|
|
|
|
|
|
|
|
|
Likewise if it is setting the destination from an address or from a
|
|
|
|
|
value equivalent to an address or to the sum of an address and
|
|
|
|
|
something else.
|
|
|
|
|
|
|
|
|
|
But don't do any of this if the pseudo corresponds to a user
|
|
|
|
|
variable since it should have already been set as a pointer based
|
|
|
|
|
on the type. */
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (SET_DEST (x)) == REG
|
|
|
|
|
&& REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
|
|
|
|
|
&& ! REG_USERVAR_P (SET_DEST (x))
|
|
|
|
|
&& ! REGNO_POINTER_FLAG (REGNO (SET_DEST (x)))
|
|
|
|
|
&& ((GET_CODE (SET_SRC (x)) == REG
|
|
|
|
|
&& REGNO_POINTER_FLAG (REGNO (SET_SRC (x))))
|
|
|
|
|
|| ((GET_CODE (SET_SRC (x)) == PLUS
|
|
|
|
|
|| GET_CODE (SET_SRC (x)) == LO_SUM)
|
|
|
|
|
&& GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
|
|
|
|
|
&& GET_CODE (XEXP (SET_SRC (x), 0)) == REG
|
|
|
|
|
&& REGNO_POINTER_FLAG (REGNO (XEXP (SET_SRC (x), 0))))
|
|
|
|
|
|| GET_CODE (SET_SRC (x)) == CONST
|
|
|
|
|
|| GET_CODE (SET_SRC (x)) == SYMBOL_REF
|
|
|
|
|
|| GET_CODE (SET_SRC (x)) == LABEL_REF
|
|
|
|
|
|| (GET_CODE (SET_SRC (x)) == HIGH
|
|
|
|
|
&& (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
|
|
|
|
|
|| GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
|
|
|
|
|
|| GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
|
|
|
|
|
|| ((GET_CODE (SET_SRC (x)) == PLUS
|
|
|
|
|
|| GET_CODE (SET_SRC (x)) == LO_SUM)
|
|
|
|
|
&& (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
|
|
|
|
|
|| GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
|
|
|
|
|
|| GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
|
|
|
|
|
|| ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
|
|
|
|
|
&& (GET_CODE (XEXP (note, 0)) == CONST
|
|
|
|
|
|| GET_CODE (XEXP (note, 0)) == SYMBOL_REF
|
|
|
|
|
|| GET_CODE (XEXP (note, 0)) == LABEL_REF))))
|
|
|
|
|
REGNO_POINTER_FLAG (REGNO (SET_DEST (x))) = 1;
|
|
|
|
|
|
1996-07-04 00:07:53 +02:00
|
|
|
|
/* ... fall through ... */
|
1991-11-06 00:39:50 +01:00
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
{
|
|
|
|
|
register char *fmt = GET_RTX_FORMAT (code);
|
|
|
|
|
register int i;
|
|
|
|
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
|
|
|
|
{
|
|
|
|
|
if (fmt[i] == 'e')
|
1993-10-11 08:02:42 +01:00
|
|
|
|
reg_scan_mark_refs (XEXP (x, i), insn, note_flag);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
else if (fmt[i] == 'E' && XVEC (x, i) != 0)
|
|
|
|
|
{
|
|
|
|
|
register int j;
|
|
|
|
|
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
1993-10-11 08:02:42 +01:00
|
|
|
|
reg_scan_mark_refs (XVECEXP (x, i, j), insn, note_flag);
|
1991-11-06 00:39:50 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
|
|
|
|
|
is also in C2. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
reg_class_subset_p (c1, c2)
|
|
|
|
|
register enum reg_class c1;
|
|
|
|
|
register enum reg_class c2;
|
|
|
|
|
{
|
|
|
|
|
if (c1 == c2) return 1;
|
|
|
|
|
|
|
|
|
|
if (c2 == ALL_REGS)
|
|
|
|
|
win:
|
|
|
|
|
return 1;
|
|
|
|
|
GO_IF_HARD_REG_SUBSET (reg_class_contents[(int)c1],
|
|
|
|
|
reg_class_contents[(int)c2],
|
|
|
|
|
win);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return nonzero if there is a register that is in both C1 and C2. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
reg_classes_intersect_p (c1, c2)
|
|
|
|
|
register enum reg_class c1;
|
|
|
|
|
register enum reg_class c2;
|
|
|
|
|
{
|
|
|
|
|
#ifdef HARD_REG_SET
|
|
|
|
|
register
|
|
|
|
|
#endif
|
|
|
|
|
HARD_REG_SET c;
|
|
|
|
|
|
|
|
|
|
if (c1 == c2) return 1;
|
|
|
|
|
|
|
|
|
|
if (c1 == ALL_REGS || c2 == ALL_REGS)
|
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
|
|
COPY_HARD_REG_SET (c, reg_class_contents[(int) c1]);
|
|
|
|
|
AND_HARD_REG_SET (c, reg_class_contents[(int) c2]);
|
|
|
|
|
|
|
|
|
|
GO_IF_HARD_REG_SUBSET (c, reg_class_contents[(int) NO_REGS], lose);
|
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
|
|
lose:
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
1997-07-14 12:50:48 +02:00
|
|
|
|
/* Release any memory allocated by register sets. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
regset_release_memory ()
|
|
|
|
|
{
|
|
|
|
|
if (basic_block_live_at_start)
|
|
|
|
|
{
|
|
|
|
|
free_regset_vector (basic_block_live_at_start, n_basic_blocks);
|
|
|
|
|
basic_block_live_at_start = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
FREE_REG_SET (regs_live_at_setjmp);
|
|
|
|
|
bitmap_release_memory ();
|
|
|
|
|
}
|