2013-10-01 19:03:46 +02:00
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/* Subroutines used for code generation on the Synopsys DesignWare ARC cpu.
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2015-01-05 13:33:28 +01:00
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Copyright (C) 1994-2015 Free Software Foundation, Inc.
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2013-10-01 19:03:46 +02:00
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Sources derived from work done by Sankhya Technologies (www.sankhya.com) on
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behalf of Synopsys Inc.
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Position Independent Code support added,Code cleaned up,
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Comments and Support For ARC700 instructions added by
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Saurabh Verma (saurabh.verma@codito.com)
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Ramana Radhakrishnan(ramana.radhakrishnan@codito.com)
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Fixing ABI inconsistencies, optimizations for ARC600 / ARC700 pipelines,
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profiling support added by Joern Rennecke <joern.rennecke@embecosm.com>
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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genattrtab.c (write_header): Include hash-set.h...
2015-01-09 Michael Collison <michael.collison@linaro.org>
* genattrtab.c (write_header): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-attrtab.c.
* genautomata.c (main) : Include hash-set.h, macInclude hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-automata.c.
* genemit.c (main): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-emit.c.
* gengtype.c (open_base_files): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
gtype-desc.c.
* genopinit.c (main): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-opinit.c.
* genoutput.c (output_prologue): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-output.c.
* genpeep.c (main): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-peep.c.
* genpreds.c (write_insn_preds_c): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-preds.c.
* optc-save-gen-awk: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
options-save.c.
* opth-gen.awk: Change include guard from GCC_C_COMMON_H to GCC_C_COMMON_C
when generating options.h.
* ada/gcc-interface/cuintp.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ada/gcc-interface/decl.c: ditto.
* ada/gcc-interface/misc.c: ditto.
* ada/gcc-interface/targtyps.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h,
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ada/gcc-interface/trans.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, real.h,
fold-const.h, wide-int.h, inchash.h due to
flattening of tree.h.
* ada/gcc-interface/utils.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ada/gcc-interface/utils2.c: ditto.
* alias.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* asan.c: ditto.
* attribs.c: ditto.
* auto-inc-dec.c: ditto.
* auto-profile.c: ditto
* bb-reorder.c: ditto.
* bt-load.c: Include symtab.h due to flattening of tree.h.
* builtins.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c/c-array-notation.c: ditto.
* c/c-aux-info.c: ditto.
* c/c-convert.c: ditto.
* c/c-decl.c: ditto.
* c/c-errors.c: ditto.
* c/c-lang.c: dittoxs.
* c/c-objc-common.c: ditto.
* c/c-parser.c: ditto.
* c/c-typeck.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, inchash.h, real.h and
fixed-value.h due to flattening of tree.h.
* calls.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ccmp.c: ditto.
* c-family/array-notation-common.c: ditto.
* c-family/c-ada-spec.c: ditto.
* c-family/c-cilkplus.c: ditto.
* c-family/c-common.c: Include input.h due to flattening of tree.h.
Define macro GCC_C_COMMON_C.
* c-family/c-common.h: Flatten tree.h header files into c-common.h.
Remove include of tree-core.h.
* c-family/c-cppbuiltin.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/c-dump.c: ditto.
* c-family/c-format.c: Flatten tree.h header files into c-common.h.
* c-family/c-cppbuiltin.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/c-dump.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/c-format.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, inchash.h and real.h due to
flattening of tree.h.
* c-family/c-gimplify.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/cilk.c: ditto.
* c-family/c-lex.c: ditto.
* c-family/c-omp.c: ditto.
* c-family/c-opts.c: ditto.
* c-family/c-pch.c: ditto.
* c-family/c-ppoutput.c: ditto.
* c-family/c-pragma.c: ditto.
* c-family/c-pretty-print.c: ditto.
* c-family/c-semantics.c: ditto.
* c-family/c-ubsan.c: ditto.
* c-family/stub-objc.c: ditto.
* cfgbuild.c: ditto.
* cfg.c: ditto.
* cfgcleanup.c: ditto.
* cfgexpand.c: ditto.
* cfghooks.c: ditto.
* cfgloop.c: Include symtab.h, fold-const.h, and
inchash.h due to flattening of tree.h.
* cfgloopmanip.c: ditto.
* cfgrtl.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* cgraphbuild.c: ditto.
* cgraph.c: ditto.
* cgraphclones.c: ditto.
* cgraphunit.c: ditto.
* cilk-common.c: ditto.
* combine.c: ditto.
* combine-stack-adj.c: Include symbol.h due to flattening of tree.h.
* config/aarch64/aarch64-builtins.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/aarch64/aarch64.c: ditto.
* config/alpha/alpha.c: ditto.
* config/arc/arc.c: ditto.
* config/arm/aarch-common.c: ditto.
* config/arm/arm-builtins.c: ditto.
* config/arm/arm.c: ditto.
* config/arm/arm-c.c: ditto.
* config/avr/avr.c: ditto.
* config/avr/avr-c.c: ditto.
* config/avr/avr-log.c: ditto.
* config/bfin/bfin.c: ditto.
* config/c6x/c6x.c: ditto.
* config/cr16/cr16.c: ditto.
* config/cris/cris.c: ditto.
* config/darwin.c: ditto.
* config/darwin-c.c: ditto.
* config/default-c.c: ditto.
* config/epiphany/epiphany.c: ditto.
* config/fr30/fr30.c: ditto.
* config/frv/frv.c: ditto.
* config/glibc-c.c: ditto.
* config/h8300/h8300.c: ditto.
* config/i386/i386.c: ditto.
* config/i386/i386-c.c: ditto.
* config/i386/msformat.c: ditto.
* config/i386/winnt.c: ditto.
* config/i386/winnt-cxx.c: ditto.
* config/i386/winnt-stubs.c: ditto.
* config/ia64/ia64.c: ditto.
* config/ia64/ia64-c.c: ditto.
* config/iq2000/iq2000.c: ditto.
* config/lm32/lm32.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/m32c/m32c.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/m32c/m32c-pragma.c: ditto.
* config/m32c/m32cr.c: ditto.
* config/m68/m68k.c: ditto.
* config/mcore/mcore.c: ditto.
* config/mep/mep.c: ditto.
* config/mep/mep-pragma.c: ditto.
* config/microblaze/microblaze.c: ditto.
* config/microblaze/microblaze-c.c: ditto.
* config/mips/mips.c: ditto.
* config/mmix/mmix.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/mn10300/mn10300.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/moxie/moxie.c: ditto.
* config/msp430/msp430.c: ditto.
* config/msp430/msp430-c.c: ditto.
* config/nds32/nds32.c: ditto.
* config/nds32/nds32-cost.c: ditto.
* config/nds32/nds32-fp-as-gp.c: ditto.
* config/nds32/nds32-intrinsic.c: ditto.
* config/nds32/nds32-isr.c: ditto.
* config/nds32/nds32-md-auxillary.c: ditto.
* config/nds32/nds32-memory-manipulationx.c: ditto.
* config/nds32/nds32-pipelines-auxillary.c: ditto.
* config/nds32/nds32-predicates.c: ditto.
* config/nios2/nios2.c: ditto.
* config/nvptx/nvptx.c: ditto.
* config/pa/pa.c: ditto.
* config/pdp11/pdp11x.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/rl78/rl78.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/rl78/rl78-cx.c: ditto.
* config/rs6000/rs6000.c: ditto.
* config/rs6000/rs6000-c.c: ditto.
* config/rx/rx.c: ditto.
* config/s390/s390.c: ditto.
* config/sh/sh.c: ditto.
* config/sh/sc.c: ditto.
* config/sh/sh-mem.cc: ditto.
* config/sh/sh_treg_combine.cc: Include symtab.h, inchash.h and tree.h
due to flattening of tree.h.
Remove include of tree-core.h.
* config/sol2.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/sol2-c.c: ditto.
* config/sol2-cxx.c: ditto.
* config/sol2-stubs.c: ditto.
* config/sparc/sparc.c: ditto.
* config/sparc/sparc-cx.c: ditto.
* config/spu/spu.c: ditto.
* config/spu/spu-c.c: ditto
* config/storym16/stormy16.c: ditto.
* config/tilegx/tilegx.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/tilepro/gen-mul-tables.cc: Include symtab.h in generated file.
* config/tilegx/tilegx-c.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/tilepro/tilepro.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/tilepro/tilepro-c.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/v850/v850.c: ditto.
* config/v850/v850-c.c: ditto.
* config/vax/vax.c: ditto.
* config/vms/vms.c: ditto.
* config/vms/vms-c.c: ditto.
* config/vxworks.c: ditto.
* config/winnt-c.c: ditto.
* config/xtensa/xtensa.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* convert.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* coverage.c: ditto.
* cp/call.c: ditto.
* cp/class.c: ditto.
* cp/constexpr.c: ditto.
* cp/cp-array-notation.c: ditto.
* cp/cp-gimplify.c: ditto.
* cp/cp-lang.c: ditto.
* cp/cp-objcp-common.c: ditto.
* cp/cvt.c: ditto.
* cp/decl2.c: ditto.
* cp/decl.c: ditto.
* cp/dump.c: ditto.
* cp/error.c: ditto.
* cp/except.c: ditto.
* cp/expr.c: ditto.
* cp/friend.c: ditto.
* cp/init.c: ditto.
* cp/lambda.c: ditto.
* cp/lex.c: ditto.
* cp/mangle.c: ditto.
* cp/name-lookup.c: ditto.
* cp/optimize.c: ditto.
* cp/parser.c: ditto.
* cp/pt.c: ditto.
* cp/ptree.c: ditto.
* cp/repo.c: ditto.
* cp/rtti.c: ditto.
* cp/search.c: ditto.
* cp/semantics.c: ditto.
* cp/tree.c: ditto.
* cp/typeck2.c: ditto.
* cp/typeck.c: ditto.
* cppbuiltin.c: ditto.
* cprop.c: ditto.
* cse.c: Add include of symtab.h due to flattening of tree.h.
* cselib.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* data-streamer.c: ditto.
* data-streamer-in.c: ditto.
* data-streamer-out.c: ditto.
* dbxout.c: ditto.
* dce.c: ditto.
* ddg.c: Add include of symtab.h due to flattening of tree.h.
* debug.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* dfp.c: ditto.
* df-scan.c: ditto.
* dojump.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* double-int.c: ditto.
* dse.c: ditto.
* dumpfile.c: ditto.
* dwarf2asm.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* dwarf2cfi.c: ditto.
* dwarf2out.c: ditto.
* emit-rtl.c: ditto.
* except.c: ditto.
* explow.c: ditto.
* expmed.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* expr.c: ditto.
* final.c: ditto.
* fixed-value.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and fixed-value.h due to flattening of tree.h.
* fold-const.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
Relocate inline function convert_to_ptrofftype_loc from tree.h.
Relocate inline function fold_build_pointer_plus_loc from tree.h.
Relocate inline function fold_build_pointer_plus_hwi_loc from tree.h.
* fold-const.h: Relocate macro convert_to_ptrofftype from tree.h.
Relocate macro fold_build_pointer_plus to relocate from tree.h.h.
Relocate macro fold_build_pointer_plus_hwi from tree.h.
Add prototype for convert_to_ptrofftype_loc relocated from tree.h.
Add prototype for fold_build_pointer_plus_loc relocated from tree.h.
Add prototype for fold_build_pointer_plus_hwi_loc relocated from tree.h.
* fortran/convert.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/cpp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/decl.c: ditto.
* fortran/f95.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/iresolve.c: ditto.
* fortran/match.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/module.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/options.c: ditto.
* fortran/target-memory.c: Include hash-set.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-array.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-common.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-const.c: ditto.
* fortran/trans-decl.c: ditto.
* fortran/trans-expr.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-intrinsic.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* fortran/trans-io.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-openmp.c: ditto.
* fortran/trans-stmt.c: ditto.
* fortran/trans-types.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* function.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gcc-plugin.h: Include statistics.h, double-int.h, real.h, fixed-value.h,
alias.h, flags.h, and symtab.h due to flattening of tree.h
* gcse.c: ditto.
* generic-match-head.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ggc-page.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimple-builder.c: ditto.
* gimple.c: ditto.
* gimple-expr.c: ditto.
* gimple-fold.c: ditto.
* gimple-iterator.c: ditto.
* gimple-low.c: ditto.
* gimple-match-head.c: ditto.
* gimple-pretty-print.c: ditto.
* generic-ssa-isolate-paths.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimple-ssa-strength-reduction.c: ditto.
* gimple-streamer-in.c: ditto.
* gimple-streamer-out.c: ditto.
* gimple-walk.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimplify.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimplify-me.c: ditto.
* go/go-gcc.cc: ditto.
* go/go-lang.c: ditto.
* go/gdump.c: ditto.
* graphite-blocking.c: ditto.
* graphite.c: ditto.
* graphite-dependencies.c: ditto.
* graphite-interchange.c: ditto.
* graphite-isl-ast-to-gimple.c: ditto.
* graphite-optimize-isl.c: ditto.
* graphite-poly.c: ditto.
* graphite-scop-detection.c: ditto.
* graphite-sese-to-poly.c: ditto.
* hw-doloop.c: Include symtab.h due to flattening of tree.h.
* ifcvt.c: ditto.
* init-regs.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* internal-fc.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h,options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa.c: ditto.
* ipa-chkp.c: ditto.
* ipa-comdats.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-cp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h,options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-devirt.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-icf.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h,options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-icf-gimple.c: ditto.
* ipa-inline-analysis.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-inline.c: ditto.
* ipa-inline-transform.c: ditto.
* ipa-polymorhpic-call.c: ditto.
* ipa-profile.c: ditto.
* ipa-prop.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-pure-const.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-ref.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-reference.c: ditto.
* ipa-split.c: ditto.
* ipa-utils.c: ditto.
* ipa-visbility.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ira.c: ditto.
* ira-color.c: Include hash-set.h due to flattening of tree.h.
* ira-costs.c: ditto.
* ira-emit.c: ditto.
* java/boehm.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/builtins.c: ditto.
* java/class.c: ditto.
* java/constants.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/decl.c: ditto.
* java/except.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/expr.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h,inchash.h and real.h due to flattening of tree.h.
* java/gimplify.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/jcf-dump.c: ditto.
* java/jcf-io.c: ditto.
* java/jcf-parse.c: ditto.
* java/jvgenmain.c: ditto.
* java/lang.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/mangle.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/mangle_name.c: ditto.
* java/resource.c: ditto.
* java/typeck.c: ditto.
* java/verify-glue.c: ditto.
* java/verify-impl.c: ditto.
* jump.c: Include symtab.h due to flattening of tree.h.
* langhooks.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* loop-doloop.c: Include symtab.h due to flattening of tree.h.
* loop-init.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* loop-invariant.c: Include symtab.h due to flattening of tree.h.
* loop-iv.c: ditto.
* loop-unroll.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lower-subreg.c: ditto.
* lra-assigns.c: Include symtab.h due to flattening of tree.h.
* lra.c: Include symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* lra-coalesce.c: Include symtab.h due to flattening of tree.h.
* lra-constraints.c: ditto.
* lra-eliminations.c: ditto.
* lra-livesc: ditto.
* lra-remat.c: ditto.
* lra-spills.c: ditto.
* lto/lto.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto/lto-lang.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto/lto-object.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto/lto-partition.c: ditto.
* lto/lto-symtab.c: ditto.
* lto-cgraph.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto-compress.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto-opts.c: ditto.
* lto-section-in.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto-section-out.c: ditto.
* lto-streamer.c: ditto.
* lto-streamer-in.c: ditto.
* lto-streamer-out.c: ditto.
* modulo-sched.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* objc/objc-act.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* objc/objc-encoding.c: ditto.
* objc/objc-gnu-runtime-abi-01.c: ditto.
* objc/objc-lang.c: ditto.
* objc/objc-map.c: ditto.
* objc/objc-next-runtime-abi-01.c: ditto.
* objc/objc-next-runtime-abi-02.c: ditto.
* objc/objc-runtime-shared-support.c: ditto.
* objcp/objcp-decl.c: ditto.
* objcp/objcp-lang.c: ditto.
* omega.c: ditto.
* omega-low.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* optabs.c: ditto.
* opts-global.c: ditto.
* passes.c: ditto.
* plugin.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* postreload.c: Include symtab.h due to flattening of tree.h.
* postreload-gcse.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* predict.c: ditto.
* print-rtl.c: ditto.
* print-tree.c: ditto.
* profile.c: Include symtab.h, fold-const.h
and inchash.h due to flattening of tree.h.
* real.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* realmpfr.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* recog.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* ree.c: ditto.
* reginfo.c: ditto.
* reg-stack.c: ditto.
* reload1.c: Include symtab.h, fold-const.h, wide-int.h
and inchash.h due to flattening of tree.h.
* reload.c: Include symtab.h due to flattening of tree.h.
* reorg.c: ditto.
* rtlanal.c: Include symtab.h, fold-const.h, wide-int.h
and inchash.h due to flattening of tree.h.
* rtl-chkp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* rtlhooks.c: Include symtab.h due to flattening of tree.h.
* sanopt.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* sched-deps.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* sched-vis.c: ditto.
* sdbout.c: ditto.
* sel-sched.c: Include symtab.h, fold-const.h, wide-int.h
and inchash.h due to flattening of tree.h.
* sel-sched-ir.c: ditto.
* sese.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* shrink-wrap.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* simplify-rtx.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* stack-ptr-mod.c: ditto.
* stmt.c: ditto.
* store-motion.c: ditto.
* store-layout.c: ditto.
* stringpool.c: ditto.
* symtab.c: ditto.
* target-globals.c: ditto.
* targhooks.c: ditto.
* toplev.c: ditto.
* tracer.c: ditto.
* trans-mem.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-affine.c: ditto.
* tree-browser.c: ditto.
* tree.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-call-cdce.c: Include symtab.h, alias.h, double-int.h,
fold-const.h, wide-int.h, inchash.h and real.h due to
flattening of tree.h.
* tree-cfg.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-cfgcleanup.c: ditto.
* tree-chkp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-chkp-opt.c: ditto.
* tree-chrec.c: ditto.
* tree-chkp-opt.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h and
real.h due to flattening of tree.h.
* tree-core.h: Flatten header file by removing all #include statements.
* tree-data-ref.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-dfa.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h and
real.h due to flattening of tree.h.
* tree-diagnostic.c: ditto.
* tree-dump.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h, real.h and
fixed-value.h due to flattening of tree.h.
* tree-dfa.c: ditto.
* tree-eh.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h and
real.h due to flattening of tree.h.
* tree-emutls.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree.h: Flatten header files by removing all includes except tree-core.h.
Remove inline function convert_to_ptrofftype_loc to relocate to fold-const.c.
Remove macro convert_to_ptrofftype to relocate to fold-const.h.
Remove inline function fold_build_pointer_plus_loc to relocate to fold-const.c.
Remove macro fold_build_pointer_plus to relocate to fold-const.h.
Remove inline function fold_build_pointer_plus_hwi_loc to relocate to fold-const.c.
Remove macro fold_build_pointer_plus_hwi to relocate to fold-const.h.
* tree-if-conv.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h, real.h and
fixed-value.h due to flattening of tree.h.
* tree-inline.c: ditto.
* tree-into-ssa.c: ditto.
* tree-iterator.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-loop-distribution.c: ditto.
* tree-nested.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-nrv.c: ditto.
* tree-object-size.c: ditto.
* tree-outof-ssa.c: ditto.
* tree-parloops.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-phinodes.c: ditto.
* tree-predcom.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-pretty-print.c: ditto.
* tree-profile.c: double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h and inchash.h due to flattening of tree.h.
* tree-scalar-evolution.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-sra.c: Include vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-ssa-alias.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-ssa.c: ditto.
* tree-ssa-ccp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h
and real.h due to flattening of tree.h.
* tree-ssa-coalesce.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-ssa-copy.c: ditto.
* tree-ssa-copyrename.c: ditto.
* tree-ssa-dce.c: ditto.
* tree-ssa-dom.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h
and real.h due to flattening of tree.h.
* tree-ssa-dse.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-ssa-forwprop.c: ditto.
* tree-ssa-ifcombine.c: ditto.
* tree-ssa-live.c: ditto.
* tree-ssa-loop.c: ditto.
* tree-ssa-loop-ch.c: ditto.
* tree-ssa-loop-im.c: ditto.
* tree-ssa-loop-ivcanon.c: ditto.
* tree-ssa-loop-ivopts.c: ditto.
* tree-ssa-loop-manip.c: ditto.
* tree-ssa-loop-niter.c: ditto.
* tree-ssa-loop-prefetch.c: ditto.
* tree-ssa-loop-unswitch.c: ditto.
* tree-ssa-loop-math-opts.c: ditto.
* tree-ssanames.c: ditto.
* tree-ssa-operands.c: ditto.
* tree-ssa-phiopt.c: ditto.
* tree-ssa-phiprop.c: ditto.
* tree-ssa-pre.c: ditto.
* tree-ssa-propagate.c: ditto.
* tree-ssa-reassoc.c: ditto.
* tree-ssa-sccvn.c: ditto.
* tree-ssa-sink.c: ditto.
* tree-ssa-strlen.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-structalias.c: double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-tail-merge.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-ter.c: ditto.
* tree-ssa-threadedge.c: ditto.
* tree-ssa-threadupdate.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-uncprop.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-uninit.c: ditto.
* tree-stdarg.c: Include vec.h, double-int.h, input.h, alias.h,
symtab.h, fold-const.h, wide-int.h and inchash.h due to flattening
of tree.h.
* tree-streamer.c: Include vec.h, double-int.h, input.h, alias.h,
symtab.h, options.h, fold-const.h, wide-int.h and
inchash.h due to flattening of tree.h.
* tree-streamer-in.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, inchash.h, real.h and fixed-value.h due to flattening
of tree.h.
* tree-streamer-out.c: dittoo.
* tree-switch-conversion.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-tailcall.c: ditto.
* tree-vect-data-refs.c: ditto.
* tree-vect-generic.c: Include hash-set.h, machmode.h, vec.h, double-int.h, input.h,
alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-vect-loop.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-vect-loop-manip.c: ditto.
* tree-vectorizer.c: ditto.
* tree-vect-patterns.c: ditto.
* tree-vect-slp.c: ditto.
* tree-vect-stmts.c: ditto.
* tree-vrp.c: ditto.
* tsan.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* ubsan.c: ditto.
* value-prof.c.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* varasm.c: ditto.
* varpool.c: ditto.
* var-tracking.c: ditto.
* vmsdbgout.c: ditto.
* vtable-verify.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* wide-int.cc: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* xcoffout.c: ditto.
* libcc1/plugin.cc: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
From-SVN: r219402
2015-01-09 21:18:42 +01:00
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#include "hash-set.h"
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#include "machmode.h"
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#include "vec.h"
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#include "double-int.h"
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#include "input.h"
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#include "alias.h"
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#include "symtab.h"
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#include "wide-int.h"
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#include "inchash.h"
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2013-10-01 19:03:46 +02:00
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#include "tree.h"
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genattrtab.c (write_header): Include hash-set.h...
2015-01-09 Michael Collison <michael.collison@linaro.org>
* genattrtab.c (write_header): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-attrtab.c.
* genautomata.c (main) : Include hash-set.h, macInclude hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-automata.c.
* genemit.c (main): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-emit.c.
* gengtype.c (open_base_files): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
gtype-desc.c.
* genopinit.c (main): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-opinit.c.
* genoutput.c (output_prologue): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-output.c.
* genpeep.c (main): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-peep.c.
* genpreds.c (write_insn_preds_c): Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
insn-preds.c.
* optc-save-gen-awk: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h when generating
options-save.c.
* opth-gen.awk: Change include guard from GCC_C_COMMON_H to GCC_C_COMMON_C
when generating options.h.
* ada/gcc-interface/cuintp.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ada/gcc-interface/decl.c: ditto.
* ada/gcc-interface/misc.c: ditto.
* ada/gcc-interface/targtyps.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h,
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ada/gcc-interface/trans.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, real.h,
fold-const.h, wide-int.h, inchash.h due to
flattening of tree.h.
* ada/gcc-interface/utils.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ada/gcc-interface/utils2.c: ditto.
* alias.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* asan.c: ditto.
* attribs.c: ditto.
* auto-inc-dec.c: ditto.
* auto-profile.c: ditto
* bb-reorder.c: ditto.
* bt-load.c: Include symtab.h due to flattening of tree.h.
* builtins.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c/c-array-notation.c: ditto.
* c/c-aux-info.c: ditto.
* c/c-convert.c: ditto.
* c/c-decl.c: ditto.
* c/c-errors.c: ditto.
* c/c-lang.c: dittoxs.
* c/c-objc-common.c: ditto.
* c/c-parser.c: ditto.
* c/c-typeck.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, inchash.h, real.h and
fixed-value.h due to flattening of tree.h.
* calls.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* ccmp.c: ditto.
* c-family/array-notation-common.c: ditto.
* c-family/c-ada-spec.c: ditto.
* c-family/c-cilkplus.c: ditto.
* c-family/c-common.c: Include input.h due to flattening of tree.h.
Define macro GCC_C_COMMON_C.
* c-family/c-common.h: Flatten tree.h header files into c-common.h.
Remove include of tree-core.h.
* c-family/c-cppbuiltin.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/c-dump.c: ditto.
* c-family/c-format.c: Flatten tree.h header files into c-common.h.
* c-family/c-cppbuiltin.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/c-dump.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/c-format.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, inchash.h and real.h due to
flattening of tree.h.
* c-family/c-gimplify.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* c-family/cilk.c: ditto.
* c-family/c-lex.c: ditto.
* c-family/c-omp.c: ditto.
* c-family/c-opts.c: ditto.
* c-family/c-pch.c: ditto.
* c-family/c-ppoutput.c: ditto.
* c-family/c-pragma.c: ditto.
* c-family/c-pretty-print.c: ditto.
* c-family/c-semantics.c: ditto.
* c-family/c-ubsan.c: ditto.
* c-family/stub-objc.c: ditto.
* cfgbuild.c: ditto.
* cfg.c: ditto.
* cfgcleanup.c: ditto.
* cfgexpand.c: ditto.
* cfghooks.c: ditto.
* cfgloop.c: Include symtab.h, fold-const.h, and
inchash.h due to flattening of tree.h.
* cfgloopmanip.c: ditto.
* cfgrtl.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* cgraphbuild.c: ditto.
* cgraph.c: ditto.
* cgraphclones.c: ditto.
* cgraphunit.c: ditto.
* cilk-common.c: ditto.
* combine.c: ditto.
* combine-stack-adj.c: Include symbol.h due to flattening of tree.h.
* config/aarch64/aarch64-builtins.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/aarch64/aarch64.c: ditto.
* config/alpha/alpha.c: ditto.
* config/arc/arc.c: ditto.
* config/arm/aarch-common.c: ditto.
* config/arm/arm-builtins.c: ditto.
* config/arm/arm.c: ditto.
* config/arm/arm-c.c: ditto.
* config/avr/avr.c: ditto.
* config/avr/avr-c.c: ditto.
* config/avr/avr-log.c: ditto.
* config/bfin/bfin.c: ditto.
* config/c6x/c6x.c: ditto.
* config/cr16/cr16.c: ditto.
* config/cris/cris.c: ditto.
* config/darwin.c: ditto.
* config/darwin-c.c: ditto.
* config/default-c.c: ditto.
* config/epiphany/epiphany.c: ditto.
* config/fr30/fr30.c: ditto.
* config/frv/frv.c: ditto.
* config/glibc-c.c: ditto.
* config/h8300/h8300.c: ditto.
* config/i386/i386.c: ditto.
* config/i386/i386-c.c: ditto.
* config/i386/msformat.c: ditto.
* config/i386/winnt.c: ditto.
* config/i386/winnt-cxx.c: ditto.
* config/i386/winnt-stubs.c: ditto.
* config/ia64/ia64.c: ditto.
* config/ia64/ia64-c.c: ditto.
* config/iq2000/iq2000.c: ditto.
* config/lm32/lm32.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/m32c/m32c.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/m32c/m32c-pragma.c: ditto.
* config/m32c/m32cr.c: ditto.
* config/m68/m68k.c: ditto.
* config/mcore/mcore.c: ditto.
* config/mep/mep.c: ditto.
* config/mep/mep-pragma.c: ditto.
* config/microblaze/microblaze.c: ditto.
* config/microblaze/microblaze-c.c: ditto.
* config/mips/mips.c: ditto.
* config/mmix/mmix.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/mn10300/mn10300.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/moxie/moxie.c: ditto.
* config/msp430/msp430.c: ditto.
* config/msp430/msp430-c.c: ditto.
* config/nds32/nds32.c: ditto.
* config/nds32/nds32-cost.c: ditto.
* config/nds32/nds32-fp-as-gp.c: ditto.
* config/nds32/nds32-intrinsic.c: ditto.
* config/nds32/nds32-isr.c: ditto.
* config/nds32/nds32-md-auxillary.c: ditto.
* config/nds32/nds32-memory-manipulationx.c: ditto.
* config/nds32/nds32-pipelines-auxillary.c: ditto.
* config/nds32/nds32-predicates.c: ditto.
* config/nios2/nios2.c: ditto.
* config/nvptx/nvptx.c: ditto.
* config/pa/pa.c: ditto.
* config/pdp11/pdp11x.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/rl78/rl78.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/rl78/rl78-cx.c: ditto.
* config/rs6000/rs6000.c: ditto.
* config/rs6000/rs6000-c.c: ditto.
* config/rx/rx.c: ditto.
* config/s390/s390.c: ditto.
* config/sh/sh.c: ditto.
* config/sh/sc.c: ditto.
* config/sh/sh-mem.cc: ditto.
* config/sh/sh_treg_combine.cc: Include symtab.h, inchash.h and tree.h
due to flattening of tree.h.
Remove include of tree-core.h.
* config/sol2.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/sol2-c.c: ditto.
* config/sol2-cxx.c: ditto.
* config/sol2-stubs.c: ditto.
* config/sparc/sparc.c: ditto.
* config/sparc/sparc-cx.c: ditto.
* config/spu/spu.c: ditto.
* config/spu/spu-c.c: ditto
* config/storym16/stormy16.c: ditto.
* config/tilegx/tilegx.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/tilepro/gen-mul-tables.cc: Include symtab.h in generated file.
* config/tilegx/tilegx-c.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/tilepro/tilepro.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* config/tilepro/tilepro-c.c: Include hash-set.h, machmode.h,
vec.h, double-int.h, input.h, alias.h, symtab.h, options.h
fold-const.h, wide-int.h, and inchash.h due to
flattening of tree.h.
* config/v850/v850.c: ditto.
* config/v850/v850-c.c: ditto.
* config/vax/vax.c: ditto.
* config/vms/vms.c: ditto.
* config/vms/vms-c.c: ditto.
* config/vxworks.c: ditto.
* config/winnt-c.c: ditto.
* config/xtensa/xtensa.c: Include symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* convert.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* coverage.c: ditto.
* cp/call.c: ditto.
* cp/class.c: ditto.
* cp/constexpr.c: ditto.
* cp/cp-array-notation.c: ditto.
* cp/cp-gimplify.c: ditto.
* cp/cp-lang.c: ditto.
* cp/cp-objcp-common.c: ditto.
* cp/cvt.c: ditto.
* cp/decl2.c: ditto.
* cp/decl.c: ditto.
* cp/dump.c: ditto.
* cp/error.c: ditto.
* cp/except.c: ditto.
* cp/expr.c: ditto.
* cp/friend.c: ditto.
* cp/init.c: ditto.
* cp/lambda.c: ditto.
* cp/lex.c: ditto.
* cp/mangle.c: ditto.
* cp/name-lookup.c: ditto.
* cp/optimize.c: ditto.
* cp/parser.c: ditto.
* cp/pt.c: ditto.
* cp/ptree.c: ditto.
* cp/repo.c: ditto.
* cp/rtti.c: ditto.
* cp/search.c: ditto.
* cp/semantics.c: ditto.
* cp/tree.c: ditto.
* cp/typeck2.c: ditto.
* cp/typeck.c: ditto.
* cppbuiltin.c: ditto.
* cprop.c: ditto.
* cse.c: Add include of symtab.h due to flattening of tree.h.
* cselib.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* data-streamer.c: ditto.
* data-streamer-in.c: ditto.
* data-streamer-out.c: ditto.
* dbxout.c: ditto.
* dce.c: ditto.
* ddg.c: Add include of symtab.h due to flattening of tree.h.
* debug.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* dfp.c: ditto.
* df-scan.c: ditto.
* dojump.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* double-int.c: ditto.
* dse.c: ditto.
* dumpfile.c: ditto.
* dwarf2asm.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* dwarf2cfi.c: ditto.
* dwarf2out.c: ditto.
* emit-rtl.c: ditto.
* except.c: ditto.
* explow.c: ditto.
* expmed.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* expr.c: ditto.
* final.c: ditto.
* fixed-value.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and fixed-value.h due to flattening of tree.h.
* fold-const.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
Relocate inline function convert_to_ptrofftype_loc from tree.h.
Relocate inline function fold_build_pointer_plus_loc from tree.h.
Relocate inline function fold_build_pointer_plus_hwi_loc from tree.h.
* fold-const.h: Relocate macro convert_to_ptrofftype from tree.h.
Relocate macro fold_build_pointer_plus to relocate from tree.h.h.
Relocate macro fold_build_pointer_plus_hwi from tree.h.
Add prototype for convert_to_ptrofftype_loc relocated from tree.h.
Add prototype for fold_build_pointer_plus_loc relocated from tree.h.
Add prototype for fold_build_pointer_plus_hwi_loc relocated from tree.h.
* fortran/convert.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/cpp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/decl.c: ditto.
* fortran/f95.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/iresolve.c: ditto.
* fortran/match.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/module.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/options.c: ditto.
* fortran/target-memory.c: Include hash-set.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-array.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-common.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-const.c: ditto.
* fortran/trans-decl.c: ditto.
* fortran/trans-expr.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-intrinsic.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* fortran/trans-io.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* fortran/trans-openmp.c: ditto.
* fortran/trans-stmt.c: ditto.
* fortran/trans-types.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, inchash.h and real.h due to flattening of tree.h.
* function.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gcc-plugin.h: Include statistics.h, double-int.h, real.h, fixed-value.h,
alias.h, flags.h, and symtab.h due to flattening of tree.h
* gcse.c: ditto.
* generic-match-head.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ggc-page.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimple-builder.c: ditto.
* gimple.c: ditto.
* gimple-expr.c: ditto.
* gimple-fold.c: ditto.
* gimple-iterator.c: ditto.
* gimple-low.c: ditto.
* gimple-match-head.c: ditto.
* gimple-pretty-print.c: ditto.
* generic-ssa-isolate-paths.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimple-ssa-strength-reduction.c: ditto.
* gimple-streamer-in.c: ditto.
* gimple-streamer-out.c: ditto.
* gimple-walk.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimplify.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* gimplify-me.c: ditto.
* go/go-gcc.cc: ditto.
* go/go-lang.c: ditto.
* go/gdump.c: ditto.
* graphite-blocking.c: ditto.
* graphite.c: ditto.
* graphite-dependencies.c: ditto.
* graphite-interchange.c: ditto.
* graphite-isl-ast-to-gimple.c: ditto.
* graphite-optimize-isl.c: ditto.
* graphite-poly.c: ditto.
* graphite-scop-detection.c: ditto.
* graphite-sese-to-poly.c: ditto.
* hw-doloop.c: Include symtab.h due to flattening of tree.h.
* ifcvt.c: ditto.
* init-regs.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* internal-fc.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h,options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa.c: ditto.
* ipa-chkp.c: ditto.
* ipa-comdats.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-cp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h,options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-devirt.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-icf.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h,options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-icf-gimple.c: ditto.
* ipa-inline-analysis.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-inline.c: ditto.
* ipa-inline-transform.c: ditto.
* ipa-polymorhpic-call.c: ditto.
* ipa-profile.c: ditto.
* ipa-prop.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-pure-const.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-ref.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ipa-reference.c: ditto.
* ipa-split.c: ditto.
* ipa-utils.c: ditto.
* ipa-visbility.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* ira.c: ditto.
* ira-color.c: Include hash-set.h due to flattening of tree.h.
* ira-costs.c: ditto.
* ira-emit.c: ditto.
* java/boehm.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/builtins.c: ditto.
* java/class.c: ditto.
* java/constants.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/decl.c: ditto.
* java/except.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/expr.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h,inchash.h and real.h due to flattening of tree.h.
* java/gimplify.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/jcf-dump.c: ditto.
* java/jcf-io.c: ditto.
* java/jcf-parse.c: ditto.
* java/jvgenmain.c: ditto.
* java/lang.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/mangle.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* java/mangle_name.c: ditto.
* java/resource.c: ditto.
* java/typeck.c: ditto.
* java/verify-glue.c: ditto.
* java/verify-impl.c: ditto.
* jump.c: Include symtab.h due to flattening of tree.h.
* langhooks.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* loop-doloop.c: Include symtab.h due to flattening of tree.h.
* loop-init.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* loop-invariant.c: Include symtab.h due to flattening of tree.h.
* loop-iv.c: ditto.
* loop-unroll.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lower-subreg.c: ditto.
* lra-assigns.c: Include symtab.h due to flattening of tree.h.
* lra.c: Include symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* lra-coalesce.c: Include symtab.h due to flattening of tree.h.
* lra-constraints.c: ditto.
* lra-eliminations.c: ditto.
* lra-livesc: ditto.
* lra-remat.c: ditto.
* lra-spills.c: ditto.
* lto/lto.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto/lto-lang.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto/lto-object.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto/lto-partition.c: ditto.
* lto/lto-symtab.c: ditto.
* lto-cgraph.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto-compress.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto-opts.c: ditto.
* lto-section-in.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* lto-section-out.c: ditto.
* lto-streamer.c: ditto.
* lto-streamer-in.c: ditto.
* lto-streamer-out.c: ditto.
* modulo-sched.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* objc/objc-act.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options, fold-const.h,
wide-int.h, and inchash.h due to flattening of tree.h.
* objc/objc-encoding.c: ditto.
* objc/objc-gnu-runtime-abi-01.c: ditto.
* objc/objc-lang.c: ditto.
* objc/objc-map.c: ditto.
* objc/objc-next-runtime-abi-01.c: ditto.
* objc/objc-next-runtime-abi-02.c: ditto.
* objc/objc-runtime-shared-support.c: ditto.
* objcp/objcp-decl.c: ditto.
* objcp/objcp-lang.c: ditto.
* omega.c: ditto.
* omega-low.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* optabs.c: ditto.
* opts-global.c: ditto.
* passes.c: ditto.
* plugin.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* postreload.c: Include symtab.h due to flattening of tree.h.
* postreload-gcse.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* predict.c: ditto.
* print-rtl.c: ditto.
* print-tree.c: ditto.
* profile.c: Include symtab.h, fold-const.h
and inchash.h due to flattening of tree.h.
* real.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* realmpfr.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* recog.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* ree.c: ditto.
* reginfo.c: ditto.
* reg-stack.c: ditto.
* reload1.c: Include symtab.h, fold-const.h, wide-int.h
and inchash.h due to flattening of tree.h.
* reload.c: Include symtab.h due to flattening of tree.h.
* reorg.c: ditto.
* rtlanal.c: Include symtab.h, fold-const.h, wide-int.h
and inchash.h due to flattening of tree.h.
* rtl-chkp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* rtlhooks.c: Include symtab.h due to flattening of tree.h.
* sanopt.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* sched-deps.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* sched-vis.c: ditto.
* sdbout.c: ditto.
* sel-sched.c: Include symtab.h, fold-const.h, wide-int.h
and inchash.h due to flattening of tree.h.
* sel-sched-ir.c: ditto.
* sese.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* shrink-wrap.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* simplify-rtx.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* stack-ptr-mod.c: ditto.
* stmt.c: ditto.
* store-motion.c: ditto.
* store-layout.c: ditto.
* stringpool.c: ditto.
* symtab.c: ditto.
* target-globals.c: ditto.
* targhooks.c: ditto.
* toplev.c: ditto.
* tracer.c: ditto.
* trans-mem.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-affine.c: ditto.
* tree-browser.c: ditto.
* tree.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-call-cdce.c: Include symtab.h, alias.h, double-int.h,
fold-const.h, wide-int.h, inchash.h and real.h due to
flattening of tree.h.
* tree-cfg.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-cfgcleanup.c: ditto.
* tree-chkp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-chkp-opt.c: ditto.
* tree-chrec.c: ditto.
* tree-chkp-opt.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h and
real.h due to flattening of tree.h.
* tree-core.h: Flatten header file by removing all #include statements.
* tree-data-ref.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-dfa.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h and
real.h due to flattening of tree.h.
* tree-diagnostic.c: ditto.
* tree-dump.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h, real.h and
fixed-value.h due to flattening of tree.h.
* tree-dfa.c: ditto.
* tree-eh.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h and
real.h due to flattening of tree.h.
* tree-emutls.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree.h: Flatten header files by removing all includes except tree-core.h.
Remove inline function convert_to_ptrofftype_loc to relocate to fold-const.c.
Remove macro convert_to_ptrofftype to relocate to fold-const.h.
Remove inline function fold_build_pointer_plus_loc to relocate to fold-const.c.
Remove macro fold_build_pointer_plus to relocate to fold-const.h.
Remove inline function fold_build_pointer_plus_hwi_loc to relocate to fold-const.c.
Remove macro fold_build_pointer_plus_hwi to relocate to fold-const.h.
* tree-if-conv.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h, real.h and
fixed-value.h due to flattening of tree.h.
* tree-inline.c: ditto.
* tree-into-ssa.c: ditto.
* tree-iterator.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-loop-distribution.c: ditto.
* tree-nested.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-nrv.c: ditto.
* tree-object-size.c: ditto.
* tree-outof-ssa.c: ditto.
* tree-parloops.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-phinodes.c: ditto.
* tree-predcom.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-pretty-print.c: ditto.
* tree-profile.c: double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h and inchash.h due to flattening of tree.h.
* tree-scalar-evolution.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-sra.c: Include vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, and
inchash.h due to flattening of tree.h.
* tree-ssa-alias.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-ssa.c: ditto.
* tree-ssa-ccp.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h
and real.h due to flattening of tree.h.
* tree-ssa-coalesce.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-ssa-copy.c: ditto.
* tree-ssa-copyrename.c: ditto.
* tree-ssa-dce.c: ditto.
* tree-ssa-dom.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h, inchash.h
and real.h due to flattening of tree.h.
* tree-ssa-dse.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-ssa-forwprop.c: ditto.
* tree-ssa-ifcombine.c: ditto.
* tree-ssa-live.c: ditto.
* tree-ssa-loop.c: ditto.
* tree-ssa-loop-ch.c: ditto.
* tree-ssa-loop-im.c: ditto.
* tree-ssa-loop-ivcanon.c: ditto.
* tree-ssa-loop-ivopts.c: ditto.
* tree-ssa-loop-manip.c: ditto.
* tree-ssa-loop-niter.c: ditto.
* tree-ssa-loop-prefetch.c: ditto.
* tree-ssa-loop-unswitch.c: ditto.
* tree-ssa-loop-math-opts.c: ditto.
* tree-ssanames.c: ditto.
* tree-ssa-operands.c: ditto.
* tree-ssa-phiopt.c: ditto.
* tree-ssa-phiprop.c: ditto.
* tree-ssa-pre.c: ditto.
* tree-ssa-propagate.c: ditto.
* tree-ssa-reassoc.c: ditto.
* tree-ssa-sccvn.c: ditto.
* tree-ssa-sink.c: ditto.
* tree-ssa-strlen.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-structalias.c: double-int.h, input.h, alias.h, symtab.h,
fold-const.h, wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-tail-merge.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-ter.c: ditto.
* tree-ssa-threadedge.c: ditto.
* tree-ssa-threadupdate.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-uncprop.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, fold-const.h,
wide-int.h and inchash.h due to flattening of tree.h.
* tree-ssa-uninit.c: ditto.
* tree-stdarg.c: Include vec.h, double-int.h, input.h, alias.h,
symtab.h, fold-const.h, wide-int.h and inchash.h due to flattening
of tree.h.
* tree-streamer.c: Include vec.h, double-int.h, input.h, alias.h,
symtab.h, options.h, fold-const.h, wide-int.h and
inchash.h due to flattening of tree.h.
* tree-streamer-in.c: Include hash-set.h, machmode.h, vec.h,
double-int.h, input.h, alias.h, symtab.h, options.h, fold-const.h,
wide-int.h, inchash.h, real.h and fixed-value.h due to flattening
of tree.h.
* tree-streamer-out.c: dittoo.
* tree-switch-conversion.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-tailcall.c: ditto.
* tree-vect-data-refs.c: ditto.
* tree-vect-generic.c: Include hash-set.h, machmode.h, vec.h, double-int.h, input.h,
alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-vect-loop.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* tree-vect-loop-manip.c: ditto.
* tree-vectorizer.c: ditto.
* tree-vect-patterns.c: ditto.
* tree-vect-slp.c: ditto.
* tree-vect-stmts.c: ditto.
* tree-vrp.c: ditto.
* tsan.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* ubsan.c: ditto.
* value-prof.c.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* varasm.c: ditto.
* varpool.c: ditto.
* var-tracking.c: ditto.
* vmsdbgout.c: ditto.
* vtable-verify.c: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* wide-int.cc: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
* xcoffout.c: ditto.
* libcc1/plugin.cc: Include hash-set.h, machmode.h, vec.h, double-int.h,
input.h, alias.h, symtab.h, options.h, fold-const.h, wide-int.h and inchash.h
due to flattening of tree.h.
From-SVN: r219402
2015-01-09 21:18:42 +01:00
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#include "fold-const.h"
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2013-11-19 13:31:09 +01:00
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#include "varasm.h"
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#include "stor-layout.h"
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#include "stringpool.h"
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#include "calls.h"
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2013-10-01 19:03:46 +02:00
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#include "rtl.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "real.h"
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#include "insn-config.h"
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#include "conditions.h"
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#include "insn-flags.h"
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function.h: Flatten file.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* function.h: Flatten file. Remove includes, adjust prototypes to
reflect only what is in function.h.
(enum direction, struct args_size, struct locate_and_pad_arg_data,
ADD_PARM_SIZE, SUB_PARM_SIZE, ARGS_SIZE_TREE, ARGS_SIZE_RTX): Relocate
from expr.h.
(ASLK_REDUCE_ALIGN, ASLK_RECORD_PAD): Relocate from rtl.h.
(optimize_function_for_size_p, optimize_function_for_speed_p): Move
prototypes to predict.h.
(init_varasm_status): Move prototype to varasm.h.
* expr.h: Adjust include files.
(enum direction, struct args_size, struct locate_and_pad_arg_data,
ADD_PARM_SIZE, SUB_PARM_SIZE, ARGS_SIZE_TREE, ARGS_SIZE_RTX): Move
to function.h.
(locate_and_pad_parm): Move prototype to function.h.
* rtl.h: (assign_stack_local, ASLK_REDUCE_ALIGN, ASLK_RECORD_PAD,
assign_stack_local_1, assign_stack_temp, assign_stack_temp_for_type,
assign_temp, reposition_prologue_and_epilogue_notes,
prologue_epilogue_contains, sibcall_epilogue_contains,
update_temp_slot_address, maybe_copy_prologue_epilogue_insn,
set_return_jump_label): Move prototypes to function.h.
* predict.h (optimize_function_for_size_p,
optimize_function_for_speed_p): Relocate prototypes from function.h.
* shrink-wrap.h (emit_return_into_block, active_insn_between,
convert_jumps_to_returns, emit_return_for_exit): Move prototypes to
function.h.
* varasm.h (init_varasm_status): Relocate prototype from function.h.
* genattrtab.c (write_header): Add predict.h to include list.
* genconditions.c (write_header): Add predict.h to include list.
* genemit.c (main): Adjust header file includes.
* gengtype.c (ifiles): Add flattened function.h header files.
* genoutput.c (output_prologue): Add predict.h to include list.
* genpreds.c (write_insn_preds_c): Adjust header file includes.
* genrecog.c (write_header): Add flattened function.h header files.
* alias.c: Adjust include files.
* auto-inc-dec.c: Likewise.
* basic-block.h: Likewise.
* bb-reorder.c: Likewise.
* bt-load.c: Likewise.
* builtins.c: Likewise.
* caller-save.c: Likewise.
* calls.c: Likewise.
* cfgbuild.c: Likewise.
* cfgcleanup.c: Likewise.
* cfgexpand.c: Likewise.
* cfgloop.c: Likewise.
* cfgloop.h: Likewise.
* cfgrtl.c: Likewise.
* cgraph.h: Likewise.
* cgraphclones.c: Likewise.
* cgraphunit.c: Likewise.
* combine-stack-adj.c: Likewise.
* combine.c: Likewise.
* coverage.c: Likewise.
* cprop.c: Likewise.
* cse.c: Likewise.
* cselib.c: Likewise.
* dbxout.c: Likewise.
* ddg.c: Likewise.
* df-core.c: Likewise.
* df-problems.c: Likewise.
* df-scan.c: Likewise.
* dojump.c: Likewise.
* dwarf2cfi.c: Likewise.
* dwarf2out.c: Likewise.
* emit-rtl.c: Likewise.
* except.c: Likewise.
* explow.c: Likewise.
* expr.c: Likewise.
* final.c: Likewise.
* function.c: Likewise.
* gcse.c: Likewise.
* gimple-fold.c: Likewise.
* gimple-low.c: Likewise.
* gimple-streamer.h: Likewise.
* haifa-sched.c: Likewise.
* ifcvt.c: Likewise.
* ira.c: Likewise.
* jump.c: Likewise.
* lcm.c: Likewise.
* loop-invariant.c: Likewise.
* lra-assigns.c: Likewise.
* lra-coalesce.c: Likewise.
* lra-constraints.c: Likewise.
* lra-eliminations.c: Likewise.
* lra-lives.c: Likewise.
* lra-spills.c: Likewise.
* lra.c: Likewise.
* lto-cgraph.c: Likewise.
* lto-section-in.c: Likewise.
* lto-section-out.c: Likewise.
* lto-streamer-in.c: Likewise.
* lto-streamer-out.c: Likewise.
* mode-switching.c: Likewise.
* modulo-sched.c: Likewise.
* omp-low.c: Likewise.
* optabs.c: Likewise.
* passes.c: Likewise.
* postreload-gcse.c: Likewise.
* postreload.c: Likewise.
* predict.c: Likewise.
* profile.c: Likewise.
* recog.c: Likewise.
* ree.c: Likewise.
* reg-stack.c: Likewise.
* regcprop.c: Likewise.
* reginfo.c: Likewise.
* regrename.c: Likewise.
* reload.c: Likewise.
* reload1.c: Likewise.
* reorg.c: Likewise.
* resource.c: Likewise.
* rtlanal.c: Likewise.
* sched-deps.c: Likewise.
* sched-ebb.c: Likewise.
* sched-rgn.c: Likewise.
* sel-sched-dump.c: Likewise.
* sel-sched-ir.c: Likewise.
* sel-sched.c: Likewise.
* shrink-wrap.c: Likewise.
* simplify-rtx.c: Likewise.
* statistics.c: Likewise.
* stmt.c: Likewise.
* stor-layout.c: Likewise.
* store-motion.c: Likewise.
* symtab.c: Likewise.
* targhooks.c: Likewise.
* toplev.c: Likewise.
* trans-mem.c: Likewise.
* tree-cfg.c: Likewise.
* tree-cfgcleanup.c: Likewise.
* tree-dfa.c: Likewise.
* tree-eh.c: Likewise.
* tree-inline.c: Likewise.
* tree-into-ssa.c: Likewise.
* tree-nested.c: Likewise.
* tree-nrv.c: Likewise.
* tree-profile.c: Likewise.
* tree-ssa-alias.c: Likewise.
* tree-ssa-ccp.c: Likewise.
* tree-ssa-copy.c: Likewise.
* tree-ssa-copyrename.c: Likewise.
* tree-ssa-dom.c: Likewise.
* tree-ssa-operands.c: Likewise.
* tree-ssa-propagate.c: Likewise.
* tree-ssa-structalias.c: Likewise.
* tree-ssa-tail-merge.c: Likewise.
* tree-ssa-threadedge.c: Likewise.
* tree-ssa-threadupdate.c: Likewise.
* tree-ssa-uncprop.c: Likewise.
* tree-ssa-uninit.c: Likewise.
* tree-ssa.c: Likewise.
* tree-stdarg.c: Likewise.
* tree-tailcall.c: Likewise.
* tree.c: Likewise.
* tsan.c: Likewise.
* valtrack.c: Likewise.
* varasm.c: Likewise.
* vmsdbgout.c: Likewise.
* web.c: Likewise.
* testsuite/g++.dg/plugin/pragma_plugin.c: Adjust include files.
* config/aarch64/aarch64.c: Add flattened includes from function.h.
* config/alpha/alpha.c: Likewise.
* config/arc/arc.c: Likewise.
* config/arm/arm.c: Likewise.
* config/avr/avr-log.c: Likewise.
* config/avr/avr.c: Likewise.
* config/bfin/bfin.c: Likewise.
* config/c6x/c6x.c: Likewise.
* config/cr16/cr16.c: Likewise.
* config/cris/cris.c: Likewise.
* config/darwin.c: Likewise.
* config/epiphany/epiphany.c: Likewise.
* config/epiphany/mode-switch-use.c: Likewise.
* config/epiphany/resolve-sw-modes.c: Likewise.
* config/fr30/fr30.c: Likewise.
* config/frv/frv.c: Likewise.
* config/h8300/h8300.c: Likewise.
* config/i386/i386.c: Likewise.
* config/ia64/ia64.c: Likewise.
* config/iq2000/iq2000.c: Likewise.
* config/lm32/lm32.c: Likewise.
* config/m32c/m32c.c: Likewise.
* config/m32r/m32r.c: Likewise.
* config/m68k/m68k.c: Likewise.
* config/mcore/mcore.c: Likewise.
* config/mep/mep-pragma.c: Likewise.
* config/mep/mep.c: Likewise.
* config/microblaze/microblaze.c: Likewise.
* config/mips/mips.c: Likewise.
* config/mmix/mmix.c: Likewise.
* config/mn10300/mn10300.c: Likewise.
* config/moxie/moxie.c: Likewise.
* config/msp430/msp430.c: Likewise.
* config/nds32/nds32-cost.c: Likewise.
* config/nds32/nds32-fp-as-gp.c: Likewise.
* config/nds32/nds32-intrinsic.c: Likewise.
* config/nds32/nds32-isr.c: Likewise.
* config/nds32/nds32-md-auxiliary.c: Likewise.
* config/nds32/nds32-memory-manipulation.c: Likewise.
* config/nds32/nds32-pipelines-auxiliary.c: Likewise.
* config/nds32/nds32-predicates.c: Likewise.
* config/nds32/nds32.c: Likewise.
* config/nios2/nios2.c: Likewise.
* config/pa/pa.c: Likewise.
* config/pdp11/pdp11.c: Likewise.
* config/rl78/rl78.c: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/rx/rx.c: Likewise.
* config/s390/s390.c: Likewise.
* config/score/score.c: Likewise.
* config/sh/sh.c: Likewise.
* config/sparc/sparc.c: Likewise.
* config/spu/spu.c: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/tilegx/tilegx.c: Likewise.
* config/tilepro/tilepro.c: Likewise.
* config/v850/v850.c: Likewise.
* config/vax/vax.c: Likewise.
* config/xtensa/xtensa.c: Likewise.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* ada/gcc-interface/misc.c: Adjust include files.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* c/c-decl.c: Adjust include files.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* c-family/c-pragma.c: Adjust include files.
* c-family/c-semantics.c: Likewise.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* cp/cp-tree.h: Adjust include files.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* fortran/f95-lang.c: Adjust include files.
* fortran/trans-decl.c: Likewise.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* java/class.c: Adjust include files.
* java/resource.c: Likewise.
2014-10-16 Andrew MacLeod <amacleod@redhat.com>
* objc/objc-act.c: Adjust include files.
From-SVN: r216337
2014-10-16 18:37:19 +02:00
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#include "hashtab.h"
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#include "hash-set.h"
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#include "vec.h"
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#include "machmode.h"
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#include "input.h"
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2013-10-01 19:03:46 +02:00
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#include "function.h"
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#include "toplev.h"
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#include "ggc.h"
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#include "tm_p.h"
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#include "target.h"
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#include "output.h"
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#include "insn-attr.h"
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#include "flags.h"
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#include "expr.h"
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#include "recog.h"
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#include "debug.h"
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#include "diagnostic.h"
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#include "insn-codes.h"
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#include "langhooks.h"
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#include "optabs.h"
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#include "tm-constrs.h"
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#include "reload.h" /* For operands_match_p */
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2014-10-27 13:41:01 +01:00
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#include "dominance.h"
|
|
|
|
|
#include "cfg.h"
|
|
|
|
|
#include "cfgrtl.h"
|
|
|
|
|
#include "cfganal.h"
|
|
|
|
|
#include "lcm.h"
|
|
|
|
|
#include "cfgbuild.h"
|
|
|
|
|
#include "cfgcleanup.h"
|
|
|
|
|
#include "predict.h"
|
|
|
|
|
#include "basic-block.h"
|
2013-10-01 19:03:46 +02:00
|
|
|
|
#include "df.h"
|
|
|
|
|
#include "tree-pass.h"
|
|
|
|
|
#include "context.h"
|
|
|
|
|
#include "pass_manager.h"
|
2014-05-06 18:25:05 +02:00
|
|
|
|
#include "wide-int.h"
|
expr.h: Remove prototypes of functions defined in builtins.c.
* expr.h: Remove prototypes of functions defined in builtins.c.
* tree.h: (build_call_expr_*, build_string_literal): Add prototypes.
Remove prototypes of functions defined in builtins.c.
* builtins.h: Update prototype list to include all exported functions.
* builtins.c: (default_libc_has_function, gnu_libc_has_function,
no_c99_libc_has_function): Move to targhooks.c
(build_string_literal, build_call_expr_loc_array,
build_call_expr_loc_vec, build_call_expr_loc, build_call_expr): Move
to tree.c.
(expand_builtin_object_size, fold_builtin_object_size): Make static.
* targhooks.c (default_libc_has_function, gnu_libc_has_function,
no_c99_libc_has_function): Relocate from builtins.c.
* tree.c: Include builtins.h.
(build_call_expr_loc_array, build_call_expr_loc_vec,
build_call_expr_loc, build_call_expr, build_string_literal): Relocate
from builtins.c.
* fold-const.h (fold_fma): Move prototype to builtins.h.
* realmpfr.h (do_mpc_arg2): Move prototype to builtins.h.
* fortran/trans.c (trans_runtime_error_vararg): Call
fold_build_call_array_loc instead of fold_builtin_call_array.
* asan.c: Include builtins.h.
* cfgexpand.c: Likewise.
* convert.c: Likewise.
* emit-rtl.c: Likewise.
* except.c: Likewise.
* expr.c: Likewise.
* fold-const.c: Likewise.
* gimple-fold.c: Likewise.
* gimple-ssa-strength-reduction.c: Likewise.
* gimplify.c: Likewise.
* ipa-inline.c: Likewise.
* ipa-prop.c: Likewise.
* lto-streamer-out.c: Likewise.
* stmt.c: Likewise.
* tree-inline.c: Likewise.
* tree-object-size.c: Likewise.
* tree-sra.c: Likewise.
* tree-ssa-ccp.c: Likewise.
* tree-ssa-forwprop.c: Likewise.
* tree-ssa-loop-ivcanon.c: Likewise.
* tree-ssa-loop-ivopts.c: Likewise.
* tree-ssa-math-opts.c: Likewise.
* tree-ssa-reassoc.c: Likewise.
* tree-ssa-threadedge.c: Likewise.
* tree-streamer-in.c: Likewise.
* tree-vect-data-refs.c: Likewise.
* tree-vect-patterns.c: Likewise.
* tree-vect-stmts.c: Likewise.
c
* c-decl.c: Include builtins.h.
* c-parser.c: Likewise.
cp
* decl.c: Include builtins.h.
* semantics.c: Likewise.
go
* go-gcc.cc: Include builtins.h.
lto
* lto-symtab.c: Include builtins.h.
config
* aarch64/aarch64.c: Include builtins.h.
* alpha/alpha.c: Likewise.
* arc/arc.c: Likewise.
* arm/arm.c: Likewise.
* avr/avr.c: Likewise.
* bfin/bfin.c: Likewise.
* c6x/c6x.c: Likewise.
* cr16/cr16.c: Likewise.
* cris/cris.c: Likewise.
* epiphany/epiphany.c: Likewise.
* fr30/fr30.c: Likewise.
* frv/frv.c: Likewise.
* h8300/h8300.c: Likewise.
* i386/i386.c: Likewise.
* i386/winnt.c: Likewise.
* ia64/ia64.c: Likewise.
* iq2000/iq2000.c: Likewise.
* lm32/lm32.c: Likewise.
* m32c/m32c.c: Likewise.
* m32r/m32r.c: Likewise.
* m68k/m68k.c: Likewise.
* mcore/mcore.c: Likewise.
* mep/mep.c: Likewise.
* microblaze/microblaze.c: Likewise.
* mips/mips.c: Likewise.
* mmix/mmix.c: Likewise.
* mn10300/mn10300.c: Likewise.
* moxie/moxie.c: Likewise.
* msp430/msp430.c: Likewise.
* nds32/nds32.c: Likewise.
* pa/pa.c: Likewise.
* pdp11/pdp11.c: Likewise.
* picochip/picochip.c: Likewise.
* rl78/rl78.c: Likewise.
* rs6000/rs6000.c: Likewise.
* rx/rx.c: Likewise.
* s390/s390.c: Likewise.
* score/score.c: Likewise.
* sh/sh.c: Likewise.
* sparc/sparc.c: Likewise.
* spu/spu.c: Likewise.
* stormy16/stormy16.c: Likewise.
* tilegx/tilegx.c: Likewise.
* tilepro/tilepro.c: Likewise.
* v850/v850.c: Likewise.
* vax/vax.c: Likewise.
* xtensa/xtensa.c: Likewise.
From-SVN: r211145
2014-06-02 22:13:44 +02:00
|
|
|
|
#include "builtins.h"
|
2014-11-02 21:00:05 +01:00
|
|
|
|
#include "rtl-iter.h"
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
/* Which cpu we're compiling for (A5, ARC600, ARC601, ARC700). */
|
|
|
|
|
static const char *arc_cpu_string = "";
|
|
|
|
|
|
|
|
|
|
/* ??? Loads can handle any constant, stores can only handle small ones. */
|
|
|
|
|
/* OTOH, LIMMs cost extra, so their usefulness is limited. */
|
|
|
|
|
#define RTX_OK_FOR_OFFSET_P(MODE, X) \
|
|
|
|
|
(GET_CODE (X) == CONST_INT \
|
|
|
|
|
&& SMALL_INT_RANGE (INTVAL (X), (GET_MODE_SIZE (MODE) - 1) & -4, \
|
|
|
|
|
(INTVAL (X) & (GET_MODE_SIZE (MODE) - 1) & 3 \
|
|
|
|
|
? 0 \
|
|
|
|
|
: -(-GET_MODE_SIZE (MODE) | -4) >> 1)))
|
|
|
|
|
|
|
|
|
|
#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X, INDEX, STRICT) \
|
|
|
|
|
(GET_CODE (X) == PLUS \
|
|
|
|
|
&& RTX_OK_FOR_BASE_P (XEXP (X, 0), (STRICT)) \
|
|
|
|
|
&& ((INDEX && RTX_OK_FOR_INDEX_P (XEXP (X, 1), (STRICT)) \
|
|
|
|
|
&& GET_MODE_SIZE ((MODE)) <= 4) \
|
|
|
|
|
|| RTX_OK_FOR_OFFSET_P (MODE, XEXP (X, 1))))
|
|
|
|
|
|
|
|
|
|
#define LEGITIMATE_SCALED_ADDRESS_P(MODE, X, STRICT) \
|
|
|
|
|
(GET_CODE (X) == PLUS \
|
|
|
|
|
&& GET_CODE (XEXP (X, 0)) == MULT \
|
|
|
|
|
&& RTX_OK_FOR_INDEX_P (XEXP (XEXP (X, 0), 0), (STRICT)) \
|
|
|
|
|
&& GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
|
|
|
|
|
&& ((GET_MODE_SIZE (MODE) == 2 && INTVAL (XEXP (XEXP (X, 0), 1)) == 2) \
|
|
|
|
|
|| (GET_MODE_SIZE (MODE) == 4 && INTVAL (XEXP (XEXP (X, 0), 1)) == 4)) \
|
|
|
|
|
&& (RTX_OK_FOR_BASE_P (XEXP (X, 1), (STRICT)) \
|
|
|
|
|
|| (flag_pic ? CONST_INT_P (XEXP (X, 1)) : CONSTANT_P (XEXP (X, 1)))))
|
|
|
|
|
|
|
|
|
|
#define LEGITIMATE_SMALL_DATA_ADDRESS_P(X) \
|
|
|
|
|
(GET_CODE (X) == PLUS \
|
|
|
|
|
&& (REG_P (XEXP ((X), 0)) && REGNO (XEXP ((X), 0)) == SDATA_BASE_REGNUM) \
|
|
|
|
|
&& ((GET_CODE (XEXP((X),1)) == SYMBOL_REF \
|
|
|
|
|
&& SYMBOL_REF_SMALL_P (XEXP ((X), 1))) \
|
|
|
|
|
|| (GET_CODE (XEXP ((X), 1)) == CONST \
|
|
|
|
|
&& GET_CODE (XEXP (XEXP ((X), 1), 0)) == PLUS \
|
|
|
|
|
&& GET_CODE (XEXP (XEXP (XEXP ((X), 1), 0), 0)) == SYMBOL_REF \
|
|
|
|
|
&& SYMBOL_REF_SMALL_P (XEXP (XEXP (XEXP ((X), 1), 0), 0)) \
|
|
|
|
|
&& GET_CODE (XEXP(XEXP (XEXP ((X), 1), 0), 1)) == CONST_INT)))
|
|
|
|
|
|
|
|
|
|
/* Array of valid operand punctuation characters. */
|
|
|
|
|
char arc_punct_chars[256];
|
|
|
|
|
|
|
|
|
|
/* State used by arc_ccfsm_advance to implement conditional execution. */
|
|
|
|
|
struct GTY (()) arc_ccfsm
|
|
|
|
|
{
|
|
|
|
|
int state;
|
|
|
|
|
int cc;
|
|
|
|
|
rtx cond;
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *target_insn;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int target_label;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#define arc_ccfsm_current cfun->machine->ccfsm_current
|
|
|
|
|
|
|
|
|
|
#define ARC_CCFSM_BRANCH_DELETED_P(STATE) \
|
|
|
|
|
((STATE)->state == 1 || (STATE)->state == 2)
|
|
|
|
|
|
|
|
|
|
/* Indicate we're conditionalizing insns now. */
|
|
|
|
|
#define ARC_CCFSM_RECORD_BRANCH_DELETED(STATE) \
|
|
|
|
|
((STATE)->state += 2)
|
|
|
|
|
|
|
|
|
|
#define ARC_CCFSM_COND_EXEC_P(STATE) \
|
|
|
|
|
((STATE)->state == 3 || (STATE)->state == 4 || (STATE)->state == 5 \
|
|
|
|
|
|| current_insn_predicate)
|
|
|
|
|
|
|
|
|
|
/* Check if INSN has a 16 bit opcode considering struct arc_ccfsm *STATE. */
|
|
|
|
|
#define CCFSM_ISCOMPACT(INSN,STATE) \
|
|
|
|
|
(ARC_CCFSM_COND_EXEC_P (STATE) \
|
|
|
|
|
? (get_attr_iscompact (INSN) == ISCOMPACT_TRUE \
|
|
|
|
|
|| get_attr_iscompact (INSN) == ISCOMPACT_TRUE_LIMM) \
|
|
|
|
|
: get_attr_iscompact (INSN) != ISCOMPACT_FALSE)
|
|
|
|
|
|
|
|
|
|
/* Likewise, but also consider that INSN might be in a delay slot of JUMP. */
|
|
|
|
|
#define CCFSM_DBR_ISCOMPACT(INSN,JUMP,STATE) \
|
|
|
|
|
((ARC_CCFSM_COND_EXEC_P (STATE) \
|
|
|
|
|
|| (JUMP_P (JUMP) \
|
|
|
|
|
&& INSN_ANNULLED_BRANCH_P (JUMP) \
|
|
|
|
|
&& (TARGET_AT_DBR_CONDEXEC || INSN_FROM_TARGET_P (INSN)))) \
|
|
|
|
|
? (get_attr_iscompact (INSN) == ISCOMPACT_TRUE \
|
|
|
|
|
|| get_attr_iscompact (INSN) == ISCOMPACT_TRUE_LIMM) \
|
|
|
|
|
: get_attr_iscompact (INSN) != ISCOMPACT_FALSE)
|
|
|
|
|
|
|
|
|
|
/* The maximum number of insns skipped which will be conditionalised if
|
|
|
|
|
possible. */
|
|
|
|
|
/* When optimizing for speed:
|
|
|
|
|
Let p be the probability that the potentially skipped insns need to
|
|
|
|
|
be executed, pn the cost of a correctly predicted non-taken branch,
|
|
|
|
|
mt the cost of a mis/non-predicted taken branch,
|
|
|
|
|
mn mispredicted non-taken, pt correctly predicted taken ;
|
|
|
|
|
costs expressed in numbers of instructions like the ones considered
|
|
|
|
|
skipping.
|
|
|
|
|
Unfortunately we don't have a measure of predictability - this
|
|
|
|
|
is linked to probability only in that in the no-eviction-scenario
|
|
|
|
|
there is a lower bound 1 - 2 * min (p, 1-p), and a somewhat larger
|
|
|
|
|
value that can be assumed *if* the distribution is perfectly random.
|
|
|
|
|
A predictability of 1 is perfectly plausible not matter what p is,
|
|
|
|
|
because the decision could be dependent on an invocation parameter
|
|
|
|
|
of the program.
|
|
|
|
|
For large p, we want MAX_INSNS_SKIPPED == pn/(1-p) + mt - pn
|
|
|
|
|
For small p, we want MAX_INSNS_SKIPPED == pt
|
|
|
|
|
|
|
|
|
|
When optimizing for size:
|
|
|
|
|
We want to skip insn unless we could use 16 opcodes for the
|
|
|
|
|
non-conditionalized insn to balance the branch length or more.
|
|
|
|
|
Performance can be tie-breaker. */
|
|
|
|
|
/* If the potentially-skipped insns are likely to be executed, we'll
|
|
|
|
|
generally save one non-taken branch
|
|
|
|
|
o
|
|
|
|
|
this to be no less than the 1/p */
|
|
|
|
|
#define MAX_INSNS_SKIPPED 3
|
|
|
|
|
|
|
|
|
|
/* The values of unspec's first field. */
|
|
|
|
|
enum {
|
|
|
|
|
ARC_UNSPEC_PLT = 3,
|
|
|
|
|
ARC_UNSPEC_GOT,
|
|
|
|
|
ARC_UNSPEC_GOTOFF
|
|
|
|
|
} ;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
enum arc_builtins {
|
|
|
|
|
ARC_BUILTIN_NOP = 2,
|
|
|
|
|
ARC_BUILTIN_NORM = 3,
|
|
|
|
|
ARC_BUILTIN_NORMW = 4,
|
|
|
|
|
ARC_BUILTIN_SWAP = 5,
|
|
|
|
|
ARC_BUILTIN_BRK = 6,
|
|
|
|
|
ARC_BUILTIN_DIVAW = 7,
|
|
|
|
|
ARC_BUILTIN_EX = 8,
|
|
|
|
|
ARC_BUILTIN_MUL64 = 9,
|
|
|
|
|
ARC_BUILTIN_MULU64 = 10,
|
|
|
|
|
ARC_BUILTIN_RTIE = 11,
|
|
|
|
|
ARC_BUILTIN_SYNC = 12,
|
|
|
|
|
ARC_BUILTIN_CORE_READ = 13,
|
|
|
|
|
ARC_BUILTIN_CORE_WRITE = 14,
|
|
|
|
|
ARC_BUILTIN_FLAG = 15,
|
|
|
|
|
ARC_BUILTIN_LR = 16,
|
|
|
|
|
ARC_BUILTIN_SR = 17,
|
|
|
|
|
ARC_BUILTIN_SLEEP = 18,
|
|
|
|
|
ARC_BUILTIN_SWI = 19,
|
|
|
|
|
ARC_BUILTIN_TRAP_S = 20,
|
|
|
|
|
ARC_BUILTIN_UNIMP_S = 21,
|
|
|
|
|
ARC_BUILTIN_ALIGNED = 22,
|
|
|
|
|
|
|
|
|
|
/* Sentinel to mark start of simd builtins. */
|
|
|
|
|
ARC_SIMD_BUILTIN_BEGIN = 1000,
|
|
|
|
|
|
|
|
|
|
ARC_SIMD_BUILTIN_VADDAW = 1001,
|
|
|
|
|
ARC_SIMD_BUILTIN_VADDW = 1002,
|
|
|
|
|
ARC_SIMD_BUILTIN_VAVB = 1003,
|
|
|
|
|
ARC_SIMD_BUILTIN_VAVRB = 1004,
|
|
|
|
|
ARC_SIMD_BUILTIN_VDIFAW = 1005,
|
|
|
|
|
ARC_SIMD_BUILTIN_VDIFW = 1006,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMAXAW = 1007,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMAXW = 1008,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMINAW = 1009,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMINW = 1010,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMULAW = 1011,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMULFAW = 1012,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMULFW = 1013,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMULW = 1014,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSUBAW = 1015,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSUBW = 1016,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSUMMW = 1017,
|
|
|
|
|
ARC_SIMD_BUILTIN_VAND = 1018,
|
|
|
|
|
ARC_SIMD_BUILTIN_VANDAW = 1019,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBIC = 1020,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBICAW = 1021,
|
|
|
|
|
ARC_SIMD_BUILTIN_VOR = 1022,
|
|
|
|
|
ARC_SIMD_BUILTIN_VXOR = 1023,
|
|
|
|
|
ARC_SIMD_BUILTIN_VXORAW = 1024,
|
|
|
|
|
ARC_SIMD_BUILTIN_VEQW = 1025,
|
|
|
|
|
ARC_SIMD_BUILTIN_VLEW = 1026,
|
|
|
|
|
ARC_SIMD_BUILTIN_VLTW = 1027,
|
|
|
|
|
ARC_SIMD_BUILTIN_VNEW = 1028,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR1AW = 1029,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR1W = 1030,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR2AW = 1031,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR2W = 1032,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR3AW = 1033,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR3W = 1034,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR4AW = 1035,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR4W = 1036,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR5AW = 1037,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR5W = 1038,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR6AW = 1039,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR6W = 1040,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR7AW = 1041,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMR7W = 1042,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMRB = 1043,
|
|
|
|
|
ARC_SIMD_BUILTIN_VH264F = 1044,
|
|
|
|
|
ARC_SIMD_BUILTIN_VH264FT = 1045,
|
|
|
|
|
ARC_SIMD_BUILTIN_VH264FW = 1046,
|
|
|
|
|
ARC_SIMD_BUILTIN_VVC1F = 1047,
|
|
|
|
|
ARC_SIMD_BUILTIN_VVC1FT = 1048,
|
|
|
|
|
|
|
|
|
|
/* Va, Vb, rlimm instructions. */
|
|
|
|
|
ARC_SIMD_BUILTIN_VBADDW = 1050,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBMAXW = 1051,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBMINW = 1052,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBMULAW = 1053,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBMULFW = 1054,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBMULW = 1055,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBRSUBW = 1056,
|
|
|
|
|
ARC_SIMD_BUILTIN_VBSUBW = 1057,
|
|
|
|
|
|
|
|
|
|
/* Va, Vb, Ic instructions. */
|
|
|
|
|
ARC_SIMD_BUILTIN_VASRW = 1060,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSR8 = 1061,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSR8AW = 1062,
|
|
|
|
|
|
|
|
|
|
/* Va, Vb, u6 instructions. */
|
|
|
|
|
ARC_SIMD_BUILTIN_VASRRWi = 1065,
|
|
|
|
|
ARC_SIMD_BUILTIN_VASRSRWi = 1066,
|
|
|
|
|
ARC_SIMD_BUILTIN_VASRWi = 1067,
|
|
|
|
|
ARC_SIMD_BUILTIN_VASRPWBi = 1068,
|
|
|
|
|
ARC_SIMD_BUILTIN_VASRRPWBi = 1069,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSR8AWi = 1070,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSR8i = 1071,
|
|
|
|
|
|
|
|
|
|
/* Va, Vb, u8 (simm) instructions. */
|
|
|
|
|
ARC_SIMD_BUILTIN_VMVAW = 1075,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMVW = 1076,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMVZW = 1077,
|
|
|
|
|
ARC_SIMD_BUILTIN_VD6TAPF = 1078,
|
|
|
|
|
|
|
|
|
|
/* Va, rlimm, u8 (simm) instructions. */
|
|
|
|
|
ARC_SIMD_BUILTIN_VMOVAW = 1080,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMOVW = 1081,
|
|
|
|
|
ARC_SIMD_BUILTIN_VMOVZW = 1082,
|
|
|
|
|
|
|
|
|
|
/* Va, Vb instructions. */
|
|
|
|
|
ARC_SIMD_BUILTIN_VABSAW = 1085,
|
|
|
|
|
ARC_SIMD_BUILTIN_VABSW = 1086,
|
|
|
|
|
ARC_SIMD_BUILTIN_VADDSUW = 1087,
|
|
|
|
|
ARC_SIMD_BUILTIN_VSIGNW = 1088,
|
|
|
|
|
ARC_SIMD_BUILTIN_VEXCH1 = 1089,
|
|
|
|
|
ARC_SIMD_BUILTIN_VEXCH2 = 1090,
|
|
|
|
|
ARC_SIMD_BUILTIN_VEXCH4 = 1091,
|
|
|
|
|
ARC_SIMD_BUILTIN_VUPBAW = 1092,
|
|
|
|
|
ARC_SIMD_BUILTIN_VUPBW = 1093,
|
|
|
|
|
ARC_SIMD_BUILTIN_VUPSBAW = 1094,
|
|
|
|
|
ARC_SIMD_BUILTIN_VUPSBW = 1095,
|
|
|
|
|
|
|
|
|
|
ARC_SIMD_BUILTIN_VDIRUN = 1100,
|
|
|
|
|
ARC_SIMD_BUILTIN_VDORUN = 1101,
|
|
|
|
|
ARC_SIMD_BUILTIN_VDIWR = 1102,
|
|
|
|
|
ARC_SIMD_BUILTIN_VDOWR = 1103,
|
|
|
|
|
|
|
|
|
|
ARC_SIMD_BUILTIN_VREC = 1105,
|
|
|
|
|
ARC_SIMD_BUILTIN_VRUN = 1106,
|
|
|
|
|
ARC_SIMD_BUILTIN_VRECRUN = 1107,
|
|
|
|
|
ARC_SIMD_BUILTIN_VENDREC = 1108,
|
|
|
|
|
|
|
|
|
|
ARC_SIMD_BUILTIN_VLD32WH = 1110,
|
|
|
|
|
ARC_SIMD_BUILTIN_VLD32WL = 1111,
|
|
|
|
|
ARC_SIMD_BUILTIN_VLD64 = 1112,
|
|
|
|
|
ARC_SIMD_BUILTIN_VLD32 = 1113,
|
|
|
|
|
ARC_SIMD_BUILTIN_VLD64W = 1114,
|
|
|
|
|
ARC_SIMD_BUILTIN_VLD128 = 1115,
|
|
|
|
|
ARC_SIMD_BUILTIN_VST128 = 1116,
|
|
|
|
|
ARC_SIMD_BUILTIN_VST64 = 1117,
|
|
|
|
|
|
|
|
|
|
ARC_SIMD_BUILTIN_VST16_N = 1120,
|
|
|
|
|
ARC_SIMD_BUILTIN_VST32_N = 1121,
|
|
|
|
|
|
|
|
|
|
ARC_SIMD_BUILTIN_VINTI = 1201,
|
|
|
|
|
|
|
|
|
|
ARC_SIMD_BUILTIN_END
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* A nop is needed between a 4 byte insn that sets the condition codes and
|
|
|
|
|
a branch that uses them (the same isn't true for an 8 byte insn that sets
|
|
|
|
|
the condition codes). Set by arc_ccfsm_advance. Used by
|
|
|
|
|
arc_print_operand. */
|
|
|
|
|
|
|
|
|
|
static int get_arc_condition_code (rtx);
|
|
|
|
|
|
|
|
|
|
static tree arc_handle_interrupt_attribute (tree *, tree, tree, int, bool *);
|
|
|
|
|
|
|
|
|
|
/* Initialized arc_attribute_table to NULL since arc doesnot have any
|
|
|
|
|
machine specific supported attributes. */
|
|
|
|
|
const struct attribute_spec arc_attribute_table[] =
|
|
|
|
|
{
|
|
|
|
|
/* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler,
|
|
|
|
|
affects_type_identity } */
|
|
|
|
|
{ "interrupt", 1, 1, true, false, false, arc_handle_interrupt_attribute, true },
|
|
|
|
|
/* Function calls made to this symbol must be done indirectly, because
|
|
|
|
|
it may lie outside of the 21/25 bit addressing range of a normal function
|
|
|
|
|
call. */
|
|
|
|
|
{ "long_call", 0, 0, false, true, true, NULL, false },
|
|
|
|
|
/* Whereas these functions are always known to reside within the 25 bit
|
|
|
|
|
addressing range of unconditionalized bl. */
|
|
|
|
|
{ "medium_call", 0, 0, false, true, true, NULL, false },
|
|
|
|
|
/* And these functions are always known to reside within the 21 bit
|
|
|
|
|
addressing range of blcc. */
|
|
|
|
|
{ "short_call", 0, 0, false, true, true, NULL, false },
|
|
|
|
|
{ NULL, 0, 0, false, false, false, NULL, false }
|
|
|
|
|
};
|
|
|
|
|
static int arc_comp_type_attributes (const_tree, const_tree);
|
|
|
|
|
static void arc_file_start (void);
|
|
|
|
|
static void arc_internal_label (FILE *, const char *, unsigned long);
|
|
|
|
|
static void arc_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT,
|
|
|
|
|
tree);
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
static int arc_address_cost (rtx, machine_mode, addr_space_t, bool);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
static void arc_encode_section_info (tree decl, rtx rtl, int first);
|
|
|
|
|
|
|
|
|
|
static void arc_init_builtins (void);
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
static rtx arc_expand_builtin (tree, rtx, rtx, machine_mode, int);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
static int branch_dest (rtx);
|
|
|
|
|
|
|
|
|
|
static void arc_output_pic_addr_const (FILE *, rtx, int);
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
void emit_pic_move (rtx *, machine_mode);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
bool arc_legitimate_pic_operand_p (rtx);
|
|
|
|
|
static bool arc_function_ok_for_sibcall (tree, tree);
|
|
|
|
|
static rtx arc_function_value (const_tree, const_tree, bool);
|
|
|
|
|
const char * output_shift (rtx *);
|
|
|
|
|
static void arc_reorg (void);
|
|
|
|
|
static bool arc_in_small_data_p (const_tree);
|
|
|
|
|
|
|
|
|
|
static void arc_init_reg_tables (void);
|
|
|
|
|
static bool arc_return_in_memory (const_tree, const_tree);
|
|
|
|
|
static void arc_init_simd_builtins (void);
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
static bool arc_vector_mode_supported_p (machine_mode);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2014-05-06 18:25:05 +02:00
|
|
|
|
static bool arc_can_use_doloop_p (const widest_int &, const widest_int &,
|
|
|
|
|
unsigned int, bool);
|
Use rtx_insn for various target.def hooks
gcc/
2014-08-27 David Malcolm <dmalcolm@redhat.com>
* target.def (unwind_emit): Strengthen param "insn" from rtx to
rtx_insn *.
(final_postscan_insn): Likewise.
(adjust_cost): Likewise.
(adjust_priority): Likewise.
(variable_issue): Likewise.
(macro_fusion_pair_p): Likewise.
(dfa_post_cycle_insn): Likewise.
(first_cycle_multipass_dfa_lookahead_guard): Likewise.
(first_cycle_multipass_issue): Likewise.
(dfa_new_cycle): Likewise.
(adjust_cost_2): Likewise for params "insn" and "dep_insn".
(speculate_insn): Likewise for param "insn".
(gen_spec_check): Likewise for params "insn" and "label".
(get_insn_spec_ds): Likewise for param "insn".
(get_insn_checked_ds): Likewise.
(dispatch_do): Likewise.
(dispatch): Likewise.
(cannot_copy_insn_p): Likewise.
(invalid_within_doloop): Likewise.
(legitimate_combined_insn): Likewise.
(needed): Likewise.
(after): Likewise.
* doc/tm.texi: Automatically updated to reflect changes to
target.def.
* haifa-sched.c (choose_ready): Convert NULL_RTX to NULL when
working with insn.
(schedule_block): Likewise.
(sched_init): Likewise.
(sched_speculate_insn): Strengthen param "insn" from rtx to
rtx_insn *.
(ready_remove_first_dispatch): Convert NULL_RTX to NULL when
working with insn.
* hooks.c (hook_bool_rtx_true): Rename to...
hook_bool_rtx_insn_true): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_constcharptr_const_rtx_null): Rename to...
(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
first param from const_rtx to const rtx_insn *.
(hook_bool_rtx_int_false): Rename to...
(hook_bool_rtx_insn_int_false): ...this, and strengthen first
param from rtx to rtx_insn *.
(hook_void_rtx_int): Rename to...
(hook_void_rtx_insn_int): ...this, and strengthen first param from
rtx to rtx_insn *.
* hooks.h (hook_bool_rtx_true): Rename to...
(hook_bool_rtx_insn_true): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_bool_rtx_int_false): Rename to...
(hook_bool_rtx_insn_int_false): ...this, and strengthen first
param from rtx to rtx_insn *.
(hook_void_rtx_int): Rename to...
(hook_void_rtx_insn_int): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_constcharptr_const_rtx_null): Rename to...
(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
first param from const_rtx to const rtx_insn *.
* sched-deps.c (sched_macro_fuse_insns): Strengthen param "insn"
and local "prev" from rtx to rtx_insn *.
* sched-int.h (sched_speculate_insn): Strengthen first param from
rtx to rtx_insn *.
* sel-sched.c (create_speculation_check): Likewise for local "label".
* targhooks.c (default_invalid_within_doloop): Strengthen param
"insn" from const_rtx to const rtx_insn *.
* targhooks.h (default_invalid_within_doloop): Strengthen param
from const_rtx to const rtx_insn *.
* config/alpha/alpha.c (alpha_cannot_copy_insn_p): Likewise.
(alpha_adjust_cost): Likewise for params "insn", "dep_insn".
* config/arc/arc.c (arc_sched_adjust_priority): Likewise for param
"insn".
(arc_invalid_within_doloop): Likewise, with const.
* config/arm/arm.c (arm_adjust_cost): Likewise for params "insn", "dep".
(arm_cannot_copy_insn_p): Likewise for param "insn".
(arm_unwind_emit): Likewise.
* config/bfin/bfin.c (bfin_adjust_cost): Likewise for params "insn",
"dep_insn".
* config/c6x/c6x.c (c6x_dfa_new_cycle): Likewise for param "insn".
(c6x_variable_issue): Likewise. Removed now-redundant checked
cast.
(c6x_adjust_cost): Likewise for params "insn", "dep_insn".
* config/epiphany/epiphany-protos.h (epiphany_mode_needed):
Likewise for param "insn".
(epiphany_mode_after): Likewise.
* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise for
params "insn", "dep_insn".
(epiphany_mode_needed): Likewise for param "insn".
(epiphany_mode_after): Likewise.
* config/i386/i386-protos.h (i386_pe_seh_unwind_emit): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
(ix86_avx_u128_mode_needed): Likewise.
(ix86_i387_mode_needed): Likewise.
(ix86_mode_needed): Likewise.
(ix86_avx_u128_mode_after): Likewise.
(ix86_mode_after): Likewise.
(ix86_adjust_cost): Likewise for params "insn", "dep_insn".
(ix86_macro_fusion_pair_p): Likewise for params "condgen", "condjmp".
(ix86_adjust_priority): Likewise for param "insn".
(core2i7_first_cycle_multipass_issue): Likewise for param "insn".
(do_dispatch): Likewise.
(has_dispatch): Likewise.
* config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.
* config/ia64/ia64.c (TARGET_INVALID_WITHIN_DOLOOP): Update to
reflect renaming of default hook implementation from
hook_constcharptr_const_rtx_null to
hook_constcharptr_const_rtx_insn_null.
(ia64_adjust_cost_2): Strengthen params "insn", "dep_insn" from
rtx to rtx_insn *.
(ia64_variable_issue): Likewise for param "insn".
(ia64_first_cycle_multipass_dfa_lookahead_guard): Likewise.
(ia64_dfa_new_cycle): Likewise.
(ia64_get_insn_spec_ds): Likewise.
(ia64_get_insn_checked_ds): Likewise.
(ia64_speculate_insn): Likewise.
(ia64_gen_spec_check): Likewise for params "insn", "label".
(ia64_asm_unwind_emit): Likewise for param "insn".
* config/m32r/m32r.c (m32r_adjust_priority): Likewise.
* config/m68k/m68k.c (m68k_sched_adjust_cost): Likewise for params
"insn", "def_insn".
(m68k_sched_variable_issue): Likewise for param "insn".
* config/mep/mep.c (mep_adjust_cost): Likewise for params "insn",
"def_insn".
* config/microblaze/microblaze.c (microblaze_adjust_cost):
Likewise for params "insn", "dep".
* config/mips/mips.c (mips_adjust_cost): Likewise.
(mips_variable_issue): Likewise for param "insn".
(mips_final_postscan_insn): Likewise.
* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Likewise
for params "insn", "dep".
* config/pa/pa.c (pa_adjust_cost): Likewise for params "insn",
"dep_insn".
(pa_adjust_priority): Likewise for param "insn".
* config/picochip/picochip.c (picochip_sched_adjust_cost):
Likewise for params "insn", "dep_insn".
* config/rs6000/rs6000.c (rs6000_variable_issue_1): Likewise for
param "insn".
(rs6000_variable_issue): Likewise.
(rs6000_adjust_cost): Likewise for params "insn", "dep_insn".
(rs6000_debug_adjust_cost): Likewise.
(rs6000_adjust_priority): Likewise for param "insn".
(rs6000_use_sched_lookahead_guard): Likewise.
(get_next_active_insn): Likewise for return type and both params.
(redefine_groups): Likewise for params "prev_head_insn", "tail"
and locals "insn", "next_insn".
(pad_groups): Likewise.
* config/s390/s390.c (s390_adjust_priority): Likewise for param
"insn".
(s390_cannot_copy_insn_p): Likewise.
(s390_sched_variable_issue): Likewise for third param, eliminating
checked cast.
(TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of
default hook implementation from hook_constcharptr_const_rtx_null
to hook_constcharptr_const_rtx_insn_null.
* config/sh/sh.c (sh_cannot_copy_insn_p): Strengthen param "insn"
from rtx to rtx_insn *.
(sh_adjust_cost): Likewise for params "insn", "dep_insn".
(sh_variable_issue): Likewise for param "insn".
(sh_dfa_new_cycle): Likewise.
(sh_mode_needed): Likewise.
(sh_mode_after): Likewise.
* config/sparc/sparc.c (supersparc_adjust_cost): Likewise for
params "insn", "dep_insn".
(hypersparc_adjust_cost): Likewise.
(sparc_adjust_cost): Likewise.
* config/spu/spu.c (spu_sched_variable_issue): Likewise for third
param, eliminated checked cast.
(spu_sched_adjust_cost): Likewise for first and third params.
* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Strengthen
params "insn" and "dep_insn" from rtx to rtx_insn *.
* config/tilepro/tilepro.c (tilepro_sched_adjust_cost): Likewise.
From-SVN: r214584
2014-08-27 21:34:13 +02:00
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static const char *arc_invalid_within_doloop (const rtx_insn *);
|
2013-10-01 19:03:46 +02:00
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static void output_short_suffix (FILE *file);
|
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|
|
|
|
|
|
static bool arc_frame_pointer_required (void);
|
|
|
|
|
|
2014-11-18 23:45:21 +01:00
|
|
|
|
static bool arc_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT,
|
2014-11-01 09:44:39 +01:00
|
|
|
|
unsigned int,
|
|
|
|
|
enum by_pieces_operation op,
|
|
|
|
|
bool);
|
|
|
|
|
|
2013-10-01 19:03:46 +02:00
|
|
|
|
/* Implements target hook vector_mode_supported_p. */
|
|
|
|
|
|
|
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|
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static bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_vector_mode_supported_p (machine_mode mode)
|
2013-10-01 19:03:46 +02:00
|
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|
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{
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|
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|
|
if (!TARGET_SIMD_SET)
|
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|
return false;
|
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|
if ((mode == V4SImode)
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|
|| (mode == V8HImode))
|
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|
|
return true;
|
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|
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|
return false;
|
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|
|
}
|
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|
/* TARGET_PRESERVE_RELOAD_P is still awaiting patch re-evaluation / review. */
|
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|
|
static bool arc_preserve_reload_p (rtx in) ATTRIBUTE_UNUSED;
|
|
|
|
|
static rtx arc_delegitimize_address (rtx);
|
2014-09-15 17:49:09 +02:00
|
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|
|
static bool arc_can_follow_jump (const rtx_insn *follower,
|
|
|
|
|
const rtx_insn *followee);
|
2013-10-01 19:03:46 +02:00
|
|
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|
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static rtx frame_insn (rtx);
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
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static void arc_function_arg_advance (cumulative_args_t, machine_mode,
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2013-10-01 19:03:46 +02:00
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const_tree, bool);
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decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
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static rtx arc_legitimize_address_0 (rtx, rtx, machine_mode mode);
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2013-10-01 19:03:46 +02:00
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static void arc_finalize_pic (void);
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/* initialize the GCC target structure. */
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#undef TARGET_COMP_TYPE_ATTRIBUTES
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#define TARGET_COMP_TYPE_ATTRIBUTES arc_comp_type_attributes
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#undef TARGET_ASM_FILE_START
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#define TARGET_ASM_FILE_START arc_file_start
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#undef TARGET_ATTRIBUTE_TABLE
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#define TARGET_ATTRIBUTE_TABLE arc_attribute_table
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#undef TARGET_ASM_INTERNAL_LABEL
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#define TARGET_ASM_INTERNAL_LABEL arc_internal_label
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#undef TARGET_RTX_COSTS
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#define TARGET_RTX_COSTS arc_rtx_costs
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#undef TARGET_ADDRESS_COST
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#define TARGET_ADDRESS_COST arc_address_cost
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#undef TARGET_ENCODE_SECTION_INFO
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#define TARGET_ENCODE_SECTION_INFO arc_encode_section_info
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#undef TARGET_CANNOT_FORCE_CONST_MEM
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#define TARGET_CANNOT_FORCE_CONST_MEM arc_cannot_force_const_mem
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#undef TARGET_INIT_BUILTINS
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#define TARGET_INIT_BUILTINS arc_init_builtins
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#undef TARGET_EXPAND_BUILTIN
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#define TARGET_EXPAND_BUILTIN arc_expand_builtin
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#undef TARGET_ASM_OUTPUT_MI_THUNK
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#define TARGET_ASM_OUTPUT_MI_THUNK arc_output_mi_thunk
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#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
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#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true
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#undef TARGET_FUNCTION_OK_FOR_SIBCALL
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#define TARGET_FUNCTION_OK_FOR_SIBCALL arc_function_ok_for_sibcall
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#undef TARGET_MACHINE_DEPENDENT_REORG
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#define TARGET_MACHINE_DEPENDENT_REORG arc_reorg
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#undef TARGET_IN_SMALL_DATA_P
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#define TARGET_IN_SMALL_DATA_P arc_in_small_data_p
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#undef TARGET_PROMOTE_FUNCTION_MODE
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#define TARGET_PROMOTE_FUNCTION_MODE \
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default_promote_function_mode_always_promote
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#undef TARGET_PROMOTE_PROTOTYPES
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#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
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#undef TARGET_RETURN_IN_MEMORY
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#define TARGET_RETURN_IN_MEMORY arc_return_in_memory
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#undef TARGET_PASS_BY_REFERENCE
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#define TARGET_PASS_BY_REFERENCE arc_pass_by_reference
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#undef TARGET_SETUP_INCOMING_VARARGS
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#define TARGET_SETUP_INCOMING_VARARGS arc_setup_incoming_varargs
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#undef TARGET_ARG_PARTIAL_BYTES
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#define TARGET_ARG_PARTIAL_BYTES arc_arg_partial_bytes
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#undef TARGET_MUST_PASS_IN_STACK
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#define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size
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#undef TARGET_FUNCTION_VALUE
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#define TARGET_FUNCTION_VALUE arc_function_value
|
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#undef TARGET_SCHED_ADJUST_PRIORITY
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#define TARGET_SCHED_ADJUST_PRIORITY arc_sched_adjust_priority
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#undef TARGET_VECTOR_MODE_SUPPORTED_P
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#define TARGET_VECTOR_MODE_SUPPORTED_P arc_vector_mode_supported_p
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2013-11-09 12:42:16 +01:00
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#undef TARGET_CAN_USE_DOLOOP_P
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#define TARGET_CAN_USE_DOLOOP_P arc_can_use_doloop_p
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2013-10-01 19:03:46 +02:00
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#undef TARGET_INVALID_WITHIN_DOLOOP
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#define TARGET_INVALID_WITHIN_DOLOOP arc_invalid_within_doloop
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#undef TARGET_PRESERVE_RELOAD_P
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#define TARGET_PRESERVE_RELOAD_P arc_preserve_reload_p
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#undef TARGET_CAN_FOLLOW_JUMP
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#define TARGET_CAN_FOLLOW_JUMP arc_can_follow_jump
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#undef TARGET_DELEGITIMIZE_ADDRESS
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#define TARGET_DELEGITIMIZE_ADDRESS arc_delegitimize_address
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2014-11-01 09:44:39 +01:00
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#undef TARGET_USE_BY_PIECES_INFRASTRUCTURE_P
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#define TARGET_USE_BY_PIECES_INFRASTRUCTURE_P \
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arc_use_by_pieces_infrastructure_p
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2013-10-01 19:03:46 +02:00
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/* Usually, we will be able to scale anchor offsets.
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When this fails, we want LEGITIMIZE_ADDRESS to kick in. */
|
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#undef TARGET_MIN_ANCHOR_OFFSET
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#define TARGET_MIN_ANCHOR_OFFSET (-1024)
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#undef TARGET_MAX_ANCHOR_OFFSET
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#define TARGET_MAX_ANCHOR_OFFSET (1020)
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#undef TARGET_SECONDARY_RELOAD
|
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#define TARGET_SECONDARY_RELOAD arc_secondary_reload
|
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#define TARGET_OPTION_OVERRIDE arc_override_options
|
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#define TARGET_CONDITIONAL_REGISTER_USAGE arc_conditional_register_usage
|
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#define TARGET_TRAMPOLINE_INIT arc_initialize_trampoline
|
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#define TARGET_TRAMPOLINE_ADJUST_ADDRESS arc_trampoline_adjust_address
|
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#define TARGET_CAN_ELIMINATE arc_can_eliminate
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#define TARGET_FRAME_POINTER_REQUIRED arc_frame_pointer_required
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#define TARGET_FUNCTION_ARG arc_function_arg
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#define TARGET_FUNCTION_ARG_ADVANCE arc_function_arg_advance
|
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#define TARGET_LEGITIMATE_CONSTANT_P arc_legitimate_constant_p
|
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#define TARGET_LEGITIMATE_ADDRESS_P arc_legitimate_address_p
|
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#define TARGET_MODE_DEPENDENT_ADDRESS_P arc_mode_dependent_address_p
|
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#define TARGET_LEGITIMIZE_ADDRESS arc_legitimize_address
|
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#define TARGET_ADJUST_INSN_LENGTH arc_adjust_insn_length
|
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#define TARGET_INSN_LENGTH_PARAMETERS arc_insn_length_parameters
|
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|
2014-05-01 15:00:10 +02:00
|
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|
#undef TARGET_LRA_P
|
2013-10-01 19:03:46 +02:00
|
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|
|
#define TARGET_LRA_P arc_lra_p
|
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#define TARGET_REGISTER_PRIORITY arc_register_priority
|
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|
/* Stores with scaled offsets have different displacement ranges. */
|
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#define TARGET_DIFFERENT_ADDR_DISPLACEMENT_P hook_bool_void_true
|
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|
#define TARGET_SPILL_CLASS arc_spill_class
|
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|
#include "target-def.h"
|
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|
#undef TARGET_ASM_ALIGNED_HI_OP
|
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#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t"
|
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|
#undef TARGET_ASM_ALIGNED_SI_OP
|
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#define TARGET_ASM_ALIGNED_SI_OP "\t.word\t"
|
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|
/* Try to keep the (mov:DF _, reg) as early as possible so
|
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|
that the d<add/sub/mul>h-lr insns appear together and can
|
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|
use the peephole2 pattern. */
|
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|
static int
|
Use rtx_insn for various target.def hooks
gcc/
2014-08-27 David Malcolm <dmalcolm@redhat.com>
* target.def (unwind_emit): Strengthen param "insn" from rtx to
rtx_insn *.
(final_postscan_insn): Likewise.
(adjust_cost): Likewise.
(adjust_priority): Likewise.
(variable_issue): Likewise.
(macro_fusion_pair_p): Likewise.
(dfa_post_cycle_insn): Likewise.
(first_cycle_multipass_dfa_lookahead_guard): Likewise.
(first_cycle_multipass_issue): Likewise.
(dfa_new_cycle): Likewise.
(adjust_cost_2): Likewise for params "insn" and "dep_insn".
(speculate_insn): Likewise for param "insn".
(gen_spec_check): Likewise for params "insn" and "label".
(get_insn_spec_ds): Likewise for param "insn".
(get_insn_checked_ds): Likewise.
(dispatch_do): Likewise.
(dispatch): Likewise.
(cannot_copy_insn_p): Likewise.
(invalid_within_doloop): Likewise.
(legitimate_combined_insn): Likewise.
(needed): Likewise.
(after): Likewise.
* doc/tm.texi: Automatically updated to reflect changes to
target.def.
* haifa-sched.c (choose_ready): Convert NULL_RTX to NULL when
working with insn.
(schedule_block): Likewise.
(sched_init): Likewise.
(sched_speculate_insn): Strengthen param "insn" from rtx to
rtx_insn *.
(ready_remove_first_dispatch): Convert NULL_RTX to NULL when
working with insn.
* hooks.c (hook_bool_rtx_true): Rename to...
hook_bool_rtx_insn_true): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_constcharptr_const_rtx_null): Rename to...
(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
first param from const_rtx to const rtx_insn *.
(hook_bool_rtx_int_false): Rename to...
(hook_bool_rtx_insn_int_false): ...this, and strengthen first
param from rtx to rtx_insn *.
(hook_void_rtx_int): Rename to...
(hook_void_rtx_insn_int): ...this, and strengthen first param from
rtx to rtx_insn *.
* hooks.h (hook_bool_rtx_true): Rename to...
(hook_bool_rtx_insn_true): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_bool_rtx_int_false): Rename to...
(hook_bool_rtx_insn_int_false): ...this, and strengthen first
param from rtx to rtx_insn *.
(hook_void_rtx_int): Rename to...
(hook_void_rtx_insn_int): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_constcharptr_const_rtx_null): Rename to...
(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
first param from const_rtx to const rtx_insn *.
* sched-deps.c (sched_macro_fuse_insns): Strengthen param "insn"
and local "prev" from rtx to rtx_insn *.
* sched-int.h (sched_speculate_insn): Strengthen first param from
rtx to rtx_insn *.
* sel-sched.c (create_speculation_check): Likewise for local "label".
* targhooks.c (default_invalid_within_doloop): Strengthen param
"insn" from const_rtx to const rtx_insn *.
* targhooks.h (default_invalid_within_doloop): Strengthen param
from const_rtx to const rtx_insn *.
* config/alpha/alpha.c (alpha_cannot_copy_insn_p): Likewise.
(alpha_adjust_cost): Likewise for params "insn", "dep_insn".
* config/arc/arc.c (arc_sched_adjust_priority): Likewise for param
"insn".
(arc_invalid_within_doloop): Likewise, with const.
* config/arm/arm.c (arm_adjust_cost): Likewise for params "insn", "dep".
(arm_cannot_copy_insn_p): Likewise for param "insn".
(arm_unwind_emit): Likewise.
* config/bfin/bfin.c (bfin_adjust_cost): Likewise for params "insn",
"dep_insn".
* config/c6x/c6x.c (c6x_dfa_new_cycle): Likewise for param "insn".
(c6x_variable_issue): Likewise. Removed now-redundant checked
cast.
(c6x_adjust_cost): Likewise for params "insn", "dep_insn".
* config/epiphany/epiphany-protos.h (epiphany_mode_needed):
Likewise for param "insn".
(epiphany_mode_after): Likewise.
* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise for
params "insn", "dep_insn".
(epiphany_mode_needed): Likewise for param "insn".
(epiphany_mode_after): Likewise.
* config/i386/i386-protos.h (i386_pe_seh_unwind_emit): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
(ix86_avx_u128_mode_needed): Likewise.
(ix86_i387_mode_needed): Likewise.
(ix86_mode_needed): Likewise.
(ix86_avx_u128_mode_after): Likewise.
(ix86_mode_after): Likewise.
(ix86_adjust_cost): Likewise for params "insn", "dep_insn".
(ix86_macro_fusion_pair_p): Likewise for params "condgen", "condjmp".
(ix86_adjust_priority): Likewise for param "insn".
(core2i7_first_cycle_multipass_issue): Likewise for param "insn".
(do_dispatch): Likewise.
(has_dispatch): Likewise.
* config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.
* config/ia64/ia64.c (TARGET_INVALID_WITHIN_DOLOOP): Update to
reflect renaming of default hook implementation from
hook_constcharptr_const_rtx_null to
hook_constcharptr_const_rtx_insn_null.
(ia64_adjust_cost_2): Strengthen params "insn", "dep_insn" from
rtx to rtx_insn *.
(ia64_variable_issue): Likewise for param "insn".
(ia64_first_cycle_multipass_dfa_lookahead_guard): Likewise.
(ia64_dfa_new_cycle): Likewise.
(ia64_get_insn_spec_ds): Likewise.
(ia64_get_insn_checked_ds): Likewise.
(ia64_speculate_insn): Likewise.
(ia64_gen_spec_check): Likewise for params "insn", "label".
(ia64_asm_unwind_emit): Likewise for param "insn".
* config/m32r/m32r.c (m32r_adjust_priority): Likewise.
* config/m68k/m68k.c (m68k_sched_adjust_cost): Likewise for params
"insn", "def_insn".
(m68k_sched_variable_issue): Likewise for param "insn".
* config/mep/mep.c (mep_adjust_cost): Likewise for params "insn",
"def_insn".
* config/microblaze/microblaze.c (microblaze_adjust_cost):
Likewise for params "insn", "dep".
* config/mips/mips.c (mips_adjust_cost): Likewise.
(mips_variable_issue): Likewise for param "insn".
(mips_final_postscan_insn): Likewise.
* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Likewise
for params "insn", "dep".
* config/pa/pa.c (pa_adjust_cost): Likewise for params "insn",
"dep_insn".
(pa_adjust_priority): Likewise for param "insn".
* config/picochip/picochip.c (picochip_sched_adjust_cost):
Likewise for params "insn", "dep_insn".
* config/rs6000/rs6000.c (rs6000_variable_issue_1): Likewise for
param "insn".
(rs6000_variable_issue): Likewise.
(rs6000_adjust_cost): Likewise for params "insn", "dep_insn".
(rs6000_debug_adjust_cost): Likewise.
(rs6000_adjust_priority): Likewise for param "insn".
(rs6000_use_sched_lookahead_guard): Likewise.
(get_next_active_insn): Likewise for return type and both params.
(redefine_groups): Likewise for params "prev_head_insn", "tail"
and locals "insn", "next_insn".
(pad_groups): Likewise.
* config/s390/s390.c (s390_adjust_priority): Likewise for param
"insn".
(s390_cannot_copy_insn_p): Likewise.
(s390_sched_variable_issue): Likewise for third param, eliminating
checked cast.
(TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of
default hook implementation from hook_constcharptr_const_rtx_null
to hook_constcharptr_const_rtx_insn_null.
* config/sh/sh.c (sh_cannot_copy_insn_p): Strengthen param "insn"
from rtx to rtx_insn *.
(sh_adjust_cost): Likewise for params "insn", "dep_insn".
(sh_variable_issue): Likewise for param "insn".
(sh_dfa_new_cycle): Likewise.
(sh_mode_needed): Likewise.
(sh_mode_after): Likewise.
* config/sparc/sparc.c (supersparc_adjust_cost): Likewise for
params "insn", "dep_insn".
(hypersparc_adjust_cost): Likewise.
(sparc_adjust_cost): Likewise.
* config/spu/spu.c (spu_sched_variable_issue): Likewise for third
param, eliminated checked cast.
(spu_sched_adjust_cost): Likewise for first and third params.
* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Strengthen
params "insn" and "dep_insn" from rtx to rtx_insn *.
* config/tilepro/tilepro.c (tilepro_sched_adjust_cost): Likewise.
From-SVN: r214584
2014-08-27 21:34:13 +02:00
|
|
|
|
arc_sched_adjust_priority (rtx_insn *insn, int priority)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
rtx set = single_set (insn);
|
|
|
|
|
if (set
|
|
|
|
|
&& GET_MODE (SET_SRC(set)) == DFmode
|
|
|
|
|
&& GET_CODE (SET_SRC(set)) == REG)
|
|
|
|
|
{
|
|
|
|
|
/* Incrementing priority by 20 (empirically derived). */
|
|
|
|
|
return priority + 20;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return priority;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static reg_class_t
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_secondary_reload (bool in_p, rtx x, reg_class_t cl, machine_mode,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
secondary_reload_info *)
|
|
|
|
|
{
|
|
|
|
|
if (cl == DOUBLE_REGS)
|
|
|
|
|
return GENERAL_REGS;
|
|
|
|
|
|
|
|
|
|
/* The loop counter register can be stored, but not loaded directly. */
|
|
|
|
|
if ((cl == LPCOUNT_REG || cl == WRITABLE_CORE_REGS)
|
|
|
|
|
&& in_p && MEM_P (x))
|
|
|
|
|
return GENERAL_REGS;
|
|
|
|
|
return NO_REGS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static unsigned arc_ifcvt (void);
|
|
|
|
|
|
|
|
|
|
namespace {
|
|
|
|
|
|
|
|
|
|
const pass_data pass_data_arc_ifcvt =
|
|
|
|
|
{
|
|
|
|
|
RTL_PASS,
|
|
|
|
|
"arc_ifcvt", /* name */
|
|
|
|
|
OPTGROUP_NONE, /* optinfo_flags */
|
|
|
|
|
TV_IFCVT2, /* tv_id */
|
|
|
|
|
0, /* properties_required */
|
|
|
|
|
0, /* properties_provided */
|
|
|
|
|
0, /* properties_destroyed */
|
|
|
|
|
0, /* todo_flags_start */
|
|
|
|
|
TODO_df_finish /* todo_flags_finish */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
class pass_arc_ifcvt : public rtl_opt_pass
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
pass_arc_ifcvt(gcc::context *ctxt)
|
|
|
|
|
: rtl_opt_pass(pass_data_arc_ifcvt, ctxt)
|
|
|
|
|
{}
|
|
|
|
|
|
|
|
|
|
/* opt_pass methods: */
|
2013-10-02 00:03:47 +02:00
|
|
|
|
opt_pass * clone () { return new pass_arc_ifcvt (m_ctxt); }
|
pass cfun to pass::execute
gcc/
* passes.c (opt_pass::execute): Adjust.
(pass_manager::execute_pass_mode_switching): Likewise.
(early_local_passes::execute): Likewise.
(execute_one_pass): Pass cfun to the pass's execute method.
* tree-pass.h (opt_pass::execute): Add function * argument.
* asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c, cfgcleanup.c,
cfgexpand.c, cfgrtl.c, cgraphbuild.c, combine-stack-adj.c, combine.c,
compare-elim.c, config/arc/arc.c, config/epiphany/mode-switch-use.c,
config/epiphany/resolve-sw-modes.c, config/i386/i386.c,
config/mips/mips.c, config/rl78/rl78.c, config/s390/s390.c,
config/sparc/sparc.c, cprop.c, dce.c, df-core.c, dse.c, dwarf2cfi.c,
except.c, final.c, function.c, fwprop.c, gcse.c, gimple-low.c,
gimple-ssa-isolate-paths.c, gimple-ssa-strength-reduction.c,
graphite.c, ifcvt.c, init-regs.c, ipa-cp.c, ipa-devirt.c,
ipa-inline-analysis.c, ipa-inline.c, ipa-profile.c, ipa-pure-const.c,
ipa-reference.c, ipa-split.c, ipa.c, ira.c, jump.c, loop-init.c,
lower-subreg.c, mode-switching.c, omp-low.c, postreload-gcse.c,
postreload.c, predict.c, recog.c, ree.c, reg-stack.c, regcprop.c,
reginfo.c, regrename.c, reorg.c, sched-rgn.c, stack-ptr-mod.c,
store-motion.c, tracer.c, trans-mem.c, tree-call-cdce.c, tree-cfg.c,
tree-cfgcleanup.c, tree-complex.c, tree-eh.c, tree-emutls.c,
tree-if-conv.c, tree-into-ssa.c, tree-loop-distribution.c, tree-nrv.c,
tree-object-size.c, tree-parloops.c, tree-predcom.c, tree-ssa-ccp.c,
tree-ssa-copy.c, tree-ssa-copyrename.c, tree-ssa-dce.c,
tree-ssa-dom.c, tree-ssa-dse.c, tree-ssa-forwprop.c,
tree-ssa-ifcombine.c, tree-ssa-loop-ch.c, tree-ssa-loop-im.c,
tree-ssa-loop-ivcanon.c, tree-ssa-loop-prefetch.c,
tree-ssa-loop-unswitch.c, tree-ssa-loop.c, tree-ssa-math-opts.c,
tree-ssa-phiopt.c, tree-ssa-phiprop.c, tree-ssa-pre.c,
tree-ssa-reassoc.c, tree-ssa-sink.c, tree-ssa-strlen.c,
tree-ssa-structalias.c, tree-ssa-uncprop.c, tree-ssa-uninit.c,
tree-ssa.c, tree-ssanames.c, tree-stdarg.c, tree-switch-conversion.c,
tree-tailcall.c, tree-vect-generic.c, tree-vectorizer.c, tree-vrp.c,
tree.c, tsan.c, ubsan.c, var-tracking.c, vtable-verify.c, web.c:
Adjust.
From-SVN: r209482
2014-04-17 14:37:34 +02:00
|
|
|
|
virtual unsigned int execute (function *) { return arc_ifcvt (); }
|
2013-10-01 19:03:46 +02:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
} // anon namespace
|
|
|
|
|
|
|
|
|
|
rtl_opt_pass *
|
|
|
|
|
make_pass_arc_ifcvt (gcc::context *ctxt)
|
|
|
|
|
{
|
|
|
|
|
return new pass_arc_ifcvt (ctxt);
|
|
|
|
|
}
|
|
|
|
|
|
2013-11-16 12:53:21 +01:00
|
|
|
|
static unsigned arc_predicate_delay_insns (void);
|
|
|
|
|
|
|
|
|
|
namespace {
|
|
|
|
|
|
|
|
|
|
const pass_data pass_data_arc_predicate_delay_insns =
|
|
|
|
|
{
|
|
|
|
|
RTL_PASS,
|
|
|
|
|
"arc_predicate_delay_insns", /* name */
|
|
|
|
|
OPTGROUP_NONE, /* optinfo_flags */
|
|
|
|
|
TV_IFCVT2, /* tv_id */
|
|
|
|
|
0, /* properties_required */
|
|
|
|
|
0, /* properties_provided */
|
|
|
|
|
0, /* properties_destroyed */
|
|
|
|
|
0, /* todo_flags_start */
|
|
|
|
|
TODO_df_finish /* todo_flags_finish */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
class pass_arc_predicate_delay_insns : public rtl_opt_pass
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
pass_arc_predicate_delay_insns(gcc::context *ctxt)
|
|
|
|
|
: rtl_opt_pass(pass_data_arc_predicate_delay_insns, ctxt)
|
|
|
|
|
{}
|
|
|
|
|
|
|
|
|
|
/* opt_pass methods: */
|
pass cfun to pass::execute
gcc/
* passes.c (opt_pass::execute): Adjust.
(pass_manager::execute_pass_mode_switching): Likewise.
(early_local_passes::execute): Likewise.
(execute_one_pass): Pass cfun to the pass's execute method.
* tree-pass.h (opt_pass::execute): Add function * argument.
* asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c, cfgcleanup.c,
cfgexpand.c, cfgrtl.c, cgraphbuild.c, combine-stack-adj.c, combine.c,
compare-elim.c, config/arc/arc.c, config/epiphany/mode-switch-use.c,
config/epiphany/resolve-sw-modes.c, config/i386/i386.c,
config/mips/mips.c, config/rl78/rl78.c, config/s390/s390.c,
config/sparc/sparc.c, cprop.c, dce.c, df-core.c, dse.c, dwarf2cfi.c,
except.c, final.c, function.c, fwprop.c, gcse.c, gimple-low.c,
gimple-ssa-isolate-paths.c, gimple-ssa-strength-reduction.c,
graphite.c, ifcvt.c, init-regs.c, ipa-cp.c, ipa-devirt.c,
ipa-inline-analysis.c, ipa-inline.c, ipa-profile.c, ipa-pure-const.c,
ipa-reference.c, ipa-split.c, ipa.c, ira.c, jump.c, loop-init.c,
lower-subreg.c, mode-switching.c, omp-low.c, postreload-gcse.c,
postreload.c, predict.c, recog.c, ree.c, reg-stack.c, regcprop.c,
reginfo.c, regrename.c, reorg.c, sched-rgn.c, stack-ptr-mod.c,
store-motion.c, tracer.c, trans-mem.c, tree-call-cdce.c, tree-cfg.c,
tree-cfgcleanup.c, tree-complex.c, tree-eh.c, tree-emutls.c,
tree-if-conv.c, tree-into-ssa.c, tree-loop-distribution.c, tree-nrv.c,
tree-object-size.c, tree-parloops.c, tree-predcom.c, tree-ssa-ccp.c,
tree-ssa-copy.c, tree-ssa-copyrename.c, tree-ssa-dce.c,
tree-ssa-dom.c, tree-ssa-dse.c, tree-ssa-forwprop.c,
tree-ssa-ifcombine.c, tree-ssa-loop-ch.c, tree-ssa-loop-im.c,
tree-ssa-loop-ivcanon.c, tree-ssa-loop-prefetch.c,
tree-ssa-loop-unswitch.c, tree-ssa-loop.c, tree-ssa-math-opts.c,
tree-ssa-phiopt.c, tree-ssa-phiprop.c, tree-ssa-pre.c,
tree-ssa-reassoc.c, tree-ssa-sink.c, tree-ssa-strlen.c,
tree-ssa-structalias.c, tree-ssa-uncprop.c, tree-ssa-uninit.c,
tree-ssa.c, tree-ssanames.c, tree-stdarg.c, tree-switch-conversion.c,
tree-tailcall.c, tree-vect-generic.c, tree-vectorizer.c, tree-vrp.c,
tree.c, tsan.c, ubsan.c, var-tracking.c, vtable-verify.c, web.c:
Adjust.
From-SVN: r209482
2014-04-17 14:37:34 +02:00
|
|
|
|
virtual unsigned int execute (function *)
|
|
|
|
|
{
|
|
|
|
|
return arc_predicate_delay_insns ();
|
|
|
|
|
}
|
2013-11-16 12:53:21 +01:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
} // anon namespace
|
|
|
|
|
|
|
|
|
|
rtl_opt_pass *
|
|
|
|
|
make_pass_arc_predicate_delay_insns (gcc::context *ctxt)
|
|
|
|
|
{
|
|
|
|
|
return new pass_arc_predicate_delay_insns (ctxt);
|
|
|
|
|
}
|
|
|
|
|
|
2013-10-01 19:03:46 +02:00
|
|
|
|
/* Called by OVERRIDE_OPTIONS to initialize various things. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_init (void)
|
|
|
|
|
{
|
|
|
|
|
enum attr_tune tune_dflt = TUNE_NONE;
|
|
|
|
|
|
|
|
|
|
if (TARGET_A5)
|
|
|
|
|
{
|
|
|
|
|
arc_cpu_string = "A5";
|
|
|
|
|
}
|
|
|
|
|
else if (TARGET_ARC600)
|
|
|
|
|
{
|
|
|
|
|
arc_cpu_string = "ARC600";
|
|
|
|
|
tune_dflt = TUNE_ARC600;
|
|
|
|
|
}
|
|
|
|
|
else if (TARGET_ARC601)
|
|
|
|
|
{
|
|
|
|
|
arc_cpu_string = "ARC601";
|
|
|
|
|
tune_dflt = TUNE_ARC600;
|
|
|
|
|
}
|
|
|
|
|
else if (TARGET_ARC700)
|
|
|
|
|
{
|
|
|
|
|
arc_cpu_string = "ARC700";
|
|
|
|
|
tune_dflt = TUNE_ARC700_4_2_STD;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
if (arc_tune == TUNE_NONE)
|
|
|
|
|
arc_tune = tune_dflt;
|
|
|
|
|
/* Note: arc_multcost is only used in rtx_cost if speed is true. */
|
|
|
|
|
if (arc_multcost < 0)
|
|
|
|
|
switch (arc_tune)
|
|
|
|
|
{
|
|
|
|
|
case TUNE_ARC700_4_2_STD:
|
|
|
|
|
/* latency 7;
|
|
|
|
|
max throughput (1 multiply + 4 other insns) / 5 cycles. */
|
|
|
|
|
arc_multcost = COSTS_N_INSNS (4);
|
|
|
|
|
if (TARGET_NOMPY_SET)
|
|
|
|
|
arc_multcost = COSTS_N_INSNS (30);
|
|
|
|
|
break;
|
|
|
|
|
case TUNE_ARC700_4_2_XMAC:
|
|
|
|
|
/* latency 5;
|
|
|
|
|
max throughput (1 multiply + 2 other insns) / 3 cycles. */
|
|
|
|
|
arc_multcost = COSTS_N_INSNS (3);
|
|
|
|
|
if (TARGET_NOMPY_SET)
|
|
|
|
|
arc_multcost = COSTS_N_INSNS (30);
|
|
|
|
|
break;
|
|
|
|
|
case TUNE_ARC600:
|
|
|
|
|
if (TARGET_MUL64_SET)
|
|
|
|
|
{
|
|
|
|
|
arc_multcost = COSTS_N_INSNS (4);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
/* Fall through. */
|
|
|
|
|
default:
|
|
|
|
|
arc_multcost = COSTS_N_INSNS (30);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Support mul64 generation only for A5 and ARC600. */
|
|
|
|
|
if (TARGET_MUL64_SET && TARGET_ARC700)
|
|
|
|
|
error ("-mmul64 not supported for ARC700");
|
|
|
|
|
|
|
|
|
|
/* MPY instructions valid only for ARC700. */
|
|
|
|
|
if (TARGET_NOMPY_SET && !TARGET_ARC700)
|
|
|
|
|
error ("-mno-mpy supported only for ARC700");
|
|
|
|
|
|
|
|
|
|
/* mul/mac instructions only for ARC600. */
|
|
|
|
|
if (TARGET_MULMAC_32BY16_SET && !(TARGET_ARC600 || TARGET_ARC601))
|
|
|
|
|
error ("-mmul32x16 supported only for ARC600 or ARC601");
|
|
|
|
|
|
|
|
|
|
if (!TARGET_DPFP && TARGET_DPFP_DISABLE_LRSR)
|
2014-05-16 21:52:17 +02:00
|
|
|
|
error ("-mno-dpfp-lrsr supported only with -mdpfp");
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
/* FPX-1. No fast and compact together. */
|
|
|
|
|
if ((TARGET_DPFP_FAST_SET && TARGET_DPFP_COMPACT_SET)
|
|
|
|
|
|| (TARGET_SPFP_FAST_SET && TARGET_SPFP_COMPACT_SET))
|
|
|
|
|
error ("FPX fast and compact options cannot be specified together");
|
|
|
|
|
|
|
|
|
|
/* FPX-2. No fast-spfp for arc600 or arc601. */
|
|
|
|
|
if (TARGET_SPFP_FAST_SET && (TARGET_ARC600 || TARGET_ARC601))
|
|
|
|
|
error ("-mspfp_fast not available on ARC600 or ARC601");
|
|
|
|
|
|
|
|
|
|
/* FPX-3. No FPX extensions on pre-ARC600 cores. */
|
|
|
|
|
if ((TARGET_DPFP || TARGET_SPFP)
|
|
|
|
|
&& !(TARGET_ARC600 || TARGET_ARC601 || TARGET_ARC700))
|
|
|
|
|
error ("FPX extensions not available on pre-ARC600 cores");
|
|
|
|
|
|
|
|
|
|
/* Warn for unimplemented PIC in pre-ARC700 cores, and disable flag_pic. */
|
|
|
|
|
if (flag_pic && !TARGET_ARC700)
|
|
|
|
|
{
|
|
|
|
|
warning (DK_WARNING, "PIC is not supported for %s. Generating non-PIC code only..", arc_cpu_string);
|
|
|
|
|
flag_pic = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
arc_init_reg_tables ();
|
|
|
|
|
|
|
|
|
|
/* Initialize array for PRINT_OPERAND_PUNCT_VALID_P. */
|
|
|
|
|
memset (arc_punct_chars, 0, sizeof (arc_punct_chars));
|
|
|
|
|
arc_punct_chars['#'] = 1;
|
|
|
|
|
arc_punct_chars['*'] = 1;
|
|
|
|
|
arc_punct_chars['?'] = 1;
|
|
|
|
|
arc_punct_chars['!'] = 1;
|
|
|
|
|
arc_punct_chars['^'] = 1;
|
|
|
|
|
arc_punct_chars['&'] = 1;
|
|
|
|
|
|
|
|
|
|
if (optimize > 1 && !TARGET_NO_COND_EXEC)
|
|
|
|
|
{
|
|
|
|
|
/* There are two target-independent ifcvt passes, and arc_reorg may do
|
|
|
|
|
one or more arc_ifcvt calls. */
|
|
|
|
|
opt_pass *pass_arc_ifcvt_4 = make_pass_arc_ifcvt (g);
|
|
|
|
|
struct register_pass_info arc_ifcvt4_info
|
|
|
|
|
= { pass_arc_ifcvt_4, "dbr", 1, PASS_POS_INSERT_AFTER };
|
|
|
|
|
struct register_pass_info arc_ifcvt5_info
|
|
|
|
|
= { pass_arc_ifcvt_4->clone (), "shorten", 1, PASS_POS_INSERT_BEFORE };
|
|
|
|
|
|
|
|
|
|
register_pass (&arc_ifcvt4_info);
|
|
|
|
|
register_pass (&arc_ifcvt5_info);
|
|
|
|
|
}
|
2013-11-16 12:53:21 +01:00
|
|
|
|
|
|
|
|
|
if (flag_delayed_branch)
|
|
|
|
|
{
|
|
|
|
|
opt_pass *pass_arc_predicate_delay_insns
|
|
|
|
|
= make_pass_arc_predicate_delay_insns (g);
|
|
|
|
|
struct register_pass_info arc_predicate_delay_info
|
|
|
|
|
= { pass_arc_predicate_delay_insns, "dbr", 1, PASS_POS_INSERT_AFTER };
|
|
|
|
|
|
|
|
|
|
register_pass (&arc_predicate_delay_info);
|
|
|
|
|
}
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check ARC options, generate derived target attributes. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_override_options (void)
|
|
|
|
|
{
|
|
|
|
|
if (arc_cpu == PROCESSOR_NONE)
|
|
|
|
|
arc_cpu = PROCESSOR_ARC700;
|
|
|
|
|
|
|
|
|
|
if (arc_size_opt_level == 3)
|
|
|
|
|
optimize_size = 1;
|
|
|
|
|
|
|
|
|
|
if (flag_pic)
|
|
|
|
|
target_flags |= MASK_NO_SDATA_SET;
|
|
|
|
|
|
|
|
|
|
if (flag_no_common == 255)
|
|
|
|
|
flag_no_common = !TARGET_NO_SDATA_SET;
|
|
|
|
|
|
|
|
|
|
/* TARGET_COMPACT_CASESI needs the "q" register class. */ \
|
|
|
|
|
if (TARGET_MIXED_CODE)
|
|
|
|
|
TARGET_Q_CLASS = 1;
|
|
|
|
|
if (!TARGET_Q_CLASS)
|
|
|
|
|
TARGET_COMPACT_CASESI = 0;
|
|
|
|
|
if (TARGET_COMPACT_CASESI)
|
|
|
|
|
TARGET_CASE_VECTOR_PC_RELATIVE = 1;
|
|
|
|
|
|
|
|
|
|
/* These need to be done at start up. It's convenient to do them here. */
|
|
|
|
|
arc_init ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The condition codes of the ARC, and the inverse function. */
|
|
|
|
|
/* For short branches, the "c" / "nc" names are not defined in the ARC
|
|
|
|
|
Programmers manual, so we have to use "lo" / "hs"" instead. */
|
|
|
|
|
static const char *arc_condition_codes[] =
|
|
|
|
|
{
|
|
|
|
|
"al", 0, "eq", "ne", "p", "n", "lo", "hs", "v", "nv",
|
|
|
|
|
"gt", "le", "ge", "lt", "hi", "ls", "pnz", 0
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
enum arc_cc_code_index
|
|
|
|
|
{
|
|
|
|
|
ARC_CC_AL, ARC_CC_EQ = ARC_CC_AL+2, ARC_CC_NE, ARC_CC_P, ARC_CC_N,
|
|
|
|
|
ARC_CC_C, ARC_CC_NC, ARC_CC_V, ARC_CC_NV,
|
|
|
|
|
ARC_CC_GT, ARC_CC_LE, ARC_CC_GE, ARC_CC_LT, ARC_CC_HI, ARC_CC_LS, ARC_CC_PNZ,
|
|
|
|
|
ARC_CC_LO = ARC_CC_C, ARC_CC_HS = ARC_CC_NC
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#define ARC_INVERSE_CONDITION_CODE(X) ((X) ^ 1)
|
|
|
|
|
|
|
|
|
|
/* Returns the index of the ARC condition code string in
|
|
|
|
|
`arc_condition_codes'. COMPARISON should be an rtx like
|
|
|
|
|
`(eq (...) (...))'. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
get_arc_condition_code (rtx comparison)
|
|
|
|
|
{
|
|
|
|
|
switch (GET_MODE (XEXP (comparison, 0)))
|
|
|
|
|
{
|
|
|
|
|
case CCmode:
|
|
|
|
|
case SImode: /* For BRcc. */
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case EQ : return ARC_CC_EQ;
|
|
|
|
|
case NE : return ARC_CC_NE;
|
|
|
|
|
case GT : return ARC_CC_GT;
|
|
|
|
|
case LE : return ARC_CC_LE;
|
|
|
|
|
case GE : return ARC_CC_GE;
|
|
|
|
|
case LT : return ARC_CC_LT;
|
|
|
|
|
case GTU : return ARC_CC_HI;
|
|
|
|
|
case LEU : return ARC_CC_LS;
|
|
|
|
|
case LTU : return ARC_CC_LO;
|
|
|
|
|
case GEU : return ARC_CC_HS;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_ZNmode:
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case EQ : return ARC_CC_EQ;
|
|
|
|
|
case NE : return ARC_CC_NE;
|
|
|
|
|
case GE: return ARC_CC_P;
|
|
|
|
|
case LT: return ARC_CC_N;
|
|
|
|
|
case GT : return ARC_CC_PNZ;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_Zmode:
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case EQ : return ARC_CC_EQ;
|
|
|
|
|
case NE : return ARC_CC_NE;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_Cmode:
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case LTU : return ARC_CC_C;
|
|
|
|
|
case GEU : return ARC_CC_NC;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_FP_GTmode:
|
|
|
|
|
if (TARGET_ARGONAUT_SET && TARGET_SPFP)
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case GT : return ARC_CC_N;
|
|
|
|
|
case UNLE: return ARC_CC_P;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case GT : return ARC_CC_HI;
|
|
|
|
|
case UNLE : return ARC_CC_LS;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_FP_GEmode:
|
|
|
|
|
/* Same for FPX and non-FPX. */
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case GE : return ARC_CC_HS;
|
|
|
|
|
case UNLT : return ARC_CC_LO;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_FP_UNEQmode:
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case UNEQ : return ARC_CC_EQ;
|
|
|
|
|
case LTGT : return ARC_CC_NE;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_FP_ORDmode:
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case UNORDERED : return ARC_CC_C;
|
|
|
|
|
case ORDERED : return ARC_CC_NC;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
case CC_FPXmode:
|
|
|
|
|
switch (GET_CODE (comparison))
|
|
|
|
|
{
|
|
|
|
|
case EQ : return ARC_CC_EQ;
|
|
|
|
|
case NE : return ARC_CC_NE;
|
|
|
|
|
case UNORDERED : return ARC_CC_C;
|
|
|
|
|
case ORDERED : return ARC_CC_NC;
|
|
|
|
|
case LTGT : return ARC_CC_HI;
|
|
|
|
|
case UNEQ : return ARC_CC_LS;
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
default : gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
/*NOTREACHED*/
|
|
|
|
|
return (42);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if COMPARISON has a short form that can accomodate OFFSET. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_short_comparison_p (rtx comparison, int offset)
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (ARC_CC_NC == ARC_CC_HS);
|
|
|
|
|
gcc_assert (ARC_CC_C == ARC_CC_LO);
|
|
|
|
|
switch (get_arc_condition_code (comparison))
|
|
|
|
|
{
|
|
|
|
|
case ARC_CC_EQ: case ARC_CC_NE:
|
|
|
|
|
return offset >= -512 && offset <= 506;
|
|
|
|
|
case ARC_CC_GT: case ARC_CC_LE: case ARC_CC_GE: case ARC_CC_LT:
|
|
|
|
|
case ARC_CC_HI: case ARC_CC_LS: case ARC_CC_LO: case ARC_CC_HS:
|
|
|
|
|
return offset >= -64 && offset <= 58;
|
|
|
|
|
default:
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
|
|
|
|
|
return the mode to be used for the comparison. */
|
|
|
|
|
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode
|
2013-10-01 19:03:46 +02:00
|
|
|
|
arc_select_cc_mode (enum rtx_code op, rtx x, rtx y)
|
|
|
|
|
{
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode = GET_MODE (x);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
rtx x1;
|
|
|
|
|
|
|
|
|
|
/* For an operation that sets the condition codes as a side-effect, the
|
|
|
|
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C and V flags is not set as for cmp, so we can only use comparisons where
|
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this doesn't matter. (For LT and GE we can use "mi" and "pl"
|
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|
|
|
instead.) */
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|
|
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/* ??? We could use "pnz" for greater than zero, however, we could then
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|
get into trouble because the comparison could not be reversed. */
|
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if (GET_MODE_CLASS (mode) == MODE_INT
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|
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&& y == const0_rtx
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&& (op == EQ || op == NE
|
2014-05-01 14:16:42 +02:00
|
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|
|
|| ((op == LT || op == GE) && GET_MODE_SIZE (GET_MODE (x)) <= 4)))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
return CC_ZNmode;
|
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|
|
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/* add.f for if (a+b) */
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if (mode == SImode
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&& GET_CODE (y) == NEG
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|
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&& (op == EQ || op == NE))
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return CC_ZNmode;
|
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|
|
/* Check if this is a test suitable for bxor.f . */
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if (mode == SImode && (op == EQ || op == NE) && CONST_INT_P (y)
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|
|
&& ((INTVAL (y) - 1) & INTVAL (y)) == 0
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|
|
|
&& INTVAL (y))
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|
|
|
return CC_Zmode;
|
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|
|
|
|
|
|
|
|
/* Check if this is a test suitable for add / bmsk.f . */
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|
|
|
if (mode == SImode && (op == EQ || op == NE) && CONST_INT_P (y)
|
|
|
|
|
&& GET_CODE (x) == AND && CONST_INT_P ((x1 = XEXP (x, 1)))
|
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|
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&& ((INTVAL (x1) + 1) & INTVAL (x1)) == 0
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|
|
|
&& (~INTVAL (x1) | INTVAL (y)) < 0
|
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|
|
|
&& (~INTVAL (x1) | INTVAL (y)) > -0x800)
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|
return CC_Zmode;
|
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|
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if (GET_MODE (x) == SImode && (op == LTU || op == GEU)
|
|
|
|
|
&& GET_CODE (x) == PLUS
|
|
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|
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&& (rtx_equal_p (XEXP (x, 0), y) || rtx_equal_p (XEXP (x, 1), y)))
|
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|
|
|
return CC_Cmode;
|
|
|
|
|
|
|
|
|
|
if (TARGET_ARGONAUT_SET
|
|
|
|
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&& ((mode == SFmode && TARGET_SPFP) || (mode == DFmode && TARGET_DPFP)))
|
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|
|
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switch (op)
|
|
|
|
|
{
|
|
|
|
|
case EQ: case NE: case UNEQ: case LTGT: case ORDERED: case UNORDERED:
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|
|
return CC_FPXmode;
|
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case LT: case UNGE: case GT: case UNLE:
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return CC_FP_GTmode;
|
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case LE: case UNGT: case GE: case UNLT:
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|
|
return CC_FP_GEmode;
|
|
|
|
|
default: gcc_unreachable ();
|
|
|
|
|
}
|
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|
|
else if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_OPTFPE)
|
|
|
|
|
switch (op)
|
|
|
|
|
{
|
|
|
|
|
case EQ: case NE: return CC_Zmode;
|
|
|
|
|
case LT: case UNGE:
|
|
|
|
|
case GT: case UNLE: return CC_FP_GTmode;
|
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case LE: case UNGT:
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|
|
|
case GE: case UNLT: return CC_FP_GEmode;
|
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|
|
|
case UNEQ: case LTGT: return CC_FP_UNEQmode;
|
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|
|
case ORDERED: case UNORDERED: return CC_FP_ORDmode;
|
|
|
|
|
default: gcc_unreachable ();
|
|
|
|
|
}
|
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|
|
|
|
|
|
|
|
return CCmode;
|
|
|
|
|
}
|
|
|
|
|
|
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|
|
/* Vectors to keep interesting information about registers where it can easily
|
|
|
|
|
be got. We use to use the actual mode value as the bit number, but there
|
|
|
|
|
is (or may be) more than 32 modes now. Instead we use two tables: one
|
|
|
|
|
indexed by hard register number, and one indexed by mode. */
|
|
|
|
|
|
|
|
|
|
/* The purpose of arc_mode_class is to shrink the range of modes so that
|
|
|
|
|
they all fit (as bit numbers) in a 32-bit word (again). Each real mode is
|
|
|
|
|
mapped into one arc_mode_class mode. */
|
|
|
|
|
|
|
|
|
|
enum arc_mode_class {
|
|
|
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C_MODE,
|
|
|
|
|
S_MODE, D_MODE, T_MODE, O_MODE,
|
|
|
|
|
SF_MODE, DF_MODE, TF_MODE, OF_MODE,
|
|
|
|
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V_MODE
|
|
|
|
|
};
|
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|
|
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|
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|
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/* Modes for condition codes. */
|
|
|
|
|
#define C_MODES (1 << (int) C_MODE)
|
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|
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|
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|
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/* Modes for single-word and smaller quantities. */
|
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|
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#define S_MODES ((1 << (int) S_MODE) | (1 << (int) SF_MODE))
|
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|
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/* Modes for double-word and smaller quantities. */
|
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|
#define D_MODES (S_MODES | (1 << (int) D_MODE) | (1 << DF_MODE))
|
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|
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/* Mode for 8-byte DF values only. */
|
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|
|
#define DF_MODES (1 << DF_MODE)
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|
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/* Modes for quad-word and smaller quantities. */
|
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#define T_MODES (D_MODES | (1 << (int) T_MODE) | (1 << (int) TF_MODE))
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|
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|
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/* Modes for 128-bit vectors. */
|
|
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|
|
#define V_MODES (1 << (int) V_MODE)
|
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|
|
/* Value is 1 if register/mode pair is acceptable on arc. */
|
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|
|
unsigned int arc_hard_regno_mode_ok[] = {
|
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|
T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES,
|
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T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES,
|
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T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, D_MODES,
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D_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES,
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/* ??? Leave these as S_MODES for now. */
|
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S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES,
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DF_MODES, 0, DF_MODES, 0, S_MODES, S_MODES, S_MODES, S_MODES,
|
|
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|
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S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES,
|
|
|
|
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S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, C_MODES, S_MODES,
|
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|
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|
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V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
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|
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V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
|
|
|
V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
|
|
|
V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
|
|
|
|
|
|
|
|
V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
|
|
|
V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
|
|
|
V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
|
|
|
V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES, V_MODES,
|
|
|
|
|
|
|
|
|
|
S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES,
|
|
|
|
|
S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES, S_MODES
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
unsigned int arc_mode_class [NUM_MACHINE_MODES];
|
|
|
|
|
|
|
|
|
|
enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER];
|
|
|
|
|
|
|
|
|
|
enum reg_class
|
|
|
|
|
arc_preferred_reload_class (rtx, enum reg_class cl)
|
|
|
|
|
{
|
|
|
|
|
if ((cl) == CHEAP_CORE_REGS || (cl) == WRITABLE_CORE_REGS)
|
|
|
|
|
return GENERAL_REGS;
|
|
|
|
|
return cl;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Initialize the arc_mode_class array. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_init_reg_tables (void)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_MACHINE_MODES; i++)
|
|
|
|
|
{
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode m = (machine_mode) i;
|
2014-04-29 15:09:03 +02:00
|
|
|
|
|
|
|
|
|
switch (GET_MODE_CLASS (m))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
case MODE_INT:
|
|
|
|
|
case MODE_PARTIAL_INT:
|
|
|
|
|
case MODE_COMPLEX_INT:
|
2014-04-29 15:09:03 +02:00
|
|
|
|
if (GET_MODE_SIZE (m) <= 4)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
arc_mode_class[i] = 1 << (int) S_MODE;
|
2014-04-29 15:09:03 +02:00
|
|
|
|
else if (GET_MODE_SIZE (m) == 8)
|
2013-10-01 19:03:46 +02:00
|
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|
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arc_mode_class[i] = 1 << (int) D_MODE;
|
2014-04-29 15:09:03 +02:00
|
|
|
|
else if (GET_MODE_SIZE (m) == 16)
|
2013-10-01 19:03:46 +02:00
|
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|
|
arc_mode_class[i] = 1 << (int) T_MODE;
|
2014-04-29 15:09:03 +02:00
|
|
|
|
else if (GET_MODE_SIZE (m) == 32)
|
2013-10-01 19:03:46 +02:00
|
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|
|
arc_mode_class[i] = 1 << (int) O_MODE;
|
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else
|
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arc_mode_class[i] = 0;
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break;
|
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case MODE_FLOAT:
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|
|
case MODE_COMPLEX_FLOAT:
|
2014-04-29 15:09:03 +02:00
|
|
|
|
if (GET_MODE_SIZE (m) <= 4)
|
2013-10-01 19:03:46 +02:00
|
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arc_mode_class[i] = 1 << (int) SF_MODE;
|
2014-04-29 15:09:03 +02:00
|
|
|
|
else if (GET_MODE_SIZE (m) == 8)
|
2013-10-01 19:03:46 +02:00
|
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arc_mode_class[i] = 1 << (int) DF_MODE;
|
2014-04-29 15:09:03 +02:00
|
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|
|
else if (GET_MODE_SIZE (m) == 16)
|
2013-10-01 19:03:46 +02:00
|
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arc_mode_class[i] = 1 << (int) TF_MODE;
|
2014-04-29 15:09:03 +02:00
|
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|
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else if (GET_MODE_SIZE (m) == 32)
|
2013-10-01 19:03:46 +02:00
|
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arc_mode_class[i] = 1 << (int) OF_MODE;
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else
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arc_mode_class[i] = 0;
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break;
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case MODE_VECTOR_INT:
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arc_mode_class [i] = (1<< (int) V_MODE);
|
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break;
|
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case MODE_CC:
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default:
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/* mode_class hasn't been initialized yet for EXTRA_CC_MODES, so
|
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we must explicitly check for them here. */
|
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if (i == (int) CCmode || i == (int) CC_ZNmode || i == (int) CC_Zmode
|
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|| i == (int) CC_Cmode
|
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|| i == CC_FP_GTmode || i == CC_FP_GEmode || i == CC_FP_ORDmode)
|
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arc_mode_class[i] = 1 << (int) C_MODE;
|
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else
|
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|
arc_mode_class[i] = 0;
|
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|
break;
|
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|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
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|
|
|
|
|
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/* Core registers 56..59 are used for multiply extension options.
|
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|
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The dsp option uses r56 and r57, these are then named acc1 and acc2.
|
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acc1 is the highpart, and acc2 the lowpart, so which register gets which
|
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number depends on endianness.
|
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|
|
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The mul64 multiplier options use r57 for mlo, r58 for mmid and r59 for mhi.
|
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|
|
|
Because mlo / mhi form a 64 bit value, we use different gcc internal
|
|
|
|
|
register numbers to make them form a register pair as the gcc internals
|
|
|
|
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know it. mmid gets number 57, if still available, and mlo / mhi get
|
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|
|
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number 58 and 59, depending on endianness. We use DBX_REGISTER_NUMBER
|
|
|
|
|
to map this back. */
|
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|
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char rname56[5] = "r56";
|
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char rname57[5] = "r57";
|
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|
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char rname58[5] = "r58";
|
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|
|
|
char rname59[5] = "r59";
|
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|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_conditional_register_usage (void)
|
|
|
|
|
{
|
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|
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int regno;
|
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int i;
|
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|
|
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int fix_start = 60, fix_end = 55;
|
|
|
|
|
|
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|
|
if (TARGET_MUL64_SET)
|
|
|
|
|
{
|
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|
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|
fix_start = 57;
|
|
|
|
|
fix_end = 59;
|
|
|
|
|
|
|
|
|
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/* We don't provide a name for mmed. In rtl / assembly resource lists,
|
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|
|
|
you are supposed to refer to it as mlo & mhi, e.g
|
|
|
|
|
(zero_extract:SI (reg:DI 58) (const_int 32) (16)) .
|
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|
|
|
In an actual asm instruction, you are of course use mmed.
|
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|
|
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The point of avoiding having a separate register for mmed is that
|
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this way, we don't have to carry clobbers of that reg around in every
|
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|
|
|
isntruction that modifies mlo and/or mhi. */
|
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|
|
|
strcpy (rname57, "");
|
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|
|
strcpy (rname58, TARGET_BIG_ENDIAN ? "mhi" : "mlo");
|
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|
|
|
strcpy (rname59, TARGET_BIG_ENDIAN ? "mlo" : "mhi");
|
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|
|
|
}
|
|
|
|
|
if (TARGET_MULMAC_32BY16_SET)
|
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|
|
|
{
|
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|
|
fix_start = 56;
|
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|
|
|
fix_end = fix_end > 57 ? fix_end : 57;
|
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|
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strcpy (rname56, TARGET_BIG_ENDIAN ? "acc1" : "acc2");
|
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|
|
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strcpy (rname57, TARGET_BIG_ENDIAN ? "acc2" : "acc1");
|
|
|
|
|
}
|
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|
|
for (regno = fix_start; regno <= fix_end; regno++)
|
|
|
|
|
{
|
|
|
|
|
if (!fixed_regs[regno])
|
|
|
|
|
warning (0, "multiply option implies r%d is fixed", regno);
|
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|
|
|
fixed_regs [regno] = call_used_regs[regno] = 1;
|
|
|
|
|
}
|
|
|
|
|
if (TARGET_Q_CLASS)
|
|
|
|
|
{
|
|
|
|
|
reg_alloc_order[2] = 12;
|
|
|
|
|
reg_alloc_order[3] = 13;
|
|
|
|
|
reg_alloc_order[4] = 14;
|
|
|
|
|
reg_alloc_order[5] = 15;
|
|
|
|
|
reg_alloc_order[6] = 1;
|
|
|
|
|
reg_alloc_order[7] = 0;
|
|
|
|
|
reg_alloc_order[8] = 4;
|
|
|
|
|
reg_alloc_order[9] = 5;
|
|
|
|
|
reg_alloc_order[10] = 6;
|
|
|
|
|
reg_alloc_order[11] = 7;
|
|
|
|
|
reg_alloc_order[12] = 8;
|
|
|
|
|
reg_alloc_order[13] = 9;
|
|
|
|
|
reg_alloc_order[14] = 10;
|
|
|
|
|
reg_alloc_order[15] = 11;
|
|
|
|
|
}
|
|
|
|
|
if (TARGET_SIMD_SET)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
2013-10-01 19:37:41 +02:00
|
|
|
|
for (i = ARC_FIRST_SIMD_VR_REG; i <= ARC_LAST_SIMD_VR_REG; i++)
|
|
|
|
|
reg_alloc_order [i] = i;
|
|
|
|
|
for (i = ARC_FIRST_SIMD_DMA_CONFIG_REG;
|
|
|
|
|
i <= ARC_LAST_SIMD_DMA_CONFIG_REG; i++)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
reg_alloc_order [i] = i;
|
|
|
|
|
}
|
|
|
|
|
/* For Arctangent-A5 / ARC600, lp_count may not be read in an instruction
|
|
|
|
|
following immediately after another one setting it to a new value.
|
|
|
|
|
There was some discussion on how to enforce scheduling constraints for
|
|
|
|
|
processors with missing interlocks on the gcc mailing list:
|
|
|
|
|
http://gcc.gnu.org/ml/gcc/2008-05/msg00021.html .
|
|
|
|
|
However, we can't actually use this approach, because for ARC the
|
|
|
|
|
delay slot scheduling pass is active, which runs after
|
|
|
|
|
machine_dependent_reorg. */
|
|
|
|
|
if (TARGET_ARC600)
|
|
|
|
|
CLEAR_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], LP_COUNT);
|
|
|
|
|
else if (!TARGET_ARC700)
|
|
|
|
|
fixed_regs[LP_COUNT] = 1;
|
|
|
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
|
|
|
|
if (!call_used_regs[regno])
|
|
|
|
|
CLEAR_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno);
|
|
|
|
|
for (regno = 32; regno < 60; regno++)
|
|
|
|
|
if (!fixed_regs[regno])
|
|
|
|
|
SET_HARD_REG_BIT (reg_class_contents[WRITABLE_CORE_REGS], regno);
|
|
|
|
|
if (TARGET_ARC700)
|
|
|
|
|
{
|
|
|
|
|
for (regno = 32; regno <= 60; regno++)
|
|
|
|
|
CLEAR_HARD_REG_BIT (reg_class_contents[CHEAP_CORE_REGS], regno);
|
|
|
|
|
|
|
|
|
|
/* If they have used -ffixed-lp_count, make sure it takes
|
|
|
|
|
effect. */
|
|
|
|
|
if (fixed_regs[LP_COUNT])
|
|
|
|
|
{
|
|
|
|
|
CLEAR_HARD_REG_BIT (reg_class_contents[LPCOUNT_REG], LP_COUNT);
|
|
|
|
|
CLEAR_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], LP_COUNT);
|
|
|
|
|
CLEAR_HARD_REG_BIT (reg_class_contents[WRITABLE_CORE_REGS], LP_COUNT);
|
|
|
|
|
|
|
|
|
|
/* Instead of taking out SF_MODE like below, forbid it outright. */
|
|
|
|
|
arc_hard_regno_mode_ok[60] = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
arc_hard_regno_mode_ok[60] = 1 << (int) S_MODE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
|
|
{
|
|
|
|
|
if (i < 29)
|
|
|
|
|
{
|
|
|
|
|
if (TARGET_Q_CLASS && ((i <= 3) || ((i >= 12) && (i <= 15))))
|
|
|
|
|
arc_regno_reg_class[i] = ARCOMPACT16_REGS;
|
|
|
|
|
else
|
|
|
|
|
arc_regno_reg_class[i] = GENERAL_REGS;
|
|
|
|
|
}
|
|
|
|
|
else if (i < 60)
|
|
|
|
|
arc_regno_reg_class[i]
|
|
|
|
|
= (fixed_regs[i]
|
|
|
|
|
? (TEST_HARD_REG_BIT (reg_class_contents[CHEAP_CORE_REGS], i)
|
|
|
|
|
? CHEAP_CORE_REGS : ALL_CORE_REGS)
|
|
|
|
|
: ((TARGET_ARC700
|
|
|
|
|
&& TEST_HARD_REG_BIT (reg_class_contents[CHEAP_CORE_REGS], i))
|
|
|
|
|
? CHEAP_CORE_REGS : WRITABLE_CORE_REGS));
|
|
|
|
|
else
|
|
|
|
|
arc_regno_reg_class[i] = NO_REGS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* ARCOMPACT16_REGS is empty, if TARGET_Q_CLASS has not been activated. */
|
|
|
|
|
if (!TARGET_Q_CLASS)
|
|
|
|
|
{
|
|
|
|
|
CLEAR_HARD_REG_SET(reg_class_contents [ARCOMPACT16_REGS]);
|
|
|
|
|
CLEAR_HARD_REG_SET(reg_class_contents [AC16_BASE_REGS]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
gcc_assert (FIRST_PSEUDO_REGISTER >= 144);
|
|
|
|
|
|
|
|
|
|
/* Handle Special Registers. */
|
|
|
|
|
arc_regno_reg_class[29] = LINK_REGS; /* ilink1 register. */
|
|
|
|
|
arc_regno_reg_class[30] = LINK_REGS; /* ilink2 register. */
|
|
|
|
|
arc_regno_reg_class[31] = LINK_REGS; /* blink register. */
|
|
|
|
|
arc_regno_reg_class[60] = LPCOUNT_REG;
|
|
|
|
|
arc_regno_reg_class[61] = NO_REGS; /* CC_REG: must be NO_REGS. */
|
|
|
|
|
arc_regno_reg_class[62] = GENERAL_REGS;
|
|
|
|
|
|
|
|
|
|
if (TARGET_DPFP)
|
|
|
|
|
{
|
|
|
|
|
for (i = 40; i < 44; ++i)
|
|
|
|
|
{
|
|
|
|
|
arc_regno_reg_class[i] = DOUBLE_REGS;
|
|
|
|
|
|
|
|
|
|
/* Unless they want us to do 'mov d1, 0x00000000' make sure
|
|
|
|
|
no attempt is made to use such a register as a destination
|
|
|
|
|
operand in *movdf_insn. */
|
|
|
|
|
if (!TARGET_ARGONAUT_SET)
|
|
|
|
|
{
|
|
|
|
|
/* Make sure no 'c', 'w', 'W', or 'Rac' constraint is
|
|
|
|
|
interpreted to mean they can use D1 or D2 in their insn. */
|
|
|
|
|
CLEAR_HARD_REG_BIT(reg_class_contents[CHEAP_CORE_REGS ], i);
|
|
|
|
|
CLEAR_HARD_REG_BIT(reg_class_contents[ALL_CORE_REGS ], i);
|
|
|
|
|
CLEAR_HARD_REG_BIT(reg_class_contents[WRITABLE_CORE_REGS ], i);
|
|
|
|
|
CLEAR_HARD_REG_BIT(reg_class_contents[MPY_WRITABLE_CORE_REGS], i);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Disable all DOUBLE_REGISTER settings,
|
|
|
|
|
if not generating DPFP code. */
|
|
|
|
|
arc_regno_reg_class[40] = ALL_REGS;
|
|
|
|
|
arc_regno_reg_class[41] = ALL_REGS;
|
|
|
|
|
arc_regno_reg_class[42] = ALL_REGS;
|
|
|
|
|
arc_regno_reg_class[43] = ALL_REGS;
|
|
|
|
|
|
|
|
|
|
arc_hard_regno_mode_ok[40] = 0;
|
|
|
|
|
arc_hard_regno_mode_ok[42] = 0;
|
|
|
|
|
|
|
|
|
|
CLEAR_HARD_REG_SET(reg_class_contents [DOUBLE_REGS]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (TARGET_SIMD_SET)
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (ARC_FIRST_SIMD_VR_REG == 64);
|
|
|
|
|
gcc_assert (ARC_LAST_SIMD_VR_REG == 127);
|
|
|
|
|
|
|
|
|
|
for (i = ARC_FIRST_SIMD_VR_REG; i <= ARC_LAST_SIMD_VR_REG; i++)
|
|
|
|
|
arc_regno_reg_class [i] = SIMD_VR_REGS;
|
|
|
|
|
|
|
|
|
|
gcc_assert (ARC_FIRST_SIMD_DMA_CONFIG_REG == 128);
|
|
|
|
|
gcc_assert (ARC_FIRST_SIMD_DMA_CONFIG_IN_REG == 128);
|
|
|
|
|
gcc_assert (ARC_FIRST_SIMD_DMA_CONFIG_OUT_REG == 136);
|
|
|
|
|
gcc_assert (ARC_LAST_SIMD_DMA_CONFIG_REG == 143);
|
|
|
|
|
|
|
|
|
|
for (i = ARC_FIRST_SIMD_DMA_CONFIG_REG;
|
|
|
|
|
i <= ARC_LAST_SIMD_DMA_CONFIG_REG; i++)
|
|
|
|
|
arc_regno_reg_class [i] = SIMD_DMA_CONFIG_REGS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pc : r63 */
|
|
|
|
|
arc_regno_reg_class[PROGRAM_COUNTER_REGNO] = GENERAL_REGS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Handle an "interrupt" attribute; arguments as in
|
|
|
|
|
struct attribute_spec.handler. */
|
|
|
|
|
|
|
|
|
|
static tree
|
|
|
|
|
arc_handle_interrupt_attribute (tree *, tree name, tree args, int,
|
|
|
|
|
bool *no_add_attrs)
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (args);
|
|
|
|
|
|
|
|
|
|
tree value = TREE_VALUE (args);
|
|
|
|
|
|
|
|
|
|
if (TREE_CODE (value) != STRING_CST)
|
|
|
|
|
{
|
|
|
|
|
warning (OPT_Wattributes,
|
|
|
|
|
"argument of %qE attribute is not a string constant",
|
|
|
|
|
name);
|
|
|
|
|
*no_add_attrs = true;
|
|
|
|
|
}
|
|
|
|
|
else if (strcmp (TREE_STRING_POINTER (value), "ilink1")
|
|
|
|
|
&& strcmp (TREE_STRING_POINTER (value), "ilink2"))
|
|
|
|
|
{
|
|
|
|
|
warning (OPT_Wattributes,
|
|
|
|
|
"argument of %qE attribute is not \"ilink1\" or \"ilink2\"",
|
|
|
|
|
name);
|
|
|
|
|
*no_add_attrs = true;
|
|
|
|
|
}
|
|
|
|
|
return NULL_TREE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return zero if TYPE1 and TYPE are incompatible, one if they are compatible,
|
|
|
|
|
and two if they are nearly compatible (which causes a warning to be
|
|
|
|
|
generated). */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
arc_comp_type_attributes (const_tree type1,
|
|
|
|
|
const_tree type2)
|
|
|
|
|
{
|
|
|
|
|
int l1, l2, m1, m2, s1, s2;
|
|
|
|
|
|
|
|
|
|
/* Check for mismatch of non-default calling convention. */
|
|
|
|
|
if (TREE_CODE (type1) != FUNCTION_TYPE)
|
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
|
|
/* Check for mismatched call attributes. */
|
|
|
|
|
l1 = lookup_attribute ("long_call", TYPE_ATTRIBUTES (type1)) != NULL;
|
|
|
|
|
l2 = lookup_attribute ("long_call", TYPE_ATTRIBUTES (type2)) != NULL;
|
|
|
|
|
m1 = lookup_attribute ("medium_call", TYPE_ATTRIBUTES (type1)) != NULL;
|
|
|
|
|
m2 = lookup_attribute ("medium_call", TYPE_ATTRIBUTES (type2)) != NULL;
|
|
|
|
|
s1 = lookup_attribute ("short_call", TYPE_ATTRIBUTES (type1)) != NULL;
|
|
|
|
|
s2 = lookup_attribute ("short_call", TYPE_ATTRIBUTES (type2)) != NULL;
|
|
|
|
|
|
|
|
|
|
/* Only bother to check if an attribute is defined. */
|
|
|
|
|
if (l1 | l2 | m1 | m2 | s1 | s2)
|
|
|
|
|
{
|
|
|
|
|
/* If one type has an attribute, the other must have the same attribute. */
|
|
|
|
|
if ((l1 != l2) || (m1 != m2) || (s1 != s2))
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* Disallow mixed attributes. */
|
|
|
|
|
if (l1 + m1 + s1 > 1)
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Set the default attributes for TYPE. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_set_default_type_attributes (tree type ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
gcc_unreachable();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Misc. utilities. */
|
|
|
|
|
|
|
|
|
|
/* X and Y are two things to compare using CODE. Emit the compare insn and
|
|
|
|
|
return the rtx for the cc reg in the proper mode. */
|
|
|
|
|
|
|
|
|
|
rtx
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
gen_compare_reg (rtx comparison, machine_mode omode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
enum rtx_code code = GET_CODE (comparison);
|
|
|
|
|
rtx x = XEXP (comparison, 0);
|
|
|
|
|
rtx y = XEXP (comparison, 1);
|
|
|
|
|
rtx tmp, cc_reg;
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
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machine_mode mode, cmode;
|
2013-10-01 19:03:46 +02:00
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cmode = GET_MODE (x);
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|
|
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if (cmode == VOIDmode)
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cmode = GET_MODE (y);
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gcc_assert (cmode == SImode || cmode == SFmode || cmode == DFmode);
|
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|
|
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if (cmode == SImode)
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|
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{
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if (!register_operand (x, SImode))
|
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{
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if (register_operand (y, SImode))
|
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|
|
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{
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tmp = x;
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x = y;
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y = tmp;
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code = swap_condition (code);
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}
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else
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x = copy_to_mode_reg (SImode, x);
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}
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if (GET_CODE (y) == SYMBOL_REF && flag_pic)
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y = copy_to_mode_reg (SImode, y);
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}
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else
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{
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x = force_reg (cmode, x);
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y = force_reg (cmode, y);
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}
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mode = SELECT_CC_MODE (code, x, y);
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cc_reg = gen_rtx_REG (mode, CC_REG);
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/* ??? FIXME (x-y)==0, as done by both cmpsfpx_raw and
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cmpdfpx_raw, is not a correct comparison for floats:
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http://www.cygnus-software.com/papers/comparingfloats/comparingfloats.htm
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*/
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if (TARGET_ARGONAUT_SET
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&& ((cmode == SFmode && TARGET_SPFP) || (cmode == DFmode && TARGET_DPFP)))
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{
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switch (code)
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{
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case NE: case EQ: case LT: case UNGE: case LE: case UNGT:
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case UNEQ: case LTGT: case ORDERED: case UNORDERED:
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break;
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case GT: case UNLE: case GE: case UNLT:
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code = swap_condition (code);
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tmp = x;
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x = y;
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y = tmp;
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break;
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default:
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gcc_unreachable ();
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}
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if (cmode == SFmode)
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{
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emit_insn (gen_cmpsfpx_raw (x, y));
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}
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else /* DFmode */
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{
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/* Accepts Dx regs directly by insns. */
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emit_insn (gen_cmpdfpx_raw (x, y));
|
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}
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if (mode != CC_FPXmode)
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emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
|
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|
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gen_rtx_COMPARE (mode,
|
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|
|
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gen_rtx_REG (CC_FPXmode, 61),
|
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|
|
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const0_rtx)));
|
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|
|
|
}
|
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|
|
else if (GET_MODE_CLASS (cmode) == MODE_FLOAT && TARGET_OPTFPE)
|
|
|
|
|
{
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rtx op0 = gen_rtx_REG (cmode, 0);
|
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rtx op1 = gen_rtx_REG (cmode, GET_MODE_SIZE (cmode) / UNITS_PER_WORD);
|
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|
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switch (code)
|
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|
|
|
{
|
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|
|
|
case NE: case EQ: case GT: case UNLE: case GE: case UNLT:
|
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|
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case UNEQ: case LTGT: case ORDERED: case UNORDERED:
|
|
|
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break;
|
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|
|
case LT: case UNGE: case LE: case UNGT:
|
|
|
|
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code = swap_condition (code);
|
|
|
|
|
tmp = x;
|
|
|
|
|
x = y;
|
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|
|
|
y = tmp;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
if (currently_expanding_to_rtl)
|
|
|
|
|
{
|
|
|
|
|
emit_move_insn (op0, x);
|
|
|
|
|
emit_move_insn (op1, y);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (rtx_equal_p (op0, x));
|
|
|
|
|
gcc_assert (rtx_equal_p (op1, y));
|
|
|
|
|
}
|
|
|
|
|
emit_insn (gen_cmp_float (cc_reg, gen_rtx_COMPARE (mode, op0, op1)));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
emit_insn (gen_rtx_SET (omode, cc_reg,
|
|
|
|
|
gen_rtx_COMPARE (mode, x, y)));
|
|
|
|
|
return gen_rtx_fmt_ee (code, omode, cc_reg, const0_rtx);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if VALUE, a const_double, will fit in a limm (4 byte number).
|
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|
|
|
We assume the value can be either signed or unsigned. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_double_limm_p (rtx value)
|
|
|
|
|
{
|
|
|
|
|
HOST_WIDE_INT low, high;
|
|
|
|
|
|
|
|
|
|
gcc_assert (GET_CODE (value) == CONST_DOUBLE);
|
|
|
|
|
|
|
|
|
|
if (TARGET_DPFP)
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
low = CONST_DOUBLE_LOW (value);
|
|
|
|
|
high = CONST_DOUBLE_HIGH (value);
|
|
|
|
|
|
|
|
|
|
if (low & 0x80000000)
|
|
|
|
|
{
|
|
|
|
|
return (((unsigned HOST_WIDE_INT) low <= 0xffffffff && high == 0)
|
|
|
|
|
|| (((low & - (unsigned HOST_WIDE_INT) 0x80000000)
|
|
|
|
|
== - (unsigned HOST_WIDE_INT) 0x80000000)
|
|
|
|
|
&& high == -1));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
return (unsigned HOST_WIDE_INT) low <= 0x7fffffff && high == 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Do any needed setup for a variadic function. For the ARC, we must
|
|
|
|
|
create a register parameter block, and then copy any anonymous arguments
|
|
|
|
|
in registers to memory.
|
|
|
|
|
|
|
|
|
|
CUM has not been updated for the last named argument which has type TYPE
|
|
|
|
|
and mode MODE, and we rely on this fact. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_setup_incoming_varargs (cumulative_args_t args_so_far,
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode, tree type,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int *pretend_size, int no_rtl)
|
|
|
|
|
{
|
|
|
|
|
int first_anon_arg;
|
|
|
|
|
CUMULATIVE_ARGS next_cum;
|
|
|
|
|
|
|
|
|
|
/* We must treat `__builtin_va_alist' as an anonymous arg. */
|
|
|
|
|
|
|
|
|
|
next_cum = *get_cumulative_args (args_so_far);
|
|
|
|
|
arc_function_arg_advance (pack_cumulative_args (&next_cum), mode, type, 1);
|
|
|
|
|
first_anon_arg = next_cum;
|
|
|
|
|
|
|
|
|
|
if (first_anon_arg < MAX_ARC_PARM_REGS)
|
|
|
|
|
{
|
|
|
|
|
/* First anonymous (unnamed) argument is in a reg. */
|
|
|
|
|
|
|
|
|
|
/* Note that first_reg_offset < MAX_ARC_PARM_REGS. */
|
|
|
|
|
int first_reg_offset = first_anon_arg;
|
|
|
|
|
|
|
|
|
|
if (!no_rtl)
|
|
|
|
|
{
|
|
|
|
|
rtx regblock
|
|
|
|
|
= gen_rtx_MEM (BLKmode, plus_constant (Pmode, arg_pointer_rtx,
|
|
|
|
|
FIRST_PARM_OFFSET (0)));
|
|
|
|
|
move_block_from_reg (first_reg_offset, regblock,
|
|
|
|
|
MAX_ARC_PARM_REGS - first_reg_offset);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*pretend_size
|
|
|
|
|
= ((MAX_ARC_PARM_REGS - first_reg_offset ) * UNITS_PER_WORD);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Cost functions. */
|
|
|
|
|
|
|
|
|
|
/* Provide the costs of an addressing mode that contains ADDR.
|
|
|
|
|
If ADDR is not a valid address, its cost is irrelevant. */
|
|
|
|
|
|
|
|
|
|
int
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_address_cost (rtx addr, machine_mode, addr_space_t, bool speed)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
switch (GET_CODE (addr))
|
|
|
|
|
{
|
|
|
|
|
case REG :
|
|
|
|
|
return speed || satisfies_constraint_Rcq (addr) ? 0 : 1;
|
|
|
|
|
case PRE_INC: case PRE_DEC: case POST_INC: case POST_DEC:
|
|
|
|
|
case PRE_MODIFY: case POST_MODIFY:
|
|
|
|
|
return !speed;
|
|
|
|
|
|
|
|
|
|
case LABEL_REF :
|
|
|
|
|
case SYMBOL_REF :
|
|
|
|
|
case CONST :
|
|
|
|
|
/* Most likely needs a LIMM. */
|
|
|
|
|
return COSTS_N_INSNS (1);
|
|
|
|
|
|
|
|
|
|
case PLUS :
|
|
|
|
|
{
|
|
|
|
|
register rtx plus0 = XEXP (addr, 0);
|
|
|
|
|
register rtx plus1 = XEXP (addr, 1);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (plus0) != REG
|
|
|
|
|
&& (GET_CODE (plus0) != MULT
|
|
|
|
|
|| !CONST_INT_P (XEXP (plus0, 1))
|
|
|
|
|
|| (INTVAL (XEXP (plus0, 1)) != 2
|
|
|
|
|
&& INTVAL (XEXP (plus0, 1)) != 4)))
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
switch (GET_CODE (plus1))
|
|
|
|
|
{
|
|
|
|
|
case CONST_INT :
|
|
|
|
|
return (!RTX_OK_FOR_OFFSET_P (SImode, plus1)
|
|
|
|
|
? COSTS_N_INSNS (1)
|
|
|
|
|
: speed
|
|
|
|
|
? 0
|
|
|
|
|
: (satisfies_constraint_Rcq (plus0)
|
|
|
|
|
&& satisfies_constraint_O (plus1))
|
|
|
|
|
? 0
|
|
|
|
|
: 1);
|
|
|
|
|
case REG:
|
|
|
|
|
return (speed < 1 ? 0
|
|
|
|
|
: (satisfies_constraint_Rcq (plus0)
|
|
|
|
|
&& satisfies_constraint_Rcq (plus1))
|
|
|
|
|
? 0 : 1);
|
|
|
|
|
case CONST :
|
|
|
|
|
case SYMBOL_REF :
|
|
|
|
|
case LABEL_REF :
|
|
|
|
|
return COSTS_N_INSNS (1);
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 4;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit instruction X with the frame related bit set. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
frame_insn (rtx x)
|
|
|
|
|
{
|
|
|
|
|
x = emit_insn (x);
|
|
|
|
|
RTX_FRAME_RELATED_P (x) = 1;
|
|
|
|
|
return x;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit a frame insn to move SRC to DST. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
frame_move (rtx dst, rtx src)
|
|
|
|
|
{
|
|
|
|
|
return frame_insn (gen_rtx_SET (VOIDmode, dst, src));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Like frame_move, but add a REG_INC note for REG if ADDR contains an
|
|
|
|
|
auto increment address, or is zero. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
frame_move_inc (rtx dst, rtx src, rtx reg, rtx addr)
|
|
|
|
|
{
|
|
|
|
|
rtx insn = frame_move (dst, src);
|
|
|
|
|
|
|
|
|
|
if (!addr
|
|
|
|
|
|| GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == POST_INC
|
|
|
|
|
|| GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
|
|
|
|
|
add_reg_note (insn, REG_INC, reg);
|
|
|
|
|
return insn;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit a frame insn which adjusts a frame address register REG by OFFSET. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
frame_add (rtx reg, HOST_WIDE_INT offset)
|
|
|
|
|
{
|
|
|
|
|
gcc_assert ((offset & 0x3) == 0);
|
|
|
|
|
if (!offset)
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
return frame_move (reg, plus_constant (Pmode, reg, offset));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit a frame insn which adjusts stack pointer by OFFSET. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
frame_stack_add (HOST_WIDE_INT offset)
|
|
|
|
|
{
|
|
|
|
|
return frame_add (stack_pointer_rtx, offset);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Traditionally, we push saved registers first in the prologue,
|
|
|
|
|
then we allocate the rest of the frame - and reverse in the epilogue.
|
|
|
|
|
This has still its merits for ease of debugging, or saving code size
|
|
|
|
|
or even execution time if the stack frame is so large that some accesses
|
|
|
|
|
can't be encoded anymore with offsets in the instruction code when using
|
|
|
|
|
a different scheme.
|
|
|
|
|
Also, it would be a good starting point if we got instructions to help
|
|
|
|
|
with register save/restore.
|
|
|
|
|
|
|
|
|
|
However, often stack frames are small, and the pushing / popping has
|
|
|
|
|
some costs:
|
|
|
|
|
- the stack modification prevents a lot of scheduling.
|
|
|
|
|
- frame allocation / deallocation needs extra instructions.
|
|
|
|
|
- unless we know that we compile ARC700 user code, we need to put
|
|
|
|
|
a memory barrier after frame allocation / before deallocation to
|
|
|
|
|
prevent interrupts clobbering our data in the frame.
|
|
|
|
|
In particular, we don't have any such guarantees for library functions,
|
|
|
|
|
which tend to, on the other hand, to have small frames.
|
|
|
|
|
|
|
|
|
|
Thus, for small frames, we'd like to use a different scheme:
|
|
|
|
|
- The frame is allocated in full with the first prologue instruction,
|
|
|
|
|
and deallocated in full with the last epilogue instruction.
|
|
|
|
|
Thus, the instructions in-betwen can be freely scheduled.
|
|
|
|
|
- If the function has no outgoing arguments on the stack, we can allocate
|
|
|
|
|
one register save slot at the top of the stack. This register can then
|
|
|
|
|
be saved simultanously with frame allocation, and restored with
|
|
|
|
|
frame deallocation.
|
|
|
|
|
This register can be picked depending on scheduling considerations,
|
|
|
|
|
although same though should go into having some set of registers
|
|
|
|
|
to be potentially lingering after a call, and others to be available
|
|
|
|
|
immediately - i.e. in the absence of interprocedual optimization, we
|
|
|
|
|
can use an ABI-like convention for register allocation to reduce
|
|
|
|
|
stalls after function return. */
|
|
|
|
|
/* Function prologue/epilogue handlers. */
|
|
|
|
|
|
|
|
|
|
/* ARCompact stack frames look like:
|
|
|
|
|
|
|
|
|
|
Before call After call
|
|
|
|
|
high +-----------------------+ +-----------------------+
|
|
|
|
|
mem | reg parm save area | | reg parm save area |
|
|
|
|
|
| only created for | | only created for |
|
|
|
|
|
| variable arg fns | | variable arg fns |
|
|
|
|
|
AP +-----------------------+ +-----------------------+
|
|
|
|
|
| return addr register | | return addr register |
|
|
|
|
|
| (if required) | | (if required) |
|
|
|
|
|
+-----------------------+ +-----------------------+
|
|
|
|
|
| | | |
|
|
|
|
|
| reg save area | | reg save area |
|
|
|
|
|
| | | |
|
|
|
|
|
+-----------------------+ +-----------------------+
|
|
|
|
|
| frame pointer | | frame pointer |
|
|
|
|
|
| (if required) | | (if required) |
|
|
|
|
|
FP +-----------------------+ +-----------------------+
|
|
|
|
|
| | | |
|
|
|
|
|
| local/temp variables | | local/temp variables |
|
|
|
|
|
| | | |
|
|
|
|
|
+-----------------------+ +-----------------------+
|
|
|
|
|
| | | |
|
|
|
|
|
| arguments on stack | | arguments on stack |
|
|
|
|
|
| | | |
|
|
|
|
|
SP +-----------------------+ +-----------------------+
|
|
|
|
|
| reg parm save area |
|
|
|
|
|
| only created for |
|
|
|
|
|
| variable arg fns |
|
|
|
|
|
AP +-----------------------+
|
|
|
|
|
| return addr register |
|
|
|
|
|
| (if required) |
|
|
|
|
|
+-----------------------+
|
|
|
|
|
| |
|
|
|
|
|
| reg save area |
|
|
|
|
|
| |
|
|
|
|
|
+-----------------------+
|
|
|
|
|
| frame pointer |
|
|
|
|
|
| (if required) |
|
|
|
|
|
FP +-----------------------+
|
|
|
|
|
| |
|
|
|
|
|
| local/temp variables |
|
|
|
|
|
| |
|
|
|
|
|
+-----------------------+
|
|
|
|
|
| |
|
|
|
|
|
| arguments on stack |
|
|
|
|
|
low | |
|
|
|
|
|
mem SP +-----------------------+
|
|
|
|
|
|
|
|
|
|
Notes:
|
|
|
|
|
1) The "reg parm save area" does not exist for non variable argument fns.
|
|
|
|
|
The "reg parm save area" can be eliminated completely if we created our
|
|
|
|
|
own va-arc.h, but that has tradeoffs as well (so it's not done). */
|
|
|
|
|
|
|
|
|
|
/* Structure to be filled in by arc_compute_frame_size with register
|
|
|
|
|
save masks, and offsets for the current function. */
|
2013-10-01 23:59:46 +02:00
|
|
|
|
struct GTY (()) arc_frame_info
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
unsigned int total_size; /* # bytes that the entire frame takes up. */
|
|
|
|
|
unsigned int extra_size; /* # bytes of extra stuff. */
|
|
|
|
|
unsigned int pretend_size; /* # bytes we push and pretend caller did. */
|
|
|
|
|
unsigned int args_size; /* # bytes that outgoing arguments take up. */
|
|
|
|
|
unsigned int reg_size; /* # bytes needed to store regs. */
|
|
|
|
|
unsigned int var_size; /* # bytes that variables take up. */
|
|
|
|
|
unsigned int reg_offset; /* Offset from new sp to store regs. */
|
|
|
|
|
unsigned int gmask; /* Mask of saved gp registers. */
|
|
|
|
|
int initialized; /* Nonzero if frame size already calculated. */
|
|
|
|
|
short millicode_start_reg;
|
|
|
|
|
short millicode_end_reg;
|
|
|
|
|
bool save_return_addr;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Defining data structures for per-function information. */
|
|
|
|
|
|
|
|
|
|
typedef struct GTY (()) machine_function
|
|
|
|
|
{
|
|
|
|
|
enum arc_function_type fn_type;
|
|
|
|
|
struct arc_frame_info frame_info;
|
|
|
|
|
/* To keep track of unalignment caused by short insns. */
|
|
|
|
|
int unalign;
|
|
|
|
|
int force_short_suffix; /* Used when disgorging return delay slot insns. */
|
|
|
|
|
const char *size_reason;
|
|
|
|
|
struct arc_ccfsm ccfsm_current;
|
|
|
|
|
/* Map from uid to ccfsm state during branch shortening. */
|
|
|
|
|
rtx ccfsm_current_insn;
|
|
|
|
|
char arc_reorg_started;
|
|
|
|
|
char prescan_initialized;
|
|
|
|
|
} machine_function;
|
|
|
|
|
|
|
|
|
|
/* Type of function DECL.
|
|
|
|
|
|
|
|
|
|
The result is cached. To reset the cache at the end of a function,
|
|
|
|
|
call with DECL = NULL_TREE. */
|
|
|
|
|
|
|
|
|
|
enum arc_function_type
|
|
|
|
|
arc_compute_function_type (struct function *fun)
|
|
|
|
|
{
|
|
|
|
|
tree decl = fun->decl;
|
|
|
|
|
tree a;
|
|
|
|
|
enum arc_function_type fn_type = fun->machine->fn_type;
|
|
|
|
|
|
|
|
|
|
if (fn_type != ARC_FUNCTION_UNKNOWN)
|
|
|
|
|
return fn_type;
|
|
|
|
|
|
|
|
|
|
/* Assume we have a normal function (not an interrupt handler). */
|
|
|
|
|
fn_type = ARC_FUNCTION_NORMAL;
|
|
|
|
|
|
|
|
|
|
/* Now see if this is an interrupt handler. */
|
|
|
|
|
for (a = DECL_ATTRIBUTES (decl);
|
|
|
|
|
a;
|
|
|
|
|
a = TREE_CHAIN (a))
|
|
|
|
|
{
|
|
|
|
|
tree name = TREE_PURPOSE (a), args = TREE_VALUE (a);
|
|
|
|
|
|
|
|
|
|
if (name == get_identifier ("interrupt")
|
|
|
|
|
&& list_length (args) == 1
|
|
|
|
|
&& TREE_CODE (TREE_VALUE (args)) == STRING_CST)
|
|
|
|
|
{
|
|
|
|
|
tree value = TREE_VALUE (args);
|
|
|
|
|
|
|
|
|
|
if (!strcmp (TREE_STRING_POINTER (value), "ilink1"))
|
|
|
|
|
fn_type = ARC_FUNCTION_ILINK1;
|
|
|
|
|
else if (!strcmp (TREE_STRING_POINTER (value), "ilink2"))
|
|
|
|
|
fn_type = ARC_FUNCTION_ILINK2;
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return fun->machine->fn_type = fn_type;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define FRAME_POINTER_MASK (1 << (FRAME_POINTER_REGNUM))
|
|
|
|
|
#define RETURN_ADDR_MASK (1 << (RETURN_ADDR_REGNUM))
|
|
|
|
|
|
|
|
|
|
/* Tell prologue and epilogue if register REGNO should be saved / restored.
|
|
|
|
|
The return address and frame pointer are treated separately.
|
|
|
|
|
Don't consider them here.
|
|
|
|
|
Addition for pic: The gp register needs to be saved if the current
|
|
|
|
|
function changes it to access gotoff variables.
|
|
|
|
|
FIXME: This will not be needed if we used some arbitrary register
|
|
|
|
|
instead of r26.
|
|
|
|
|
*/
|
|
|
|
|
#define MUST_SAVE_REGISTER(regno, interrupt_p) \
|
|
|
|
|
(((regno) != RETURN_ADDR_REGNUM && (regno) != FRAME_POINTER_REGNUM \
|
|
|
|
|
&& (df_regs_ever_live_p (regno) && (!call_used_regs[regno] || interrupt_p))) \
|
|
|
|
|
|| (flag_pic && crtl->uses_pic_offset_table \
|
|
|
|
|
&& regno == PIC_OFFSET_TABLE_REGNUM) )
|
|
|
|
|
|
|
|
|
|
#define MUST_SAVE_RETURN_ADDR \
|
|
|
|
|
(cfun->machine->frame_info.save_return_addr)
|
|
|
|
|
|
|
|
|
|
/* Return non-zero if there are registers to be saved or loaded using
|
|
|
|
|
millicode thunks. We can only use consecutive sequences starting
|
|
|
|
|
with r13, and not going beyond r25.
|
|
|
|
|
GMASK is a bitmask of registers to save. This function sets
|
|
|
|
|
FRAME->millicod_start_reg .. FRAME->millicode_end_reg to the range
|
|
|
|
|
of registers to be saved / restored with a millicode call. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
arc_compute_millicode_save_restore_regs (unsigned int gmask,
|
|
|
|
|
struct arc_frame_info *frame)
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
|
|
|
|
|
|
|
|
|
int start_reg = 13, end_reg = 25;
|
|
|
|
|
|
|
|
|
|
for (regno = start_reg; regno <= end_reg && (gmask & (1L << regno));)
|
|
|
|
|
regno++;
|
|
|
|
|
end_reg = regno - 1;
|
|
|
|
|
/* There is no point in using millicode thunks if we don't save/restore
|
|
|
|
|
at least three registers. For non-leaf functions we also have the
|
|
|
|
|
blink restore. */
|
|
|
|
|
if (regno - start_reg >= 3 - (crtl->is_leaf == 0))
|
|
|
|
|
{
|
|
|
|
|
frame->millicode_start_reg = 13;
|
|
|
|
|
frame->millicode_end_reg = regno - 1;
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the bytes needed to compute the frame pointer from the current
|
|
|
|
|
stack pointer.
|
|
|
|
|
|
|
|
|
|
SIZE is the size needed for local variables. */
|
|
|
|
|
|
|
|
|
|
unsigned int
|
|
|
|
|
arc_compute_frame_size (int size) /* size = # of var. bytes allocated. */
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
|
|
|
|
unsigned int total_size, var_size, args_size, pretend_size, extra_size;
|
|
|
|
|
unsigned int reg_size, reg_offset;
|
|
|
|
|
unsigned int gmask;
|
|
|
|
|
enum arc_function_type fn_type;
|
|
|
|
|
int interrupt_p;
|
|
|
|
|
struct arc_frame_info *frame_info = &cfun->machine->frame_info;
|
|
|
|
|
|
|
|
|
|
size = ARC_STACK_ALIGN (size);
|
|
|
|
|
|
|
|
|
|
/* 1) Size of locals and temporaries */
|
|
|
|
|
var_size = size;
|
|
|
|
|
|
|
|
|
|
/* 2) Size of outgoing arguments */
|
|
|
|
|
args_size = crtl->outgoing_args_size;
|
|
|
|
|
|
|
|
|
|
/* 3) Calculate space needed for saved registers.
|
|
|
|
|
??? We ignore the extension registers for now. */
|
|
|
|
|
|
|
|
|
|
/* See if this is an interrupt handler. Call used registers must be saved
|
|
|
|
|
for them too. */
|
|
|
|
|
|
|
|
|
|
reg_size = 0;
|
|
|
|
|
gmask = 0;
|
|
|
|
|
fn_type = arc_compute_function_type (cfun);
|
|
|
|
|
interrupt_p = ARC_INTERRUPT_P (fn_type);
|
|
|
|
|
|
|
|
|
|
for (regno = 0; regno <= 31; regno++)
|
|
|
|
|
{
|
|
|
|
|
if (MUST_SAVE_REGISTER (regno, interrupt_p))
|
|
|
|
|
{
|
|
|
|
|
reg_size += UNITS_PER_WORD;
|
|
|
|
|
gmask |= 1 << regno;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* 4) Space for back trace data structure.
|
|
|
|
|
<return addr reg size> (if required) + <fp size> (if required). */
|
|
|
|
|
frame_info->save_return_addr
|
|
|
|
|
= (!crtl->is_leaf || df_regs_ever_live_p (RETURN_ADDR_REGNUM));
|
|
|
|
|
/* Saving blink reg in case of leaf function for millicode thunk calls. */
|
|
|
|
|
if (optimize_size && !TARGET_NO_MILLICODE_THUNK_SET)
|
|
|
|
|
{
|
|
|
|
|
if (arc_compute_millicode_save_restore_regs (gmask, frame_info))
|
|
|
|
|
frame_info->save_return_addr = true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
extra_size = 0;
|
|
|
|
|
if (MUST_SAVE_RETURN_ADDR)
|
|
|
|
|
extra_size = 4;
|
|
|
|
|
if (frame_pointer_needed)
|
|
|
|
|
extra_size += 4;
|
|
|
|
|
|
|
|
|
|
/* 5) Space for variable arguments passed in registers */
|
|
|
|
|
pretend_size = crtl->args.pretend_args_size;
|
|
|
|
|
|
|
|
|
|
/* Ensure everything before the locals is aligned appropriately. */
|
|
|
|
|
{
|
|
|
|
|
unsigned int extra_plus_reg_size;
|
|
|
|
|
unsigned int extra_plus_reg_size_aligned;
|
|
|
|
|
|
|
|
|
|
extra_plus_reg_size = extra_size + reg_size;
|
|
|
|
|
extra_plus_reg_size_aligned = ARC_STACK_ALIGN(extra_plus_reg_size);
|
|
|
|
|
reg_size = extra_plus_reg_size_aligned - extra_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Compute total frame size. */
|
|
|
|
|
total_size = var_size + args_size + extra_size + pretend_size + reg_size;
|
|
|
|
|
|
|
|
|
|
total_size = ARC_STACK_ALIGN (total_size);
|
|
|
|
|
|
|
|
|
|
/* Compute offset of register save area from stack pointer:
|
|
|
|
|
A5 Frame: pretend_size <blink> reg_size <fp> var_size args_size <--sp
|
|
|
|
|
*/
|
|
|
|
|
reg_offset = (total_size - (pretend_size + reg_size + extra_size)
|
|
|
|
|
+ (frame_pointer_needed ? 4 : 0));
|
|
|
|
|
|
|
|
|
|
/* Save computed information. */
|
|
|
|
|
frame_info->total_size = total_size;
|
|
|
|
|
frame_info->extra_size = extra_size;
|
|
|
|
|
frame_info->pretend_size = pretend_size;
|
|
|
|
|
frame_info->var_size = var_size;
|
|
|
|
|
frame_info->args_size = args_size;
|
|
|
|
|
frame_info->reg_size = reg_size;
|
|
|
|
|
frame_info->reg_offset = reg_offset;
|
|
|
|
|
frame_info->gmask = gmask;
|
|
|
|
|
frame_info->initialized = reload_completed;
|
|
|
|
|
|
|
|
|
|
/* Ok, we're done. */
|
|
|
|
|
return total_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Common code to save/restore registers. */
|
|
|
|
|
/* BASE_REG is the base register to use for addressing and to adjust.
|
|
|
|
|
GMASK is a bitmask of general purpose registers to save/restore.
|
|
|
|
|
epilogue_p 0: prologue 1:epilogue 2:epilogue, sibling thunk
|
|
|
|
|
If *FIRST_OFFSET is non-zero, add it first to BASE_REG - preferably
|
|
|
|
|
using a pre-modify for the first memory access. *FIRST_OFFSET is then
|
|
|
|
|
zeroed. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_save_restore (rtx base_reg,
|
|
|
|
|
unsigned int gmask, int epilogue_p, int *first_offset)
|
|
|
|
|
{
|
|
|
|
|
unsigned int offset = 0;
|
|
|
|
|
int regno;
|
|
|
|
|
struct arc_frame_info *frame = &cfun->machine->frame_info;
|
|
|
|
|
rtx sibthunk_insn = NULL_RTX;
|
|
|
|
|
|
|
|
|
|
if (gmask)
|
|
|
|
|
{
|
|
|
|
|
/* Millicode thunks implementation:
|
|
|
|
|
Generates calls to millicodes for registers starting from r13 to r25
|
|
|
|
|
Present Limitations:
|
|
|
|
|
- Only one range supported. The remaining regs will have the ordinary
|
|
|
|
|
st and ld instructions for store and loads. Hence a gmask asking
|
|
|
|
|
to store r13-14, r16-r25 will only generate calls to store and
|
|
|
|
|
load r13 to r14 while store and load insns will be generated for
|
|
|
|
|
r16 to r25 in the prologue and epilogue respectively.
|
|
|
|
|
|
|
|
|
|
- Presently library only supports register ranges starting from r13.
|
|
|
|
|
*/
|
|
|
|
|
if (epilogue_p == 2 || frame->millicode_end_reg > 14)
|
|
|
|
|
{
|
|
|
|
|
int start_call = frame->millicode_start_reg;
|
|
|
|
|
int end_call = frame->millicode_end_reg;
|
|
|
|
|
int n_regs = end_call - start_call + 1;
|
|
|
|
|
int i = 0, r, off = 0;
|
|
|
|
|
rtx insn;
|
|
|
|
|
rtx ret_addr = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
|
|
|
|
|
|
|
|
|
|
if (*first_offset)
|
|
|
|
|
{
|
|
|
|
|
/* "reg_size" won't be more than 127 . */
|
2014-04-11 20:04:43 +02:00
|
|
|
|
gcc_assert (epilogue_p || abs (*first_offset) <= 127);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
frame_add (base_reg, *first_offset);
|
|
|
|
|
*first_offset = 0;
|
|
|
|
|
}
|
|
|
|
|
insn = gen_rtx_PARALLEL
|
|
|
|
|
(VOIDmode, rtvec_alloc ((epilogue_p == 2) + n_regs + 1));
|
|
|
|
|
if (epilogue_p == 2)
|
|
|
|
|
i += 2;
|
|
|
|
|
else
|
|
|
|
|
XVECEXP (insn, 0, n_regs) = gen_rtx_CLOBBER (VOIDmode, ret_addr);
|
|
|
|
|
for (r = start_call; r <= end_call; r++, off += UNITS_PER_WORD, i++)
|
|
|
|
|
{
|
|
|
|
|
rtx reg = gen_rtx_REG (SImode, r);
|
|
|
|
|
rtx mem
|
|
|
|
|
= gen_frame_mem (SImode, plus_constant (Pmode, base_reg, off));
|
|
|
|
|
|
|
|
|
|
if (epilogue_p)
|
|
|
|
|
XVECEXP (insn, 0, i) = gen_rtx_SET (VOIDmode, reg, mem);
|
|
|
|
|
else
|
|
|
|
|
XVECEXP (insn, 0, i) = gen_rtx_SET (VOIDmode, mem, reg);
|
|
|
|
|
gmask = gmask & ~(1L << r);
|
|
|
|
|
}
|
|
|
|
|
if (epilogue_p == 2)
|
|
|
|
|
sibthunk_insn = insn;
|
|
|
|
|
else
|
|
|
|
|
frame_insn (insn);
|
|
|
|
|
offset += off;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (regno = 0; regno <= 31; regno++)
|
|
|
|
|
{
|
|
|
|
|
if ((gmask & (1L << regno)) != 0)
|
|
|
|
|
{
|
|
|
|
|
rtx reg = gen_rtx_REG (SImode, regno);
|
|
|
|
|
rtx addr, mem;
|
|
|
|
|
|
|
|
|
|
if (*first_offset)
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (!offset);
|
|
|
|
|
addr = plus_constant (Pmode, base_reg, *first_offset);
|
|
|
|
|
addr = gen_rtx_PRE_MODIFY (Pmode, base_reg, addr);
|
|
|
|
|
*first_offset = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (SMALL_INT (offset));
|
|
|
|
|
addr = plus_constant (Pmode, base_reg, offset);
|
|
|
|
|
}
|
|
|
|
|
mem = gen_frame_mem (SImode, addr);
|
|
|
|
|
if (epilogue_p)
|
|
|
|
|
frame_move_inc (reg, mem, base_reg, addr);
|
|
|
|
|
else
|
|
|
|
|
frame_move_inc (mem, reg, base_reg, addr);
|
|
|
|
|
offset += UNITS_PER_WORD;
|
|
|
|
|
} /* if */
|
|
|
|
|
} /* for */
|
|
|
|
|
}/* if */
|
|
|
|
|
if (sibthunk_insn)
|
|
|
|
|
{
|
|
|
|
|
rtx r12 = gen_rtx_REG (Pmode, 12);
|
|
|
|
|
|
|
|
|
|
frame_insn (gen_rtx_SET (VOIDmode, r12, GEN_INT (offset)));
|
|
|
|
|
XVECEXP (sibthunk_insn, 0, 0) = ret_rtx;
|
|
|
|
|
XVECEXP (sibthunk_insn, 0, 1)
|
|
|
|
|
= gen_rtx_SET (VOIDmode, stack_pointer_rtx,
|
|
|
|
|
gen_rtx_PLUS (Pmode, stack_pointer_rtx, r12));
|
|
|
|
|
sibthunk_insn = emit_jump_insn (sibthunk_insn);
|
|
|
|
|
RTX_FRAME_RELATED_P (sibthunk_insn) = 1;
|
|
|
|
|
}
|
|
|
|
|
} /* arc_save_restore */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
int arc_return_address_regs[4]
|
|
|
|
|
= {0, RETURN_ADDR_REGNUM, ILINK1_REGNUM, ILINK2_REGNUM};
|
|
|
|
|
|
|
|
|
|
/* Set up the stack and frame pointer (if desired) for the function. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_expand_prologue (void)
|
|
|
|
|
{
|
|
|
|
|
int size = get_frame_size ();
|
|
|
|
|
unsigned int gmask = cfun->machine->frame_info.gmask;
|
|
|
|
|
/* unsigned int frame_pointer_offset;*/
|
|
|
|
|
unsigned int frame_size_to_allocate;
|
|
|
|
|
/* (FIXME: The first store will use a PRE_MODIFY; this will usually be r13.
|
|
|
|
|
Change the stack layout so that we rather store a high register with the
|
|
|
|
|
PRE_MODIFY, thus enabling more short insn generation.) */
|
|
|
|
|
int first_offset = 0;
|
|
|
|
|
|
|
|
|
|
size = ARC_STACK_ALIGN (size);
|
|
|
|
|
|
|
|
|
|
/* Compute/get total frame size. */
|
|
|
|
|
size = (!cfun->machine->frame_info.initialized
|
|
|
|
|
? arc_compute_frame_size (size)
|
|
|
|
|
: cfun->machine->frame_info.total_size);
|
|
|
|
|
|
|
|
|
|
if (flag_stack_usage_info)
|
|
|
|
|
current_function_static_stack_size = size;
|
|
|
|
|
|
|
|
|
|
/* Keep track of frame size to be allocated. */
|
|
|
|
|
frame_size_to_allocate = size;
|
|
|
|
|
|
|
|
|
|
/* These cases shouldn't happen. Catch them now. */
|
|
|
|
|
gcc_assert (!(size == 0 && gmask));
|
|
|
|
|
|
|
|
|
|
/* Allocate space for register arguments if this is a variadic function. */
|
|
|
|
|
if (cfun->machine->frame_info.pretend_size != 0)
|
|
|
|
|
{
|
|
|
|
|
/* Ensure pretend_size is maximum of 8 * word_size. */
|
|
|
|
|
gcc_assert (cfun->machine->frame_info.pretend_size <= 32);
|
|
|
|
|
|
|
|
|
|
frame_stack_add (-(HOST_WIDE_INT)cfun->machine->frame_info.pretend_size);
|
|
|
|
|
frame_size_to_allocate -= cfun->machine->frame_info.pretend_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The home-grown ABI says link register is saved first. */
|
|
|
|
|
if (MUST_SAVE_RETURN_ADDR)
|
|
|
|
|
{
|
|
|
|
|
rtx ra = gen_rtx_REG (SImode, RETURN_ADDR_REGNUM);
|
|
|
|
|
rtx mem = gen_frame_mem (Pmode, gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx));
|
|
|
|
|
|
|
|
|
|
frame_move_inc (mem, ra, stack_pointer_rtx, 0);
|
|
|
|
|
frame_size_to_allocate -= UNITS_PER_WORD;
|
|
|
|
|
|
|
|
|
|
} /* MUST_SAVE_RETURN_ADDR */
|
|
|
|
|
|
|
|
|
|
/* Save any needed call-saved regs (and call-used if this is an
|
|
|
|
|
interrupt handler) for ARCompact ISA. */
|
|
|
|
|
if (cfun->machine->frame_info.reg_size)
|
|
|
|
|
{
|
|
|
|
|
first_offset = -cfun->machine->frame_info.reg_size;
|
|
|
|
|
/* N.B. FRAME_POINTER_MASK and RETURN_ADDR_MASK are cleared in gmask. */
|
|
|
|
|
arc_save_restore (stack_pointer_rtx, gmask, 0, &first_offset);
|
|
|
|
|
frame_size_to_allocate -= cfun->machine->frame_info.reg_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Save frame pointer if needed. */
|
|
|
|
|
if (frame_pointer_needed)
|
|
|
|
|
{
|
|
|
|
|
rtx addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
|
|
|
|
|
GEN_INT (-UNITS_PER_WORD + first_offset));
|
|
|
|
|
rtx mem = gen_frame_mem (Pmode, gen_rtx_PRE_MODIFY (Pmode,
|
|
|
|
|
stack_pointer_rtx,
|
|
|
|
|
addr));
|
|
|
|
|
frame_move_inc (mem, frame_pointer_rtx, stack_pointer_rtx, 0);
|
|
|
|
|
frame_size_to_allocate -= UNITS_PER_WORD;
|
|
|
|
|
first_offset = 0;
|
|
|
|
|
frame_move (frame_pointer_rtx, stack_pointer_rtx);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* ??? We don't handle the case where the saved regs are more than 252
|
|
|
|
|
bytes away from sp. This can be handled by decrementing sp once, saving
|
|
|
|
|
the regs, and then decrementing it again. The epilogue doesn't have this
|
|
|
|
|
problem as the `ld' insn takes reg+limm values (though it would be more
|
|
|
|
|
efficient to avoid reg+limm). */
|
|
|
|
|
|
|
|
|
|
frame_size_to_allocate -= first_offset;
|
|
|
|
|
/* Allocate the stack frame. */
|
|
|
|
|
if (frame_size_to_allocate > 0)
|
|
|
|
|
frame_stack_add ((HOST_WIDE_INT) 0 - frame_size_to_allocate);
|
|
|
|
|
|
|
|
|
|
/* Setup the gp register, if needed. */
|
|
|
|
|
if (crtl->uses_pic_offset_table)
|
|
|
|
|
arc_finalize_pic ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Do any necessary cleanup after a function to restore stack, frame,
|
|
|
|
|
and regs. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_expand_epilogue (int sibcall_p)
|
|
|
|
|
{
|
|
|
|
|
int size = get_frame_size ();
|
|
|
|
|
enum arc_function_type fn_type = arc_compute_function_type (cfun);
|
|
|
|
|
|
|
|
|
|
size = ARC_STACK_ALIGN (size);
|
|
|
|
|
size = (!cfun->machine->frame_info.initialized
|
|
|
|
|
? arc_compute_frame_size (size)
|
|
|
|
|
: cfun->machine->frame_info.total_size);
|
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
unsigned int pretend_size = cfun->machine->frame_info.pretend_size;
|
|
|
|
|
unsigned int frame_size;
|
|
|
|
|
unsigned int size_to_deallocate;
|
|
|
|
|
int restored;
|
|
|
|
|
int can_trust_sp_p = !cfun->calls_alloca;
|
|
|
|
|
int first_offset = 0;
|
|
|
|
|
int millicode_p = cfun->machine->frame_info.millicode_end_reg > 0;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
size_to_deallocate = size;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
frame_size = size - (pretend_size +
|
|
|
|
|
cfun->machine->frame_info.reg_size +
|
|
|
|
|
cfun->machine->frame_info.extra_size);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
/* ??? There are lots of optimizations that can be done here.
|
|
|
|
|
EG: Use fp to restore regs if it's closer.
|
|
|
|
|
Maybe in time we'll do them all. For now, always restore regs from
|
|
|
|
|
sp, but don't restore sp if we don't have to. */
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
if (!can_trust_sp_p)
|
|
|
|
|
gcc_assert (frame_pointer_needed);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
/* Restore stack pointer to the beginning of saved register area for
|
|
|
|
|
ARCompact ISA. */
|
|
|
|
|
if (frame_size)
|
|
|
|
|
{
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (frame_pointer_needed)
|
2013-10-01 23:18:26 +02:00
|
|
|
|
frame_move (stack_pointer_rtx, frame_pointer_rtx);
|
|
|
|
|
else
|
|
|
|
|
first_offset = frame_size;
|
|
|
|
|
size_to_deallocate -= frame_size;
|
|
|
|
|
}
|
|
|
|
|
else if (!can_trust_sp_p)
|
|
|
|
|
frame_stack_add (-frame_size);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
/* Restore any saved registers. */
|
|
|
|
|
if (frame_pointer_needed)
|
|
|
|
|
{
|
|
|
|
|
rtx addr = gen_rtx_POST_INC (Pmode, stack_pointer_rtx);
|
|
|
|
|
|
|
|
|
|
frame_move_inc (frame_pointer_rtx, gen_frame_mem (Pmode, addr),
|
|
|
|
|
stack_pointer_rtx, 0);
|
|
|
|
|
size_to_deallocate -= UNITS_PER_WORD;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Load blink after the calls to thunk calls in case of optimize size. */
|
|
|
|
|
if (millicode_p)
|
|
|
|
|
{
|
|
|
|
|
int sibthunk_p = (!sibcall_p
|
|
|
|
|
&& fn_type == ARC_FUNCTION_NORMAL
|
|
|
|
|
&& !cfun->machine->frame_info.pretend_size);
|
|
|
|
|
|
|
|
|
|
gcc_assert (!(cfun->machine->frame_info.gmask
|
|
|
|
|
& (FRAME_POINTER_MASK | RETURN_ADDR_MASK)));
|
|
|
|
|
arc_save_restore (stack_pointer_rtx,
|
|
|
|
|
cfun->machine->frame_info.gmask,
|
|
|
|
|
1 + sibthunk_p, &first_offset);
|
|
|
|
|
if (sibthunk_p)
|
|
|
|
|
goto epilogue_done;
|
|
|
|
|
}
|
|
|
|
|
/* If we are to restore registers, and first_offset would require
|
|
|
|
|
a limm to be encoded in a PRE_MODIFY, yet we can add it with a
|
|
|
|
|
fast add to the stack pointer, do this now. */
|
|
|
|
|
if ((!SMALL_INT (first_offset)
|
|
|
|
|
&& cfun->machine->frame_info.gmask
|
|
|
|
|
&& ((TARGET_ARC700 && !optimize_size)
|
|
|
|
|
? first_offset <= 0x800
|
|
|
|
|
: satisfies_constraint_C2a (GEN_INT (first_offset))))
|
|
|
|
|
/* Also do this if we have both gprs and return
|
|
|
|
|
address to restore, and they both would need a LIMM. */
|
|
|
|
|
|| (MUST_SAVE_RETURN_ADDR
|
|
|
|
|
&& !SMALL_INT ((cfun->machine->frame_info.reg_size + first_offset) >> 2)
|
|
|
|
|
&& cfun->machine->frame_info.gmask))
|
|
|
|
|
{
|
|
|
|
|
frame_stack_add (first_offset);
|
|
|
|
|
first_offset = 0;
|
|
|
|
|
}
|
|
|
|
|
if (MUST_SAVE_RETURN_ADDR)
|
|
|
|
|
{
|
|
|
|
|
rtx ra = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
|
|
|
|
|
int ra_offs = cfun->machine->frame_info.reg_size + first_offset;
|
|
|
|
|
rtx addr = plus_constant (Pmode, stack_pointer_rtx, ra_offs);
|
|
|
|
|
|
|
|
|
|
/* If the load of blink would need a LIMM, but we can add
|
|
|
|
|
the offset quickly to sp, do the latter. */
|
|
|
|
|
if (!SMALL_INT (ra_offs >> 2)
|
|
|
|
|
&& !cfun->machine->frame_info.gmask
|
|
|
|
|
&& ((TARGET_ARC700 && !optimize_size)
|
|
|
|
|
? ra_offs <= 0x800
|
|
|
|
|
: satisfies_constraint_C2a (GEN_INT (ra_offs))))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
2013-10-01 23:18:26 +02:00
|
|
|
|
size_to_deallocate -= ra_offs - first_offset;
|
|
|
|
|
first_offset = 0;
|
|
|
|
|
frame_stack_add (ra_offs);
|
|
|
|
|
ra_offs = 0;
|
|
|
|
|
addr = stack_pointer_rtx;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
2013-10-01 23:18:26 +02:00
|
|
|
|
/* See if we can combine the load of the return address with the
|
|
|
|
|
final stack adjustment.
|
|
|
|
|
We need a separate load if there are still registers to
|
|
|
|
|
restore. We also want a separate load if the combined insn
|
|
|
|
|
would need a limm, but a separate load doesn't. */
|
|
|
|
|
if (ra_offs
|
|
|
|
|
&& !cfun->machine->frame_info.gmask
|
|
|
|
|
&& (SMALL_INT (ra_offs) || !SMALL_INT (ra_offs >> 2)))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
2013-10-01 23:18:26 +02:00
|
|
|
|
addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, addr);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
first_offset = 0;
|
2013-10-01 23:18:26 +02:00
|
|
|
|
size_to_deallocate -= cfun->machine->frame_info.reg_size;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
2013-10-01 23:18:26 +02:00
|
|
|
|
else if (!ra_offs && size_to_deallocate == UNITS_PER_WORD)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
2013-10-01 23:18:26 +02:00
|
|
|
|
addr = gen_rtx_POST_INC (Pmode, addr);
|
|
|
|
|
size_to_deallocate = 0;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
2013-10-01 23:18:26 +02:00
|
|
|
|
frame_move_inc (ra, gen_frame_mem (Pmode, addr), stack_pointer_rtx, addr);
|
|
|
|
|
}
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
if (!millicode_p)
|
|
|
|
|
{
|
|
|
|
|
if (cfun->machine->frame_info.reg_size)
|
|
|
|
|
arc_save_restore (stack_pointer_rtx,
|
|
|
|
|
/* The zeroing of these two bits is unnecessary, but leave this in for clarity. */
|
|
|
|
|
cfun->machine->frame_info.gmask
|
|
|
|
|
& ~(FRAME_POINTER_MASK | RETURN_ADDR_MASK), 1, &first_offset);
|
|
|
|
|
}
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
/* The rest of this function does the following:
|
|
|
|
|
ARCompact : handle epilogue_delay, restore sp (phase-2), return
|
|
|
|
|
*/
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
/* Keep track of how much of the stack pointer we've restored.
|
|
|
|
|
It makes the following a lot more readable. */
|
|
|
|
|
size_to_deallocate += first_offset;
|
|
|
|
|
restored = size - size_to_deallocate;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
if (size > restored)
|
|
|
|
|
frame_stack_add (size - restored);
|
|
|
|
|
/* Emit the return instruction. */
|
|
|
|
|
if (sibcall_p == FALSE)
|
|
|
|
|
emit_jump_insn (gen_simple_return ());
|
2013-10-01 19:03:46 +02:00
|
|
|
|
epilogue_done:
|
|
|
|
|
if (!TARGET_EPILOGUE_CFI)
|
|
|
|
|
{
|
NEXT_INSN and PREV_INSN take a const rtx_insn
gcc/
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* rtl.h (RTX_PREV): Added checked casts to uses of PREV_INSN and
NEXT_INSN.
(PREV_INSN): Strengthen param from const_rtx to const rtx_insn *.
(NEXT_INSN): Likewise.
(JUMP_LABEL_AS_INSN): Add a "const" modifier to param.
(reg_used_between_p): Strengthen params 2 and 3 from const_rtx to
const rtx_insn *.
(no_labels_between_p): Likewise for both params.
* config/aarch64/aarch64.c (aarch64_output_casesi): Add a checked
cast when using NEXT_INSN on operands[2].
* config/alpha/alpha.c (alpha_set_memflags): Strengthen local
"insn" from rtx to rtx_insn *, adding a checked cast.
(alpha_handle_trap_shadows): Strengthen locals "i", "n" from rtx to
rtx_insn *.
* config/arc/arc-protos.h (arc_ccfsm_record_condition): Likewise
for third param.
(arc_text_label): Likewise for param "insn".
* config/arc/arc.c (arc_expand_epilogue): Likewise for local
"insn".
(arc_ccfsm_record_condition): Likewise for param "jump".
(arc_text_label): Likewise for local "label".
* config/arc/arc.md (doloop_begin_i): Likewise for local "scan".
Introduce a local "seq" via a dyn_cast to rtx_sequence *, and use
a method for typesafety. Add a checked cast.
* config/arc/constraints.md (Clb): Add a checked cast when getting
the CODE_LABEL from a LABEL_REF.
* config/arm/arm.c (require_pic_register): Strengthen locals
"seq", "insn" from rtx to rtx_insn *.
(create_fix_barrier): Likewise for locals "selected", "next".
(thumb1_reorg): Likewise for locals "prev", "insn".
(arm_expand_prologue): Likewise for local "last".
(thumb1_output_casesi): Add a checked cast when using NEXT_INSN on
operands[0].
(thumb2_output_casesi): Likewise for operands[2].
* config/avr/avr-log.c (avr_log_vadump): Within 'L' case,
strengthen local "insn" from rtx to rtx_insn *.
* config/bfin/bfin.c (find_next_insn_start): Likewise for return
type and param "insn".
(find_prev_insn_start): Likewise.
(hwloop_optimize): Likewise for locals "insn", "last_insn",
"prev".
(gen_one_bundle): Likewise for loal "t".
(find_load): Likewise for param "insn".
(workaround_speculation): Likewise for locals "insn", "next",
"target", "next_tgt".
* config/c6x/c6x.c (assign_reservations): Likewise for both params
and for locals "insn", "within", "last".
(count_unit_reqs): Likewise for params "head", "tail" and local
"insn".
(try_rename_operands): Likewise for params "head", "tail".
(reshuffle_units): Likewise for locals "head", "tail", "insn".
(struct c6x_sched_context): Likewise for fields
"last_scheduled_insn", "last_scheduled_iter0".
(init_sched_state): Replace NULL_RTX with NULL.
(reorg_split_calls): Strengthen local "new_cycle_first" from rtx
to rtx_insn *.
(undo_split_delayed_nonbranch): Likewise for param and for local
"prev".
(conditionalize_after_sched): Likewise for local "insn".
(bb_earliest_end_cycle): Likewise.
(filter_insns_above): Likewise for locals "insn", "next".
(hwloop_optimize): Remove redundant checked cast.
(hwloop_fail): Strengthen local "t" from rtx to rtx_insn *.
* config/cris/cris.c (cris_initial_frame_pointer_offset): Replace
NULL_RTX with NULL.
(cris_simple_epilogue): Likewise.
(cris_expand_prologue): Likewise.
(cris_expand_epilogue): Likewise.
* config/frv/frv.c (frv_function_contains_far_jump): Strengthen
local "insn" from rtx to rtx_insn *.
(frv_ifcvt_modify_tests): Likewise for locals "last_insn", "insn".
(struct frv_packet_group): Likewise for the elements within array
fields "insns", "sorted", and for field "nop".
(frv_packet): Likewise for the elements within array field
"insns".
(frv_add_insn_to_packet): Likewise for param "insn".
(frv_insert_nop_in_packet): Likewise for param "insn" and local
"last".
(frv_for_each_packet): Likewise for locals "insn", "next_insn".
(frv_sort_insn_group_1): Likewise for local "insn".
(frv_optimize_membar_local): Likewise.
(frv_align_label): Likewise for locals "x", "last", "barrier",
"label".
* config/ia64/ia64.c (last_scheduled_insn): Likewise for this
local.
(ia64_sched_init): Likewise for local "insn".
(scheduled_good_insn): Likewise for param "last".
(struct _ia64_sched_context): Likewise for field
"last_scheduled_insn".
(ia64_init_sched_context): Replace NULL_RTX with NULL.
(struct bundle_state): Likewise for field "insn".
(issue_nops_and_insn): Likewise for param "insn".
(get_next_important_insn): Likewise for return type and both
params.
(ia64_add_bundle_selector_before): Likewise for param "insn".
(bundling): Likewise for params "prev_head_insn", "tail" and
locals "insn", "next_insn", "b". Eliminate top-level local rtx
"nop" in favor of new locals rtx "nop_pat" and rtx_insn *nop;
* config/iq2000/iq2000-protos.h (iq2000_fill_delay_slot):
Strengthen final param from rtx to rtx_insn *.
(iq2000_move_1word): Likewise for second param.
* config/iq2000/iq2000.c (iq2000_fill_delay_slot): Likewise for
param "cur_insn" and local "next_insn".
(iq2000_move_1word): Likewise for param "insn".
* config/iq2000/iq2000.md (insn before ADDR_DIFF_VEC): Add checked
casts when using NEXT_INSN on operands[1].
* config/m32c/m32c.c (m32c_function_needs_enter): Strengthen local
"insn" from rtx to rtx_insn *.
* config/m68k/m68k.c (m68k_jump_table_ref_p): Split out uses of
"x", introducing local rtx_insn * "insn" for when working with the
CODE_LABEL of the LABEL_REF.
(m68k_sched_md_init_global): Strengthen local "insn" from rtx to
rtx_insn *.
* config/mcore/mcore-protos.h (mcore_is_dead): Likewise for first
param.
* config/mcore/mcore.c (emit_new_cond_insn): Likewise for return
type.
(conditionalize_block): Likewise for return type and param.
(mcore_is_dead): Likewise for param "first" and local "insn".
(emit_new_cond_insn): Likewise for return type.
(conditionalize_block): Likewise for return type, param, and
locals "insn", "blk_1_br", "end_blk_2_insn", "start_blk_3_lab",
"newinsn".
(conditionalize_optimization): Likewise for local "insn".
* config/mep/mep.c (mep_jmp_return_reorg): Add checked cast when
using NEXT_INSN.
* config/microblaze/microblaze.md: Add checked casts when using
NEXT_INSN.
* config/mips/mips.c (mips_expand_prologue): Eliminate top-level
rtx "insn" in favor of various more tightly-scoped rtx "insn" and
and rtx_insn * "insn".
* config/mips/mips.md (casesi_internal_mips16_<mode>): Add a
checked cast when using NEXT_INSN on operands[2].
* config/mn10300/mn10300.c (mn10300_insert_setlb_lcc): Strengthen
local "insn" from rtx to rtx_insn *.
* config/nds32/nds32-fp-as-gp.c (nds32_fp_as_gp_check_available):
Likewise.
* config/nds32/nds32-md-auxiliary.c (nds32_output_casesi_pc_relative):
Add a checked cast when using NEXT_INSN on operands[1].
* config/pa/pa-protos.h (pa_following_call): Strengthen param from
rtx to rtx_insn *.
(pa_output_cbranch): Likewise for final param.
(pa_output_lbranch): Likewise for second param.
(pa_output_bb): Likewise for third param.
(pa_output_bvb): Likewise.
(pa_output_dbra): Likewise for second param.
(pa_output_movb): Likewise.
(pa_output_parallel_movb): Likewise.
(pa_output_parallel_addb): Likewise.
(pa_output_millicode_call): Likewise for first param.
(pa_output_mul_insn): Likewise for second param.
(pa_output_div_insn): Likewise for third param.
(pa_output_mod_insn): Likewise for second param.
(pa_jump_in_call_delay): Likewise for param.
* config/pa/pa.c (pa_output_mul_insn): Likewise for param "insn".
(pa_output_div_insn): Likewise.
(pa_output_mod_insn): Likewise.
(pa_output_cbranch): Likewise.
(pa_output_lbranch): Likewise.
(pa_output_bb): Likewise.
(pa_output_bvb): Likewise.
(pa_output_dbra): Likewise.
(pa_output_movb): Likewise.
(pa_output_millicode_call): Likewise; use method of rtx_sequence *
to simplify and for typesafety.
(pa_output_call): Use method of rtx_sequence *.
(forward_branch_p): Strengthen param "insn" from rtx to rtx_insn *.
(pa_jump_in_call_delay): Likewise.
(pa_output_parallel_movb): Likewise.
(pa_output_parallel_addb): Likewise.
(pa_following_call): Likewise.
(pa_combine_instructions): Likewise for locals "anchor",
"floater".
(pa_can_combine_p): Likewise for params "anchor", "floater" and
locals "start", "end".
* config/picochip/picochip.c (picochip_reset_vliw): Likewise for
param "insn" and local "local_insn".
(picochip_final_prescan_insn): Likewise for local "local_insn".
* config/rs6000/rs6000.c (compute_save_world_info): Likewise for
local "insn".
(uses_TOC): Likewise.
* config/s390/s390.c (get_some_local_dynamic_name): Likewise.
(s390_mainpool_finish): Eliminate top-level local rtx "insn",
splitting out to more tightly-scoped locals, 3 as rtx and one as
rtx_insn *.
(s390_optimize_nonescaping_tx): Strengthen local "tmp" from rtx
to rtx_insn *.
(s390_emit_prologue): Introduce a local "insn" to be an rtx_insn *
where needed.
* config/sh/sh-protos.h (barrier_align): Strenghten param from rtx
to rtx_insn *.
(fixup_addr_diff_vecs): Likewise.
(reg_unused_after): Likewise for param 2.
(sh_can_redirect_branch): Likewise for both params.
(check_use_sfunc_addr): Likewise for param 1.
* config/sh/sh.c (fixup_mova): Likewise for local "worker".
(find_barrier): Likewise for local "last_got".
(gen_block_redirect): Likewise for return type, param "jump" and
locals "prev", "scan", "next", "insn".
(struct far_branch): Likewise for fields "near_label",
"insert_place", "far_label".
(gen_far_branch): Likewise for local "jump".
(fixup_addr_diff_vecs): Likewise for param "first" and locals
"insn", "prev".
(barrier_align): Likewise for param and for locals "prev", "x".
Introduce local rtx_sequence * "prev_seq" and use insn method for
typesafety and clarity.
(sh_reorg): Strengthen local "scan" from rtx to rtx_insn *.
(get_dest_uid): Likewise for local "dest".
(split_branches): Likewise for locals "next", "beyond", "label",
"block", "far_label". Add checked casts when assigning to
bp->far_label and "far_label".
(reg_unused_after): Strengthen param "scan" from rtx to rtx_insn *.
(sequence_insn_p): Likewise.
(mark_constant_pool_use): Likewise for locals "insn", "lab". Add a
more loop-scoped rtx "insn" when walking LABEL_REFS.
(sh_can_redirect_branch): Strengthen both params from rtx to
rtx_insn *.
(check_use_sfunc_addr): Likewise for param "insn". Introduce a
new local rtx_sequence * "seq" via a dyn_cast, and use a method
for clarity and typesafety.
* config/sh/sh.md (define_expand "epilogue"): Strengthen local
"insn" from rtx to rtx_insn *.
(define_insn "casesi_worker_1"): Add a checked cast to rtx_insn *
when using NEXT_INSN on the CODE_LABEL in operands[2].
(define_insn "casesi_worker_2"): Likewise.
(define_insn "casesi_shift_media"): Likewise.
(define_insn "casesi_load_media"): Likewise for the CODE_LABEL in
operands[3].
* config/sh/sh_optimize_sett_clrt.cc (struct ccreg_value):
Strengthen field "insn" from rtx to rtx_insn *.
(sh_optimize_sett_clrt::execute): Likewise for locals "next_i", "i".
(sh_optimize_sett_clrt::find_last_ccreg_values): Likewise for
param "start_insn" and local "start_insn".
* config/sh/sh_treg_combine.cc (struct set_of_reg): Likewise for
field "insn".
(find_set_of_reg_bb): Likewise for param "insn".
(trace_reg_uses_1): Likewise for param "start_insn" and local "i".
(trace_reg_uses): Likewise for param "start_insn".
(sh_treg_combine::cbranch_trace): Likewise for field
"cbranch_insn".
(sh_treg_combine::cbranch_trace::cbranch_trace): Likewise for
param "insn".
(sh_treg_combine::record_set_of_reg): Likewise for param
"start_insn" and local "i".
(sh_treg_combine::can_remove_cstore): Likewise for local
"prev_insn".
(sh_treg_combine::try_optimize_cbranch): Likewise for param
"insn".
(sh_treg_combine::execute): Likewise for local "i".
* config/sparc/sparc-protos.h (empty_delay_slot): Likewise for
param.
(sparc_check_64): Likewise for second param.
* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
locals "insn", "next". Introduce local rtx_sequence * "seq" via a
dyn_cast, using its insn method for typesafety and clarity.
(empty_delay_slot): Strengthen param "insn" from rtx to
rtx_insn *.
(set_extends): Likewise.
(sparc_check_64): Likewise.
* config/stormy16/stormy16.c (xstormy16_split_cbranch): Likewise
for locals "seq", "last_insn".
(combine_bnp): Likewise for param "insn".
(xstormy16_reorg): Likewise for local "insn".
* config/v850/v850.c (substitute_ep_register): Likewise for params
"first_insn", "last_insn" and local "insn".
(v850_reorg): Likewise for fields "first_insn", "last_insn" within
elements of "regs" array, and local "insn".
* except.c (emit_note_eh_region_end): Likewise for param "insn".
* final.c (final_sequence): Strengthen this global from rtx to
rtx_sequence *.
(shorten_branches): Strenthen locals "rel_lab", "prev" from rtx to
rtx_insn *.
(final_scan_insn): Update assignment to "final_sequence" to be
from "seq", the cast version of "body", for type-safety.
* function.c (assign_parm_setup_reg): Strengthen locals "insn",
"insns" from rtx to rtx_insn *.
(thread_prologue_and_epilogue_insns): Likewise for local "seq".
* genattr.c (main): When writing out generated insn-attr.h,
strengthen params 1 and 3 of eligible_for_delay,
eligible_for_annul_true, eligible_for_annul_false from rtx to
rtx_insn *.
* genattrtab.c (write_eligible_delay): Likewise when writing out
generated insn-attrtab.c; also local "insn" the generated
functions.
* hw-doloop.c (discover_loops): Strengthen local "insn" from rtx
to rtx_insn *.
* hw-doloop.h (struct GTY hwloop_info_d): Strengthen field
"start_label" from rtx to rtx_insn *.
* ira.c (decrease_live_ranges_number): Likewise for local "p".
(ira_update_equiv_info_by_shuffle_insn): Likewise for param
"insns" and local "insn".
(validate_equiv_mem): Likewise for param "start" and local "insn".
(memref_used_between_p): Likewise for params "start", "end" and
local "insn".
* ira.h (ira_update_equiv_info_by_shuffle_insn): Likewise for
final param.
* loop-doloop.c (doloop_optimize): Within region guarded by
INSN_P (doloop_pat), introduce a new local rtx_insn *
"doloop_insn" via a checked cast, and use it for typesafety,
eventually writing the value back into doloop_pat.
* output.h (final_sequence): Strengthen this global from rtx to
rtx_sequence *.
* recog.c (peep2_attempt): Rename param "insn" to "uncast_insn",
reintroducing "insn" as an rtx_insn * via a checked cast.
Strengthen param "attempt" and local "new_insn"from rtx to
rtx_insn *.
(peephole2_optimize): Strengthen locals "insn", "attempt" from rtx
to rtx_insn *.
* ree.c (emit_note_eh_region_end): Likewise for local "insn".
* reload1.c (reload_as_needed): Eliminate top-level locals "x" and
"p" in favor of more tightly-scoped replacements, sometimes rtx
and sometimes rtx_insn *, as appropriate.
(delete_output_reload): Eliminate top-level rtx "i1", splitting
into two loop-scoped locals, one an rtx, the other an rtx_insn *.
* reorg.c (delete_scheduled_jump): Add checked cast. Strengthen
local "trial" from rtx to rtx_insn *.
(redirect_with_delay_slots_safe_p): Strengthen param "jump" from
rtx to rtx_insn *. Strenghten local "pat" from rtx to
rtx_sequence * and use methods for clarity and typesafety.
(redirect_with_delay_list_safe_p): Strengthen param "jump" from
rtx to rtx_insn *. Strenghten local "li" from rtx to
rtx_insn_list * and use its methods for clarity and typesafety.
(steal_delay_list_from_target): Strengthen param "insn" from rtx
to rtx_insn *.
(steal_delay_list_from_fallthrough): Likewise.
(try_merge_delay_insns): Likewise for param "thread" and locals
"trial", "next_trial", "delay_insn".
(redundant_insn): Likewise for param "target" and local "trial".
(own_thread_p): Likewise for param "thread" and locals
"active_insn", "insn".
(get_label_before): Likewise for param "insn".
(fill_simple_delay_slots): Likewise for local "new_label"; use
JUMP_LABEL_AS_INSN as necessary when calling own_thread_p.
(label_before_next_insn): Strengthen return type and local "insn"
from rtx to rtx_insn *.
(relax_delay_slots): Likewise for locals "other", "tmp".
(make_return_insns): Likewise for param "first" and locals "insn",
"jump_insn", "prev". Move declaration of "pat" to its assignment
and strengthen from rtx to rtx_sequence *. Use its methods for
clarity and typesafety.
* rtlanal.c (no_labels_between_p): Strengthen params from
const_rtx to const rtx_insn *. Strengthen local "p" from rtx to
rtx_insn *.
(reg_used_between_p): Strengthen params "from_insn", "to_insn"
from const_rtx to const rtx_insn *.
(reg_set_between_p): Rename param "from_insn" to
"uncast_from_insn", and reintroduce "from_insn" as a
const rtx_insn * via a checked cast.
(modified_between_p): Likewise for param "start" as "uncast_start".
(tablejump_p): Add a cast when invoking NEXT_INSN on "label".
* sel-sched-ir.c (get_seqno_by_preds): Strengthen param and locals
"tmp", head" from rtx to rtx_insn *.
(recompute_rev_top_order): Likewise for local "insn".
* sel-sched-ir.h (get_seqno_by_preds): Likewise for param.
* store-motion.c (build_store_vectors): Likewise for local "insn".
Strengthen local "st" from rtx to rtx_insn_list * and use methods
for clarity and typesafety.
* tree-ssa-loop-ivopts.c (seq_cost): Strengthen param "seq" from
rtx to rtx_insn *.
(computation_cost): Likewise for local "seq".
(get_address_cost): Likewise.
/
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* rtx-classes-status.txt (TODO): NEXT_INSN/PREV_INSN are done.
From-SVN: r214698
2014-08-28 23:29:38 +02:00
|
|
|
|
rtx_insn *insn;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
|
|
|
|
|
RTX_FRAME_RELATED_P (insn) = 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the offset relative to the stack pointer where the return address
|
|
|
|
|
is stored, or -1 if it is not stored. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
arc_return_slot_offset ()
|
|
|
|
|
{
|
|
|
|
|
struct arc_frame_info *afi = &cfun->machine->frame_info;
|
|
|
|
|
|
|
|
|
|
return (afi->save_return_addr
|
|
|
|
|
? afi->total_size - afi->pretend_size - afi->extra_size : -1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* PIC */
|
|
|
|
|
|
|
|
|
|
/* Emit special PIC prologues and epilogues. */
|
|
|
|
|
/* If the function has any GOTOFF relocations, then the GOTBASE
|
|
|
|
|
register has to be setup in the prologue
|
|
|
|
|
The instruction needed at the function start for setting up the
|
|
|
|
|
GOTBASE register is
|
|
|
|
|
add rdest, pc,
|
|
|
|
|
----------------------------------------------------------
|
|
|
|
|
The rtl to be emitted for this should be:
|
|
|
|
|
set (reg basereg)
|
|
|
|
|
(plus (reg pc)
|
|
|
|
|
(const (unspec (symref _DYNAMIC) 3)))
|
|
|
|
|
---------------------------------------------------------- */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_finalize_pic (void)
|
|
|
|
|
{
|
|
|
|
|
rtx pat;
|
|
|
|
|
rtx baseptr_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
|
|
|
|
|
|
|
|
|
|
if (crtl->uses_pic_offset_table == 0)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
gcc_assert (flag_pic != 0);
|
|
|
|
|
|
|
|
|
|
pat = gen_rtx_SYMBOL_REF (Pmode, "_DYNAMIC");
|
|
|
|
|
pat = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, pat), ARC_UNSPEC_GOT);
|
|
|
|
|
pat = gen_rtx_CONST (Pmode, pat);
|
|
|
|
|
|
|
|
|
|
pat = gen_rtx_SET (VOIDmode, baseptr_rtx, pat);
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* !TARGET_BARREL_SHIFTER support. */
|
|
|
|
|
/* Emit a shift insn to set OP0 to OP1 shifted by OP2; CODE specifies what
|
|
|
|
|
kind of shift. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
emit_shift (enum rtx_code code, rtx op0, rtx op1, rtx op2)
|
|
|
|
|
{
|
|
|
|
|
rtx shift = gen_rtx_fmt_ee (code, SImode, op1, op2);
|
|
|
|
|
rtx pat
|
|
|
|
|
= ((shift4_operator (shift, SImode) ? gen_shift_si3 : gen_shift_si3_loop)
|
|
|
|
|
(op0, op1, op2, shift));
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Output the assembler code for doing a shift.
|
|
|
|
|
We go to a bit of trouble to generate efficient code as the ARC601 only has
|
|
|
|
|
single bit shifts. This is taken from the h8300 port. We only have one
|
|
|
|
|
mode of shifting and can't access individual bytes like the h8300 can, so
|
|
|
|
|
this is greatly simplified (at the expense of not generating hyper-
|
|
|
|
|
efficient code).
|
|
|
|
|
|
|
|
|
|
This function is not used if the variable shift insns are present. */
|
|
|
|
|
|
|
|
|
|
/* FIXME: This probably can be done using a define_split in arc.md.
|
|
|
|
|
Alternately, generate rtx rather than output instructions. */
|
|
|
|
|
|
|
|
|
|
const char *
|
|
|
|
|
output_shift (rtx *operands)
|
|
|
|
|
{
|
|
|
|
|
/* static int loopend_lab;*/
|
|
|
|
|
rtx shift = operands[3];
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode = GET_MODE (shift);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
enum rtx_code code = GET_CODE (shift);
|
|
|
|
|
const char *shift_one;
|
|
|
|
|
|
|
|
|
|
gcc_assert (mode == SImode);
|
|
|
|
|
|
|
|
|
|
switch (code)
|
|
|
|
|
{
|
|
|
|
|
case ASHIFT: shift_one = "add %0,%1,%1"; break;
|
|
|
|
|
case ASHIFTRT: shift_one = "asr %0,%1"; break;
|
|
|
|
|
case LSHIFTRT: shift_one = "lsr %0,%1"; break;
|
|
|
|
|
default: gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (operands[2]) != CONST_INT)
|
|
|
|
|
{
|
|
|
|
|
output_asm_insn ("and.f lp_count,%2, 0x1f", operands);
|
|
|
|
|
goto shiftloop;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
int n;
|
|
|
|
|
|
|
|
|
|
n = INTVAL (operands[2]);
|
|
|
|
|
|
|
|
|
|
/* Only consider the lower 5 bits of the shift count. */
|
|
|
|
|
n = n & 0x1f;
|
|
|
|
|
|
|
|
|
|
/* First see if we can do them inline. */
|
|
|
|
|
/* ??? We could get better scheduling & shorter code (using short insns)
|
|
|
|
|
by using splitters. Alas, that'd be even more verbose. */
|
|
|
|
|
if (code == ASHIFT && n <= 9 && n > 2
|
|
|
|
|
&& dest_reg_operand (operands[4], SImode))
|
|
|
|
|
{
|
|
|
|
|
output_asm_insn ("mov %4,0\n\tadd3 %0,%4,%1", operands);
|
|
|
|
|
for (n -=3 ; n >= 3; n -= 3)
|
|
|
|
|
output_asm_insn ("add3 %0,%4,%0", operands);
|
|
|
|
|
if (n == 2)
|
|
|
|
|
output_asm_insn ("add2 %0,%4,%0", operands);
|
|
|
|
|
else if (n)
|
|
|
|
|
output_asm_insn ("add %0,%0,%0", operands);
|
|
|
|
|
}
|
|
|
|
|
else if (n <= 4)
|
|
|
|
|
{
|
|
|
|
|
while (--n >= 0)
|
|
|
|
|
{
|
|
|
|
|
output_asm_insn (shift_one, operands);
|
|
|
|
|
operands[1] = operands[0];
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* See if we can use a rotate/and. */
|
|
|
|
|
else if (n == BITS_PER_WORD - 1)
|
|
|
|
|
{
|
|
|
|
|
switch (code)
|
|
|
|
|
{
|
|
|
|
|
case ASHIFT :
|
|
|
|
|
output_asm_insn ("and %0,%1,1\n\tror %0,%0", operands);
|
|
|
|
|
break;
|
|
|
|
|
case ASHIFTRT :
|
|
|
|
|
/* The ARC doesn't have a rol insn. Use something else. */
|
|
|
|
|
output_asm_insn ("add.f 0,%1,%1\n\tsbc %0,%0,%0", operands);
|
|
|
|
|
break;
|
|
|
|
|
case LSHIFTRT :
|
|
|
|
|
/* The ARC doesn't have a rol insn. Use something else. */
|
|
|
|
|
output_asm_insn ("add.f 0,%1,%1\n\trlc %0,0", operands);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (n == BITS_PER_WORD - 2 && dest_reg_operand (operands[4], SImode))
|
|
|
|
|
{
|
|
|
|
|
switch (code)
|
|
|
|
|
{
|
|
|
|
|
case ASHIFT :
|
|
|
|
|
output_asm_insn ("and %0,%1,3\n\tror %0,%0\n\tror %0,%0", operands);
|
|
|
|
|
break;
|
|
|
|
|
case ASHIFTRT :
|
|
|
|
|
#if 1 /* Need some scheduling comparisons. */
|
|
|
|
|
output_asm_insn ("add.f %4,%1,%1\n\tsbc %0,%0,%0\n\t"
|
|
|
|
|
"add.f 0,%4,%4\n\trlc %0,%0", operands);
|
|
|
|
|
#else
|
|
|
|
|
output_asm_insn ("add.f %4,%1,%1\n\tbxor %0,%4,31\n\t"
|
|
|
|
|
"sbc.f %0,%0,%4\n\trlc %0,%0", operands);
|
|
|
|
|
#endif
|
|
|
|
|
break;
|
|
|
|
|
case LSHIFTRT :
|
|
|
|
|
#if 1
|
|
|
|
|
output_asm_insn ("add.f %4,%1,%1\n\trlc %0,0\n\t"
|
|
|
|
|
"add.f 0,%4,%4\n\trlc %0,%0", operands);
|
|
|
|
|
#else
|
|
|
|
|
output_asm_insn ("add.f %0,%1,%1\n\trlc.f %0,0\n\t"
|
|
|
|
|
"and %0,%0,1\n\trlc %0,%0", operands);
|
|
|
|
|
#endif
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (n == BITS_PER_WORD - 3 && code == ASHIFT)
|
|
|
|
|
output_asm_insn ("and %0,%1,7\n\tror %0,%0\n\tror %0,%0\n\tror %0,%0",
|
|
|
|
|
operands);
|
|
|
|
|
/* Must loop. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
operands[2] = GEN_INT (n);
|
|
|
|
|
output_asm_insn ("mov.f lp_count, %2", operands);
|
|
|
|
|
|
|
|
|
|
shiftloop:
|
|
|
|
|
{
|
|
|
|
|
output_asm_insn ("lpnz\t2f", operands);
|
|
|
|
|
output_asm_insn (shift_one, operands);
|
|
|
|
|
output_asm_insn ("nop", operands);
|
|
|
|
|
fprintf (asm_out_file, "2:\t%s end single insn loop\n",
|
|
|
|
|
ASM_COMMENT_START);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return "";
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Nested function support. */
|
|
|
|
|
|
|
|
|
|
/* Directly store VALUE into memory object BLOCK at OFFSET. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
emit_store_direct (rtx block, int offset, int value)
|
|
|
|
|
{
|
|
|
|
|
emit_insn (gen_store_direct (adjust_address (block, SImode, offset),
|
|
|
|
|
force_reg (SImode,
|
|
|
|
|
gen_int_mode (value, SImode))));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit RTL insns to initialize the variable parts of a trampoline.
|
|
|
|
|
FNADDR is an RTX for the address of the function's pure code.
|
|
|
|
|
CXT is an RTX for the static chain value for the function. */
|
|
|
|
|
/* With potentially multiple shared objects loaded, and multiple stacks
|
|
|
|
|
present for multiple thereds where trampolines might reside, a simple
|
|
|
|
|
range check will likely not suffice for the profiler to tell if a callee
|
|
|
|
|
is a trampoline. We a speedier check by making the trampoline start at
|
|
|
|
|
an address that is not 4-byte aligned.
|
|
|
|
|
A trampoline looks like this:
|
|
|
|
|
|
|
|
|
|
nop_s 0x78e0
|
|
|
|
|
entry:
|
|
|
|
|
ld_s r12,[pcl,12] 0xd403
|
|
|
|
|
ld r11,[pcl,12] 0x170c 700b
|
|
|
|
|
j_s [r12] 0x7c00
|
|
|
|
|
nop_s 0x78e0
|
|
|
|
|
|
|
|
|
|
The fastest trampoline to execute for trampolines within +-8KB of CTX
|
|
|
|
|
would be:
|
|
|
|
|
add2 r11,pcl,s12
|
|
|
|
|
j [limm] 0x20200f80 limm
|
|
|
|
|
and that would also be faster to write to the stack by computing the offset
|
|
|
|
|
from CTX to TRAMP at compile time. However, it would really be better to
|
|
|
|
|
get rid of the high cost of cache invalidation when generating trampolines,
|
|
|
|
|
which requires that the code part of trampolines stays constant, and
|
|
|
|
|
additionally either
|
|
|
|
|
- making sure that no executable code but trampolines is on the stack,
|
|
|
|
|
no icache entries linger for the area of the stack from when before the
|
|
|
|
|
stack was allocated, and allocating trampolines in trampoline-only
|
|
|
|
|
cache lines
|
|
|
|
|
or
|
|
|
|
|
- allocate trampolines fram a special pool of pre-allocated trampolines. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_initialize_trampoline (rtx tramp, tree fndecl, rtx cxt)
|
|
|
|
|
{
|
|
|
|
|
rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
|
|
|
|
|
|
|
|
|
|
emit_store_direct (tramp, 0, TARGET_BIG_ENDIAN ? 0x78e0d403 : 0xd40378e0);
|
|
|
|
|
emit_store_direct (tramp, 4, TARGET_BIG_ENDIAN ? 0x170c700b : 0x700b170c);
|
|
|
|
|
emit_store_direct (tramp, 8, TARGET_BIG_ENDIAN ? 0x7c0078e0 : 0x78e07c00);
|
|
|
|
|
emit_move_insn (adjust_address (tramp, SImode, 12), fnaddr);
|
|
|
|
|
emit_move_insn (adjust_address (tramp, SImode, 16), cxt);
|
|
|
|
|
emit_insn (gen_flush_icache (adjust_address (tramp, SImode, 0)));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Allow the profiler to easily distinguish trampolines from normal
|
|
|
|
|
functions. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_trampoline_adjust_address (rtx addr)
|
|
|
|
|
{
|
|
|
|
|
return plus_constant (Pmode, addr, 2);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This is set briefly to 1 when we output a ".as" address modifer, and then
|
|
|
|
|
reset when we output the scaled address. */
|
|
|
|
|
static int output_scaled = 0;
|
|
|
|
|
|
|
|
|
|
/* Print operand X (an rtx) in assembler syntax to file FILE.
|
|
|
|
|
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
|
|
|
|
For `%' followed by punctuation, CODE is the punctuation and X is null. */
|
|
|
|
|
/* In final.c:output_asm_insn:
|
|
|
|
|
'l' : label
|
|
|
|
|
'a' : address
|
|
|
|
|
'c' : constant address if CONSTANT_ADDRESS_P
|
|
|
|
|
'n' : negative
|
|
|
|
|
Here:
|
|
|
|
|
'Z': log2(x+1)-1
|
|
|
|
|
'z': log2
|
|
|
|
|
'M': log2(~x)
|
|
|
|
|
'#': condbranch delay slot suffix
|
|
|
|
|
'*': jump delay slot suffix
|
|
|
|
|
'?' : nonjump-insn suffix for conditional execution or short instruction
|
|
|
|
|
'!' : jump / call suffix for conditional execution or short instruction
|
|
|
|
|
'`': fold constant inside unary o-perator, re-recognize, and emit.
|
|
|
|
|
'd'
|
|
|
|
|
'D'
|
|
|
|
|
'R': Second word
|
|
|
|
|
'S'
|
|
|
|
|
'B': Branch comparison operand - suppress sda reference
|
|
|
|
|
'H': Most significant word
|
|
|
|
|
'L': Least significant word
|
|
|
|
|
'A': ASCII decimal representation of floating point value
|
|
|
|
|
'U': Load/store update or scaling indicator
|
|
|
|
|
'V': cache bypass indicator for volatile
|
|
|
|
|
'P'
|
|
|
|
|
'F'
|
|
|
|
|
'^'
|
|
|
|
|
'O': Operator
|
|
|
|
|
'o': original symbol - no @ prepending. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_print_operand (FILE *file, rtx x, int code)
|
|
|
|
|
{
|
|
|
|
|
switch (code)
|
|
|
|
|
{
|
|
|
|
|
case 'Z':
|
|
|
|
|
if (GET_CODE (x) == CONST_INT)
|
|
|
|
|
fprintf (file, "%d",exact_log2(INTVAL (x) + 1) - 1 );
|
|
|
|
|
else
|
|
|
|
|
output_operand_lossage ("invalid operand to %%Z code");
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case 'z':
|
|
|
|
|
if (GET_CODE (x) == CONST_INT)
|
|
|
|
|
fprintf (file, "%d",exact_log2(INTVAL (x)) );
|
|
|
|
|
else
|
|
|
|
|
output_operand_lossage ("invalid operand to %%z code");
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case 'M':
|
|
|
|
|
if (GET_CODE (x) == CONST_INT)
|
|
|
|
|
fprintf (file, "%d",exact_log2(~INTVAL (x)) );
|
|
|
|
|
else
|
|
|
|
|
output_operand_lossage ("invalid operand to %%M code");
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
case '#' :
|
|
|
|
|
/* Conditional branches depending on condition codes.
|
|
|
|
|
Note that this is only for branches that were known to depend on
|
|
|
|
|
condition codes before delay slot scheduling;
|
|
|
|
|
out-of-range brcc / bbit expansions should use '*'.
|
|
|
|
|
This distinction is important because of the different
|
|
|
|
|
allowable delay slot insns and the output of the delay suffix
|
|
|
|
|
for TARGET_AT_DBR_COND_EXEC. */
|
|
|
|
|
case '*' :
|
|
|
|
|
/* Unconditional branches / branches not depending on condition codes.
|
|
|
|
|
This could also be a CALL_INSN.
|
|
|
|
|
Output the appropriate delay slot suffix. */
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
|
|
|
|
if (final_sequence && final_sequence->len () != 1)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
|
|
|
|
rtx_insn *jump = final_sequence->insn (0);
|
|
|
|
|
rtx_insn *delay = final_sequence->insn (1);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
/* For TARGET_PAD_RETURN we might have grabbed the delay insn. */
|
Replace INSN_DELETED_P with rtx_insn member functions
gcc/
* cfgrtl.c, combine.c, config/arc/arc.c, config/mcore/mcore.c,
config/rs6000/rs6000.c, config/sh/sh.c, cprop.c, dwarf2out.c,
emit-rtl.c, final.c, function.c, gcse.c, jump.c, reg-stack.c,
reload1.c, reorg.c, resource.c, sel-sched-ir.c: Replace INSN_DELETED_P
macro with statically checked member functions.
* rtl.h (rtx_insn::deleted): New method.
(rtx_insn::set_deleted): Likewise.
(rtx_insn::set_undeleted): Likewise.
(INSN_DELETED_P): Remove.
From-SVN: r215282
2014-09-16 03:23:42 +02:00
|
|
|
|
if (delay->deleted ())
|
2013-10-01 19:03:46 +02:00
|
|
|
|
return;
|
|
|
|
|
if (JUMP_P (jump) && INSN_ANNULLED_BRANCH_P (jump))
|
|
|
|
|
fputs (INSN_FROM_TARGET_P (delay) ? ".d"
|
|
|
|
|
: TARGET_AT_DBR_CONDEXEC && code == '#' ? ".d"
|
|
|
|
|
: get_attr_type (jump) == TYPE_RETURN && code == '#' ? ""
|
|
|
|
|
: ".nd",
|
|
|
|
|
file);
|
|
|
|
|
else
|
|
|
|
|
fputs (".d", file);
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
case '?' : /* with leading "." */
|
|
|
|
|
case '!' : /* without leading "." */
|
|
|
|
|
/* This insn can be conditionally executed. See if the ccfsm machinery
|
|
|
|
|
says it should be conditionalized.
|
|
|
|
|
If it shouldn't, we'll check the compact attribute if this insn
|
|
|
|
|
has a short variant, which may be used depending on code size and
|
|
|
|
|
alignment considerations. */
|
|
|
|
|
if (current_insn_predicate)
|
|
|
|
|
arc_ccfsm_current.cc
|
|
|
|
|
= get_arc_condition_code (current_insn_predicate);
|
|
|
|
|
if (ARC_CCFSM_COND_EXEC_P (&arc_ccfsm_current))
|
|
|
|
|
{
|
|
|
|
|
/* Is this insn in a delay slot sequence? */
|
|
|
|
|
if (!final_sequence || XVECLEN (final_sequence, 0) < 2
|
|
|
|
|
|| current_insn_predicate
|
2014-09-05 17:15:43 +02:00
|
|
|
|
|| CALL_P (final_sequence->insn (0))
|
|
|
|
|
|| simplejump_p (final_sequence->insn (0)))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
/* This insn isn't in a delay slot sequence, or conditionalized
|
|
|
|
|
independently of its position in a delay slot. */
|
|
|
|
|
fprintf (file, "%s%s",
|
|
|
|
|
code == '?' ? "." : "",
|
|
|
|
|
arc_condition_codes[arc_ccfsm_current.cc]);
|
|
|
|
|
/* If this is a jump, there are still short variants. However,
|
|
|
|
|
only beq_s / bne_s have the same offset range as b_s,
|
|
|
|
|
and the only short conditional returns are jeq_s and jne_s. */
|
|
|
|
|
if (code == '!'
|
|
|
|
|
&& (arc_ccfsm_current.cc == ARC_CC_EQ
|
|
|
|
|
|| arc_ccfsm_current.cc == ARC_CC_NE
|
|
|
|
|
|| 0 /* FIXME: check if branch in 7 bit range. */))
|
|
|
|
|
output_short_suffix (file);
|
|
|
|
|
}
|
|
|
|
|
else if (code == '!') /* Jump with delay slot. */
|
|
|
|
|
fputs (arc_condition_codes[arc_ccfsm_current.cc], file);
|
|
|
|
|
else /* An Instruction in a delay slot of a jump or call. */
|
|
|
|
|
{
|
|
|
|
|
rtx jump = XVECEXP (final_sequence, 0, 0);
|
|
|
|
|
rtx insn = XVECEXP (final_sequence, 0, 1);
|
|
|
|
|
|
|
|
|
|
/* If the insn is annulled and is from the target path, we need
|
|
|
|
|
to inverse the condition test. */
|
|
|
|
|
if (JUMP_P (jump) && INSN_ANNULLED_BRANCH_P (jump))
|
|
|
|
|
{
|
|
|
|
|
if (INSN_FROM_TARGET_P (insn))
|
|
|
|
|
fprintf (file, "%s%s",
|
|
|
|
|
code == '?' ? "." : "",
|
|
|
|
|
arc_condition_codes[ARC_INVERSE_CONDITION_CODE (arc_ccfsm_current.cc)]);
|
|
|
|
|
else
|
|
|
|
|
fprintf (file, "%s%s",
|
|
|
|
|
code == '?' ? "." : "",
|
|
|
|
|
arc_condition_codes[arc_ccfsm_current.cc]);
|
|
|
|
|
if (arc_ccfsm_current.state == 5)
|
|
|
|
|
arc_ccfsm_current.state = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
/* This insn is executed for either path, so don't
|
|
|
|
|
conditionalize it at all. */
|
|
|
|
|
output_short_suffix (file);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_short_suffix (file);
|
|
|
|
|
return;
|
|
|
|
|
case'`':
|
|
|
|
|
/* FIXME: fold constant inside unary operator, re-recognize, and emit. */
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
case 'd' :
|
|
|
|
|
fputs (arc_condition_codes[get_arc_condition_code (x)], file);
|
|
|
|
|
return;
|
|
|
|
|
case 'D' :
|
|
|
|
|
fputs (arc_condition_codes[ARC_INVERSE_CONDITION_CODE
|
|
|
|
|
(get_arc_condition_code (x))],
|
|
|
|
|
file);
|
|
|
|
|
return;
|
|
|
|
|
case 'R' :
|
|
|
|
|
/* Write second word of DImode or DFmode reference,
|
|
|
|
|
register or memory. */
|
|
|
|
|
if (GET_CODE (x) == REG)
|
|
|
|
|
fputs (reg_names[REGNO (x)+1], file);
|
|
|
|
|
else if (GET_CODE (x) == MEM)
|
|
|
|
|
{
|
|
|
|
|
fputc ('[', file);
|
|
|
|
|
|
|
|
|
|
/* Handle possible auto-increment. For PRE_INC / PRE_DEC /
|
|
|
|
|
PRE_MODIFY, we will have handled the first word already;
|
|
|
|
|
For POST_INC / POST_DEC / POST_MODIFY, the access to the
|
|
|
|
|
first word will be done later. In either case, the access
|
|
|
|
|
to the first word will do the modify, and we only have
|
|
|
|
|
to add an offset of four here. */
|
|
|
|
|
if (GET_CODE (XEXP (x, 0)) == PRE_INC
|
|
|
|
|
|| GET_CODE (XEXP (x, 0)) == PRE_DEC
|
|
|
|
|
|| GET_CODE (XEXP (x, 0)) == PRE_MODIFY
|
|
|
|
|
|| GET_CODE (XEXP (x, 0)) == POST_INC
|
|
|
|
|
|| GET_CODE (XEXP (x, 0)) == POST_DEC
|
|
|
|
|
|| GET_CODE (XEXP (x, 0)) == POST_MODIFY)
|
|
|
|
|
output_address (plus_constant (Pmode, XEXP (XEXP (x, 0), 0), 4));
|
|
|
|
|
else if (output_scaled)
|
|
|
|
|
{
|
|
|
|
|
rtx addr = XEXP (x, 0);
|
|
|
|
|
int size = GET_MODE_SIZE (GET_MODE (x));
|
|
|
|
|
|
|
|
|
|
output_address (plus_constant (Pmode, XEXP (addr, 0),
|
|
|
|
|
((INTVAL (XEXP (addr, 1)) + 4)
|
|
|
|
|
>> (size == 2 ? 1 : 2))));
|
|
|
|
|
output_scaled = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_address (plus_constant (Pmode, XEXP (x, 0), 4));
|
|
|
|
|
fputc (']', file);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_operand_lossage ("invalid operand to %%R code");
|
|
|
|
|
return;
|
|
|
|
|
case 'S' :
|
|
|
|
|
/* FIXME: remove %S option. */
|
|
|
|
|
break;
|
|
|
|
|
case 'B' /* Branch or other LIMM ref - must not use sda references. */ :
|
|
|
|
|
if (CONSTANT_P (x))
|
|
|
|
|
{
|
|
|
|
|
output_addr_const (file, x);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 'H' :
|
|
|
|
|
case 'L' :
|
|
|
|
|
if (GET_CODE (x) == REG)
|
|
|
|
|
{
|
|
|
|
|
/* L = least significant word, H = most significant word. */
|
|
|
|
|
if ((WORDS_BIG_ENDIAN != 0) ^ (code == 'L'))
|
|
|
|
|
fputs (reg_names[REGNO (x)], file);
|
|
|
|
|
else
|
|
|
|
|
fputs (reg_names[REGNO (x)+1], file);
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (x) == CONST_INT
|
|
|
|
|
|| GET_CODE (x) == CONST_DOUBLE)
|
|
|
|
|
{
|
|
|
|
|
rtx first, second;
|
|
|
|
|
|
|
|
|
|
split_double (x, &first, &second);
|
|
|
|
|
|
|
|
|
|
if((WORDS_BIG_ENDIAN) == 0)
|
2014-09-06 18:04:40 +02:00
|
|
|
|
fprintf (file, "0x%08" PRIx64,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
code == 'L' ? INTVAL (first) : INTVAL (second));
|
|
|
|
|
else
|
2014-09-06 18:04:40 +02:00
|
|
|
|
fprintf (file, "0x%08" PRIx64,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
code == 'L' ? INTVAL (second) : INTVAL (first));
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_operand_lossage ("invalid operand to %%H/%%L code");
|
|
|
|
|
return;
|
|
|
|
|
case 'A' :
|
|
|
|
|
{
|
|
|
|
|
char str[30];
|
|
|
|
|
|
|
|
|
|
gcc_assert (GET_CODE (x) == CONST_DOUBLE
|
|
|
|
|
&& GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT);
|
|
|
|
|
|
|
|
|
|
real_to_decimal (str, CONST_DOUBLE_REAL_VALUE (x), sizeof (str), 0, 1);
|
|
|
|
|
fprintf (file, "%s", str);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
case 'U' :
|
|
|
|
|
/* Output a load/store with update indicator if appropriate. */
|
|
|
|
|
if (GET_CODE (x) == MEM)
|
|
|
|
|
{
|
|
|
|
|
rtx addr = XEXP (x, 0);
|
|
|
|
|
switch (GET_CODE (addr))
|
|
|
|
|
{
|
|
|
|
|
case PRE_INC: case PRE_DEC: case PRE_MODIFY:
|
|
|
|
|
fputs (".a", file); break;
|
|
|
|
|
case POST_INC: case POST_DEC: case POST_MODIFY:
|
|
|
|
|
fputs (".ab", file); break;
|
|
|
|
|
case PLUS:
|
|
|
|
|
/* Are we using a scaled index? */
|
|
|
|
|
if (GET_CODE (XEXP (addr, 0)) == MULT)
|
|
|
|
|
fputs (".as", file);
|
|
|
|
|
/* Can we use a scaled offset? */
|
|
|
|
|
else if (CONST_INT_P (XEXP (addr, 1))
|
|
|
|
|
&& GET_MODE_SIZE (GET_MODE (x)) > 1
|
|
|
|
|
&& (!(INTVAL (XEXP (addr, 1))
|
|
|
|
|
& (GET_MODE_SIZE (GET_MODE (x)) - 1) & 3))
|
|
|
|
|
/* Does it make a difference? */
|
|
|
|
|
&& !SMALL_INT_RANGE(INTVAL (XEXP (addr, 1)),
|
|
|
|
|
GET_MODE_SIZE (GET_MODE (x)) - 2, 0))
|
|
|
|
|
{
|
|
|
|
|
fputs (".as", file);
|
|
|
|
|
output_scaled = 1;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case REG:
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
gcc_assert (CONSTANT_P (addr)); break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_operand_lossage ("invalid operand to %%U code");
|
|
|
|
|
return;
|
|
|
|
|
case 'V' :
|
|
|
|
|
/* Output cache bypass indicator for a load/store insn. Volatile memory
|
|
|
|
|
refs are defined to use the cache bypass mechanism. */
|
|
|
|
|
if (GET_CODE (x) == MEM)
|
|
|
|
|
{
|
|
|
|
|
if (MEM_VOLATILE_P (x) && !TARGET_VOLATILE_CACHE_SET )
|
|
|
|
|
fputs (".di", file);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_operand_lossage ("invalid operand to %%V code");
|
|
|
|
|
return;
|
|
|
|
|
/* plt code. */
|
|
|
|
|
case 'P':
|
|
|
|
|
case 0 :
|
|
|
|
|
/* Do nothing special. */
|
|
|
|
|
break;
|
|
|
|
|
case 'F':
|
|
|
|
|
fputs (reg_names[REGNO (x)]+1, file);
|
|
|
|
|
return;
|
|
|
|
|
case '^':
|
|
|
|
|
/* This punctuation character is needed because label references are
|
|
|
|
|
printed in the output template using %l. This is a front end
|
|
|
|
|
character, and when we want to emit a '@' before it, we have to use
|
|
|
|
|
this '^'. */
|
|
|
|
|
|
|
|
|
|
fputc('@',file);
|
|
|
|
|
return;
|
|
|
|
|
case 'O':
|
|
|
|
|
/* Output an operator. */
|
|
|
|
|
switch (GET_CODE (x))
|
|
|
|
|
{
|
|
|
|
|
case PLUS: fputs ("add", file); return;
|
|
|
|
|
case SS_PLUS: fputs ("adds", file); return;
|
|
|
|
|
case AND: fputs ("and", file); return;
|
|
|
|
|
case IOR: fputs ("or", file); return;
|
|
|
|
|
case XOR: fputs ("xor", file); return;
|
|
|
|
|
case MINUS: fputs ("sub", file); return;
|
|
|
|
|
case SS_MINUS: fputs ("subs", file); return;
|
|
|
|
|
case ASHIFT: fputs ("asl", file); return;
|
|
|
|
|
case ASHIFTRT: fputs ("asr", file); return;
|
|
|
|
|
case LSHIFTRT: fputs ("lsr", file); return;
|
|
|
|
|
case ROTATERT: fputs ("ror", file); return;
|
|
|
|
|
case MULT: fputs ("mpy", file); return;
|
|
|
|
|
case ABS: fputs ("abs", file); return; /* Unconditional. */
|
|
|
|
|
case NEG: fputs ("neg", file); return;
|
|
|
|
|
case SS_NEG: fputs ("negs", file); return;
|
|
|
|
|
case NOT: fputs ("not", file); return; /* Unconditional. */
|
|
|
|
|
case ZERO_EXTEND:
|
|
|
|
|
fputs ("ext", file); /* bmsk allows predication. */
|
|
|
|
|
goto size_suffix;
|
|
|
|
|
case SIGN_EXTEND: /* Unconditional. */
|
|
|
|
|
fputs ("sex", file);
|
|
|
|
|
size_suffix:
|
|
|
|
|
switch (GET_MODE (XEXP (x, 0)))
|
|
|
|
|
{
|
|
|
|
|
case QImode: fputs ("b", file); return;
|
|
|
|
|
case HImode: fputs ("w", file); return;
|
|
|
|
|
default: break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case SS_TRUNCATE:
|
|
|
|
|
if (GET_MODE (x) != HImode)
|
|
|
|
|
break;
|
|
|
|
|
fputs ("sat16", file);
|
|
|
|
|
default: break;
|
|
|
|
|
}
|
|
|
|
|
output_operand_lossage ("invalid operand to %%O code"); return;
|
|
|
|
|
case 'o':
|
|
|
|
|
if (GET_CODE (x) == SYMBOL_REF)
|
|
|
|
|
{
|
|
|
|
|
assemble_name (file, XSTR (x, 0));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case '&':
|
|
|
|
|
if (TARGET_ANNOTATE_ALIGN && cfun->machine->size_reason)
|
|
|
|
|
fprintf (file, "; unalign: %d", cfun->machine->unalign);
|
|
|
|
|
return;
|
|
|
|
|
default :
|
|
|
|
|
/* Unknown flag. */
|
|
|
|
|
output_operand_lossage ("invalid operand output code");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
switch (GET_CODE (x))
|
|
|
|
|
{
|
|
|
|
|
case REG :
|
|
|
|
|
fputs (reg_names[REGNO (x)], file);
|
|
|
|
|
break;
|
|
|
|
|
case MEM :
|
|
|
|
|
{
|
|
|
|
|
rtx addr = XEXP (x, 0);
|
|
|
|
|
int size = GET_MODE_SIZE (GET_MODE (x));
|
|
|
|
|
|
|
|
|
|
fputc ('[', file);
|
|
|
|
|
|
|
|
|
|
switch (GET_CODE (addr))
|
|
|
|
|
{
|
|
|
|
|
case PRE_INC: case POST_INC:
|
|
|
|
|
output_address (plus_constant (Pmode, XEXP (addr, 0), size)); break;
|
|
|
|
|
case PRE_DEC: case POST_DEC:
|
|
|
|
|
output_address (plus_constant (Pmode, XEXP (addr, 0), -size));
|
|
|
|
|
break;
|
|
|
|
|
case PRE_MODIFY: case POST_MODIFY:
|
|
|
|
|
output_address (XEXP (addr, 1)); break;
|
|
|
|
|
case PLUS:
|
|
|
|
|
if (output_scaled)
|
|
|
|
|
{
|
|
|
|
|
output_address (plus_constant (Pmode, XEXP (addr, 0),
|
|
|
|
|
(INTVAL (XEXP (addr, 1))
|
|
|
|
|
>> (size == 2 ? 1 : 2))));
|
|
|
|
|
output_scaled = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_address (addr);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
if (flag_pic && CONSTANT_ADDRESS_P (addr))
|
|
|
|
|
arc_output_pic_addr_const (file, addr, code);
|
|
|
|
|
else
|
|
|
|
|
output_address (addr);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
fputc (']', file);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
case CONST_DOUBLE :
|
|
|
|
|
/* We handle SFmode constants here as output_addr_const doesn't. */
|
|
|
|
|
if (GET_MODE (x) == SFmode)
|
|
|
|
|
{
|
|
|
|
|
REAL_VALUE_TYPE d;
|
|
|
|
|
long l;
|
|
|
|
|
|
|
|
|
|
REAL_VALUE_FROM_CONST_DOUBLE (d, x);
|
|
|
|
|
REAL_VALUE_TO_TARGET_SINGLE (d, l);
|
|
|
|
|
fprintf (file, "0x%08lx", l);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
/* Fall through. Let output_addr_const deal with it. */
|
|
|
|
|
default :
|
|
|
|
|
if (flag_pic)
|
|
|
|
|
arc_output_pic_addr_const (file, x, code);
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* FIXME: Dirty way to handle @var@sda+const. Shd be handled
|
|
|
|
|
with asm_output_symbol_ref */
|
|
|
|
|
if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS)
|
|
|
|
|
{
|
|
|
|
|
x = XEXP (x, 0);
|
|
|
|
|
output_addr_const (file, XEXP (x, 0));
|
|
|
|
|
if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF && SYMBOL_REF_SMALL_P (XEXP (x, 0)))
|
|
|
|
|
fprintf (file, "@sda");
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (XEXP (x, 1)) != CONST_INT
|
|
|
|
|
|| INTVAL (XEXP (x, 1)) >= 0)
|
|
|
|
|
fprintf (file, "+");
|
|
|
|
|
output_addr_const (file, XEXP (x, 1));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
output_addr_const (file, x);
|
|
|
|
|
}
|
|
|
|
|
if (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_SMALL_P (x))
|
|
|
|
|
fprintf (file, "@sda");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Print a memory address as an operand to reference that memory location. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_print_operand_address (FILE *file , rtx addr)
|
|
|
|
|
{
|
|
|
|
|
register rtx base, index = 0;
|
|
|
|
|
|
|
|
|
|
switch (GET_CODE (addr))
|
|
|
|
|
{
|
|
|
|
|
case REG :
|
|
|
|
|
fputs (reg_names[REGNO (addr)], file);
|
|
|
|
|
break;
|
|
|
|
|
case SYMBOL_REF :
|
|
|
|
|
output_addr_const (file, addr);
|
|
|
|
|
if (SYMBOL_REF_SMALL_P (addr))
|
|
|
|
|
fprintf (file, "@sda");
|
|
|
|
|
break;
|
|
|
|
|
case PLUS :
|
|
|
|
|
if (GET_CODE (XEXP (addr, 0)) == MULT)
|
|
|
|
|
index = XEXP (XEXP (addr, 0), 0), base = XEXP (addr, 1);
|
|
|
|
|
else if (CONST_INT_P (XEXP (addr, 0)))
|
|
|
|
|
index = XEXP (addr, 0), base = XEXP (addr, 1);
|
|
|
|
|
else
|
|
|
|
|
base = XEXP (addr, 0), index = XEXP (addr, 1);
|
|
|
|
|
|
|
|
|
|
gcc_assert (OBJECT_P (base));
|
|
|
|
|
arc_print_operand_address (file, base);
|
|
|
|
|
if (CONSTANT_P (base) && CONST_INT_P (index))
|
|
|
|
|
fputc ('+', file);
|
|
|
|
|
else
|
|
|
|
|
fputc (',', file);
|
|
|
|
|
gcc_assert (OBJECT_P (index));
|
|
|
|
|
arc_print_operand_address (file, index);
|
|
|
|
|
break;
|
|
|
|
|
case CONST:
|
|
|
|
|
{
|
|
|
|
|
rtx c = XEXP (addr, 0);
|
|
|
|
|
|
|
|
|
|
gcc_assert (GET_CODE (XEXP (c, 0)) == SYMBOL_REF);
|
|
|
|
|
gcc_assert (GET_CODE (XEXP (c, 1)) == CONST_INT);
|
|
|
|
|
|
|
|
|
|
output_address(XEXP(addr,0));
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
case PRE_INC :
|
|
|
|
|
case PRE_DEC :
|
|
|
|
|
/* We shouldn't get here as we've lost the mode of the memory object
|
|
|
|
|
(which says how much to inc/dec by. */
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
break;
|
|
|
|
|
default :
|
|
|
|
|
if (flag_pic)
|
|
|
|
|
arc_output_pic_addr_const (file, addr, 0);
|
|
|
|
|
else
|
|
|
|
|
output_addr_const (file, addr);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Called via walk_stores. DATA points to a hash table we can use to
|
|
|
|
|
establish a unique SYMBOL_REF for each counter, which corresponds to
|
|
|
|
|
a caller-callee pair.
|
|
|
|
|
X is a store which we want to examine for an UNSPEC_PROF, which
|
|
|
|
|
would be an address loaded into a register, or directly used in a MEM.
|
|
|
|
|
If we found an UNSPEC_PROF, if we encounter a new counter the first time,
|
|
|
|
|
write out a description and a data allocation for a 32 bit counter.
|
|
|
|
|
Also, fill in the appropriate symbol_ref into each UNSPEC_PROF instance. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
write_profile_sections (rtx dest ATTRIBUTE_UNUSED, rtx x, void *data)
|
|
|
|
|
{
|
|
|
|
|
rtx *srcp, src;
|
|
|
|
|
htab_t htab = (htab_t) data;
|
|
|
|
|
rtx *slot;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) != SET)
|
|
|
|
|
return;
|
|
|
|
|
srcp = &SET_SRC (x);
|
|
|
|
|
if (MEM_P (*srcp))
|
|
|
|
|
srcp = &XEXP (*srcp, 0);
|
|
|
|
|
else if (MEM_P (SET_DEST (x)))
|
|
|
|
|
srcp = &XEXP (SET_DEST (x), 0);
|
|
|
|
|
src = *srcp;
|
|
|
|
|
if (GET_CODE (src) != CONST)
|
|
|
|
|
return;
|
|
|
|
|
src = XEXP (src, 0);
|
|
|
|
|
if (GET_CODE (src) != UNSPEC || XINT (src, 1) != UNSPEC_PROF)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
gcc_assert (XVECLEN (src, 0) == 3);
|
|
|
|
|
if (!htab_elements (htab))
|
|
|
|
|
{
|
|
|
|
|
output_asm_insn (".section .__arc_profile_desc, \"a\"\n"
|
|
|
|
|
"\t.long %0 + 1\n",
|
|
|
|
|
&XVECEXP (src, 0, 0));
|
|
|
|
|
}
|
|
|
|
|
slot = (rtx *) htab_find_slot (htab, src, INSERT);
|
|
|
|
|
if (*slot == HTAB_EMPTY_ENTRY)
|
|
|
|
|
{
|
|
|
|
|
static int count_nr;
|
|
|
|
|
char buf[24];
|
|
|
|
|
rtx count;
|
|
|
|
|
|
|
|
|
|
*slot = src;
|
|
|
|
|
sprintf (buf, "__prof_count%d", count_nr++);
|
|
|
|
|
count = gen_rtx_SYMBOL_REF (Pmode, xstrdup (buf));
|
|
|
|
|
XVECEXP (src, 0, 2) = count;
|
|
|
|
|
output_asm_insn (".section\t.__arc_profile_desc, \"a\"\n"
|
|
|
|
|
"\t.long\t%1\n"
|
|
|
|
|
"\t.section\t.__arc_profile_counters, \"aw\"\n"
|
|
|
|
|
"\t.type\t%o2, @object\n"
|
|
|
|
|
"\t.size\t%o2, 4\n"
|
|
|
|
|
"%o2:\t.zero 4",
|
|
|
|
|
&XVECEXP (src, 0, 0));
|
|
|
|
|
*srcp = count;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
*srcp = XVECEXP (*slot, 0, 2);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Hash function for UNSPEC_PROF htab. Use both the caller's name and
|
|
|
|
|
the callee's name (if known). */
|
|
|
|
|
|
|
|
|
|
static hashval_t
|
|
|
|
|
unspec_prof_hash (const void *x)
|
|
|
|
|
{
|
|
|
|
|
const_rtx u = (const_rtx) x;
|
|
|
|
|
const_rtx s1 = XVECEXP (u, 0, 1);
|
|
|
|
|
|
|
|
|
|
return (htab_hash_string (XSTR (XVECEXP (u, 0, 0), 0))
|
|
|
|
|
^ (s1->code == SYMBOL_REF ? htab_hash_string (XSTR (s1, 0)) : 0));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Equality function for UNSPEC_PROF htab. Two pieces of UNSPEC_PROF rtl
|
|
|
|
|
shall refer to the same counter if both caller name and callee rtl
|
|
|
|
|
are identical. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
unspec_prof_htab_eq (const void *x, const void *y)
|
|
|
|
|
{
|
|
|
|
|
const_rtx u0 = (const_rtx) x;
|
|
|
|
|
const_rtx u1 = (const_rtx) y;
|
|
|
|
|
const_rtx s01 = XVECEXP (u0, 0, 1);
|
|
|
|
|
const_rtx s11 = XVECEXP (u1, 0, 1);
|
|
|
|
|
|
|
|
|
|
return (!strcmp (XSTR (XVECEXP (u0, 0, 0), 0),
|
|
|
|
|
XSTR (XVECEXP (u1, 0, 0), 0))
|
|
|
|
|
&& rtx_equal_p (s01, s11));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Conditional execution support.
|
|
|
|
|
|
|
|
|
|
This is based on the ARM port but for now is much simpler.
|
|
|
|
|
|
|
|
|
|
A finite state machine takes care of noticing whether or not instructions
|
|
|
|
|
can be conditionally executed, and thus decrease execution time and code
|
|
|
|
|
size by deleting branch instructions. The fsm is controlled by
|
|
|
|
|
arc_ccfsm_advance (called by arc_final_prescan_insn), and controls the
|
|
|
|
|
actions of PRINT_OPERAND. The patterns in the .md file for the branch
|
|
|
|
|
insns also have a hand in this. */
|
|
|
|
|
/* The way we leave dealing with non-anulled or annull-false delay slot
|
|
|
|
|
insns to the consumer is awkward. */
|
|
|
|
|
|
|
|
|
|
/* The state of the fsm controlling condition codes are:
|
|
|
|
|
0: normal, do nothing special
|
|
|
|
|
1: don't output this insn
|
|
|
|
|
2: don't output this insn
|
|
|
|
|
3: make insns conditional
|
|
|
|
|
4: make insns conditional
|
|
|
|
|
5: make insn conditional (only for outputting anulled delay slot insns)
|
|
|
|
|
|
|
|
|
|
special value for cfun->machine->uid_ccfsm_state:
|
|
|
|
|
6: return with but one insn before it since function start / call
|
|
|
|
|
|
|
|
|
|
State transitions (state->state by whom, under what condition):
|
|
|
|
|
0 -> 1 arc_ccfsm_advance, if insn is a conditional branch skipping over
|
|
|
|
|
some instructions.
|
|
|
|
|
0 -> 2 arc_ccfsm_advance, if insn is a conditional branch followed
|
|
|
|
|
by zero or more non-jump insns and an unconditional branch with
|
|
|
|
|
the same target label as the condbranch.
|
|
|
|
|
1 -> 3 branch patterns, after having not output the conditional branch
|
|
|
|
|
2 -> 4 branch patterns, after having not output the conditional branch
|
|
|
|
|
0 -> 5 branch patterns, for anulled delay slot insn.
|
|
|
|
|
3 -> 0 ASM_OUTPUT_INTERNAL_LABEL, if the `target' label is reached
|
|
|
|
|
(the target label has CODE_LABEL_NUMBER equal to
|
|
|
|
|
arc_ccfsm_target_label).
|
|
|
|
|
4 -> 0 arc_ccfsm_advance, if `target' unconditional branch is reached
|
|
|
|
|
3 -> 1 arc_ccfsm_advance, finding an 'else' jump skipping over some insns.
|
|
|
|
|
5 -> 0 when outputting the delay slot insn
|
|
|
|
|
|
|
|
|
|
If the jump clobbers the conditions then we use states 2 and 4.
|
|
|
|
|
|
|
|
|
|
A similar thing can be done with conditional return insns.
|
|
|
|
|
|
|
|
|
|
We also handle separating branches from sets of the condition code.
|
|
|
|
|
This is done here because knowledge of the ccfsm state is required,
|
|
|
|
|
we may not be outputting the branch. */
|
|
|
|
|
|
|
|
|
|
/* arc_final_prescan_insn calls arc_ccfsm_advance to adjust arc_ccfsm_current,
|
|
|
|
|
before letting final output INSN. */
|
|
|
|
|
|
|
|
|
|
static void
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
arc_ccfsm_advance (rtx_insn *insn, struct arc_ccfsm *state)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
/* BODY will hold the body of INSN. */
|
|
|
|
|
register rtx body;
|
|
|
|
|
|
|
|
|
|
/* This will be 1 if trying to repeat the trick (ie: do the `else' part of
|
|
|
|
|
an if/then/else), and things need to be reversed. */
|
|
|
|
|
int reverse = 0;
|
|
|
|
|
|
|
|
|
|
/* If we start with a return insn, we only succeed if we find another one. */
|
|
|
|
|
int seeking_return = 0;
|
|
|
|
|
|
|
|
|
|
/* START_INSN will hold the insn from where we start looking. This is the
|
|
|
|
|
first insn after the following code_label if REVERSE is true. */
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *start_insn = insn;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
/* Type of the jump_insn. Brcc insns don't affect ccfsm changes,
|
|
|
|
|
since they don't rely on a cmp preceding the. */
|
|
|
|
|
enum attr_type jump_insn_type;
|
|
|
|
|
|
|
|
|
|
/* Allow -mdebug-ccfsm to turn this off so we can see how well it does.
|
|
|
|
|
We can't do this in macro FINAL_PRESCAN_INSN because its called from
|
|
|
|
|
final_scan_insn which has `optimize' as a local. */
|
|
|
|
|
if (optimize < 2 || TARGET_NO_COND_EXEC)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* Ignore notes and labels. */
|
|
|
|
|
if (!INSN_P (insn))
|
|
|
|
|
return;
|
|
|
|
|
body = PATTERN (insn);
|
|
|
|
|
/* If in state 4, check if the target branch is reached, in order to
|
|
|
|
|
change back to state 0. */
|
|
|
|
|
if (state->state == 4)
|
|
|
|
|
{
|
|
|
|
|
if (insn == state->target_insn)
|
|
|
|
|
{
|
|
|
|
|
state->target_insn = NULL;
|
|
|
|
|
state->state = 0;
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If in state 3, it is possible to repeat the trick, if this insn is an
|
|
|
|
|
unconditional branch to a label, and immediately following this branch
|
|
|
|
|
is the previous target label which is only used once, and the label this
|
|
|
|
|
branch jumps to is not too far off. Or in other words "we've done the
|
|
|
|
|
`then' part, see if we can do the `else' part." */
|
|
|
|
|
if (state->state == 3)
|
|
|
|
|
{
|
|
|
|
|
if (simplejump_p (insn))
|
|
|
|
|
{
|
|
|
|
|
start_insn = next_nonnote_insn (start_insn);
|
|
|
|
|
if (GET_CODE (start_insn) == BARRIER)
|
|
|
|
|
{
|
|
|
|
|
/* ??? Isn't this always a barrier? */
|
|
|
|
|
start_insn = next_nonnote_insn (start_insn);
|
|
|
|
|
}
|
|
|
|
|
if (GET_CODE (start_insn) == CODE_LABEL
|
|
|
|
|
&& CODE_LABEL_NUMBER (start_insn) == state->target_label
|
|
|
|
|
&& LABEL_NUSES (start_insn) == 1)
|
|
|
|
|
reverse = TRUE;
|
|
|
|
|
else
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (body) == SIMPLE_RETURN)
|
|
|
|
|
{
|
|
|
|
|
start_insn = next_nonnote_insn (start_insn);
|
|
|
|
|
if (GET_CODE (start_insn) == BARRIER)
|
|
|
|
|
start_insn = next_nonnote_insn (start_insn);
|
|
|
|
|
if (GET_CODE (start_insn) == CODE_LABEL
|
|
|
|
|
&& CODE_LABEL_NUMBER (start_insn) == state->target_label
|
|
|
|
|
&& LABEL_NUSES (start_insn) == 1)
|
|
|
|
|
{
|
|
|
|
|
reverse = TRUE;
|
|
|
|
|
seeking_return = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (insn) != JUMP_INSN
|
|
|
|
|
|| GET_CODE (PATTERN (insn)) == ADDR_VEC
|
|
|
|
|
|| GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* We can't predicate BRCC or loop ends.
|
|
|
|
|
Also, when generating PIC code, and considering a medium range call,
|
|
|
|
|
we can't predicate the call. */
|
|
|
|
|
jump_insn_type = get_attr_type (insn);
|
|
|
|
|
if (jump_insn_type == TYPE_BRCC
|
|
|
|
|
|| jump_insn_type == TYPE_BRCC_NO_DELAY_SLOT
|
|
|
|
|
|| jump_insn_type == TYPE_LOOP_END
|
|
|
|
|
|| (jump_insn_type == TYPE_CALL && !get_attr_predicable (insn)))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* This jump might be paralleled with a clobber of the condition codes,
|
|
|
|
|
the jump should always come first. */
|
|
|
|
|
if (GET_CODE (body) == PARALLEL && XVECLEN (body, 0) > 0)
|
|
|
|
|
body = XVECEXP (body, 0, 0);
|
|
|
|
|
|
|
|
|
|
if (reverse
|
|
|
|
|
|| (GET_CODE (body) == SET && GET_CODE (SET_DEST (body)) == PC
|
|
|
|
|
&& GET_CODE (SET_SRC (body)) == IF_THEN_ELSE))
|
|
|
|
|
{
|
|
|
|
|
int insns_skipped = 0, fail = FALSE, succeed = FALSE;
|
|
|
|
|
/* Flag which part of the IF_THEN_ELSE is the LABEL_REF. */
|
|
|
|
|
int then_not_else = TRUE;
|
|
|
|
|
/* Nonzero if next insn must be the target label. */
|
|
|
|
|
int next_must_be_target_label_p;
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *this_insn = start_insn;
|
|
|
|
|
rtx label = 0;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
/* Register the insn jumped to. */
|
|
|
|
|
if (reverse)
|
|
|
|
|
{
|
|
|
|
|
if (!seeking_return)
|
|
|
|
|
label = XEXP (SET_SRC (body), 0);
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (XEXP (SET_SRC (body), 1)) == LABEL_REF)
|
|
|
|
|
label = XEXP (XEXP (SET_SRC (body), 1), 0);
|
|
|
|
|
else if (GET_CODE (XEXP (SET_SRC (body), 2)) == LABEL_REF)
|
|
|
|
|
{
|
|
|
|
|
label = XEXP (XEXP (SET_SRC (body), 2), 0);
|
|
|
|
|
then_not_else = FALSE;
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (XEXP (SET_SRC (body), 1)) == SIMPLE_RETURN)
|
|
|
|
|
seeking_return = 1;
|
|
|
|
|
else if (GET_CODE (XEXP (SET_SRC (body), 2)) == SIMPLE_RETURN)
|
|
|
|
|
{
|
|
|
|
|
seeking_return = 1;
|
|
|
|
|
then_not_else = FALSE;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
|
|
|
|
|
/* If this is a non-annulled branch with a delay slot, there is
|
|
|
|
|
no need to conditionalize the delay slot. */
|
|
|
|
|
if (NEXT_INSN (PREV_INSN (insn)) != insn
|
|
|
|
|
&& state->state == 0 && !INSN_ANNULLED_BRANCH_P (insn))
|
|
|
|
|
{
|
|
|
|
|
this_insn = NEXT_INSN (this_insn);
|
|
|
|
|
gcc_assert (NEXT_INSN (NEXT_INSN (PREV_INSN (start_insn)))
|
|
|
|
|
== NEXT_INSN (this_insn));
|
|
|
|
|
}
|
|
|
|
|
/* See how many insns this branch skips, and what kind of insns. If all
|
|
|
|
|
insns are okay, and the label or unconditional branch to the same
|
|
|
|
|
label is not too far away, succeed. */
|
|
|
|
|
for (insns_skipped = 0, next_must_be_target_label_p = FALSE;
|
|
|
|
|
!fail && !succeed && insns_skipped < MAX_INSNS_SKIPPED;
|
|
|
|
|
insns_skipped++)
|
|
|
|
|
{
|
|
|
|
|
rtx scanbody;
|
|
|
|
|
|
|
|
|
|
this_insn = next_nonnote_insn (this_insn);
|
|
|
|
|
if (!this_insn)
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
if (next_must_be_target_label_p)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (this_insn) == BARRIER)
|
|
|
|
|
continue;
|
|
|
|
|
if (GET_CODE (this_insn) == CODE_LABEL
|
|
|
|
|
&& this_insn == label)
|
|
|
|
|
{
|
|
|
|
|
state->state = 1;
|
|
|
|
|
succeed = TRUE;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
scanbody = PATTERN (this_insn);
|
|
|
|
|
|
|
|
|
|
switch (GET_CODE (this_insn))
|
|
|
|
|
{
|
|
|
|
|
case CODE_LABEL:
|
|
|
|
|
/* Succeed if it is the target label, otherwise fail since
|
|
|
|
|
control falls in from somewhere else. */
|
|
|
|
|
if (this_insn == label)
|
|
|
|
|
{
|
|
|
|
|
state->state = 1;
|
|
|
|
|
succeed = TRUE;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BARRIER:
|
|
|
|
|
/* Succeed if the following insn is the target label.
|
|
|
|
|
Otherwise fail.
|
|
|
|
|
If return insns are used then the last insn in a function
|
|
|
|
|
will be a barrier. */
|
|
|
|
|
next_must_be_target_label_p = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case CALL_INSN:
|
|
|
|
|
/* Can handle a call insn if there are no insns after it.
|
|
|
|
|
IE: The next "insn" is the target label. We don't have to
|
|
|
|
|
worry about delay slots as such insns are SEQUENCE's inside
|
|
|
|
|
INSN's. ??? It is possible to handle such insns though. */
|
|
|
|
|
if (get_attr_cond (this_insn) == COND_CANUSE)
|
|
|
|
|
next_must_be_target_label_p = TRUE;
|
|
|
|
|
else
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case JUMP_INSN:
|
|
|
|
|
/* If this is an unconditional branch to the same label, succeed.
|
|
|
|
|
If it is to another label, do nothing. If it is conditional,
|
|
|
|
|
fail. */
|
|
|
|
|
/* ??? Probably, the test for the SET and the PC are
|
|
|
|
|
unnecessary. */
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (scanbody) == SET
|
|
|
|
|
&& GET_CODE (SET_DEST (scanbody)) == PC)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (SET_SRC (scanbody)) == LABEL_REF
|
|
|
|
|
&& XEXP (SET_SRC (scanbody), 0) == label && !reverse)
|
|
|
|
|
{
|
|
|
|
|
state->state = 2;
|
|
|
|
|
succeed = TRUE;
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (SET_SRC (scanbody)) == IF_THEN_ELSE)
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
else if (get_attr_cond (this_insn) != COND_CANUSE)
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (scanbody) == SIMPLE_RETURN
|
|
|
|
|
&& seeking_return)
|
|
|
|
|
{
|
|
|
|
|
state->state = 2;
|
|
|
|
|
succeed = TRUE;
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (scanbody) == PARALLEL)
|
|
|
|
|
{
|
|
|
|
|
if (get_attr_cond (this_insn) != COND_CANUSE)
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case INSN:
|
|
|
|
|
/* We can only do this with insns that can use the condition
|
|
|
|
|
codes (and don't set them). */
|
|
|
|
|
if (GET_CODE (scanbody) == SET
|
|
|
|
|
|| GET_CODE (scanbody) == PARALLEL)
|
|
|
|
|
{
|
|
|
|
|
if (get_attr_cond (this_insn) != COND_CANUSE)
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
}
|
|
|
|
|
/* We can't handle other insns like sequences. */
|
|
|
|
|
else
|
|
|
|
|
fail = TRUE;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (succeed)
|
|
|
|
|
{
|
|
|
|
|
if ((!seeking_return) && (state->state == 1 || reverse))
|
|
|
|
|
state->target_label = CODE_LABEL_NUMBER (label);
|
|
|
|
|
else if (seeking_return || state->state == 2)
|
|
|
|
|
{
|
|
|
|
|
while (this_insn && GET_CODE (PATTERN (this_insn)) == USE)
|
|
|
|
|
{
|
|
|
|
|
this_insn = next_nonnote_insn (this_insn);
|
|
|
|
|
|
|
|
|
|
gcc_assert (!this_insn ||
|
|
|
|
|
(GET_CODE (this_insn) != BARRIER
|
|
|
|
|
&& GET_CODE (this_insn) != CODE_LABEL));
|
|
|
|
|
}
|
|
|
|
|
if (!this_insn)
|
|
|
|
|
{
|
|
|
|
|
/* Oh dear! we ran off the end, give up. */
|
|
|
|
|
extract_insn_cached (insn);
|
|
|
|
|
state->state = 0;
|
|
|
|
|
state->target_insn = NULL;
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
state->target_insn = this_insn;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
|
|
|
|
|
/* If REVERSE is true, ARM_CURRENT_CC needs to be inverted from
|
|
|
|
|
what it was. */
|
|
|
|
|
if (!reverse)
|
|
|
|
|
{
|
|
|
|
|
state->cond = XEXP (SET_SRC (body), 0);
|
|
|
|
|
state->cc = get_arc_condition_code (XEXP (SET_SRC (body), 0));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (reverse || then_not_else)
|
|
|
|
|
state->cc = ARC_INVERSE_CONDITION_CODE (state->cc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Restore recog_operand. Getting the attributes of other insns can
|
|
|
|
|
destroy this array, but final.c assumes that it remains intact
|
|
|
|
|
across this call; since the insn has been recognized already we
|
|
|
|
|
call insn_extract direct. */
|
|
|
|
|
extract_insn_cached (insn);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Record that we are currently outputting label NUM with prefix PREFIX.
|
|
|
|
|
It it's the label we're looking for, reset the ccfsm machinery.
|
|
|
|
|
|
|
|
|
|
Called from ASM_OUTPUT_INTERNAL_LABEL. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_ccfsm_at_label (const char *prefix, int num, struct arc_ccfsm *state)
|
|
|
|
|
{
|
|
|
|
|
if (state->state == 3 && state->target_label == num
|
|
|
|
|
&& !strcmp (prefix, "L"))
|
|
|
|
|
{
|
|
|
|
|
state->state = 0;
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
state->target_insn = NULL;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We are considering a conditional branch with the condition COND.
|
|
|
|
|
Check if we want to conditionalize a delay slot insn, and if so modify
|
|
|
|
|
the ccfsm state accordingly.
|
|
|
|
|
REVERSE says branch will branch when the condition is false. */
|
|
|
|
|
void
|
NEXT_INSN and PREV_INSN take a const rtx_insn
gcc/
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* rtl.h (RTX_PREV): Added checked casts to uses of PREV_INSN and
NEXT_INSN.
(PREV_INSN): Strengthen param from const_rtx to const rtx_insn *.
(NEXT_INSN): Likewise.
(JUMP_LABEL_AS_INSN): Add a "const" modifier to param.
(reg_used_between_p): Strengthen params 2 and 3 from const_rtx to
const rtx_insn *.
(no_labels_between_p): Likewise for both params.
* config/aarch64/aarch64.c (aarch64_output_casesi): Add a checked
cast when using NEXT_INSN on operands[2].
* config/alpha/alpha.c (alpha_set_memflags): Strengthen local
"insn" from rtx to rtx_insn *, adding a checked cast.
(alpha_handle_trap_shadows): Strengthen locals "i", "n" from rtx to
rtx_insn *.
* config/arc/arc-protos.h (arc_ccfsm_record_condition): Likewise
for third param.
(arc_text_label): Likewise for param "insn".
* config/arc/arc.c (arc_expand_epilogue): Likewise for local
"insn".
(arc_ccfsm_record_condition): Likewise for param "jump".
(arc_text_label): Likewise for local "label".
* config/arc/arc.md (doloop_begin_i): Likewise for local "scan".
Introduce a local "seq" via a dyn_cast to rtx_sequence *, and use
a method for typesafety. Add a checked cast.
* config/arc/constraints.md (Clb): Add a checked cast when getting
the CODE_LABEL from a LABEL_REF.
* config/arm/arm.c (require_pic_register): Strengthen locals
"seq", "insn" from rtx to rtx_insn *.
(create_fix_barrier): Likewise for locals "selected", "next".
(thumb1_reorg): Likewise for locals "prev", "insn".
(arm_expand_prologue): Likewise for local "last".
(thumb1_output_casesi): Add a checked cast when using NEXT_INSN on
operands[0].
(thumb2_output_casesi): Likewise for operands[2].
* config/avr/avr-log.c (avr_log_vadump): Within 'L' case,
strengthen local "insn" from rtx to rtx_insn *.
* config/bfin/bfin.c (find_next_insn_start): Likewise for return
type and param "insn".
(find_prev_insn_start): Likewise.
(hwloop_optimize): Likewise for locals "insn", "last_insn",
"prev".
(gen_one_bundle): Likewise for loal "t".
(find_load): Likewise for param "insn".
(workaround_speculation): Likewise for locals "insn", "next",
"target", "next_tgt".
* config/c6x/c6x.c (assign_reservations): Likewise for both params
and for locals "insn", "within", "last".
(count_unit_reqs): Likewise for params "head", "tail" and local
"insn".
(try_rename_operands): Likewise for params "head", "tail".
(reshuffle_units): Likewise for locals "head", "tail", "insn".
(struct c6x_sched_context): Likewise for fields
"last_scheduled_insn", "last_scheduled_iter0".
(init_sched_state): Replace NULL_RTX with NULL.
(reorg_split_calls): Strengthen local "new_cycle_first" from rtx
to rtx_insn *.
(undo_split_delayed_nonbranch): Likewise for param and for local
"prev".
(conditionalize_after_sched): Likewise for local "insn".
(bb_earliest_end_cycle): Likewise.
(filter_insns_above): Likewise for locals "insn", "next".
(hwloop_optimize): Remove redundant checked cast.
(hwloop_fail): Strengthen local "t" from rtx to rtx_insn *.
* config/cris/cris.c (cris_initial_frame_pointer_offset): Replace
NULL_RTX with NULL.
(cris_simple_epilogue): Likewise.
(cris_expand_prologue): Likewise.
(cris_expand_epilogue): Likewise.
* config/frv/frv.c (frv_function_contains_far_jump): Strengthen
local "insn" from rtx to rtx_insn *.
(frv_ifcvt_modify_tests): Likewise for locals "last_insn", "insn".
(struct frv_packet_group): Likewise for the elements within array
fields "insns", "sorted", and for field "nop".
(frv_packet): Likewise for the elements within array field
"insns".
(frv_add_insn_to_packet): Likewise for param "insn".
(frv_insert_nop_in_packet): Likewise for param "insn" and local
"last".
(frv_for_each_packet): Likewise for locals "insn", "next_insn".
(frv_sort_insn_group_1): Likewise for local "insn".
(frv_optimize_membar_local): Likewise.
(frv_align_label): Likewise for locals "x", "last", "barrier",
"label".
* config/ia64/ia64.c (last_scheduled_insn): Likewise for this
local.
(ia64_sched_init): Likewise for local "insn".
(scheduled_good_insn): Likewise for param "last".
(struct _ia64_sched_context): Likewise for field
"last_scheduled_insn".
(ia64_init_sched_context): Replace NULL_RTX with NULL.
(struct bundle_state): Likewise for field "insn".
(issue_nops_and_insn): Likewise for param "insn".
(get_next_important_insn): Likewise for return type and both
params.
(ia64_add_bundle_selector_before): Likewise for param "insn".
(bundling): Likewise for params "prev_head_insn", "tail" and
locals "insn", "next_insn", "b". Eliminate top-level local rtx
"nop" in favor of new locals rtx "nop_pat" and rtx_insn *nop;
* config/iq2000/iq2000-protos.h (iq2000_fill_delay_slot):
Strengthen final param from rtx to rtx_insn *.
(iq2000_move_1word): Likewise for second param.
* config/iq2000/iq2000.c (iq2000_fill_delay_slot): Likewise for
param "cur_insn" and local "next_insn".
(iq2000_move_1word): Likewise for param "insn".
* config/iq2000/iq2000.md (insn before ADDR_DIFF_VEC): Add checked
casts when using NEXT_INSN on operands[1].
* config/m32c/m32c.c (m32c_function_needs_enter): Strengthen local
"insn" from rtx to rtx_insn *.
* config/m68k/m68k.c (m68k_jump_table_ref_p): Split out uses of
"x", introducing local rtx_insn * "insn" for when working with the
CODE_LABEL of the LABEL_REF.
(m68k_sched_md_init_global): Strengthen local "insn" from rtx to
rtx_insn *.
* config/mcore/mcore-protos.h (mcore_is_dead): Likewise for first
param.
* config/mcore/mcore.c (emit_new_cond_insn): Likewise for return
type.
(conditionalize_block): Likewise for return type and param.
(mcore_is_dead): Likewise for param "first" and local "insn".
(emit_new_cond_insn): Likewise for return type.
(conditionalize_block): Likewise for return type, param, and
locals "insn", "blk_1_br", "end_blk_2_insn", "start_blk_3_lab",
"newinsn".
(conditionalize_optimization): Likewise for local "insn".
* config/mep/mep.c (mep_jmp_return_reorg): Add checked cast when
using NEXT_INSN.
* config/microblaze/microblaze.md: Add checked casts when using
NEXT_INSN.
* config/mips/mips.c (mips_expand_prologue): Eliminate top-level
rtx "insn" in favor of various more tightly-scoped rtx "insn" and
and rtx_insn * "insn".
* config/mips/mips.md (casesi_internal_mips16_<mode>): Add a
checked cast when using NEXT_INSN on operands[2].
* config/mn10300/mn10300.c (mn10300_insert_setlb_lcc): Strengthen
local "insn" from rtx to rtx_insn *.
* config/nds32/nds32-fp-as-gp.c (nds32_fp_as_gp_check_available):
Likewise.
* config/nds32/nds32-md-auxiliary.c (nds32_output_casesi_pc_relative):
Add a checked cast when using NEXT_INSN on operands[1].
* config/pa/pa-protos.h (pa_following_call): Strengthen param from
rtx to rtx_insn *.
(pa_output_cbranch): Likewise for final param.
(pa_output_lbranch): Likewise for second param.
(pa_output_bb): Likewise for third param.
(pa_output_bvb): Likewise.
(pa_output_dbra): Likewise for second param.
(pa_output_movb): Likewise.
(pa_output_parallel_movb): Likewise.
(pa_output_parallel_addb): Likewise.
(pa_output_millicode_call): Likewise for first param.
(pa_output_mul_insn): Likewise for second param.
(pa_output_div_insn): Likewise for third param.
(pa_output_mod_insn): Likewise for second param.
(pa_jump_in_call_delay): Likewise for param.
* config/pa/pa.c (pa_output_mul_insn): Likewise for param "insn".
(pa_output_div_insn): Likewise.
(pa_output_mod_insn): Likewise.
(pa_output_cbranch): Likewise.
(pa_output_lbranch): Likewise.
(pa_output_bb): Likewise.
(pa_output_bvb): Likewise.
(pa_output_dbra): Likewise.
(pa_output_movb): Likewise.
(pa_output_millicode_call): Likewise; use method of rtx_sequence *
to simplify and for typesafety.
(pa_output_call): Use method of rtx_sequence *.
(forward_branch_p): Strengthen param "insn" from rtx to rtx_insn *.
(pa_jump_in_call_delay): Likewise.
(pa_output_parallel_movb): Likewise.
(pa_output_parallel_addb): Likewise.
(pa_following_call): Likewise.
(pa_combine_instructions): Likewise for locals "anchor",
"floater".
(pa_can_combine_p): Likewise for params "anchor", "floater" and
locals "start", "end".
* config/picochip/picochip.c (picochip_reset_vliw): Likewise for
param "insn" and local "local_insn".
(picochip_final_prescan_insn): Likewise for local "local_insn".
* config/rs6000/rs6000.c (compute_save_world_info): Likewise for
local "insn".
(uses_TOC): Likewise.
* config/s390/s390.c (get_some_local_dynamic_name): Likewise.
(s390_mainpool_finish): Eliminate top-level local rtx "insn",
splitting out to more tightly-scoped locals, 3 as rtx and one as
rtx_insn *.
(s390_optimize_nonescaping_tx): Strengthen local "tmp" from rtx
to rtx_insn *.
(s390_emit_prologue): Introduce a local "insn" to be an rtx_insn *
where needed.
* config/sh/sh-protos.h (barrier_align): Strenghten param from rtx
to rtx_insn *.
(fixup_addr_diff_vecs): Likewise.
(reg_unused_after): Likewise for param 2.
(sh_can_redirect_branch): Likewise for both params.
(check_use_sfunc_addr): Likewise for param 1.
* config/sh/sh.c (fixup_mova): Likewise for local "worker".
(find_barrier): Likewise for local "last_got".
(gen_block_redirect): Likewise for return type, param "jump" and
locals "prev", "scan", "next", "insn".
(struct far_branch): Likewise for fields "near_label",
"insert_place", "far_label".
(gen_far_branch): Likewise for local "jump".
(fixup_addr_diff_vecs): Likewise for param "first" and locals
"insn", "prev".
(barrier_align): Likewise for param and for locals "prev", "x".
Introduce local rtx_sequence * "prev_seq" and use insn method for
typesafety and clarity.
(sh_reorg): Strengthen local "scan" from rtx to rtx_insn *.
(get_dest_uid): Likewise for local "dest".
(split_branches): Likewise for locals "next", "beyond", "label",
"block", "far_label". Add checked casts when assigning to
bp->far_label and "far_label".
(reg_unused_after): Strengthen param "scan" from rtx to rtx_insn *.
(sequence_insn_p): Likewise.
(mark_constant_pool_use): Likewise for locals "insn", "lab". Add a
more loop-scoped rtx "insn" when walking LABEL_REFS.
(sh_can_redirect_branch): Strengthen both params from rtx to
rtx_insn *.
(check_use_sfunc_addr): Likewise for param "insn". Introduce a
new local rtx_sequence * "seq" via a dyn_cast, and use a method
for clarity and typesafety.
* config/sh/sh.md (define_expand "epilogue"): Strengthen local
"insn" from rtx to rtx_insn *.
(define_insn "casesi_worker_1"): Add a checked cast to rtx_insn *
when using NEXT_INSN on the CODE_LABEL in operands[2].
(define_insn "casesi_worker_2"): Likewise.
(define_insn "casesi_shift_media"): Likewise.
(define_insn "casesi_load_media"): Likewise for the CODE_LABEL in
operands[3].
* config/sh/sh_optimize_sett_clrt.cc (struct ccreg_value):
Strengthen field "insn" from rtx to rtx_insn *.
(sh_optimize_sett_clrt::execute): Likewise for locals "next_i", "i".
(sh_optimize_sett_clrt::find_last_ccreg_values): Likewise for
param "start_insn" and local "start_insn".
* config/sh/sh_treg_combine.cc (struct set_of_reg): Likewise for
field "insn".
(find_set_of_reg_bb): Likewise for param "insn".
(trace_reg_uses_1): Likewise for param "start_insn" and local "i".
(trace_reg_uses): Likewise for param "start_insn".
(sh_treg_combine::cbranch_trace): Likewise for field
"cbranch_insn".
(sh_treg_combine::cbranch_trace::cbranch_trace): Likewise for
param "insn".
(sh_treg_combine::record_set_of_reg): Likewise for param
"start_insn" and local "i".
(sh_treg_combine::can_remove_cstore): Likewise for local
"prev_insn".
(sh_treg_combine::try_optimize_cbranch): Likewise for param
"insn".
(sh_treg_combine::execute): Likewise for local "i".
* config/sparc/sparc-protos.h (empty_delay_slot): Likewise for
param.
(sparc_check_64): Likewise for second param.
* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
locals "insn", "next". Introduce local rtx_sequence * "seq" via a
dyn_cast, using its insn method for typesafety and clarity.
(empty_delay_slot): Strengthen param "insn" from rtx to
rtx_insn *.
(set_extends): Likewise.
(sparc_check_64): Likewise.
* config/stormy16/stormy16.c (xstormy16_split_cbranch): Likewise
for locals "seq", "last_insn".
(combine_bnp): Likewise for param "insn".
(xstormy16_reorg): Likewise for local "insn".
* config/v850/v850.c (substitute_ep_register): Likewise for params
"first_insn", "last_insn" and local "insn".
(v850_reorg): Likewise for fields "first_insn", "last_insn" within
elements of "regs" array, and local "insn".
* except.c (emit_note_eh_region_end): Likewise for param "insn".
* final.c (final_sequence): Strengthen this global from rtx to
rtx_sequence *.
(shorten_branches): Strenthen locals "rel_lab", "prev" from rtx to
rtx_insn *.
(final_scan_insn): Update assignment to "final_sequence" to be
from "seq", the cast version of "body", for type-safety.
* function.c (assign_parm_setup_reg): Strengthen locals "insn",
"insns" from rtx to rtx_insn *.
(thread_prologue_and_epilogue_insns): Likewise for local "seq".
* genattr.c (main): When writing out generated insn-attr.h,
strengthen params 1 and 3 of eligible_for_delay,
eligible_for_annul_true, eligible_for_annul_false from rtx to
rtx_insn *.
* genattrtab.c (write_eligible_delay): Likewise when writing out
generated insn-attrtab.c; also local "insn" the generated
functions.
* hw-doloop.c (discover_loops): Strengthen local "insn" from rtx
to rtx_insn *.
* hw-doloop.h (struct GTY hwloop_info_d): Strengthen field
"start_label" from rtx to rtx_insn *.
* ira.c (decrease_live_ranges_number): Likewise for local "p".
(ira_update_equiv_info_by_shuffle_insn): Likewise for param
"insns" and local "insn".
(validate_equiv_mem): Likewise for param "start" and local "insn".
(memref_used_between_p): Likewise for params "start", "end" and
local "insn".
* ira.h (ira_update_equiv_info_by_shuffle_insn): Likewise for
final param.
* loop-doloop.c (doloop_optimize): Within region guarded by
INSN_P (doloop_pat), introduce a new local rtx_insn *
"doloop_insn" via a checked cast, and use it for typesafety,
eventually writing the value back into doloop_pat.
* output.h (final_sequence): Strengthen this global from rtx to
rtx_sequence *.
* recog.c (peep2_attempt): Rename param "insn" to "uncast_insn",
reintroducing "insn" as an rtx_insn * via a checked cast.
Strengthen param "attempt" and local "new_insn"from rtx to
rtx_insn *.
(peephole2_optimize): Strengthen locals "insn", "attempt" from rtx
to rtx_insn *.
* ree.c (emit_note_eh_region_end): Likewise for local "insn".
* reload1.c (reload_as_needed): Eliminate top-level locals "x" and
"p" in favor of more tightly-scoped replacements, sometimes rtx
and sometimes rtx_insn *, as appropriate.
(delete_output_reload): Eliminate top-level rtx "i1", splitting
into two loop-scoped locals, one an rtx, the other an rtx_insn *.
* reorg.c (delete_scheduled_jump): Add checked cast. Strengthen
local "trial" from rtx to rtx_insn *.
(redirect_with_delay_slots_safe_p): Strengthen param "jump" from
rtx to rtx_insn *. Strenghten local "pat" from rtx to
rtx_sequence * and use methods for clarity and typesafety.
(redirect_with_delay_list_safe_p): Strengthen param "jump" from
rtx to rtx_insn *. Strenghten local "li" from rtx to
rtx_insn_list * and use its methods for clarity and typesafety.
(steal_delay_list_from_target): Strengthen param "insn" from rtx
to rtx_insn *.
(steal_delay_list_from_fallthrough): Likewise.
(try_merge_delay_insns): Likewise for param "thread" and locals
"trial", "next_trial", "delay_insn".
(redundant_insn): Likewise for param "target" and local "trial".
(own_thread_p): Likewise for param "thread" and locals
"active_insn", "insn".
(get_label_before): Likewise for param "insn".
(fill_simple_delay_slots): Likewise for local "new_label"; use
JUMP_LABEL_AS_INSN as necessary when calling own_thread_p.
(label_before_next_insn): Strengthen return type and local "insn"
from rtx to rtx_insn *.
(relax_delay_slots): Likewise for locals "other", "tmp".
(make_return_insns): Likewise for param "first" and locals "insn",
"jump_insn", "prev". Move declaration of "pat" to its assignment
and strengthen from rtx to rtx_sequence *. Use its methods for
clarity and typesafety.
* rtlanal.c (no_labels_between_p): Strengthen params from
const_rtx to const rtx_insn *. Strengthen local "p" from rtx to
rtx_insn *.
(reg_used_between_p): Strengthen params "from_insn", "to_insn"
from const_rtx to const rtx_insn *.
(reg_set_between_p): Rename param "from_insn" to
"uncast_from_insn", and reintroduce "from_insn" as a
const rtx_insn * via a checked cast.
(modified_between_p): Likewise for param "start" as "uncast_start".
(tablejump_p): Add a cast when invoking NEXT_INSN on "label".
* sel-sched-ir.c (get_seqno_by_preds): Strengthen param and locals
"tmp", head" from rtx to rtx_insn *.
(recompute_rev_top_order): Likewise for local "insn".
* sel-sched-ir.h (get_seqno_by_preds): Likewise for param.
* store-motion.c (build_store_vectors): Likewise for local "insn".
Strengthen local "st" from rtx to rtx_insn_list * and use methods
for clarity and typesafety.
* tree-ssa-loop-ivopts.c (seq_cost): Strengthen param "seq" from
rtx to rtx_insn *.
(computation_cost): Likewise for local "seq".
(get_address_cost): Likewise.
/
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* rtx-classes-status.txt (TODO): NEXT_INSN/PREV_INSN are done.
From-SVN: r214698
2014-08-28 23:29:38 +02:00
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arc_ccfsm_record_condition (rtx cond, bool reverse, rtx_insn *jump,
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2013-10-01 19:03:46 +02:00
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struct arc_ccfsm *state)
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{
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config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
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rtx_insn *seq_insn = NEXT_INSN (PREV_INSN (jump));
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2013-10-01 19:03:46 +02:00
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if (!state)
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state = &arc_ccfsm_current;
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gcc_assert (state->state == 0);
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if (seq_insn != jump)
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{
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rtx insn = XVECEXP (PATTERN (seq_insn), 0, 1);
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Replace INSN_DELETED_P with rtx_insn member functions
gcc/
* cfgrtl.c, combine.c, config/arc/arc.c, config/mcore/mcore.c,
config/rs6000/rs6000.c, config/sh/sh.c, cprop.c, dwarf2out.c,
emit-rtl.c, final.c, function.c, gcse.c, jump.c, reg-stack.c,
reload1.c, reorg.c, resource.c, sel-sched-ir.c: Replace INSN_DELETED_P
macro with statically checked member functions.
* rtl.h (rtx_insn::deleted): New method.
(rtx_insn::set_deleted): Likewise.
(rtx_insn::set_undeleted): Likewise.
(INSN_DELETED_P): Remove.
From-SVN: r215282
2014-09-16 03:23:42 +02:00
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if (!as_a<rtx_insn *> (insn)->deleted ()
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2013-10-01 19:03:46 +02:00
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&& INSN_ANNULLED_BRANCH_P (jump)
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&& (TARGET_AT_DBR_CONDEXEC || INSN_FROM_TARGET_P (insn)))
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{
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state->cond = cond;
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state->cc = get_arc_condition_code (cond);
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if (!reverse)
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arc_ccfsm_current.cc
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= ARC_INVERSE_CONDITION_CODE (state->cc);
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rtx pat = PATTERN (insn);
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if (GET_CODE (pat) == COND_EXEC)
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gcc_assert ((INSN_FROM_TARGET_P (insn)
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? ARC_INVERSE_CONDITION_CODE (state->cc) : state->cc)
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== get_arc_condition_code (XEXP (pat, 0)));
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else
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state->state = 5;
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}
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}
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}
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/* Update *STATE as we would when we emit INSN. */
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static void
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config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
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arc_ccfsm_post_advance (rtx_insn *insn, struct arc_ccfsm *state)
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2013-10-01 19:03:46 +02:00
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{
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2013-10-24 19:11:01 +02:00
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enum attr_type type;
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2013-10-01 19:03:46 +02:00
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if (LABEL_P (insn))
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arc_ccfsm_at_label ("L", CODE_LABEL_NUMBER (insn), state);
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else if (JUMP_P (insn)
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&& GET_CODE (PATTERN (insn)) != ADDR_VEC
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&& GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC
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2013-10-24 19:11:01 +02:00
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&& ((type = get_attr_type (insn)) == TYPE_BRANCH
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|| (type == TYPE_UNCOND_BRANCH
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2013-10-28 13:19:16 +01:00
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/* ??? Maybe should also handle TYPE_RETURN here,
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but we don't have a testcase for that. */
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2013-10-24 19:11:01 +02:00
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&& ARC_CCFSM_BRANCH_DELETED_P (state))))
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2013-10-01 19:03:46 +02:00
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{
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if (ARC_CCFSM_BRANCH_DELETED_P (state))
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ARC_CCFSM_RECORD_BRANCH_DELETED (state);
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else
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{
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rtx src = SET_SRC (PATTERN (insn));
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arc_ccfsm_record_condition (XEXP (src, 0), XEXP (src, 1) == pc_rtx,
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insn, state);
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}
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}
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else if (arc_ccfsm_current.state == 5)
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arc_ccfsm_current.state = 0;
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}
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/* Return true if the current insn, which is a conditional branch, is to be
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deleted. */
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|
|
|
bool
|
|
|
|
|
arc_ccfsm_branch_deleted_p (void)
|
|
|
|
|
{
|
|
|
|
|
return ARC_CCFSM_BRANCH_DELETED_P (&arc_ccfsm_current);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Record a branch isn't output because subsequent insns can be
|
|
|
|
|
conditionalized. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_ccfsm_record_branch_deleted (void)
|
|
|
|
|
{
|
|
|
|
|
ARC_CCFSM_RECORD_BRANCH_DELETED (&arc_ccfsm_current);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* During insn output, indicate if the current insn is predicated. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_ccfsm_cond_exec_p (void)
|
|
|
|
|
{
|
|
|
|
|
return (cfun->machine->prescan_initialized
|
|
|
|
|
&& ARC_CCFSM_COND_EXEC_P (&arc_ccfsm_current));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Like next_active_insn, but return NULL if we find an ADDR_(DIFF_)VEC,
|
|
|
|
|
and look inside SEQUENCEs. */
|
|
|
|
|
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
static rtx_insn *
|
|
|
|
|
arc_next_active_insn (rtx_insn *insn, struct arc_ccfsm *statep)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
rtx pat;
|
|
|
|
|
|
|
|
|
|
do
|
|
|
|
|
{
|
|
|
|
|
if (statep)
|
|
|
|
|
arc_ccfsm_post_advance (insn, statep);
|
|
|
|
|
insn = NEXT_INSN (insn);
|
|
|
|
|
if (!insn || BARRIER_P (insn))
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
return NULL;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (statep)
|
|
|
|
|
arc_ccfsm_advance (insn, statep);
|
|
|
|
|
}
|
|
|
|
|
while (NOTE_P (insn)
|
|
|
|
|
|| (cfun->machine->arc_reorg_started
|
|
|
|
|
&& LABEL_P (insn) && !label_to_alignment (insn))
|
|
|
|
|
|| (NONJUMP_INSN_P (insn)
|
|
|
|
|
&& (GET_CODE (PATTERN (insn)) == USE
|
|
|
|
|
|| GET_CODE (PATTERN (insn)) == CLOBBER)));
|
|
|
|
|
if (!LABEL_P (insn))
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (INSN_P (insn));
|
|
|
|
|
pat = PATTERN (insn);
|
|
|
|
|
if (GET_CODE (pat) == ADDR_VEC || GET_CODE (pat) == ADDR_DIFF_VEC)
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
return NULL;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (GET_CODE (pat) == SEQUENCE)
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
return as_a <rtx_insn *> (XVECEXP (pat, 0, 0));
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
return insn;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* When deciding if an insn should be output short, we want to know something
|
|
|
|
|
about the following insns:
|
|
|
|
|
- if another insn follows which we know we can output as a short insn
|
|
|
|
|
before an alignment-sensitive point, we can output this insn short:
|
|
|
|
|
the decision about the eventual alignment can be postponed.
|
|
|
|
|
- if a to-be-aligned label comes next, we should output this insn such
|
|
|
|
|
as to get / preserve 4-byte alignment.
|
|
|
|
|
- if a likely branch without delay slot insn, or a call with an immediately
|
|
|
|
|
following short insn comes next, we should out output this insn such as to
|
|
|
|
|
get / preserve 2 mod 4 unalignment.
|
|
|
|
|
- do the same for a not completely unlikely branch with a short insn
|
|
|
|
|
following before any other branch / label.
|
|
|
|
|
- in order to decide if we are actually looking at a branch, we need to
|
|
|
|
|
call arc_ccfsm_advance.
|
|
|
|
|
- in order to decide if we are looking at a short insn, we should know
|
|
|
|
|
if it is conditionalized. To a first order of approximation this is
|
|
|
|
|
the case if the state from arc_ccfsm_advance from before this insn
|
|
|
|
|
indicates the insn is conditionalized. However, a further refinement
|
|
|
|
|
could be to not conditionalize an insn if the destination register(s)
|
|
|
|
|
is/are dead in the non-executed case. */
|
|
|
|
|
/* Return non-zero if INSN should be output as a short insn. UNALIGN is
|
|
|
|
|
zero if the current insn is aligned to a 4-byte-boundary, two otherwise.
|
|
|
|
|
If CHECK_ATTR is greater than 0, check the iscompact attribute first. */
|
|
|
|
|
|
|
|
|
|
int
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
arc_verify_short (rtx_insn *insn, int, int check_attr)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
enum attr_iscompact iscompact;
|
|
|
|
|
struct machine_function *machine;
|
|
|
|
|
|
|
|
|
|
if (check_attr > 0)
|
|
|
|
|
{
|
|
|
|
|
iscompact = get_attr_iscompact (insn);
|
|
|
|
|
if (iscompact == ISCOMPACT_FALSE)
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
machine = cfun->machine;
|
|
|
|
|
|
|
|
|
|
if (machine->force_short_suffix >= 0)
|
|
|
|
|
return machine->force_short_suffix;
|
|
|
|
|
|
|
|
|
|
return (get_attr_length (insn) & 2) != 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* When outputting an instruction (alternative) that can potentially be short,
|
|
|
|
|
output the short suffix if the insn is in fact short, and update
|
|
|
|
|
cfun->machine->unalign accordingly. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
output_short_suffix (FILE *file)
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *insn = current_output_insn;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
if (arc_verify_short (insn, cfun->machine->unalign, 1))
|
|
|
|
|
{
|
|
|
|
|
fprintf (file, "_s");
|
|
|
|
|
cfun->machine->unalign ^= 2;
|
|
|
|
|
}
|
|
|
|
|
/* Restore recog_operand. */
|
|
|
|
|
extract_insn_cached (insn);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement FINAL_PRESCAN_INSN. */
|
|
|
|
|
|
|
|
|
|
void
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
arc_final_prescan_insn (rtx_insn *insn, rtx *opvec ATTRIBUTE_UNUSED,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int noperands ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
if (TARGET_DUMPISIZE)
|
|
|
|
|
fprintf (asm_out_file, "\n; at %04x\n", INSN_ADDRESSES (INSN_UID (insn)));
|
|
|
|
|
|
|
|
|
|
/* Output a nop if necessary to prevent a hazard.
|
|
|
|
|
Don't do this for delay slots: inserting a nop would
|
|
|
|
|
alter semantics, and the only time we would find a hazard is for a
|
|
|
|
|
call function result - and in that case, the hazard is spurious to
|
|
|
|
|
start with. */
|
|
|
|
|
if (PREV_INSN (insn)
|
|
|
|
|
&& PREV_INSN (NEXT_INSN (insn)) == insn
|
|
|
|
|
&& arc_hazard (prev_real_insn (insn), insn))
|
|
|
|
|
{
|
|
|
|
|
current_output_insn =
|
|
|
|
|
emit_insn_before (gen_nop (), NEXT_INSN (PREV_INSN (insn)));
|
|
|
|
|
final_scan_insn (current_output_insn, asm_out_file, optimize, 1, NULL);
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
current_output_insn = insn;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
/* Restore extraction data which might have been clobbered by arc_hazard. */
|
|
|
|
|
extract_constrain_insn_cached (insn);
|
|
|
|
|
|
|
|
|
|
if (!cfun->machine->prescan_initialized)
|
|
|
|
|
{
|
|
|
|
|
/* Clear lingering state from branch shortening. */
|
|
|
|
|
memset (&arc_ccfsm_current, 0, sizeof arc_ccfsm_current);
|
|
|
|
|
cfun->machine->prescan_initialized = 1;
|
|
|
|
|
}
|
|
|
|
|
arc_ccfsm_advance (insn, &arc_ccfsm_current);
|
|
|
|
|
|
|
|
|
|
cfun->machine->size_reason = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Given FROM and TO register numbers, say whether this elimination is allowed.
|
|
|
|
|
Frame pointer elimination is automatically handled.
|
|
|
|
|
|
|
|
|
|
All eliminations are permissible. If we need a frame
|
|
|
|
|
pointer, we must eliminate ARG_POINTER_REGNUM into
|
|
|
|
|
FRAME_POINTER_REGNUM and not into STACK_POINTER_REGNUM. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
|
|
|
|
|
{
|
|
|
|
|
return to == FRAME_POINTER_REGNUM || !arc_frame_pointer_required ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Define the offset between two registers, one to be eliminated, and
|
|
|
|
|
the other its replacement, at the start of a routine. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
arc_initial_elimination_offset (int from, int to)
|
|
|
|
|
{
|
|
|
|
|
if (! cfun->machine->frame_info.initialized)
|
|
|
|
|
arc_compute_frame_size (get_frame_size ());
|
|
|
|
|
|
|
|
|
|
if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
|
|
|
|
|
{
|
|
|
|
|
return (cfun->machine->frame_info.extra_size
|
|
|
|
|
+ cfun->machine->frame_info.reg_size);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
|
|
|
|
|
{
|
|
|
|
|
return (cfun->machine->frame_info.total_size
|
|
|
|
|
- cfun->machine->frame_info.pretend_size);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((from == FRAME_POINTER_REGNUM) && (to == STACK_POINTER_REGNUM))
|
|
|
|
|
{
|
|
|
|
|
return (cfun->machine->frame_info.total_size
|
|
|
|
|
- (cfun->machine->frame_info.pretend_size
|
|
|
|
|
+ cfun->machine->frame_info.extra_size
|
|
|
|
|
+ cfun->machine->frame_info.reg_size));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_frame_pointer_required (void)
|
|
|
|
|
{
|
|
|
|
|
return cfun->calls_alloca;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Return the destination address of a branch. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
branch_dest (rtx branch)
|
|
|
|
|
{
|
|
|
|
|
rtx pat = PATTERN (branch);
|
|
|
|
|
rtx dest = (GET_CODE (pat) == PARALLEL
|
|
|
|
|
? SET_SRC (XVECEXP (pat, 0, 0)) : SET_SRC (pat));
|
|
|
|
|
int dest_uid;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (dest) == IF_THEN_ELSE)
|
|
|
|
|
dest = XEXP (dest, XEXP (dest, 1) == pc_rtx ? 2 : 1);
|
|
|
|
|
|
|
|
|
|
dest = XEXP (dest, 0);
|
|
|
|
|
dest_uid = INSN_UID (dest);
|
|
|
|
|
|
|
|
|
|
return INSN_ADDRESSES (dest_uid);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2013-10-01 23:18:26 +02:00
|
|
|
|
/* Implement TARGET_ENCODE_SECTION_INFO hook. */
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_encode_section_info (tree decl, rtx rtl, int first)
|
|
|
|
|
{
|
|
|
|
|
/* For sdata, SYMBOL_FLAG_LOCAL and SYMBOL_FLAG_FUNCTION.
|
|
|
|
|
This clears machine specific flags, so has to come first. */
|
|
|
|
|
default_encode_section_info (decl, rtl, first);
|
|
|
|
|
|
|
|
|
|
/* Check if it is a function, and whether it has the
|
|
|
|
|
[long/medium/short]_call attribute specified. */
|
|
|
|
|
if (TREE_CODE (decl) == FUNCTION_DECL)
|
|
|
|
|
{
|
|
|
|
|
rtx symbol = XEXP (rtl, 0);
|
|
|
|
|
int flags = SYMBOL_REF_FLAGS (symbol);
|
|
|
|
|
|
|
|
|
|
tree attr = (TREE_TYPE (decl) != error_mark_node
|
|
|
|
|
? TYPE_ATTRIBUTES (TREE_TYPE (decl)) : NULL_TREE);
|
|
|
|
|
tree long_call_attr = lookup_attribute ("long_call", attr);
|
|
|
|
|
tree medium_call_attr = lookup_attribute ("medium_call", attr);
|
|
|
|
|
tree short_call_attr = lookup_attribute ("short_call", attr);
|
|
|
|
|
|
|
|
|
|
if (long_call_attr != NULL_TREE)
|
|
|
|
|
flags |= SYMBOL_FLAG_LONG_CALL;
|
|
|
|
|
else if (medium_call_attr != NULL_TREE)
|
|
|
|
|
flags |= SYMBOL_FLAG_MEDIUM_CALL;
|
|
|
|
|
else if (short_call_attr != NULL_TREE)
|
|
|
|
|
flags |= SYMBOL_FLAG_SHORT_CALL;
|
|
|
|
|
|
|
|
|
|
SYMBOL_REF_FLAGS (symbol) = flags;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This is how to output a definition of an internal numbered label where
|
|
|
|
|
PREFIX is the class of label and NUM is the number within the class. */
|
|
|
|
|
|
|
|
|
|
static void arc_internal_label (FILE *stream, const char *prefix, unsigned long labelno)
|
|
|
|
|
{
|
|
|
|
|
if (cfun)
|
|
|
|
|
arc_ccfsm_at_label (prefix, labelno, &arc_ccfsm_current);
|
|
|
|
|
default_internal_label (stream, prefix, labelno);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Set the cpu type and print out other fancy things,
|
|
|
|
|
at the top of the file. */
|
|
|
|
|
|
|
|
|
|
static void arc_file_start (void)
|
|
|
|
|
{
|
|
|
|
|
default_file_start ();
|
|
|
|
|
fprintf (asm_out_file, "\t.cpu %s\n", arc_cpu_string);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Cost functions. */
|
|
|
|
|
|
|
|
|
|
/* Compute a (partial) cost for rtx X. Return true if the complete
|
|
|
|
|
cost has been computed, and false if subexpressions should be
|
|
|
|
|
scanned. In either case, *TOTAL contains the cost result. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
|
|
|
|
|
int *total, bool speed)
|
|
|
|
|
{
|
|
|
|
|
switch (code)
|
|
|
|
|
{
|
|
|
|
|
/* Small integers are as cheap as registers. */
|
|
|
|
|
case CONST_INT:
|
|
|
|
|
{
|
|
|
|
|
bool nolimm = false; /* Can we do without long immediate? */
|
|
|
|
|
bool fast = false; /* Is the result available immediately? */
|
|
|
|
|
bool condexec = false; /* Does this allow conditiobnal execution? */
|
|
|
|
|
bool compact = false; /* Is a 16 bit opcode available? */
|
|
|
|
|
/* CONDEXEC also implies that we can have an unconditional
|
|
|
|
|
3-address operation. */
|
|
|
|
|
|
|
|
|
|
nolimm = compact = condexec = false;
|
|
|
|
|
if (UNSIGNED_INT6 (INTVAL (x)))
|
|
|
|
|
nolimm = condexec = compact = true;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (SMALL_INT (INTVAL (x)))
|
|
|
|
|
nolimm = fast = true;
|
|
|
|
|
switch (outer_code)
|
|
|
|
|
{
|
|
|
|
|
case AND: /* bclr, bmsk, ext[bw] */
|
|
|
|
|
if (satisfies_constraint_Ccp (x) /* bclr */
|
|
|
|
|
|| satisfies_constraint_C1p (x) /* bmsk */)
|
|
|
|
|
nolimm = fast = condexec = compact = true;
|
|
|
|
|
break;
|
|
|
|
|
case IOR: /* bset */
|
|
|
|
|
if (satisfies_constraint_C0p (x)) /* bset */
|
|
|
|
|
nolimm = fast = condexec = compact = true;
|
|
|
|
|
break;
|
|
|
|
|
case XOR:
|
|
|
|
|
if (satisfies_constraint_C0p (x)) /* bxor */
|
|
|
|
|
nolimm = fast = condexec = true;
|
|
|
|
|
break;
|
|
|
|
|
case SET:
|
|
|
|
|
if (satisfies_constraint_Crr (x)) /* ror b,u6 */
|
|
|
|
|
nolimm = true;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* FIXME: Add target options to attach a small cost if
|
|
|
|
|
condexec / compact is not true. */
|
|
|
|
|
if (nolimm)
|
|
|
|
|
{
|
|
|
|
|
*total = 0;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* FALLTHRU */
|
|
|
|
|
|
|
|
|
|
/* 4 byte values can be fetched as immediate constants -
|
|
|
|
|
let's give that the cost of an extra insn. */
|
|
|
|
|
case CONST:
|
|
|
|
|
case LABEL_REF:
|
|
|
|
|
case SYMBOL_REF:
|
|
|
|
|
*total = COSTS_N_INSNS (1);
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
case CONST_DOUBLE:
|
|
|
|
|
{
|
|
|
|
|
rtx high, low;
|
|
|
|
|
|
|
|
|
|
if (TARGET_DPFP)
|
|
|
|
|
{
|
|
|
|
|
*total = COSTS_N_INSNS (1);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
/* FIXME: correct the order of high,low */
|
|
|
|
|
split_double (x, &high, &low);
|
|
|
|
|
*total = COSTS_N_INSNS (!SMALL_INT (INTVAL (high))
|
|
|
|
|
+ !SMALL_INT (INTVAL (low)));
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Encourage synth_mult to find a synthetic multiply when reasonable.
|
|
|
|
|
If we need more than 12 insns to do a multiply, then go out-of-line,
|
|
|
|
|
since the call overhead will be < 10% of the cost of the multiply. */
|
|
|
|
|
case ASHIFT:
|
|
|
|
|
case ASHIFTRT:
|
|
|
|
|
case LSHIFTRT:
|
|
|
|
|
if (TARGET_BARREL_SHIFTER)
|
|
|
|
|
{
|
|
|
|
|
/* If we want to shift a constant, we need a LIMM. */
|
|
|
|
|
/* ??? when the optimizers want to know if a constant should be
|
|
|
|
|
hoisted, they ask for the cost of the constant. OUTER_CODE is
|
|
|
|
|
insufficient context for shifts since we don't know which operand
|
|
|
|
|
we are looking at. */
|
|
|
|
|
if (CONSTANT_P (XEXP (x, 0)))
|
|
|
|
|
{
|
|
|
|
|
*total += (COSTS_N_INSNS (2)
|
|
|
|
|
+ rtx_cost (XEXP (x, 1), (enum rtx_code) code, 0, speed));
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
*total = COSTS_N_INSNS (1);
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (XEXP (x, 1)) != CONST_INT)
|
|
|
|
|
*total = COSTS_N_INSNS (16);
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
*total = COSTS_N_INSNS (INTVAL (XEXP ((x), 1)));
|
|
|
|
|
/* ??? want_to_gcse_p can throw negative shift counts at us,
|
|
|
|
|
and then panics when it gets a negative cost as result.
|
|
|
|
|
Seen for gcc.c-torture/compile/20020710-1.c -Os . */
|
|
|
|
|
if (*total < 0)
|
|
|
|
|
*total = 0;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
case DIV:
|
|
|
|
|
case UDIV:
|
|
|
|
|
if (speed)
|
|
|
|
|
*total = COSTS_N_INSNS(30);
|
|
|
|
|
else
|
|
|
|
|
*total = COSTS_N_INSNS(1);
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
case MULT:
|
|
|
|
|
if ((TARGET_DPFP && GET_MODE (x) == DFmode))
|
|
|
|
|
*total = COSTS_N_INSNS (1);
|
|
|
|
|
else if (speed)
|
|
|
|
|
*total= arc_multcost;
|
|
|
|
|
/* We do not want synth_mult sequences when optimizing
|
|
|
|
|
for size. */
|
|
|
|
|
else if (TARGET_MUL64_SET || (TARGET_ARC700 && !TARGET_NOMPY_SET))
|
|
|
|
|
*total = COSTS_N_INSNS (1);
|
|
|
|
|
else
|
|
|
|
|
*total = COSTS_N_INSNS (2);
|
|
|
|
|
return false;
|
|
|
|
|
case PLUS:
|
|
|
|
|
if (GET_CODE (XEXP (x, 0)) == MULT
|
|
|
|
|
&& _2_4_8_operand (XEXP (XEXP (x, 0), 1), VOIDmode))
|
|
|
|
|
{
|
|
|
|
|
*total += (rtx_cost (XEXP (x, 1), PLUS, 0, speed)
|
|
|
|
|
+ rtx_cost (XEXP (XEXP (x, 0), 0), PLUS, 1, speed));
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
case MINUS:
|
|
|
|
|
if (GET_CODE (XEXP (x, 1)) == MULT
|
|
|
|
|
&& _2_4_8_operand (XEXP (XEXP (x, 1), 1), VOIDmode))
|
|
|
|
|
{
|
|
|
|
|
*total += (rtx_cost (XEXP (x, 0), PLUS, 0, speed)
|
|
|
|
|
+ rtx_cost (XEXP (XEXP (x, 1), 0), PLUS, 1, speed));
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
case COMPARE:
|
|
|
|
|
{
|
|
|
|
|
rtx op0 = XEXP (x, 0);
|
|
|
|
|
rtx op1 = XEXP (x, 1);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (op0) == ZERO_EXTRACT && op1 == const0_rtx
|
|
|
|
|
&& XEXP (op0, 1) == const1_rtx)
|
|
|
|
|
{
|
|
|
|
|
/* btst / bbit0 / bbit1:
|
|
|
|
|
Small integers and registers are free; everything else can
|
|
|
|
|
be put in a register. */
|
|
|
|
|
*total = (rtx_cost (XEXP (op0, 0), SET, 1, speed)
|
|
|
|
|
+ rtx_cost (XEXP (op0, 2), SET, 1, speed));
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
if (GET_CODE (op0) == AND && op1 == const0_rtx
|
|
|
|
|
&& satisfies_constraint_C1p (XEXP (op0, 1)))
|
|
|
|
|
{
|
|
|
|
|
/* bmsk.f */
|
|
|
|
|
*total = rtx_cost (XEXP (op0, 0), SET, 1, speed);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
/* add.f */
|
|
|
|
|
if (GET_CODE (op1) == NEG)
|
|
|
|
|
{
|
|
|
|
|
/* op0 might be constant, the inside of op1 is rather
|
|
|
|
|
unlikely to be so. So swapping the operands might lower
|
|
|
|
|
the cost. */
|
|
|
|
|
*total = (rtx_cost (op0, PLUS, 1, speed)
|
|
|
|
|
+ rtx_cost (XEXP (op1, 0), PLUS, 0, speed));
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
case EQ: case NE:
|
|
|
|
|
if (outer_code == IF_THEN_ELSE
|
|
|
|
|
&& GET_CODE (XEXP (x, 0)) == ZERO_EXTRACT
|
|
|
|
|
&& XEXP (x, 1) == const0_rtx
|
|
|
|
|
&& XEXP (XEXP (x, 0), 1) == const1_rtx)
|
|
|
|
|
{
|
|
|
|
|
/* btst / bbit0 / bbit1:
|
|
|
|
|
Small integers and registers are free; everything else can
|
|
|
|
|
be put in a register. */
|
|
|
|
|
rtx op0 = XEXP (x, 0);
|
|
|
|
|
|
|
|
|
|
*total = (rtx_cost (XEXP (op0, 0), SET, 1, speed)
|
|
|
|
|
+ rtx_cost (XEXP (op0, 2), SET, 1, speed));
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
/* Fall through. */
|
|
|
|
|
/* scc_insn expands into two insns. */
|
|
|
|
|
case GTU: case GEU: case LEU:
|
|
|
|
|
if (GET_MODE (x) == SImode)
|
|
|
|
|
*total += COSTS_N_INSNS (1);
|
|
|
|
|
return false;
|
|
|
|
|
case LTU: /* might use adc. */
|
|
|
|
|
if (GET_MODE (x) == SImode)
|
|
|
|
|
*total += COSTS_N_INSNS (1) - 1;
|
|
|
|
|
return false;
|
|
|
|
|
default:
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if ADDR is an address that needs to be expressed as an
|
|
|
|
|
explicit sum of pcl + offset. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_legitimate_pc_offset_p (rtx addr)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (addr) != CONST)
|
|
|
|
|
return false;
|
|
|
|
|
addr = XEXP (addr, 0);
|
|
|
|
|
if (GET_CODE (addr) == PLUS)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (XEXP (addr, 1)) != CONST_INT)
|
|
|
|
|
return false;
|
|
|
|
|
addr = XEXP (addr, 0);
|
|
|
|
|
}
|
|
|
|
|
return (GET_CODE (addr) == UNSPEC
|
|
|
|
|
&& XVECLEN (addr, 0) == 1
|
|
|
|
|
&& XINT (addr, 1) == ARC_UNSPEC_GOT
|
|
|
|
|
&& GET_CODE (XVECEXP (addr, 0, 0)) == SYMBOL_REF);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if ADDR is a valid pic address.
|
|
|
|
|
A valid pic address on arc should look like
|
|
|
|
|
const (unspec (SYMBOL_REF/LABEL) (ARC_UNSPEC_GOTOFF/ARC_UNSPEC_GOT)) */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_legitimate_pic_addr_p (rtx addr)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (addr) == LABEL_REF)
|
|
|
|
|
return true;
|
|
|
|
|
if (GET_CODE (addr) != CONST)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
addr = XEXP (addr, 0);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (addr) == PLUS)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (XEXP (addr, 1)) != CONST_INT)
|
|
|
|
|
return false;
|
|
|
|
|
addr = XEXP (addr, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (addr) != UNSPEC
|
|
|
|
|
|| XVECLEN (addr, 0) != 1)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
/* Must be @GOT or @GOTOFF. */
|
|
|
|
|
if (XINT (addr, 1) != ARC_UNSPEC_GOT
|
|
|
|
|
&& XINT (addr, 1) != ARC_UNSPEC_GOTOFF)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (XVECEXP (addr, 0, 0)) != SYMBOL_REF
|
|
|
|
|
&& GET_CODE (XVECEXP (addr, 0, 0)) != LABEL_REF)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Return true if OP contains a symbol reference. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
symbolic_reference_mentioned_p (rtx op)
|
|
|
|
|
{
|
|
|
|
|
register const char *fmt;
|
|
|
|
|
register int i;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
fmt = GET_RTX_FORMAT (GET_CODE (op));
|
|
|
|
|
for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
|
|
|
|
|
{
|
|
|
|
|
if (fmt[i] == 'E')
|
|
|
|
|
{
|
|
|
|
|
register int j;
|
|
|
|
|
|
|
|
|
|
for (j = XVECLEN (op, i) - 1; j >= 0; j--)
|
|
|
|
|
if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if OP contains a SYMBOL_REF that is not wrapped in an unspec.
|
|
|
|
|
If SKIP_LOCAL is true, skip symbols that bind locally.
|
|
|
|
|
This is used further down in this file, and, without SKIP_LOCAL,
|
|
|
|
|
in the addsi3 / subsi3 expanders when generating PIC code. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_raw_symbolic_reference_mentioned_p (rtx op, bool skip_local)
|
|
|
|
|
{
|
|
|
|
|
register const char *fmt;
|
|
|
|
|
register int i;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE(op) == UNSPEC)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (op) == SYMBOL_REF)
|
|
|
|
|
{
|
|
|
|
|
tree decl = SYMBOL_REF_DECL (op);
|
|
|
|
|
return !skip_local || !decl || !default_binds_local_p (decl);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fmt = GET_RTX_FORMAT (GET_CODE (op));
|
|
|
|
|
for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
|
|
|
|
|
{
|
|
|
|
|
if (fmt[i] == 'E')
|
|
|
|
|
{
|
|
|
|
|
register int j;
|
|
|
|
|
|
|
|
|
|
for (j = XVECLEN (op, i) - 1; j >= 0; j--)
|
|
|
|
|
if (arc_raw_symbolic_reference_mentioned_p (XVECEXP (op, i, j),
|
|
|
|
|
skip_local))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (fmt[i] == 'e'
|
|
|
|
|
&& arc_raw_symbolic_reference_mentioned_p (XEXP (op, i),
|
|
|
|
|
skip_local))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Legitimize a pic address reference in ORIG.
|
|
|
|
|
The return value is the legitimated address.
|
|
|
|
|
If OLDX is non-zero, it is the target to assign the address to first. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
arc_legitimize_pic_address (rtx orig, rtx oldx)
|
|
|
|
|
{
|
|
|
|
|
rtx addr = orig;
|
|
|
|
|
rtx pat = orig;
|
|
|
|
|
rtx base;
|
|
|
|
|
|
|
|
|
|
if (oldx == orig)
|
|
|
|
|
oldx = NULL;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (addr) == LABEL_REF)
|
|
|
|
|
; /* Do nothing. */
|
|
|
|
|
else if (GET_CODE (addr) == SYMBOL_REF
|
|
|
|
|
&& (CONSTANT_POOL_ADDRESS_P (addr)
|
|
|
|
|
|| SYMBOL_REF_LOCAL_P (addr)))
|
|
|
|
|
{
|
|
|
|
|
/* This symbol may be referenced via a displacement from the PIC
|
|
|
|
|
base address (@GOTOFF). */
|
|
|
|
|
|
|
|
|
|
/* FIXME: if we had a way to emit pc-relative adds that don't
|
|
|
|
|
create a GOT entry, we could do without the use of the gp register. */
|
|
|
|
|
crtl->uses_pic_offset_table = 1;
|
|
|
|
|
pat = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), ARC_UNSPEC_GOTOFF);
|
|
|
|
|
pat = gen_rtx_CONST (Pmode, pat);
|
|
|
|
|
pat = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, pat);
|
|
|
|
|
|
|
|
|
|
if (oldx == NULL)
|
|
|
|
|
oldx = gen_reg_rtx (Pmode);
|
|
|
|
|
|
|
|
|
|
if (oldx != 0)
|
|
|
|
|
{
|
|
|
|
|
emit_move_insn (oldx, pat);
|
|
|
|
|
pat = oldx;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (addr) == SYMBOL_REF)
|
|
|
|
|
{
|
|
|
|
|
/* This symbol must be referenced via a load from the
|
|
|
|
|
Global Offset Table (@GOTPC). */
|
|
|
|
|
|
|
|
|
|
pat = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), ARC_UNSPEC_GOT);
|
|
|
|
|
pat = gen_rtx_CONST (Pmode, pat);
|
|
|
|
|
pat = gen_const_mem (Pmode, pat);
|
|
|
|
|
|
|
|
|
|
if (oldx == 0)
|
|
|
|
|
oldx = gen_reg_rtx (Pmode);
|
|
|
|
|
|
|
|
|
|
emit_move_insn (oldx, pat);
|
|
|
|
|
pat = oldx;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (addr) == CONST)
|
|
|
|
|
{
|
|
|
|
|
addr = XEXP (addr, 0);
|
|
|
|
|
if (GET_CODE (addr) == UNSPEC)
|
|
|
|
|
{
|
|
|
|
|
/* Check that the unspec is one of the ones we generate? */
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gcc_assert (GET_CODE (addr) == PLUS);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (addr) == PLUS)
|
|
|
|
|
{
|
|
|
|
|
rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
|
|
|
|
|
|
|
|
|
|
/* Check first to see if this is a constant offset from a @GOTOFF
|
|
|
|
|
symbol reference. */
|
|
|
|
|
if ((GET_CODE (op0) == LABEL_REF
|
|
|
|
|
|| (GET_CODE (op0) == SYMBOL_REF
|
|
|
|
|
&& (CONSTANT_POOL_ADDRESS_P (op0)
|
|
|
|
|
|| SYMBOL_REF_LOCAL_P (op0))))
|
|
|
|
|
&& GET_CODE (op1) == CONST_INT)
|
|
|
|
|
{
|
|
|
|
|
/* FIXME: like above, could do without gp reference. */
|
|
|
|
|
crtl->uses_pic_offset_table = 1;
|
|
|
|
|
pat
|
|
|
|
|
= gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0), ARC_UNSPEC_GOTOFF);
|
|
|
|
|
pat = gen_rtx_PLUS (Pmode, pat, op1);
|
|
|
|
|
pat = gen_rtx_CONST (Pmode, pat);
|
|
|
|
|
pat = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, pat);
|
|
|
|
|
|
|
|
|
|
if (oldx != 0)
|
|
|
|
|
{
|
|
|
|
|
emit_move_insn (oldx, pat);
|
|
|
|
|
pat = oldx;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
base = arc_legitimize_pic_address (XEXP (addr, 0), oldx);
|
|
|
|
|
pat = arc_legitimize_pic_address (XEXP (addr, 1),
|
|
|
|
|
base == oldx ? NULL_RTX : oldx);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (pat) == CONST_INT)
|
|
|
|
|
pat = plus_constant (Pmode, base, INTVAL (pat));
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (pat) == PLUS && CONSTANT_P (XEXP (pat, 1)))
|
|
|
|
|
{
|
|
|
|
|
base = gen_rtx_PLUS (Pmode, base, XEXP (pat, 0));
|
|
|
|
|
pat = XEXP (pat, 1);
|
|
|
|
|
}
|
|
|
|
|
pat = gen_rtx_PLUS (Pmode, base, pat);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return pat;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Output address constant X to FILE, taking PIC into account. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_output_pic_addr_const (FILE * file, rtx x, int code)
|
|
|
|
|
{
|
|
|
|
|
char buf[256];
|
|
|
|
|
|
|
|
|
|
restart:
|
|
|
|
|
switch (GET_CODE (x))
|
|
|
|
|
{
|
|
|
|
|
case PC:
|
|
|
|
|
if (flag_pic)
|
|
|
|
|
putc ('.', file);
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case SYMBOL_REF:
|
|
|
|
|
output_addr_const (file, x);
|
|
|
|
|
|
|
|
|
|
/* Local functions do not get references through the PLT. */
|
|
|
|
|
if (code == 'P' && ! SYMBOL_REF_LOCAL_P (x))
|
|
|
|
|
fputs ("@plt", file);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case LABEL_REF:
|
|
|
|
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (x, 0)));
|
|
|
|
|
assemble_name (file, buf);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case CODE_LABEL:
|
|
|
|
|
ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
|
|
|
|
|
assemble_name (file, buf);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case CONST_INT:
|
|
|
|
|
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case CONST:
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 0), code);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case CONST_DOUBLE:
|
|
|
|
|
if (GET_MODE (x) == VOIDmode)
|
|
|
|
|
{
|
|
|
|
|
/* We can use %d if the number is one word and positive. */
|
|
|
|
|
if (CONST_DOUBLE_HIGH (x))
|
|
|
|
|
fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
|
|
|
|
|
CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
|
|
|
|
|
else if (CONST_DOUBLE_LOW (x) < 0)
|
|
|
|
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
|
|
|
|
|
else
|
|
|
|
|
fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
/* We can't handle floating point constants;
|
|
|
|
|
PRINT_OPERAND must handle them. */
|
|
|
|
|
output_operand_lossage ("floating constant misused");
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case PLUS:
|
|
|
|
|
/* FIXME: Not needed here. */
|
|
|
|
|
/* Some assemblers need integer constants to appear last (eg masm). */
|
|
|
|
|
if (GET_CODE (XEXP (x, 0)) == CONST_INT)
|
|
|
|
|
{
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 1), code);
|
|
|
|
|
fprintf (file, "+");
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 0), code);
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
|
|
|
|
|
{
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 0), code);
|
|
|
|
|
if (INTVAL (XEXP (x, 1)) >= 0)
|
|
|
|
|
fprintf (file, "+");
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 1), code);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable();
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case MINUS:
|
|
|
|
|
/* Avoid outputting things like x-x or x+5-x,
|
|
|
|
|
since some assemblers can't handle that. */
|
|
|
|
|
x = simplify_subtraction (x);
|
|
|
|
|
if (GET_CODE (x) != MINUS)
|
|
|
|
|
goto restart;
|
|
|
|
|
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 0), code);
|
|
|
|
|
fprintf (file, "-");
|
|
|
|
|
if (GET_CODE (XEXP (x, 1)) == CONST_INT
|
|
|
|
|
&& INTVAL (XEXP (x, 1)) < 0)
|
|
|
|
|
{
|
|
|
|
|
fprintf (file, "(");
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 1), code);
|
|
|
|
|
fprintf (file, ")");
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 1), code);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case ZERO_EXTEND:
|
|
|
|
|
case SIGN_EXTEND:
|
|
|
|
|
arc_output_pic_addr_const (file, XEXP (x, 0), code);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
case UNSPEC:
|
|
|
|
|
gcc_assert (XVECLEN (x, 0) == 1);
|
|
|
|
|
if (XINT (x, 1) == ARC_UNSPEC_GOT)
|
|
|
|
|
fputs ("pcl,", file);
|
|
|
|
|
arc_output_pic_addr_const (file, XVECEXP (x, 0, 0), code);
|
|
|
|
|
switch (XINT (x, 1))
|
|
|
|
|
{
|
|
|
|
|
case ARC_UNSPEC_GOT:
|
|
|
|
|
fputs ("@gotpc", file);
|
|
|
|
|
break;
|
|
|
|
|
case ARC_UNSPEC_GOTOFF:
|
|
|
|
|
fputs ("@gotoff", file);
|
|
|
|
|
break;
|
|
|
|
|
case ARC_UNSPEC_PLT:
|
|
|
|
|
fputs ("@plt", file);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
output_operand_lossage ("invalid UNSPEC as operand: %d", XINT (x,1));
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
output_operand_lossage ("invalid expression as operand");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define SYMBOLIC_CONST(X) \
|
|
|
|
|
(GET_CODE (X) == SYMBOL_REF \
|
|
|
|
|
|| GET_CODE (X) == LABEL_REF \
|
|
|
|
|
|| (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
|
|
|
|
|
|
|
|
|
|
/* Emit insns to move operands[1] into operands[0]. */
|
|
|
|
|
|
|
|
|
|
void
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
emit_pic_move (rtx *operands, machine_mode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (operands[0]) == MEM && SYMBOLIC_CONST (operands[1]))
|
|
|
|
|
operands[1] = force_reg (Pmode, operands[1]);
|
|
|
|
|
else
|
|
|
|
|
operands[1] = arc_legitimize_pic_address (operands[1], temp);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* The function returning the number of words, at the beginning of an
|
|
|
|
|
argument, must be put in registers. The returned value must be
|
|
|
|
|
zero for arguments that are passed entirely in registers or that
|
|
|
|
|
are entirely pushed on the stack.
|
|
|
|
|
|
|
|
|
|
On some machines, certain arguments must be passed partially in
|
|
|
|
|
registers and partially in memory. On these machines, typically
|
|
|
|
|
the first N words of arguments are passed in registers, and the
|
|
|
|
|
rest on the stack. If a multi-word argument (a `double' or a
|
|
|
|
|
structure) crosses that boundary, its first few words must be
|
|
|
|
|
passed in registers and the rest must be pushed. This function
|
|
|
|
|
tells the compiler when this occurs, and how many of the words
|
|
|
|
|
should go in registers.
|
|
|
|
|
|
|
|
|
|
`FUNCTION_ARG' for these arguments should return the first register
|
|
|
|
|
to be used by the caller for this argument; likewise
|
|
|
|
|
`FUNCTION_INCOMING_ARG', for the called function.
|
|
|
|
|
|
|
|
|
|
The function is used to implement macro FUNCTION_ARG_PARTIAL_NREGS. */
|
|
|
|
|
|
|
|
|
|
/* If REGNO is the least arg reg available then what is the total number of arg
|
|
|
|
|
regs available. */
|
|
|
|
|
#define GPR_REST_ARG_REGS(REGNO) \
|
|
|
|
|
((REGNO) <= MAX_ARC_PARM_REGS ? MAX_ARC_PARM_REGS - (REGNO) : 0 )
|
|
|
|
|
|
|
|
|
|
/* Since arc parm regs are contiguous. */
|
|
|
|
|
#define ARC_NEXT_ARG_REG(REGNO) ( (REGNO) + 1 )
|
|
|
|
|
|
|
|
|
|
/* Implement TARGET_ARG_PARTIAL_BYTES. */
|
|
|
|
|
|
|
|
|
|
static int
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
tree type, bool named ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
|
|
|
|
|
int bytes = (mode == BLKmode
|
|
|
|
|
? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode));
|
|
|
|
|
int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
|
|
|
|
|
int arg_num = *cum;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
arg_num = ROUND_ADVANCE_CUM (arg_num, mode, type);
|
|
|
|
|
ret = GPR_REST_ARG_REGS (arg_num);
|
|
|
|
|
|
|
|
|
|
/* ICEd at function.c:2361, and ret is copied to data->partial */
|
|
|
|
|
ret = (ret >= words ? 0 : ret * UNITS_PER_WORD);
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* This function is used to control a function argument is passed in a
|
|
|
|
|
register, and which register.
|
|
|
|
|
|
|
|
|
|
The arguments are CUM, of type CUMULATIVE_ARGS, which summarizes
|
|
|
|
|
(in a way defined by INIT_CUMULATIVE_ARGS and FUNCTION_ARG_ADVANCE)
|
|
|
|
|
all of the previous arguments so far passed in registers; MODE, the
|
|
|
|
|
machine mode of the argument; TYPE, the data type of the argument
|
|
|
|
|
as a tree node or 0 if that is not known (which happens for C
|
|
|
|
|
support library functions); and NAMED, which is 1 for an ordinary
|
|
|
|
|
argument and 0 for nameless arguments that correspond to `...' in
|
|
|
|
|
the called function's prototype.
|
|
|
|
|
|
|
|
|
|
The returned value should either be a `reg' RTX for the hard
|
|
|
|
|
register in which to pass the argument, or zero to pass the
|
|
|
|
|
argument on the stack.
|
|
|
|
|
|
|
|
|
|
For machines like the Vax and 68000, where normally all arguments
|
|
|
|
|
are pushed, zero suffices as a definition.
|
|
|
|
|
|
|
|
|
|
The usual way to make the ANSI library `stdarg.h' work on a machine
|
|
|
|
|
where some arguments are usually passed in registers, is to cause
|
|
|
|
|
nameless arguments to be passed on the stack instead. This is done
|
|
|
|
|
by making the function return 0 whenever NAMED is 0.
|
|
|
|
|
|
|
|
|
|
You may use the macro `MUST_PASS_IN_STACK (MODE, TYPE)' in the
|
|
|
|
|
definition of this function to determine if this argument is of a
|
|
|
|
|
type that must be passed in the stack. If `REG_PARM_STACK_SPACE'
|
|
|
|
|
is not defined and the function returns non-zero for such an
|
|
|
|
|
argument, the compiler will abort. If `REG_PARM_STACK_SPACE' is
|
|
|
|
|
defined, the argument will be computed in the stack and then loaded
|
|
|
|
|
into a register.
|
|
|
|
|
|
|
|
|
|
The function is used to implement macro FUNCTION_ARG. */
|
|
|
|
|
/* On the ARC the first MAX_ARC_PARM_REGS args are normally in registers
|
|
|
|
|
and the rest are pushed. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_function_arg (cumulative_args_t cum_v, machine_mode mode,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
|
|
|
|
|
int arg_num = *cum;
|
|
|
|
|
rtx ret;
|
|
|
|
|
const char *debstr ATTRIBUTE_UNUSED;
|
|
|
|
|
|
|
|
|
|
arg_num = ROUND_ADVANCE_CUM (arg_num, mode, type);
|
|
|
|
|
/* Return a marker for use in the call instruction. */
|
|
|
|
|
if (mode == VOIDmode)
|
|
|
|
|
{
|
|
|
|
|
ret = const0_rtx;
|
|
|
|
|
debstr = "<0>";
|
|
|
|
|
}
|
|
|
|
|
else if (GPR_REST_ARG_REGS (arg_num) > 0)
|
|
|
|
|
{
|
|
|
|
|
ret = gen_rtx_REG (mode, arg_num);
|
|
|
|
|
debstr = reg_names [arg_num];
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ret = NULL_RTX;
|
|
|
|
|
debstr = "memory";
|
|
|
|
|
}
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The function to update the summarizer variable *CUM to advance past
|
|
|
|
|
an argument in the argument list. The values MODE, TYPE and NAMED
|
|
|
|
|
describe that argument. Once this is done, the variable *CUM is
|
|
|
|
|
suitable for analyzing the *following* argument with
|
|
|
|
|
`FUNCTION_ARG', etc.
|
|
|
|
|
|
|
|
|
|
This function need not do anything if the argument in question was
|
|
|
|
|
passed on the stack. The compiler knows how to track the amount of
|
|
|
|
|
stack space used for arguments without any special help.
|
|
|
|
|
|
|
|
|
|
The function is used to implement macro FUNCTION_ARG_ADVANCE. */
|
|
|
|
|
/* For the ARC: the cum set here is passed on to function_arg where we
|
|
|
|
|
look at its value and say which reg to use. Strategy: advance the
|
|
|
|
|
regnumber here till we run out of arg regs, then set *cum to last
|
|
|
|
|
reg. In function_arg, since *cum > last arg reg we would return 0
|
|
|
|
|
and thus the arg will end up on the stack. For straddling args of
|
|
|
|
|
course function_arg_partial_nregs will come into play. */
|
|
|
|
|
|
|
|
|
|
static void
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
const_tree type, bool named ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
|
|
|
|
|
int bytes = (mode == BLKmode
|
|
|
|
|
? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode));
|
|
|
|
|
int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
if (words)
|
|
|
|
|
*cum = ROUND_ADVANCE_CUM (*cum, mode, type);
|
|
|
|
|
for (i = 0; i < words; i++)
|
|
|
|
|
*cum = ARC_NEXT_ARG_REG (*cum);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Define how to find the value returned by a function.
|
|
|
|
|
VALTYPE is the data type of the value (as a tree).
|
|
|
|
|
If the precise function being called is known, FN_DECL_OR_TYPE is its
|
|
|
|
|
FUNCTION_DECL; otherwise, FN_DECL_OR_TYPE is its type. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_function_value (const_tree valtype,
|
|
|
|
|
const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
|
|
|
|
|
bool outgoing ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode = TYPE_MODE (valtype);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int unsignedp ATTRIBUTE_UNUSED;
|
|
|
|
|
|
|
|
|
|
unsignedp = TYPE_UNSIGNED (valtype);
|
|
|
|
|
if (INTEGRAL_TYPE_P (valtype) || TREE_CODE (valtype) == OFFSET_TYPE)
|
|
|
|
|
PROMOTE_MODE (mode, unsignedp, valtype);
|
|
|
|
|
return gen_rtx_REG (mode, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Returns the return address that is used by builtin_return_address. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
arc_return_addr_rtx (int count, ATTRIBUTE_UNUSED rtx frame)
|
|
|
|
|
{
|
|
|
|
|
if (count != 0)
|
|
|
|
|
return const0_rtx;
|
|
|
|
|
|
|
|
|
|
return get_hard_reg_initial_val (Pmode , RETURN_ADDR_REGNUM);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Nonzero if the constant value X is a legitimate general operand
|
|
|
|
|
when generating PIC code. It is given that flag_pic is on and
|
|
|
|
|
that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_legitimate_pic_operand_p (rtx x)
|
|
|
|
|
{
|
|
|
|
|
return !arc_raw_symbolic_reference_mentioned_p (x, true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Determine if a given RTX is a valid constant. We already know this
|
|
|
|
|
satisfies CONSTANT_P. */
|
|
|
|
|
|
|
|
|
|
bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_legitimate_constant_p (machine_mode, rtx x)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (!flag_pic)
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
switch (GET_CODE (x))
|
|
|
|
|
{
|
|
|
|
|
case CONST:
|
|
|
|
|
x = XEXP (x, 0);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == PLUS)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
|
|
|
|
|
return false;
|
|
|
|
|
x = XEXP (x, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Only some unspecs are valid as "constants". */
|
|
|
|
|
if (GET_CODE (x) == UNSPEC)
|
|
|
|
|
switch (XINT (x, 1))
|
|
|
|
|
{
|
|
|
|
|
case ARC_UNSPEC_PLT:
|
|
|
|
|
case ARC_UNSPEC_GOTOFF:
|
|
|
|
|
case ARC_UNSPEC_GOT:
|
|
|
|
|
case UNSPEC_PROF:
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We must have drilled down to a symbol. */
|
|
|
|
|
if (arc_raw_symbolic_reference_mentioned_p (x, false))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
/* Return true. */
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case LABEL_REF:
|
|
|
|
|
case SYMBOL_REF:
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Otherwise we handle everything else in the move patterns. */
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_legitimate_address_p (machine_mode mode, rtx x, bool strict)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (RTX_OK_FOR_BASE_P (x, strict))
|
|
|
|
|
return true;
|
|
|
|
|
if (LEGITIMATE_OFFSET_ADDRESS_P (mode, x, TARGET_INDEXED_LOADS, strict))
|
|
|
|
|
return true;
|
|
|
|
|
if (LEGITIMATE_SCALED_ADDRESS_P (mode, x, strict))
|
|
|
|
|
return true;
|
|
|
|
|
if (LEGITIMATE_SMALL_DATA_ADDRESS_P (x))
|
|
|
|
|
return true;
|
|
|
|
|
if (GET_CODE (x) == CONST_INT && LARGE_INT (INTVAL (x)))
|
|
|
|
|
return true;
|
|
|
|
|
if ((GET_MODE_SIZE (mode) != 16)
|
|
|
|
|
&& (GET_CODE (x) == SYMBOL_REF
|
|
|
|
|
|| GET_CODE (x) == LABEL_REF
|
|
|
|
|
|| GET_CODE (x) == CONST))
|
|
|
|
|
{
|
|
|
|
|
if (!flag_pic || arc_legitimate_pic_addr_p (x))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
if ((GET_CODE (x) == PRE_DEC || GET_CODE (x) == PRE_INC
|
|
|
|
|
|| GET_CODE (x) == POST_DEC || GET_CODE (x) == POST_INC)
|
|
|
|
|
&& RTX_OK_FOR_BASE_P (XEXP (x, 0), strict))
|
|
|
|
|
return true;
|
|
|
|
|
/* We're restricted here by the `st' insn. */
|
|
|
|
|
if ((GET_CODE (x) == PRE_MODIFY || GET_CODE (x) == POST_MODIFY)
|
|
|
|
|
&& GET_CODE (XEXP ((x), 1)) == PLUS
|
|
|
|
|
&& rtx_equal_p (XEXP ((x), 0), XEXP (XEXP (x, 1), 0))
|
|
|
|
|
&& LEGITIMATE_OFFSET_ADDRESS_P (QImode, XEXP (x, 1),
|
|
|
|
|
TARGET_AUTO_MODIFY_REG, strict))
|
|
|
|
|
return true;
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true iff ADDR (a legitimate address expression)
|
|
|
|
|
has an effect that depends on the machine mode it is used for. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_mode_dependent_address_p (const_rtx addr, addr_space_t)
|
|
|
|
|
{
|
|
|
|
|
/* SYMBOL_REF is not mode dependent: it is either a small data reference,
|
|
|
|
|
which is valid for loads and stores, or a limm offset, which is valid for
|
|
|
|
|
loads. */
|
|
|
|
|
/* Scaled indices are scaled by the access mode; likewise for scaled
|
|
|
|
|
offsets, which are needed for maximum offset stores. */
|
|
|
|
|
if (GET_CODE (addr) == PLUS
|
|
|
|
|
&& (GET_CODE (XEXP ((addr), 0)) == MULT
|
|
|
|
|
|| (CONST_INT_P (XEXP ((addr), 1))
|
|
|
|
|
&& !SMALL_INT (INTVAL (XEXP ((addr), 1))))))
|
|
|
|
|
return true;
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Determine if it's legal to put X into the constant pool. */
|
|
|
|
|
|
|
|
|
|
static bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_cannot_force_const_mem (machine_mode mode, rtx x)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
return !arc_legitimate_constant_p (mode, x);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Generic function to define a builtin. */
|
|
|
|
|
#define def_mbuiltin(MASK, NAME, TYPE, CODE) \
|
|
|
|
|
do \
|
|
|
|
|
{ \
|
|
|
|
|
if (MASK) \
|
|
|
|
|
add_builtin_function ((NAME), (TYPE), (CODE), BUILT_IN_MD, NULL, NULL_TREE); \
|
|
|
|
|
} \
|
|
|
|
|
while (0)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_init_builtins (void)
|
|
|
|
|
{
|
|
|
|
|
tree endlink = void_list_node;
|
|
|
|
|
|
|
|
|
|
tree void_ftype_void
|
|
|
|
|
= build_function_type (void_type_node,
|
|
|
|
|
endlink);
|
|
|
|
|
|
|
|
|
|
tree int_ftype_int
|
|
|
|
|
= build_function_type (integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node, endlink));
|
|
|
|
|
|
|
|
|
|
tree pcvoid_type_node
|
|
|
|
|
= build_pointer_type (build_qualified_type (void_type_node, TYPE_QUAL_CONST));
|
|
|
|
|
tree int_ftype_pcvoid_int
|
|
|
|
|
= build_function_type (integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, pcvoid_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
endlink)));
|
|
|
|
|
|
|
|
|
|
tree int_ftype_short_int
|
|
|
|
|
= build_function_type (integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, short_integer_type_node, endlink));
|
|
|
|
|
|
|
|
|
|
tree void_ftype_int_int
|
|
|
|
|
= build_function_type (void_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node, endlink)));
|
|
|
|
|
tree void_ftype_usint_usint
|
|
|
|
|
= build_function_type (void_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, long_unsigned_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, long_unsigned_type_node, endlink)));
|
|
|
|
|
|
|
|
|
|
tree int_ftype_int_int
|
|
|
|
|
= build_function_type (integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node, endlink)));
|
|
|
|
|
|
|
|
|
|
tree usint_ftype_usint
|
|
|
|
|
= build_function_type (long_unsigned_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, long_unsigned_type_node, endlink));
|
|
|
|
|
|
|
|
|
|
tree void_ftype_usint
|
|
|
|
|
= build_function_type (void_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, long_unsigned_type_node, endlink));
|
|
|
|
|
|
|
|
|
|
/* Add the builtins. */
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_nop", void_ftype_void, ARC_BUILTIN_NOP);
|
|
|
|
|
def_mbuiltin (TARGET_NORM, "__builtin_arc_norm", int_ftype_int, ARC_BUILTIN_NORM);
|
|
|
|
|
def_mbuiltin (TARGET_NORM, "__builtin_arc_normw", int_ftype_short_int, ARC_BUILTIN_NORMW);
|
|
|
|
|
def_mbuiltin (TARGET_SWAP, "__builtin_arc_swap", int_ftype_int, ARC_BUILTIN_SWAP);
|
|
|
|
|
def_mbuiltin (TARGET_MUL64_SET,"__builtin_arc_mul64", void_ftype_int_int, ARC_BUILTIN_MUL64);
|
|
|
|
|
def_mbuiltin (TARGET_MUL64_SET,"__builtin_arc_mulu64", void_ftype_usint_usint, ARC_BUILTIN_MULU64);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_rtie", void_ftype_void, ARC_BUILTIN_RTIE);
|
|
|
|
|
def_mbuiltin (TARGET_ARC700,"__builtin_arc_sync", void_ftype_void, ARC_BUILTIN_SYNC);
|
|
|
|
|
def_mbuiltin ((TARGET_EA_SET),"__builtin_arc_divaw", int_ftype_int_int, ARC_BUILTIN_DIVAW);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_brk", void_ftype_void, ARC_BUILTIN_BRK);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_flag", void_ftype_usint, ARC_BUILTIN_FLAG);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_sleep", void_ftype_usint, ARC_BUILTIN_SLEEP);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_swi", void_ftype_void, ARC_BUILTIN_SWI);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_core_read", usint_ftype_usint, ARC_BUILTIN_CORE_READ);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_core_write", void_ftype_usint_usint, ARC_BUILTIN_CORE_WRITE);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_lr", usint_ftype_usint, ARC_BUILTIN_LR);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_sr", void_ftype_usint_usint, ARC_BUILTIN_SR);
|
|
|
|
|
def_mbuiltin (TARGET_ARC700,"__builtin_arc_trap_s", void_ftype_usint, ARC_BUILTIN_TRAP_S);
|
|
|
|
|
def_mbuiltin (TARGET_ARC700,"__builtin_arc_unimp_s", void_ftype_void, ARC_BUILTIN_UNIMP_S);
|
|
|
|
|
def_mbuiltin (1,"__builtin_arc_aligned", int_ftype_pcvoid_int, ARC_BUILTIN_ALIGNED);
|
|
|
|
|
|
|
|
|
|
if (TARGET_SIMD_SET)
|
|
|
|
|
arc_init_simd_builtins ();
|
|
|
|
|
}
|
|
|
|
|
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
static rtx arc_expand_simd_builtin (tree, rtx, rtx, machine_mode, int);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
/* Expand an expression EXP that calls a built-in function,
|
|
|
|
|
with result going to TARGET if that's convenient
|
|
|
|
|
(and in mode MODE if that's convenient).
|
|
|
|
|
SUBTARGET may be used as the target for computing one of EXP's operands.
|
|
|
|
|
IGNORE is nonzero if the value is to be ignored. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_expand_builtin (tree exp,
|
|
|
|
|
rtx target,
|
|
|
|
|
rtx subtarget,
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int ignore)
|
|
|
|
|
{
|
|
|
|
|
tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
|
|
|
|
|
tree arg0;
|
|
|
|
|
tree arg1;
|
|
|
|
|
rtx op0;
|
|
|
|
|
rtx op1;
|
|
|
|
|
int fcode = DECL_FUNCTION_CODE (fndecl);
|
|
|
|
|
int icode;
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
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machine_mode mode0;
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machine_mode mode1;
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2013-10-01 19:03:46 +02:00
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if (fcode > ARC_SIMD_BUILTIN_BEGIN && fcode < ARC_SIMD_BUILTIN_END)
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return arc_expand_simd_builtin (exp, target, subtarget, mode, ignore);
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switch (fcode)
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{
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case ARC_BUILTIN_NOP:
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emit_insn (gen_nop ());
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return NULL_RTX;
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case ARC_BUILTIN_NORM:
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icode = CODE_FOR_clrsbsi2;
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arg0 = CALL_EXPR_ARG (exp, 0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[1].mode;
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target = gen_reg_rtx (SImode);
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if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
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op0 = copy_to_mode_reg (mode0, op0);
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emit_insn (gen_clrsbsi2 (target, op0));
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return target;
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case ARC_BUILTIN_NORMW:
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/* FIXME : This should all be HImode, not SImode. */
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icode = CODE_FOR_normw;
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arg0 = CALL_EXPR_ARG (exp, 0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[1].mode;
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target = gen_reg_rtx (SImode);
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if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
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op0 = copy_to_mode_reg (mode0, convert_to_mode (mode0, op0,0));
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emit_insn (gen_normw (target, op0));
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return target;
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case ARC_BUILTIN_MUL64:
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icode = CODE_FOR_mul64;
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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op1 = expand_expr (arg1, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[0].mode;
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mode1 = insn_data[icode].operand[1].mode;
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if (! (*insn_data[icode].operand[0].predicate) (op0, mode0))
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op0 = copy_to_mode_reg (mode0, op0);
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if (! (*insn_data[icode].operand[1].predicate) (op1, mode1))
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op1 = copy_to_mode_reg (mode1, op1);
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emit_insn (gen_mul64 (op0,op1));
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return NULL_RTX;
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case ARC_BUILTIN_MULU64:
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icode = CODE_FOR_mulu64;
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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op1 = expand_expr (arg1, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[0].mode;
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mode1 = insn_data[icode].operand[1].mode;
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if (! (*insn_data[icode].operand[0].predicate) (op0, mode0))
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op0 = copy_to_mode_reg (mode0, op0);
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if (! (*insn_data[icode].operand[0].predicate) (op1, mode1))
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op1 = copy_to_mode_reg (mode1, op1);
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emit_insn (gen_mulu64 (op0,op1));
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return NULL_RTX;
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case ARC_BUILTIN_RTIE:
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icode = CODE_FOR_rtie;
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emit_insn (gen_rtie (const1_rtx));
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return NULL_RTX;
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case ARC_BUILTIN_SYNC:
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icode = CODE_FOR_sync;
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emit_insn (gen_sync (const1_rtx));
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return NULL_RTX;
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case ARC_BUILTIN_SWAP:
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icode = CODE_FOR_swap;
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arg0 = CALL_EXPR_ARG (exp, 0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[1].mode;
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target = gen_reg_rtx (SImode);
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if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
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op0 = copy_to_mode_reg (mode0, op0);
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emit_insn (gen_swap (target, op0));
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return target;
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case ARC_BUILTIN_DIVAW:
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icode = CODE_FOR_divaw;
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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op1 = expand_expr (arg1, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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target = gen_reg_rtx (SImode);
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mode0 = insn_data[icode].operand[0].mode;
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mode1 = insn_data[icode].operand[1].mode;
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if (! (*insn_data[icode].operand[0].predicate) (op0, mode0))
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op0 = copy_to_mode_reg (mode0, op0);
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if (! (*insn_data[icode].operand[1].predicate) (op1, mode1))
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op1 = copy_to_mode_reg (mode1, op1);
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emit_insn (gen_divaw (target, op0, op1));
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return target;
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case ARC_BUILTIN_BRK:
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icode = CODE_FOR_brk;
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emit_insn (gen_brk (const1_rtx));
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return NULL_RTX;
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case ARC_BUILTIN_SLEEP:
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icode = CODE_FOR_sleep;
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arg0 = CALL_EXPR_ARG (exp, 0);
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fold (arg0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[1].mode;
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emit_insn (gen_sleep (op0));
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return NULL_RTX;
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case ARC_BUILTIN_SWI:
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icode = CODE_FOR_swi;
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emit_insn (gen_swi (const1_rtx));
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return NULL_RTX;
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case ARC_BUILTIN_FLAG:
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icode = CODE_FOR_flag;
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arg0 = CALL_EXPR_ARG (exp, 0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[0].mode;
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if (! (*insn_data[icode].operand[0].predicate) (op0, mode0))
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op0 = copy_to_mode_reg (mode0, op0);
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emit_insn (gen_flag (op0));
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return NULL_RTX;
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case ARC_BUILTIN_CORE_READ:
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icode = CODE_FOR_core_read;
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arg0 = CALL_EXPR_ARG (exp, 0);
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target = gen_reg_rtx (SImode);
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fold (arg0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[1].mode;
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emit_insn (gen_core_read (target, op0));
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return target;
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case ARC_BUILTIN_CORE_WRITE:
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icode = CODE_FOR_core_write;
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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fold (arg1);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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op1 = expand_expr (arg1, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[0].mode;
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mode1 = insn_data[icode].operand[1].mode;
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emit_insn (gen_core_write (op0, op1));
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return NULL_RTX;
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case ARC_BUILTIN_LR:
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icode = CODE_FOR_lr;
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arg0 = CALL_EXPR_ARG (exp, 0);
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target = gen_reg_rtx (SImode);
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fold (arg0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[1].mode;
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emit_insn (gen_lr (target, op0));
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return target;
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case ARC_BUILTIN_SR:
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icode = CODE_FOR_sr;
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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fold (arg1);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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op1 = expand_expr (arg1, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[0].mode;
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mode1 = insn_data[icode].operand[1].mode;
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emit_insn (gen_sr (op0, op1));
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return NULL_RTX;
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case ARC_BUILTIN_TRAP_S:
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icode = CODE_FOR_trap_s;
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arg0 = CALL_EXPR_ARG (exp, 0);
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fold (arg0);
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op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
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mode0 = insn_data[icode].operand[1].mode;
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/* We don't give an error for non-cost values here because
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we still want to allow things to be fixed up by later inlining /
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constant folding / dead code elimination. */
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if (CONST_INT_P (op0) && !satisfies_constraint_L (op0))
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{
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/* Keep this message in sync with the one in arc.md:trap_s,
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because *.md files don't get scanned by exgettext. */
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error ("operand to trap_s should be an unsigned 6-bit value");
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}
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emit_insn (gen_trap_s (op0));
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return NULL_RTX;
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case ARC_BUILTIN_UNIMP_S:
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icode = CODE_FOR_unimp_s;
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emit_insn (gen_unimp_s (const1_rtx));
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return NULL_RTX;
|
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|
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case ARC_BUILTIN_ALIGNED:
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|
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/* __builtin_arc_aligned (void* val, int alignval) */
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|
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arg0 = CALL_EXPR_ARG (exp, 0);
|
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|
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arg1 = CALL_EXPR_ARG (exp, 1);
|
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|
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fold (arg1);
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
|
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|
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op1 = expand_expr (arg1, NULL_RTX, VOIDmode, EXPAND_NORMAL);
|
|
|
|
|
target = gen_reg_rtx (SImode);
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|
|
|
|
|
|
|
|
|
if (!CONST_INT_P (op1))
|
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|
|
|
{
|
|
|
|
|
/* If we can't fold the alignment to a constant integer
|
|
|
|
|
whilst optimizing, this is probably a user error. */
|
|
|
|
|
if (optimize)
|
|
|
|
|
warning (0, "__builtin_arc_aligned with non-constant alignment");
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
HOST_WIDE_INT alignTest = INTVAL (op1);
|
|
|
|
|
/* Check alignTest is positive, and a power of two. */
|
|
|
|
|
if (alignTest <= 0 || alignTest != (alignTest & -alignTest))
|
|
|
|
|
{
|
|
|
|
|
error ("invalid alignment value for __builtin_arc_aligned");
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (CONST_INT_P (op0))
|
|
|
|
|
{
|
|
|
|
|
HOST_WIDE_INT pnt = INTVAL (op0);
|
|
|
|
|
|
|
|
|
|
if ((pnt & (alignTest - 1)) == 0)
|
|
|
|
|
return const1_rtx;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
unsigned align = get_pointer_alignment (arg0);
|
|
|
|
|
unsigned numBits = alignTest * BITS_PER_UNIT;
|
|
|
|
|
|
|
|
|
|
if (align && align >= numBits)
|
|
|
|
|
return const1_rtx;
|
|
|
|
|
/* Another attempt to ascertain alignment. Check the type
|
|
|
|
|
we are pointing to. */
|
|
|
|
|
if (POINTER_TYPE_P (TREE_TYPE (arg0))
|
|
|
|
|
&& TYPE_ALIGN (TREE_TYPE (TREE_TYPE (arg0))) >= numBits)
|
|
|
|
|
return const1_rtx;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Default to false. */
|
|
|
|
|
return const0_rtx;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* @@@ Should really do something sensible here. */
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Returns true if the operands[opno] is a valid compile-time constant to be
|
|
|
|
|
used as register number in the code for builtins. Else it flags an error
|
|
|
|
|
and returns false. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
check_if_valid_regno_const (rtx *operands, int opno)
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
switch (GET_CODE (operands[opno]))
|
|
|
|
|
{
|
|
|
|
|
case SYMBOL_REF :
|
|
|
|
|
case CONST :
|
|
|
|
|
case CONST_INT :
|
|
|
|
|
return true;
|
|
|
|
|
default:
|
|
|
|
|
error ("register number must be a compile-time constant. Try giving higher optimization levels");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check that after all the constant folding, whether the operand to
|
|
|
|
|
__builtin_arc_sleep is an unsigned int of 6 bits. If not, flag an error. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
check_if_valid_sleep_operand (rtx *operands, int opno)
|
|
|
|
|
{
|
|
|
|
|
switch (GET_CODE (operands[opno]))
|
|
|
|
|
{
|
|
|
|
|
case CONST :
|
|
|
|
|
case CONST_INT :
|
|
|
|
|
if( UNSIGNED_INT6 (INTVAL (operands[opno])))
|
|
|
|
|
return true;
|
|
|
|
|
default:
|
|
|
|
|
fatal_error("operand for sleep instruction must be an unsigned 6 bit compile-time constant");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if it is ok to make a tail-call to DECL. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,
|
|
|
|
|
tree exp ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
/* Never tailcall from an ISR routine - it needs a special exit sequence. */
|
|
|
|
|
if (ARC_INTERRUPT_P (arc_compute_function_type (cfun)))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
/* Everything else is ok. */
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Output code to add DELTA to the first argument, and then jump
|
|
|
|
|
to FUNCTION. Used for C++ multiple inheritance. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
|
|
|
|
|
HOST_WIDE_INT delta,
|
|
|
|
|
HOST_WIDE_INT vcall_offset,
|
|
|
|
|
tree function)
|
|
|
|
|
{
|
|
|
|
|
int mi_delta = delta;
|
|
|
|
|
const char *const mi_op = mi_delta < 0 ? "sub" : "add";
|
|
|
|
|
int shift = 0;
|
|
|
|
|
int this_regno
|
|
|
|
|
= aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function) ? 1 : 0;
|
|
|
|
|
rtx fnaddr;
|
|
|
|
|
|
|
|
|
|
if (mi_delta < 0)
|
|
|
|
|
mi_delta = - mi_delta;
|
|
|
|
|
|
|
|
|
|
/* Add DELTA. When possible use a plain add, otherwise load it into
|
|
|
|
|
a register first. */
|
|
|
|
|
|
|
|
|
|
while (mi_delta != 0)
|
|
|
|
|
{
|
|
|
|
|
if ((mi_delta & (3 << shift)) == 0)
|
|
|
|
|
shift += 2;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
asm_fprintf (file, "\t%s\t%s, %s, %d\n",
|
|
|
|
|
mi_op, reg_names[this_regno], reg_names[this_regno],
|
|
|
|
|
mi_delta & (0xff << shift));
|
|
|
|
|
mi_delta &= ~(0xff << shift);
|
|
|
|
|
shift += 8;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If needed, add *(*THIS + VCALL_OFFSET) to THIS. */
|
|
|
|
|
if (vcall_offset != 0)
|
|
|
|
|
{
|
|
|
|
|
/* ld r12,[this] --> temp = *this
|
|
|
|
|
add r12,r12,vcall_offset --> temp = *(*this + vcall_offset)
|
|
|
|
|
ld r12,[r12]
|
|
|
|
|
add this,this,r12 --> this+ = *(*this + vcall_offset) */
|
|
|
|
|
asm_fprintf (file, "\tld\t%s, [%s]\n",
|
|
|
|
|
ARC_TEMP_SCRATCH_REG, reg_names[this_regno]);
|
2014-09-06 18:04:40 +02:00
|
|
|
|
asm_fprintf (file, "\tadd\t%s, %s, " HOST_WIDE_INT_PRINT_DEC "\n",
|
2013-10-01 19:03:46 +02:00
|
|
|
|
ARC_TEMP_SCRATCH_REG, ARC_TEMP_SCRATCH_REG, vcall_offset);
|
|
|
|
|
asm_fprintf (file, "\tld\t%s, [%s]\n",
|
|
|
|
|
ARC_TEMP_SCRATCH_REG, ARC_TEMP_SCRATCH_REG);
|
|
|
|
|
asm_fprintf (file, "\tadd\t%s, %s, %s\n", reg_names[this_regno],
|
|
|
|
|
reg_names[this_regno], ARC_TEMP_SCRATCH_REG);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fnaddr = XEXP (DECL_RTL (function), 0);
|
|
|
|
|
|
|
|
|
|
if (arc_is_longcall_p (fnaddr))
|
|
|
|
|
fputs ("\tj\t", file);
|
|
|
|
|
else
|
|
|
|
|
fputs ("\tb\t", file);
|
|
|
|
|
assemble_name (file, XSTR (fnaddr, 0));
|
|
|
|
|
fputc ('\n', file);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if a 32 bit "long_call" should be generated for
|
|
|
|
|
this calling SYM_REF. We generate a long_call if the function:
|
|
|
|
|
|
|
|
|
|
a. has an __attribute__((long call))
|
|
|
|
|
or b. the -mlong-calls command line switch has been specified
|
|
|
|
|
|
|
|
|
|
However we do not generate a long call if the function has an
|
|
|
|
|
__attribute__ ((short_call)) or __attribute__ ((medium_call))
|
|
|
|
|
|
|
|
|
|
This function will be called by C fragments contained in the machine
|
|
|
|
|
description file. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_is_longcall_p (rtx sym_ref)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (sym_ref) != SYMBOL_REF)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
return (SYMBOL_REF_LONG_CALL_P (sym_ref)
|
|
|
|
|
|| (TARGET_LONG_CALLS_SET
|
|
|
|
|
&& !SYMBOL_REF_SHORT_CALL_P (sym_ref)
|
|
|
|
|
&& !SYMBOL_REF_MEDIUM_CALL_P (sym_ref)));
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Likewise for short calls. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_is_shortcall_p (rtx sym_ref)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (sym_ref) != SYMBOL_REF)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
return (SYMBOL_REF_SHORT_CALL_P (sym_ref)
|
|
|
|
|
|| (!TARGET_LONG_CALLS_SET && !TARGET_MEDIUM_CALLS
|
|
|
|
|
&& !SYMBOL_REF_LONG_CALL_P (sym_ref)
|
|
|
|
|
&& !SYMBOL_REF_MEDIUM_CALL_P (sym_ref)));
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit profiling code for calling CALLEE. Return true if a special
|
|
|
|
|
call pattern needs to be generated. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_profile_call (rtx callee)
|
|
|
|
|
{
|
|
|
|
|
rtx from = XEXP (DECL_RTL (current_function_decl), 0);
|
|
|
|
|
|
|
|
|
|
if (TARGET_UCB_MCOUNT)
|
|
|
|
|
/* Profiling is done by instrumenting the callee. */
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if (CONSTANT_P (callee))
|
|
|
|
|
{
|
|
|
|
|
rtx count_ptr
|
|
|
|
|
= gen_rtx_CONST (Pmode,
|
|
|
|
|
gen_rtx_UNSPEC (Pmode,
|
|
|
|
|
gen_rtvec (3, from, callee,
|
|
|
|
|
CONST0_RTX (Pmode)),
|
|
|
|
|
UNSPEC_PROF));
|
|
|
|
|
rtx counter = gen_rtx_MEM (SImode, count_ptr);
|
|
|
|
|
/* ??? The increment would better be done atomically, but as there is
|
|
|
|
|
no proper hardware support, that would be too expensive. */
|
|
|
|
|
emit_move_insn (counter,
|
|
|
|
|
force_reg (SImode, plus_constant (SImode, counter, 1)));
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
rtx count_list_ptr
|
|
|
|
|
= gen_rtx_CONST (Pmode,
|
|
|
|
|
gen_rtx_UNSPEC (Pmode,
|
|
|
|
|
gen_rtvec (3, from, CONST0_RTX (Pmode),
|
|
|
|
|
CONST0_RTX (Pmode)),
|
|
|
|
|
UNSPEC_PROF));
|
|
|
|
|
emit_move_insn (gen_rtx_REG (Pmode, 8), count_list_ptr);
|
|
|
|
|
emit_move_insn (gen_rtx_REG (Pmode, 9), callee);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Worker function for TARGET_RETURN_IN_MEMORY. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
if (AGGREGATE_TYPE_P (type) || TREE_ADDRESSABLE (type))
|
|
|
|
|
return true;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
HOST_WIDE_INT size = int_size_in_bytes (type);
|
|
|
|
|
return (size == -1 || size > 8);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* This was in rtlanal.c, and can go in there when we decide we want
|
|
|
|
|
to submit the change for inclusion in the GCC tree. */
|
|
|
|
|
/* Like note_stores, but allow the callback to have side effects on the rtl
|
|
|
|
|
(like the note_stores of yore):
|
|
|
|
|
Call FUN on each register or MEM that is stored into or clobbered by X.
|
|
|
|
|
(X would be the pattern of an insn). DATA is an arbitrary pointer,
|
|
|
|
|
ignored by note_stores, but passed to FUN.
|
|
|
|
|
FUN may alter parts of the RTL.
|
|
|
|
|
|
|
|
|
|
FUN receives three arguments:
|
|
|
|
|
1. the REG, MEM, CC0 or PC being stored in or clobbered,
|
|
|
|
|
2. the SET or CLOBBER rtx that does the store,
|
|
|
|
|
3. the pointer DATA provided to note_stores.
|
|
|
|
|
|
|
|
|
|
If the item being stored in or clobbered is a SUBREG of a hard register,
|
|
|
|
|
the SUBREG will be passed. */
|
|
|
|
|
|
|
|
|
|
/* For now. */ static
|
|
|
|
|
void
|
|
|
|
|
walk_stores (rtx x, void (*fun) (rtx, rtx, void *), void *data)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == COND_EXEC)
|
|
|
|
|
x = COND_EXEC_CODE (x);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
|
|
|
|
|
{
|
|
|
|
|
rtx dest = SET_DEST (x);
|
|
|
|
|
|
|
|
|
|
while ((GET_CODE (dest) == SUBREG
|
|
|
|
|
&& (!REG_P (SUBREG_REG (dest))
|
|
|
|
|
|| REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
|
|
|
|
|
|| GET_CODE (dest) == ZERO_EXTRACT
|
|
|
|
|
|| GET_CODE (dest) == STRICT_LOW_PART)
|
|
|
|
|
dest = XEXP (dest, 0);
|
|
|
|
|
|
|
|
|
|
/* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
|
|
|
|
|
each of whose first operand is a register. */
|
|
|
|
|
if (GET_CODE (dest) == PARALLEL)
|
|
|
|
|
{
|
|
|
|
|
for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
|
|
|
|
|
if (XEXP (XVECEXP (dest, 0, i), 0) != 0)
|
|
|
|
|
(*fun) (XEXP (XVECEXP (dest, 0, i), 0), x, data);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
(*fun) (dest, x, data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (GET_CODE (x) == PARALLEL)
|
|
|
|
|
for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
|
|
|
|
|
walk_stores (XVECEXP (x, 0, i), fun, data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_pass_by_reference (cumulative_args_t ca_v ATTRIBUTE_UNUSED,
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
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machine_mode mode ATTRIBUTE_UNUSED,
|
2013-10-01 19:03:46 +02:00
|
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|
const_tree type,
|
|
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|
|
bool named ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
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return (type != 0
|
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&& (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST
|
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|| TREE_ADDRESSABLE (type)));
|
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}
|
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|
2013-11-09 12:42:16 +01:00
|
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|
/* Implement TARGET_CAN_USE_DOLOOP_P. */
|
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|
|
|
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|
static bool
|
2014-05-06 18:25:05 +02:00
|
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arc_can_use_doloop_p (const widest_int &iterations, const widest_int &,
|
2013-11-09 12:42:16 +01:00
|
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|
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unsigned int loop_depth, bool entered_at_top)
|
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|
|
{
|
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if (loop_depth > 1)
|
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return false;
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/* Setting up the loop with two sr instructions costs 6 cycles. */
|
|
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|
if (TARGET_ARC700
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&& !entered_at_top
|
2014-05-06 18:25:05 +02:00
|
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|
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&& wi::gtu_p (iterations, 0)
|
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|
&& wi::leu_p (iterations, flag_pic ? 6 : 3))
|
2013-11-09 12:42:16 +01:00
|
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|
|
return false;
|
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|
return true;
|
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|
}
|
2013-10-01 19:03:46 +02:00
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/* NULL if INSN insn is valid within a low-overhead loop.
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Otherwise return why doloop cannot be applied. */
|
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static const char *
|
Use rtx_insn for various target.def hooks
gcc/
2014-08-27 David Malcolm <dmalcolm@redhat.com>
* target.def (unwind_emit): Strengthen param "insn" from rtx to
rtx_insn *.
(final_postscan_insn): Likewise.
(adjust_cost): Likewise.
(adjust_priority): Likewise.
(variable_issue): Likewise.
(macro_fusion_pair_p): Likewise.
(dfa_post_cycle_insn): Likewise.
(first_cycle_multipass_dfa_lookahead_guard): Likewise.
(first_cycle_multipass_issue): Likewise.
(dfa_new_cycle): Likewise.
(adjust_cost_2): Likewise for params "insn" and "dep_insn".
(speculate_insn): Likewise for param "insn".
(gen_spec_check): Likewise for params "insn" and "label".
(get_insn_spec_ds): Likewise for param "insn".
(get_insn_checked_ds): Likewise.
(dispatch_do): Likewise.
(dispatch): Likewise.
(cannot_copy_insn_p): Likewise.
(invalid_within_doloop): Likewise.
(legitimate_combined_insn): Likewise.
(needed): Likewise.
(after): Likewise.
* doc/tm.texi: Automatically updated to reflect changes to
target.def.
* haifa-sched.c (choose_ready): Convert NULL_RTX to NULL when
working with insn.
(schedule_block): Likewise.
(sched_init): Likewise.
(sched_speculate_insn): Strengthen param "insn" from rtx to
rtx_insn *.
(ready_remove_first_dispatch): Convert NULL_RTX to NULL when
working with insn.
* hooks.c (hook_bool_rtx_true): Rename to...
hook_bool_rtx_insn_true): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_constcharptr_const_rtx_null): Rename to...
(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
first param from const_rtx to const rtx_insn *.
(hook_bool_rtx_int_false): Rename to...
(hook_bool_rtx_insn_int_false): ...this, and strengthen first
param from rtx to rtx_insn *.
(hook_void_rtx_int): Rename to...
(hook_void_rtx_insn_int): ...this, and strengthen first param from
rtx to rtx_insn *.
* hooks.h (hook_bool_rtx_true): Rename to...
(hook_bool_rtx_insn_true): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_bool_rtx_int_false): Rename to...
(hook_bool_rtx_insn_int_false): ...this, and strengthen first
param from rtx to rtx_insn *.
(hook_void_rtx_int): Rename to...
(hook_void_rtx_insn_int): ...this, and strengthen first param from
rtx to rtx_insn *.
(hook_constcharptr_const_rtx_null): Rename to...
(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
first param from const_rtx to const rtx_insn *.
* sched-deps.c (sched_macro_fuse_insns): Strengthen param "insn"
and local "prev" from rtx to rtx_insn *.
* sched-int.h (sched_speculate_insn): Strengthen first param from
rtx to rtx_insn *.
* sel-sched.c (create_speculation_check): Likewise for local "label".
* targhooks.c (default_invalid_within_doloop): Strengthen param
"insn" from const_rtx to const rtx_insn *.
* targhooks.h (default_invalid_within_doloop): Strengthen param
from const_rtx to const rtx_insn *.
* config/alpha/alpha.c (alpha_cannot_copy_insn_p): Likewise.
(alpha_adjust_cost): Likewise for params "insn", "dep_insn".
* config/arc/arc.c (arc_sched_adjust_priority): Likewise for param
"insn".
(arc_invalid_within_doloop): Likewise, with const.
* config/arm/arm.c (arm_adjust_cost): Likewise for params "insn", "dep".
(arm_cannot_copy_insn_p): Likewise for param "insn".
(arm_unwind_emit): Likewise.
* config/bfin/bfin.c (bfin_adjust_cost): Likewise for params "insn",
"dep_insn".
* config/c6x/c6x.c (c6x_dfa_new_cycle): Likewise for param "insn".
(c6x_variable_issue): Likewise. Removed now-redundant checked
cast.
(c6x_adjust_cost): Likewise for params "insn", "dep_insn".
* config/epiphany/epiphany-protos.h (epiphany_mode_needed):
Likewise for param "insn".
(epiphany_mode_after): Likewise.
* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise for
params "insn", "dep_insn".
(epiphany_mode_needed): Likewise for param "insn".
(epiphany_mode_after): Likewise.
* config/i386/i386-protos.h (i386_pe_seh_unwind_emit): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
(ix86_avx_u128_mode_needed): Likewise.
(ix86_i387_mode_needed): Likewise.
(ix86_mode_needed): Likewise.
(ix86_avx_u128_mode_after): Likewise.
(ix86_mode_after): Likewise.
(ix86_adjust_cost): Likewise for params "insn", "dep_insn".
(ix86_macro_fusion_pair_p): Likewise for params "condgen", "condjmp".
(ix86_adjust_priority): Likewise for param "insn".
(core2i7_first_cycle_multipass_issue): Likewise for param "insn".
(do_dispatch): Likewise.
(has_dispatch): Likewise.
* config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.
* config/ia64/ia64.c (TARGET_INVALID_WITHIN_DOLOOP): Update to
reflect renaming of default hook implementation from
hook_constcharptr_const_rtx_null to
hook_constcharptr_const_rtx_insn_null.
(ia64_adjust_cost_2): Strengthen params "insn", "dep_insn" from
rtx to rtx_insn *.
(ia64_variable_issue): Likewise for param "insn".
(ia64_first_cycle_multipass_dfa_lookahead_guard): Likewise.
(ia64_dfa_new_cycle): Likewise.
(ia64_get_insn_spec_ds): Likewise.
(ia64_get_insn_checked_ds): Likewise.
(ia64_speculate_insn): Likewise.
(ia64_gen_spec_check): Likewise for params "insn", "label".
(ia64_asm_unwind_emit): Likewise for param "insn".
* config/m32r/m32r.c (m32r_adjust_priority): Likewise.
* config/m68k/m68k.c (m68k_sched_adjust_cost): Likewise for params
"insn", "def_insn".
(m68k_sched_variable_issue): Likewise for param "insn".
* config/mep/mep.c (mep_adjust_cost): Likewise for params "insn",
"def_insn".
* config/microblaze/microblaze.c (microblaze_adjust_cost):
Likewise for params "insn", "dep".
* config/mips/mips.c (mips_adjust_cost): Likewise.
(mips_variable_issue): Likewise for param "insn".
(mips_final_postscan_insn): Likewise.
* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Likewise
for params "insn", "dep".
* config/pa/pa.c (pa_adjust_cost): Likewise for params "insn",
"dep_insn".
(pa_adjust_priority): Likewise for param "insn".
* config/picochip/picochip.c (picochip_sched_adjust_cost):
Likewise for params "insn", "dep_insn".
* config/rs6000/rs6000.c (rs6000_variable_issue_1): Likewise for
param "insn".
(rs6000_variable_issue): Likewise.
(rs6000_adjust_cost): Likewise for params "insn", "dep_insn".
(rs6000_debug_adjust_cost): Likewise.
(rs6000_adjust_priority): Likewise for param "insn".
(rs6000_use_sched_lookahead_guard): Likewise.
(get_next_active_insn): Likewise for return type and both params.
(redefine_groups): Likewise for params "prev_head_insn", "tail"
and locals "insn", "next_insn".
(pad_groups): Likewise.
* config/s390/s390.c (s390_adjust_priority): Likewise for param
"insn".
(s390_cannot_copy_insn_p): Likewise.
(s390_sched_variable_issue): Likewise for third param, eliminating
checked cast.
(TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of
default hook implementation from hook_constcharptr_const_rtx_null
to hook_constcharptr_const_rtx_insn_null.
* config/sh/sh.c (sh_cannot_copy_insn_p): Strengthen param "insn"
from rtx to rtx_insn *.
(sh_adjust_cost): Likewise for params "insn", "dep_insn".
(sh_variable_issue): Likewise for param "insn".
(sh_dfa_new_cycle): Likewise.
(sh_mode_needed): Likewise.
(sh_mode_after): Likewise.
* config/sparc/sparc.c (supersparc_adjust_cost): Likewise for
params "insn", "dep_insn".
(hypersparc_adjust_cost): Likewise.
(sparc_adjust_cost): Likewise.
* config/spu/spu.c (spu_sched_variable_issue): Likewise for third
param, eliminated checked cast.
(spu_sched_adjust_cost): Likewise for first and third params.
* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Strengthen
params "insn" and "dep_insn" from rtx to rtx_insn *.
* config/tilepro/tilepro.c (tilepro_sched_adjust_cost): Likewise.
From-SVN: r214584
2014-08-27 21:34:13 +02:00
|
|
|
|
arc_invalid_within_doloop (const rtx_insn *insn)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (CALL_P (insn))
|
|
|
|
|
return "Function call in the loop.";
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int arc_reorg_in_progress = 0;
|
|
|
|
|
|
|
|
|
|
/* ARC's machince specific reorg function. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_reorg (void)
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *insn;
|
|
|
|
|
rtx pattern;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
rtx pc_target;
|
|
|
|
|
long offset;
|
|
|
|
|
int changed;
|
|
|
|
|
|
|
|
|
|
cfun->machine->arc_reorg_started = 1;
|
|
|
|
|
arc_reorg_in_progress = 1;
|
|
|
|
|
|
|
|
|
|
/* Emit special sections for profiling. */
|
|
|
|
|
if (crtl->profile)
|
|
|
|
|
{
|
|
|
|
|
section *save_text_section;
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *insn;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int size = get_max_uid () >> 4;
|
|
|
|
|
htab_t htab = htab_create (size, unspec_prof_hash, unspec_prof_htab_eq,
|
|
|
|
|
NULL);
|
|
|
|
|
|
|
|
|
|
save_text_section = in_section;
|
|
|
|
|
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
|
|
|
|
|
if (NONJUMP_INSN_P (insn))
|
|
|
|
|
walk_stores (PATTERN (insn), write_profile_sections, htab);
|
|
|
|
|
if (htab_elements (htab))
|
|
|
|
|
in_section = 0;
|
|
|
|
|
switch_to_section (save_text_section);
|
|
|
|
|
htab_delete (htab);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Link up loop ends with their loop start. */
|
|
|
|
|
{
|
|
|
|
|
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
|
|
|
|
|
if (GET_CODE (insn) == JUMP_INSN
|
|
|
|
|
&& recog_memoized (insn) == CODE_FOR_doloop_end_i)
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *top_label
|
|
|
|
|
= as_a <rtx_insn *> (XEXP (XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 1), 0));
|
2013-10-01 19:03:46 +02:00
|
|
|
|
rtx num = GEN_INT (CODE_LABEL_NUMBER (top_label));
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *lp, *prev = prev_nonnote_insn (top_label);
|
|
|
|
|
rtx_insn *lp_simple = NULL;
|
|
|
|
|
rtx_insn *next = NULL;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
rtx op0 = XEXP (XVECEXP (PATTERN (insn), 0, 1), 0);
|
|
|
|
|
HOST_WIDE_INT loop_end_id
|
|
|
|
|
= -INTVAL (XEXP (XVECEXP (PATTERN (insn), 0, 4), 0));
|
|
|
|
|
int seen_label = 0;
|
|
|
|
|
|
|
|
|
|
for (lp = prev;
|
|
|
|
|
(lp && NONJUMP_INSN_P (lp)
|
|
|
|
|
&& recog_memoized (lp) != CODE_FOR_doloop_begin_i);
|
|
|
|
|
lp = prev_nonnote_insn (lp))
|
|
|
|
|
;
|
|
|
|
|
if (!lp || !NONJUMP_INSN_P (lp)
|
|
|
|
|
|| dead_or_set_regno_p (lp, LP_COUNT))
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
for (prev = next = insn, lp = NULL ; prev || next;)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (prev)
|
|
|
|
|
{
|
|
|
|
|
if (NONJUMP_INSN_P (prev)
|
|
|
|
|
&& recog_memoized (prev) == CODE_FOR_doloop_begin_i
|
|
|
|
|
&& (INTVAL (XEXP (XVECEXP (PATTERN (prev), 0, 5), 0))
|
|
|
|
|
== loop_end_id))
|
|
|
|
|
{
|
|
|
|
|
lp = prev;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
else if (LABEL_P (prev))
|
|
|
|
|
seen_label = 1;
|
|
|
|
|
prev = prev_nonnote_insn (prev);
|
|
|
|
|
}
|
|
|
|
|
if (next)
|
|
|
|
|
{
|
|
|
|
|
if (NONJUMP_INSN_P (next)
|
|
|
|
|
&& recog_memoized (next) == CODE_FOR_doloop_begin_i
|
|
|
|
|
&& (INTVAL (XEXP (XVECEXP (PATTERN (next), 0, 5), 0))
|
|
|
|
|
== loop_end_id))
|
|
|
|
|
{
|
|
|
|
|
lp = next;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
next = next_nonnote_insn (next);
|
|
|
|
|
}
|
|
|
|
|
}
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
prev = NULL;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
lp_simple = lp;
|
|
|
|
|
if (lp && !dead_or_set_regno_p (lp, LP_COUNT))
|
|
|
|
|
{
|
|
|
|
|
rtx begin_cnt = XEXP (XVECEXP (PATTERN (lp), 0 ,3), 0);
|
|
|
|
|
if (INTVAL (XEXP (XVECEXP (PATTERN (lp), 0, 4), 0)))
|
|
|
|
|
/* The loop end insn has been duplicated. That can happen
|
|
|
|
|
when there is a conditional block at the very end of
|
|
|
|
|
the loop. */
|
|
|
|
|
goto failure;
|
|
|
|
|
/* If Register allocation failed to allocate to the right
|
|
|
|
|
register, There is no point into teaching reload to
|
|
|
|
|
fix this up with reloads, as that would cost more
|
|
|
|
|
than using an ordinary core register with the
|
|
|
|
|
doloop_fallback pattern. */
|
|
|
|
|
if ((true_regnum (op0) != LP_COUNT || !REG_P (begin_cnt))
|
|
|
|
|
/* Likewise, if the loop setup is evidently inside the loop,
|
|
|
|
|
we loose. */
|
|
|
|
|
|| (!lp_simple && lp != next && !seen_label))
|
|
|
|
|
{
|
|
|
|
|
remove_insn (lp);
|
|
|
|
|
goto failure;
|
|
|
|
|
}
|
|
|
|
|
/* It is common that the optimizers copy the loop count from
|
|
|
|
|
another register, and doloop_begin_i is stuck with the
|
|
|
|
|
source of the move. Making doloop_begin_i only accept "l"
|
|
|
|
|
is nonsentical, as this then makes reload evict the pseudo
|
|
|
|
|
used for the loop end. The underlying cause is that the
|
|
|
|
|
optimizers don't understand that the register allocation for
|
|
|
|
|
doloop_begin_i should be treated as part of the loop.
|
|
|
|
|
Try to work around this problem by verifying the previous
|
|
|
|
|
move exists. */
|
|
|
|
|
if (true_regnum (begin_cnt) != LP_COUNT)
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *mov;
|
|
|
|
|
rtx set, note;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
for (mov = prev_nonnote_insn (lp); mov;
|
|
|
|
|
mov = prev_nonnote_insn (mov))
|
|
|
|
|
{
|
|
|
|
|
if (!NONJUMP_INSN_P (mov))
|
|
|
|
|
mov = 0;
|
|
|
|
|
else if ((set = single_set (mov))
|
|
|
|
|
&& rtx_equal_p (SET_SRC (set), begin_cnt)
|
|
|
|
|
&& rtx_equal_p (SET_DEST (set), op0))
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
if (mov)
|
|
|
|
|
{
|
|
|
|
|
XEXP (XVECEXP (PATTERN (lp), 0 ,3), 0) = op0;
|
|
|
|
|
note = find_regno_note (lp, REG_DEAD, REGNO (begin_cnt));
|
|
|
|
|
if (note)
|
|
|
|
|
remove_note (lp, note);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
remove_insn (lp);
|
|
|
|
|
goto failure;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
XEXP (XVECEXP (PATTERN (insn), 0, 4), 0) = num;
|
|
|
|
|
XEXP (XVECEXP (PATTERN (lp), 0, 4), 0) = num;
|
|
|
|
|
if (next == lp)
|
|
|
|
|
XEXP (XVECEXP (PATTERN (lp), 0, 6), 0) = const2_rtx;
|
|
|
|
|
else if (!lp_simple)
|
|
|
|
|
XEXP (XVECEXP (PATTERN (lp), 0, 6), 0) = const1_rtx;
|
|
|
|
|
else if (prev != lp)
|
|
|
|
|
{
|
|
|
|
|
remove_insn (lp);
|
|
|
|
|
add_insn_after (lp, prev, NULL);
|
|
|
|
|
}
|
|
|
|
|
if (!lp_simple)
|
|
|
|
|
{
|
|
|
|
|
XEXP (XVECEXP (PATTERN (lp), 0, 7), 0)
|
|
|
|
|
= gen_rtx_LABEL_REF (Pmode, top_label);
|
|
|
|
|
add_reg_note (lp, REG_LABEL_OPERAND, top_label);
|
|
|
|
|
LABEL_NUSES (top_label)++;
|
|
|
|
|
}
|
|
|
|
|
/* We can avoid tedious loop start / end setting for empty loops
|
|
|
|
|
be merely setting the loop count to its final value. */
|
|
|
|
|
if (next_active_insn (top_label) == insn)
|
|
|
|
|
{
|
|
|
|
|
rtx lc_set
|
|
|
|
|
= gen_rtx_SET (VOIDmode,
|
|
|
|
|
XEXP (XVECEXP (PATTERN (lp), 0, 3), 0),
|
|
|
|
|
const0_rtx);
|
|
|
|
|
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *lc_set_insn = emit_insn_before (lc_set, insn);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
delete_insn (lp);
|
|
|
|
|
delete_insn (insn);
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
insn = lc_set_insn;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
/* If the loop is non-empty with zero length, we can't make it
|
|
|
|
|
a zero-overhead loop. That can happen for empty asms. */
|
|
|
|
|
else
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *scan;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
for (scan = top_label;
|
|
|
|
|
(scan && scan != insn
|
|
|
|
|
&& (!NONJUMP_INSN_P (scan) || !get_attr_length (scan)));
|
|
|
|
|
scan = NEXT_INSN (scan));
|
|
|
|
|
if (scan == insn)
|
|
|
|
|
{
|
|
|
|
|
remove_insn (lp);
|
|
|
|
|
goto failure;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Sometimes the loop optimizer makes a complete hash of the
|
|
|
|
|
loop. If it were only that the loop is not entered at the
|
|
|
|
|
top, we could fix this up by setting LP_START with SR .
|
|
|
|
|
However, if we can't find the loop begin were it should be,
|
|
|
|
|
chances are that it does not even dominate the loop, but is
|
|
|
|
|
inside the loop instead. Using SR there would kill
|
|
|
|
|
performance.
|
|
|
|
|
We use the doloop_fallback pattern here, which executes
|
|
|
|
|
in two cycles on the ARC700 when predicted correctly. */
|
|
|
|
|
failure:
|
|
|
|
|
if (!REG_P (op0))
|
|
|
|
|
{
|
|
|
|
|
rtx op3 = XEXP (XVECEXP (PATTERN (insn), 0, 5), 0);
|
|
|
|
|
|
|
|
|
|
emit_insn_before (gen_move_insn (op3, op0), insn);
|
|
|
|
|
PATTERN (insn)
|
|
|
|
|
= gen_doloop_fallback_m (op3, JUMP_LABEL (insn), op0);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
XVEC (PATTERN (insn), 0)
|
|
|
|
|
= gen_rtvec (2, XVECEXP (PATTERN (insn), 0, 0),
|
|
|
|
|
XVECEXP (PATTERN (insn), 0, 1));
|
|
|
|
|
INSN_CODE (insn) = -1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* FIXME: should anticipate ccfsm action, generate special patterns for
|
|
|
|
|
to-be-deleted branches that have no delay slot and have at least the
|
|
|
|
|
length of the size increase forced on other insns that are conditionalized.
|
|
|
|
|
This can also have an insn_list inside that enumerates insns which are
|
|
|
|
|
not actually conditionalized because the destinations are dead in the
|
|
|
|
|
not-execute case.
|
|
|
|
|
Could also tag branches that we want to be unaligned if they get no delay
|
|
|
|
|
slot, or even ones that we don't want to do delay slot sheduling for
|
|
|
|
|
because we can unalign them.
|
|
|
|
|
|
|
|
|
|
However, there are cases when conditional execution is only possible after
|
|
|
|
|
delay slot scheduling:
|
|
|
|
|
|
|
|
|
|
- If a delay slot is filled with a nocond/set insn from above, the previous
|
|
|
|
|
basic block can become elegible for conditional execution.
|
|
|
|
|
- If a delay slot is filled with a nocond insn from the fall-through path,
|
|
|
|
|
the branch with that delay slot can become eligble for conditional
|
|
|
|
|
execution (however, with the same sort of data flow analysis that dbr
|
|
|
|
|
does, we could have figured out before that we don't need to
|
|
|
|
|
conditionalize this insn.)
|
|
|
|
|
- If a delay slot insn is filled with an insn from the target, the
|
|
|
|
|
target label gets its uses decremented (even deleted if falling to zero),
|
|
|
|
|
thus possibly creating more condexec opportunities there.
|
|
|
|
|
Therefore, we should still be prepared to apply condexec optimization on
|
|
|
|
|
non-prepared branches if the size increase of conditionalized insns is no
|
|
|
|
|
more than the size saved from eliminating the branch. An invocation option
|
|
|
|
|
could also be used to reserve a bit of extra size for condbranches so that
|
|
|
|
|
this'll work more often (could also test in arc_reorg if the block is
|
|
|
|
|
'close enough' to be eligible for condexec to make this likely, and
|
|
|
|
|
estimate required size increase). */
|
|
|
|
|
/* Generate BRcc insns, by combining cmp and Bcc insns wherever possible. */
|
|
|
|
|
if (TARGET_NO_BRCC_SET)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
do
|
|
|
|
|
{
|
|
|
|
|
init_insn_lengths();
|
|
|
|
|
changed = 0;
|
|
|
|
|
|
|
|
|
|
if (optimize > 1 && !TARGET_NO_COND_EXEC)
|
|
|
|
|
{
|
|
|
|
|
arc_ifcvt ();
|
|
|
|
|
unsigned int flags = pass_data_arc_ifcvt.todo_flags_finish;
|
|
|
|
|
df_finish_pass ((flags & TODO_df_verify) != 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Call shorten_branches to calculate the insn lengths. */
|
|
|
|
|
shorten_branches (get_insns());
|
|
|
|
|
cfun->machine->ccfsm_current_insn = NULL_RTX;
|
|
|
|
|
|
|
|
|
|
if (!INSN_ADDRESSES_SET_P())
|
|
|
|
|
fatal_error ("Insn addresses not set after shorten_branches");
|
|
|
|
|
|
|
|
|
|
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
|
|
|
|
|
{
|
|
|
|
|
rtx label;
|
|
|
|
|
enum attr_type insn_type;
|
|
|
|
|
|
|
|
|
|
/* If a non-jump insn (or a casesi jump table), continue. */
|
|
|
|
|
if (GET_CODE (insn) != JUMP_INSN ||
|
|
|
|
|
GET_CODE (PATTERN (insn)) == ADDR_VEC
|
|
|
|
|
|| GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* If we already have a brcc, note if it is suitable for brcc_s.
|
|
|
|
|
Be a bit generous with the brcc_s range so that we can take
|
|
|
|
|
advantage of any code shortening from delay slot scheduling. */
|
|
|
|
|
if (recog_memoized (insn) == CODE_FOR_cbranchsi4_scratch)
|
|
|
|
|
{
|
|
|
|
|
rtx pat = PATTERN (insn);
|
|
|
|
|
rtx op = XEXP (SET_SRC (XVECEXP (pat, 0, 0)), 0);
|
|
|
|
|
rtx *ccp = &XEXP (XVECEXP (pat, 0, 1), 0);
|
|
|
|
|
|
|
|
|
|
offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn));
|
|
|
|
|
if ((offset >= -140 && offset < 140)
|
|
|
|
|
&& rtx_equal_p (XEXP (op, 1), const0_rtx)
|
|
|
|
|
&& compact_register_operand (XEXP (op, 0), VOIDmode)
|
|
|
|
|
&& equality_comparison_operator (op, VOIDmode))
|
|
|
|
|
PUT_MODE (*ccp, CC_Zmode);
|
|
|
|
|
else if (GET_MODE (*ccp) == CC_Zmode)
|
|
|
|
|
PUT_MODE (*ccp, CC_ZNmode);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
if ((insn_type = get_attr_type (insn)) == TYPE_BRCC
|
|
|
|
|
|| insn_type == TYPE_BRCC_NO_DELAY_SLOT)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* OK. so we have a jump insn. */
|
|
|
|
|
/* We need to check that it is a bcc. */
|
|
|
|
|
/* Bcc => set (pc) (if_then_else ) */
|
|
|
|
|
pattern = PATTERN (insn);
|
|
|
|
|
if (GET_CODE (pattern) != SET
|
|
|
|
|
|| GET_CODE (SET_SRC (pattern)) != IF_THEN_ELSE
|
|
|
|
|
|| ANY_RETURN_P (XEXP (SET_SRC (pattern), 1)))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* Now check if the jump is beyond the s9 range. */
|
2014-05-19 08:49:58 +02:00
|
|
|
|
if (CROSSING_JUMP_P (insn))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
continue;
|
|
|
|
|
offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn));
|
|
|
|
|
|
|
|
|
|
if(offset > 253 || offset < -254)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
pc_target = SET_SRC (pattern);
|
|
|
|
|
|
|
|
|
|
/* Now go back and search for the set cc insn. */
|
|
|
|
|
|
|
|
|
|
label = XEXP (pc_target, 1);
|
|
|
|
|
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx pat;
|
|
|
|
|
rtx_insn *scan, *link_insn = NULL;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
for (scan = PREV_INSN (insn);
|
|
|
|
|
scan && GET_CODE (scan) != CODE_LABEL;
|
|
|
|
|
scan = PREV_INSN (scan))
|
|
|
|
|
{
|
|
|
|
|
if (! INSN_P (scan))
|
|
|
|
|
continue;
|
|
|
|
|
pat = PATTERN (scan);
|
|
|
|
|
if (GET_CODE (pat) == SET
|
|
|
|
|
&& cc_register (SET_DEST (pat), VOIDmode))
|
|
|
|
|
{
|
|
|
|
|
link_insn = scan;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (! link_insn)
|
|
|
|
|
continue;
|
|
|
|
|
else
|
|
|
|
|
/* Check if this is a data dependency. */
|
|
|
|
|
{
|
|
|
|
|
rtx op, cc_clob_rtx, op0, op1, brcc_insn, note;
|
|
|
|
|
rtx cmp0, cmp1;
|
|
|
|
|
|
|
|
|
|
/* Ok this is the set cc. copy args here. */
|
|
|
|
|
op = XEXP (pc_target, 0);
|
|
|
|
|
|
|
|
|
|
op0 = cmp0 = XEXP (SET_SRC (pat), 0);
|
|
|
|
|
op1 = cmp1 = XEXP (SET_SRC (pat), 1);
|
|
|
|
|
if (GET_CODE (op0) == ZERO_EXTRACT
|
|
|
|
|
&& XEXP (op0, 1) == const1_rtx
|
|
|
|
|
&& (GET_CODE (op) == EQ
|
|
|
|
|
|| GET_CODE (op) == NE))
|
|
|
|
|
{
|
|
|
|
|
/* btst / b{eq,ne} -> bbit{0,1} */
|
|
|
|
|
op0 = XEXP (cmp0, 0);
|
|
|
|
|
op1 = XEXP (cmp0, 2);
|
|
|
|
|
}
|
|
|
|
|
else if (!register_operand (op0, VOIDmode)
|
|
|
|
|
|| !general_operand (op1, VOIDmode))
|
|
|
|
|
continue;
|
|
|
|
|
/* Be careful not to break what cmpsfpx_raw is
|
|
|
|
|
trying to create for checking equality of
|
|
|
|
|
single-precision floats. */
|
|
|
|
|
else if (TARGET_SPFP
|
|
|
|
|
&& GET_MODE (op0) == SFmode
|
|
|
|
|
&& GET_MODE (op1) == SFmode)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* None of the two cmp operands should be set between the
|
|
|
|
|
cmp and the branch. */
|
|
|
|
|
if (reg_set_between_p (op0, link_insn, insn))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (reg_set_between_p (op1, link_insn, insn))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* Since the MODE check does not work, check that this is
|
|
|
|
|
CC reg's last set location before insn, and also no
|
|
|
|
|
instruction between the cmp and branch uses the
|
|
|
|
|
condition codes. */
|
|
|
|
|
if ((reg_set_between_p (SET_DEST (pat), link_insn, insn))
|
|
|
|
|
|| (reg_used_between_p (SET_DEST (pat), link_insn, insn)))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* CC reg should be dead after insn. */
|
|
|
|
|
if (!find_regno_note (insn, REG_DEAD, CC_REG))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
op = gen_rtx_fmt_ee (GET_CODE (op),
|
|
|
|
|
GET_MODE (op), cmp0, cmp1);
|
|
|
|
|
/* If we create a LIMM where there was none before,
|
|
|
|
|
we only benefit if we can avoid a scheduling bubble
|
|
|
|
|
for the ARC600. Otherwise, we'd only forgo chances
|
|
|
|
|
at short insn generation, and risk out-of-range
|
|
|
|
|
branches. */
|
|
|
|
|
if (!brcc_nolimm_operator (op, VOIDmode)
|
|
|
|
|
&& !long_immediate_operand (op1, VOIDmode)
|
|
|
|
|
&& (TARGET_ARC700
|
|
|
|
|
|| next_active_insn (link_insn) != insn))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* Emit bbit / brcc (or brcc_s if possible).
|
|
|
|
|
CC_Zmode indicates that brcc_s is possible. */
|
|
|
|
|
|
|
|
|
|
if (op0 != cmp0)
|
|
|
|
|
cc_clob_rtx = gen_rtx_REG (CC_ZNmode, CC_REG);
|
|
|
|
|
else if ((offset >= -140 && offset < 140)
|
|
|
|
|
&& rtx_equal_p (op1, const0_rtx)
|
|
|
|
|
&& compact_register_operand (op0, VOIDmode)
|
|
|
|
|
&& (GET_CODE (op) == EQ
|
|
|
|
|
|| GET_CODE (op) == NE))
|
|
|
|
|
cc_clob_rtx = gen_rtx_REG (CC_Zmode, CC_REG);
|
|
|
|
|
else
|
|
|
|
|
cc_clob_rtx = gen_rtx_REG (CCmode, CC_REG);
|
|
|
|
|
|
|
|
|
|
brcc_insn
|
|
|
|
|
= gen_rtx_IF_THEN_ELSE (VOIDmode, op, label, pc_rtx);
|
|
|
|
|
brcc_insn = gen_rtx_SET (VOIDmode, pc_rtx, brcc_insn);
|
|
|
|
|
cc_clob_rtx = gen_rtx_CLOBBER (VOIDmode, cc_clob_rtx);
|
|
|
|
|
brcc_insn
|
|
|
|
|
= gen_rtx_PARALLEL
|
|
|
|
|
(VOIDmode, gen_rtvec (2, brcc_insn, cc_clob_rtx));
|
|
|
|
|
brcc_insn = emit_jump_insn_before (brcc_insn, insn);
|
|
|
|
|
|
|
|
|
|
JUMP_LABEL (brcc_insn) = JUMP_LABEL (insn);
|
|
|
|
|
note = find_reg_note (insn, REG_BR_PROB, 0);
|
|
|
|
|
if (note)
|
|
|
|
|
{
|
|
|
|
|
XEXP (note, 1) = REG_NOTES (brcc_insn);
|
|
|
|
|
REG_NOTES (brcc_insn) = note;
|
|
|
|
|
}
|
|
|
|
|
note = find_reg_note (link_insn, REG_DEAD, op0);
|
|
|
|
|
if (note)
|
|
|
|
|
{
|
|
|
|
|
remove_note (link_insn, note);
|
|
|
|
|
XEXP (note, 1) = REG_NOTES (brcc_insn);
|
|
|
|
|
REG_NOTES (brcc_insn) = note;
|
|
|
|
|
}
|
|
|
|
|
note = find_reg_note (link_insn, REG_DEAD, op1);
|
|
|
|
|
if (note)
|
|
|
|
|
{
|
|
|
|
|
XEXP (note, 1) = REG_NOTES (brcc_insn);
|
|
|
|
|
REG_NOTES (brcc_insn) = note;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
changed = 1;
|
|
|
|
|
|
|
|
|
|
/* Delete the bcc insn. */
|
|
|
|
|
set_insn_deleted (insn);
|
|
|
|
|
|
|
|
|
|
/* Delete the cmp insn. */
|
|
|
|
|
set_insn_deleted (link_insn);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* Clear out insn_addresses. */
|
|
|
|
|
INSN_ADDRESSES_FREE ();
|
|
|
|
|
|
|
|
|
|
} while (changed);
|
|
|
|
|
|
|
|
|
|
if (INSN_ADDRESSES_SET_P())
|
|
|
|
|
fatal_error ("insn addresses not freed");
|
|
|
|
|
|
|
|
|
|
arc_reorg_in_progress = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check if the operands are valid for BRcc.d generation
|
|
|
|
|
Valid Brcc.d patterns are
|
|
|
|
|
Brcc.d b, c, s9
|
|
|
|
|
Brcc.d b, u6, s9
|
|
|
|
|
|
|
|
|
|
For cc={GT, LE, GTU, LEU}, u6=63 can not be allowed,
|
|
|
|
|
since they are encoded by the assembler as {GE, LT, HS, LS} 64, which
|
|
|
|
|
does not have a delay slot
|
|
|
|
|
|
|
|
|
|
Assumed precondition: Second operand is either a register or a u6 value. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
valid_brcc_with_delay_p (rtx *operands)
|
|
|
|
|
{
|
|
|
|
|
if (optimize_size && GET_MODE (operands[4]) == CC_Zmode)
|
|
|
|
|
return false;
|
|
|
|
|
return brcc_nolimm_operator (operands[0], VOIDmode);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* ??? Hack. This should no really be here. See PR32143. */
|
|
|
|
|
static bool
|
|
|
|
|
arc_decl_anon_ns_mem_p (const_tree decl)
|
|
|
|
|
{
|
|
|
|
|
while (1)
|
|
|
|
|
{
|
|
|
|
|
if (decl == NULL_TREE || decl == error_mark_node)
|
|
|
|
|
return false;
|
|
|
|
|
if (TREE_CODE (decl) == NAMESPACE_DECL
|
|
|
|
|
&& DECL_NAME (decl) == NULL_TREE)
|
|
|
|
|
return true;
|
|
|
|
|
/* Classes and namespaces inside anonymous namespaces have
|
|
|
|
|
TREE_PUBLIC == 0, so we can shortcut the search. */
|
|
|
|
|
else if (TYPE_P (decl))
|
|
|
|
|
return (TREE_PUBLIC (TYPE_NAME (decl)) == 0);
|
|
|
|
|
else if (TREE_CODE (decl) == NAMESPACE_DECL)
|
|
|
|
|
return (TREE_PUBLIC (decl) == 0);
|
|
|
|
|
else
|
|
|
|
|
decl = DECL_CONTEXT (decl);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement TARGET_IN_SMALL_DATA_P. Return true if it would be safe to
|
|
|
|
|
access DECL using %gp_rel(...)($gp). */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_in_small_data_p (const_tree decl)
|
|
|
|
|
{
|
|
|
|
|
HOST_WIDE_INT size;
|
|
|
|
|
|
|
|
|
|
if (TREE_CODE (decl) == STRING_CST || TREE_CODE (decl) == FUNCTION_DECL)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* We don't yet generate small-data references for -mabicalls. See related
|
|
|
|
|
-G handling in override_options. */
|
|
|
|
|
if (TARGET_NO_SDATA_SET)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if (TREE_CODE (decl) == VAR_DECL && DECL_SECTION_NAME (decl) != 0)
|
|
|
|
|
{
|
|
|
|
|
const char *name;
|
|
|
|
|
|
|
|
|
|
/* Reject anything that isn't in a known small-data section. */
|
symtab.c (section_hash): New hash.
* symtab.c (section_hash): New hash.
(symtab_unregister_node): Clear section before freeing.
(hash_section_hash_entry): New haser.
(eq_sections): New function.
(symtab_node::set_section_for_node): New method.
(set_section_1): Update.
(symtab_node::set_section): Take string instead of tree as parameter.
(symtab_resolve_alias): Update.
* cgraph.h (section_hash_entry_d): New structure.
(section_hash_entry): New typedef.
(cgraph_node): Change comdat_group_ to x_comdat_group,
change section_ to x_section and turn into section_hash_entry;
update accestors; put set_section_for_node offline.
* tree.c (decl_section_name): Turn into string.
(set_decl_section_name): Change parameter to be string.
* tree.h (decl_section_name, set_decl_section_name): Update prototypes.
* sdbout.c (sdbout_one_type): Update.
* tree-vect-data-refs.c (vect_can_force_dr_alignment_p): Update.
* varasm.c (IN_NAMED_SECTION, get_named_section, resolve_unique_section,
hot_function_section, get_named_text_section, USE_SELECT_SECTION_FOR_FUNCTIONS,
default_function_rodata_section, make_decl_rtl, default_unique_section):
Update.
* config/c6x/c6x.c (c6x_in_small_data_p): Update.
(c6x_elf_unique_section): Update.
* config/nios2/nios2.c (nios2_in_small_data_p): Update.
* config/pa/pa.c (pa_function_section): Update.
* config/pa/pa.h (IN_NAMED_SECTION_P): Update.
* config/ia64/ia64.c (ia64_in_small_data_p): Update.
* config/arc/arc.c (arc_in_small_data_p): Update.
* config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Update.
* config/mcore/mcore.c (mcore_unique_section): Update.
* config/mips/mips.c (mips16_build_function_stub): Update.
(mips16_build_call_stub): Update.
(mips_function_rodata_section): Update.
(mips_in_small_data_p): Update.
* config/score/score.c (score_in_small_data_p): Update.
* config/rx/rx.c (rx_in_small_data): Update.
* config/rs6000/rs6000.c (rs6000_elf_in_small_data_p): Update.
(rs6000_xcoff_asm_named_section): Update.
(rs6000_xcoff_unique_section): Update.
* config/frv/frv.c (frv_string_begins_with): Update.
(frv_in_small_data_p): Update.
* config/v850/v850.c (v850_encode_data_area): Update.
* config/bfin/bfin.c (DECL_SECTION_NAME): Update.
(bfin_handle_l1_data_attribute): Update.
(bfin_handle_l2_attribute): Update.
* config/mep/mep.c (mep_unique_section): Update.
* config/microblaze/microblaze.c (microblaze_elf_in_small_data_p): Update.
* config/h8300/h8300.c (h8300_handle_eightbit_data_attribute): Update.
(h8300_handle_tiny_data_attribute): Update.
* config/m32r/m32r.c (m32r_in_small_data_p): Update.
(m32r_in_small_data_p): Update.
* config/alpha/alpha.c (alpha_in_small_data_p): Update.
* config/i386/i386.c (ix86_in_large_data_p): Update.
* config/i386/winnt.c (i386_pe_unique_section): Update.
* config/darwin.c (darwin_function_section): Update.
* config/lm32/lm32.c (lm32_in_small_data_p): Update.
* tree-emutls.c (get_emutls_init_templ_addr): Update.
(new_emutls_decl): Update.
* lto-cgraph.c (lto_output_node, input_node, input_varpool_node,
input_varpool_node): Update.
(ead_string_cst): Turn to ...
(read_string): ... this one.
* dwarf2out.c (secname_for_decl): Update.
* asan.c (asan_protect_global): Update.
* c-family/c-common.c (handle_section_attribute): Update handling for
section names that are no longer trees.
* java/class.c (build_utf8_ref): Update handling for section names
that are no longer trees.
(emit_register_classes_in_jcr_section): Update.
* vtable-class-hierarchy.c: Update handling for section names
that are no longer trees.
* decl.c (duplicate_decls): Likewise.
* gcc-interface/utils.c: Update handling for section names
that are no longer trees.
From-SVN: r211489
2014-06-12 06:03:49 +02:00
|
|
|
|
name = DECL_SECTION_NAME (decl);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (strcmp (name, ".sdata") != 0 && strcmp (name, ".sbss") != 0)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
/* If a symbol is defined externally, the assembler will use the
|
|
|
|
|
usual -G rules when deciding how to implement macros. */
|
|
|
|
|
if (!DECL_EXTERNAL (decl))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
/* Only global variables go into sdata section for now. */
|
|
|
|
|
else if (1)
|
|
|
|
|
{
|
|
|
|
|
/* Don't put constants into the small data section: we want them
|
|
|
|
|
to be in ROM rather than RAM. */
|
|
|
|
|
if (TREE_CODE (decl) != VAR_DECL)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if (TREE_READONLY (decl)
|
|
|
|
|
&& !TREE_SIDE_EFFECTS (decl)
|
|
|
|
|
&& (!DECL_INITIAL (decl) || TREE_CONSTANT (DECL_INITIAL (decl))))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
/* TREE_PUBLIC might change after the first call, because of the patch
|
|
|
|
|
for PR19238. */
|
|
|
|
|
if (default_binds_local_p_1 (decl, 1)
|
|
|
|
|
|| arc_decl_anon_ns_mem_p (decl))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
/* To ensure -mvolatile-cache works
|
|
|
|
|
ld.di does not have a gp-relative variant. */
|
|
|
|
|
if (TREE_THIS_VOLATILE (decl))
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Disable sdata references to weak variables. */
|
|
|
|
|
if (DECL_WEAK (decl))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
size = int_size_in_bytes (TREE_TYPE (decl));
|
|
|
|
|
|
|
|
|
|
/* if (AGGREGATE_TYPE_P (TREE_TYPE (decl))) */
|
|
|
|
|
/* return false; */
|
|
|
|
|
|
|
|
|
|
/* Allow only <=4B long data types into sdata. */
|
|
|
|
|
return (size > 0 && size <= 4);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if X is a small data address that can be rewritten
|
|
|
|
|
as a gp+symref. */
|
|
|
|
|
|
|
|
|
|
static bool
|
2014-11-02 21:00:12 +01:00
|
|
|
|
arc_rewrite_small_data_p (const_rtx x)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (x) == CONST)
|
|
|
|
|
x = XEXP (x, 0);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == PLUS)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
|
|
|
|
|
x = XEXP (x, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return (GET_CODE (x) == SYMBOL_REF
|
|
|
|
|
&& SYMBOL_REF_SMALL_P(x));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If possible, rewrite OP so that it refers to small data using
|
|
|
|
|
explicit relocations. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
arc_rewrite_small_data (rtx op)
|
|
|
|
|
{
|
|
|
|
|
op = copy_insn (op);
|
2014-11-02 21:00:05 +01:00
|
|
|
|
subrtx_ptr_iterator::array_type array;
|
|
|
|
|
FOR_EACH_SUBRTX_PTR (iter, array, &op, ALL)
|
|
|
|
|
{
|
|
|
|
|
rtx *loc = *iter;
|
|
|
|
|
if (arc_rewrite_small_data_p (*loc))
|
|
|
|
|
{
|
|
|
|
|
gcc_assert (SDATA_BASE_REGNUM == PIC_OFFSET_TABLE_REGNUM);
|
|
|
|
|
*loc = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, *loc);
|
|
|
|
|
if (loc != &op)
|
|
|
|
|
{
|
|
|
|
|
if (GET_CODE (op) == MEM && &XEXP (op, 0) == loc)
|
|
|
|
|
; /* OK. */
|
|
|
|
|
else if (GET_CODE (op) == MEM
|
|
|
|
|
&& GET_CODE (XEXP (op, 0)) == PLUS
|
|
|
|
|
&& GET_CODE (XEXP (XEXP (op, 0), 0)) == MULT)
|
|
|
|
|
*loc = force_reg (Pmode, *loc);
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
iter.skip_subrtxes ();
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (*loc) == PLUS
|
|
|
|
|
&& rtx_equal_p (XEXP (*loc, 0), pic_offset_table_rtx))
|
|
|
|
|
iter.skip_subrtxes ();
|
|
|
|
|
}
|
2013-10-01 19:03:46 +02:00
|
|
|
|
return op;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if OP refers to small data symbols directly, not through
|
|
|
|
|
a PLUS. */
|
|
|
|
|
|
|
|
|
|
bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
small_data_pattern (rtx op, machine_mode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
2014-11-02 21:00:12 +01:00
|
|
|
|
if (GET_CODE (op) == SEQUENCE)
|
|
|
|
|
return false;
|
|
|
|
|
subrtx_iterator::array_type array;
|
|
|
|
|
FOR_EACH_SUBRTX (iter, array, op, ALL)
|
|
|
|
|
{
|
|
|
|
|
const_rtx x = *iter;
|
|
|
|
|
if (GET_CODE (x) == PLUS
|
|
|
|
|
&& rtx_equal_p (XEXP (x, 0), pic_offset_table_rtx))
|
|
|
|
|
iter.skip_subrtxes ();
|
|
|
|
|
else if (arc_rewrite_small_data_p (x))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if OP is an acceptable memory operand for ARCompact
|
|
|
|
|
16-bit gp-relative load instructions.
|
|
|
|
|
op shd look like : [r26, symref@sda]
|
|
|
|
|
i.e. (mem (plus (reg 26) (symref with smalldata flag set))
|
|
|
|
|
*/
|
|
|
|
|
/* volatile cache option still to be handled. */
|
|
|
|
|
|
|
|
|
|
bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
compact_sda_memory_operand (rtx op, machine_mode mode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
rtx addr;
|
|
|
|
|
int size;
|
|
|
|
|
|
|
|
|
|
/* Eliminate non-memory operations. */
|
|
|
|
|
if (GET_CODE (op) != MEM)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if (mode == VOIDmode)
|
|
|
|
|
mode = GET_MODE (op);
|
|
|
|
|
|
|
|
|
|
size = GET_MODE_SIZE (mode);
|
|
|
|
|
|
|
|
|
|
/* dword operations really put out 2 instructions, so eliminate them. */
|
|
|
|
|
if (size > UNITS_PER_WORD)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
/* Decode the address now. */
|
|
|
|
|
addr = XEXP (op, 0);
|
|
|
|
|
|
|
|
|
|
return LEGITIMATE_SMALL_DATA_ADDRESS_P (addr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement ASM_OUTPUT_ALIGNED_DECL_LOCAL. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_asm_output_aligned_decl_local (FILE * stream, tree decl, const char * name,
|
|
|
|
|
unsigned HOST_WIDE_INT size,
|
|
|
|
|
unsigned HOST_WIDE_INT align,
|
|
|
|
|
unsigned HOST_WIDE_INT globalize_p)
|
|
|
|
|
{
|
|
|
|
|
int in_small_data = arc_in_small_data_p (decl);
|
|
|
|
|
|
|
|
|
|
if (in_small_data)
|
|
|
|
|
switch_to_section (get_named_section (NULL, ".sbss", 0));
|
|
|
|
|
/* named_section (0,".sbss",0); */
|
|
|
|
|
else
|
|
|
|
|
switch_to_section (bss_section);
|
|
|
|
|
|
|
|
|
|
if (globalize_p)
|
|
|
|
|
(*targetm.asm_out.globalize_label) (stream, name);
|
|
|
|
|
|
|
|
|
|
ASM_OUTPUT_ALIGN (stream, floor_log2 ((align) / BITS_PER_UNIT));
|
|
|
|
|
ASM_OUTPUT_TYPE_DIRECTIVE (stream, name, "object");
|
|
|
|
|
ASM_OUTPUT_SIZE_DIRECTIVE (stream, name, size);
|
|
|
|
|
ASM_OUTPUT_LABEL (stream, name);
|
|
|
|
|
|
|
|
|
|
if (size != 0)
|
|
|
|
|
ASM_OUTPUT_SKIP (stream, size);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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/* SIMD builtins support. */
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enum simd_insn_args_type {
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Va_Vb_Vc,
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Va_Vb_rlimm,
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Va_Vb_Ic,
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Va_Vb_u6,
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Va_Vb_u8,
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Va_rlimm_u8,
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Va_Vb,
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void_rlimm,
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void_u6,
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Da_u3_rlimm,
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Da_rlimm_rlimm,
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Va_Ib_u8,
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void_Va_Ib_u8,
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Va_Vb_Ic_u8,
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void_Va_u3_Ib_u8
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};
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struct builtin_description
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{
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enum simd_insn_args_type args_type;
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const enum insn_code icode;
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const char * const name;
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const enum arc_builtins code;
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};
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static const struct builtin_description arc_simd_builtin_desc_list[] =
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{
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/* VVV builtins go first. */
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#define SIMD_BUILTIN(type, code, string, builtin) \
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{ type,CODE_FOR_##code, "__builtin_arc_" string, \
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ARC_SIMD_BUILTIN_##builtin },
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SIMD_BUILTIN (Va_Vb_Vc, vaddaw_insn, "vaddaw", VADDAW)
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SIMD_BUILTIN (Va_Vb_Vc, vaddw_insn, "vaddw", VADDW)
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SIMD_BUILTIN (Va_Vb_Vc, vavb_insn, "vavb", VAVB)
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SIMD_BUILTIN (Va_Vb_Vc, vavrb_insn, "vavrb", VAVRB)
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SIMD_BUILTIN (Va_Vb_Vc, vdifaw_insn, "vdifaw", VDIFAW)
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SIMD_BUILTIN (Va_Vb_Vc, vdifw_insn, "vdifw", VDIFW)
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SIMD_BUILTIN (Va_Vb_Vc, vmaxaw_insn, "vmaxaw", VMAXAW)
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SIMD_BUILTIN (Va_Vb_Vc, vmaxw_insn, "vmaxw", VMAXW)
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SIMD_BUILTIN (Va_Vb_Vc, vminaw_insn, "vminaw", VMINAW)
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SIMD_BUILTIN (Va_Vb_Vc, vminw_insn, "vminw", VMINW)
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SIMD_BUILTIN (Va_Vb_Vc, vmulaw_insn, "vmulaw", VMULAW)
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SIMD_BUILTIN (Va_Vb_Vc, vmulfaw_insn, "vmulfaw", VMULFAW)
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SIMD_BUILTIN (Va_Vb_Vc, vmulfw_insn, "vmulfw", VMULFW)
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SIMD_BUILTIN (Va_Vb_Vc, vmulw_insn, "vmulw", VMULW)
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SIMD_BUILTIN (Va_Vb_Vc, vsubaw_insn, "vsubaw", VSUBAW)
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SIMD_BUILTIN (Va_Vb_Vc, vsubw_insn, "vsubw", VSUBW)
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SIMD_BUILTIN (Va_Vb_Vc, vsummw_insn, "vsummw", VSUMMW)
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SIMD_BUILTIN (Va_Vb_Vc, vand_insn, "vand", VAND)
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SIMD_BUILTIN (Va_Vb_Vc, vandaw_insn, "vandaw", VANDAW)
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SIMD_BUILTIN (Va_Vb_Vc, vbic_insn, "vbic", VBIC)
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SIMD_BUILTIN (Va_Vb_Vc, vbicaw_insn, "vbicaw", VBICAW)
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SIMD_BUILTIN (Va_Vb_Vc, vor_insn, "vor", VOR)
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SIMD_BUILTIN (Va_Vb_Vc, vxor_insn, "vxor", VXOR)
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SIMD_BUILTIN (Va_Vb_Vc, vxoraw_insn, "vxoraw", VXORAW)
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SIMD_BUILTIN (Va_Vb_Vc, veqw_insn, "veqw", VEQW)
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SIMD_BUILTIN (Va_Vb_Vc, vlew_insn, "vlew", VLEW)
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SIMD_BUILTIN (Va_Vb_Vc, vltw_insn, "vltw", VLTW)
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SIMD_BUILTIN (Va_Vb_Vc, vnew_insn, "vnew", VNEW)
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SIMD_BUILTIN (Va_Vb_Vc, vmr1aw_insn, "vmr1aw", VMR1AW)
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SIMD_BUILTIN (Va_Vb_Vc, vmr1w_insn, "vmr1w", VMR1W)
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SIMD_BUILTIN (Va_Vb_Vc, vmr2aw_insn, "vmr2aw", VMR2AW)
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SIMD_BUILTIN (Va_Vb_Vc, vmr2w_insn, "vmr2w", VMR2W)
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SIMD_BUILTIN (Va_Vb_Vc, vmr3aw_insn, "vmr3aw", VMR3AW)
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SIMD_BUILTIN (Va_Vb_Vc, vmr3w_insn, "vmr3w", VMR3W)
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SIMD_BUILTIN (Va_Vb_Vc, vmr4aw_insn, "vmr4aw", VMR4AW)
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SIMD_BUILTIN (Va_Vb_Vc, vmr4w_insn, "vmr4w", VMR4W)
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SIMD_BUILTIN (Va_Vb_Vc, vmr5aw_insn, "vmr5aw", VMR5AW)
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SIMD_BUILTIN (Va_Vb_Vc, vmr5w_insn, "vmr5w", VMR5W)
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SIMD_BUILTIN (Va_Vb_Vc, vmr6aw_insn, "vmr6aw", VMR6AW)
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SIMD_BUILTIN (Va_Vb_Vc, vmr6w_insn, "vmr6w", VMR6W)
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SIMD_BUILTIN (Va_Vb_Vc, vmr7aw_insn, "vmr7aw", VMR7AW)
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|
SIMD_BUILTIN (Va_Vb_Vc, vmr7w_insn, "vmr7w", VMR7W)
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|
SIMD_BUILTIN (Va_Vb_Vc, vmrb_insn, "vmrb", VMRB)
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|
SIMD_BUILTIN (Va_Vb_Vc, vh264f_insn, "vh264f", VH264F)
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|
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|
SIMD_BUILTIN (Va_Vb_Vc, vh264ft_insn, "vh264ft", VH264FT)
|
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|
|
|
SIMD_BUILTIN (Va_Vb_Vc, vh264fw_insn, "vh264fw", VH264FW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Vc, vvc1f_insn, "vvc1f", VVC1F)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Vc, vvc1ft_insn, "vvc1ft", VVC1FT)
|
|
|
|
|
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|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbaddw_insn, "vbaddw", VBADDW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbmaxw_insn, "vbmaxw", VBMAXW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbminw_insn, "vbminw", VBMINW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbmulaw_insn, "vbmulaw", VBMULAW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbmulfw_insn, "vbmulfw", VBMULFW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbmulw_insn, "vbmulw", VBMULW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbrsubw_insn, "vbrsubw", VBRSUBW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_rlimm, vbsubw_insn, "vbsubw", VBSUBW)
|
|
|
|
|
|
|
|
|
|
/* Va, Vb, Ic instructions. */
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Ic, vasrw_insn, "vasrw", VASRW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Ic, vsr8_insn, "vsr8", VSR8)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Ic, vsr8aw_insn, "vsr8aw", VSR8AW)
|
|
|
|
|
|
|
|
|
|
/* Va, Vb, u6 instructions. */
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u6, vasrrwi_insn, "vasrrwi", VASRRWi)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u6, vasrsrwi_insn, "vasrsrwi", VASRSRWi)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u6, vasrwi_insn, "vasrwi", VASRWi)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u6, vasrpwbi_insn, "vasrpwbi", VASRPWBi)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u6, vasrrpwbi_insn,"vasrrpwbi", VASRRPWBi)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u6, vsr8awi_insn, "vsr8awi", VSR8AWi)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u6, vsr8i_insn, "vsr8i", VSR8i)
|
|
|
|
|
|
|
|
|
|
/* Va, Vb, u8 (simm) instructions. */
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u8, vmvaw_insn, "vmvaw", VMVAW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u8, vmvw_insn, "vmvw", VMVW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u8, vmvzw_insn, "vmvzw", VMVZW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_u8, vd6tapf_insn, "vd6tapf", VD6TAPF)
|
|
|
|
|
|
|
|
|
|
/* Va, rlimm, u8 (simm) instructions. */
|
|
|
|
|
SIMD_BUILTIN (Va_rlimm_u8, vmovaw_insn, "vmovaw", VMOVAW)
|
|
|
|
|
SIMD_BUILTIN (Va_rlimm_u8, vmovw_insn, "vmovw", VMOVW)
|
|
|
|
|
SIMD_BUILTIN (Va_rlimm_u8, vmovzw_insn, "vmovzw", VMOVZW)
|
|
|
|
|
|
|
|
|
|
/* Va, Vb instructions. */
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vabsaw_insn, "vabsaw", VABSAW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vabsw_insn, "vabsw", VABSW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vaddsuw_insn, "vaddsuw", VADDSUW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vsignw_insn, "vsignw", VSIGNW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vexch1_insn, "vexch1", VEXCH1)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vexch2_insn, "vexch2", VEXCH2)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vexch4_insn, "vexch4", VEXCH4)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vupbaw_insn, "vupbaw", VUPBAW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vupbw_insn, "vupbw", VUPBW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vupsbaw_insn, "vupsbaw", VUPSBAW)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb, vupsbw_insn, "vupsbw", VUPSBW)
|
|
|
|
|
|
|
|
|
|
/* DIb, rlimm, rlimm instructions. */
|
|
|
|
|
SIMD_BUILTIN (Da_rlimm_rlimm, vdirun_insn, "vdirun", VDIRUN)
|
|
|
|
|
SIMD_BUILTIN (Da_rlimm_rlimm, vdorun_insn, "vdorun", VDORUN)
|
|
|
|
|
|
|
|
|
|
/* DIb, limm, rlimm instructions. */
|
|
|
|
|
SIMD_BUILTIN (Da_u3_rlimm, vdiwr_insn, "vdiwr", VDIWR)
|
|
|
|
|
SIMD_BUILTIN (Da_u3_rlimm, vdowr_insn, "vdowr", VDOWR)
|
|
|
|
|
|
|
|
|
|
/* rlimm instructions. */
|
|
|
|
|
SIMD_BUILTIN (void_rlimm, vrec_insn, "vrec", VREC)
|
|
|
|
|
SIMD_BUILTIN (void_rlimm, vrun_insn, "vrun", VRUN)
|
|
|
|
|
SIMD_BUILTIN (void_rlimm, vrecrun_insn, "vrecrun", VRECRUN)
|
|
|
|
|
SIMD_BUILTIN (void_rlimm, vendrec_insn, "vendrec", VENDREC)
|
|
|
|
|
|
|
|
|
|
/* Va, [Ib,u8] instructions. */
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Ic_u8, vld32wh_insn, "vld32wh", VLD32WH)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Ic_u8, vld32wl_insn, "vld32wl", VLD32WL)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Ic_u8, vld64_insn, "vld64", VLD64)
|
|
|
|
|
SIMD_BUILTIN (Va_Vb_Ic_u8, vld32_insn, "vld32", VLD32)
|
|
|
|
|
|
|
|
|
|
SIMD_BUILTIN (Va_Ib_u8, vld64w_insn, "vld64w", VLD64W)
|
|
|
|
|
SIMD_BUILTIN (Va_Ib_u8, vld128_insn, "vld128", VLD128)
|
|
|
|
|
SIMD_BUILTIN (void_Va_Ib_u8, vst128_insn, "vst128", VST128)
|
|
|
|
|
SIMD_BUILTIN (void_Va_Ib_u8, vst64_insn, "vst64", VST64)
|
|
|
|
|
|
|
|
|
|
/* Va, [Ib, u8] instructions. */
|
|
|
|
|
SIMD_BUILTIN (void_Va_u3_Ib_u8, vst16_n_insn, "vst16_n", VST16_N)
|
|
|
|
|
SIMD_BUILTIN (void_Va_u3_Ib_u8, vst32_n_insn, "vst32_n", VST32_N)
|
|
|
|
|
|
|
|
|
|
SIMD_BUILTIN (void_u6, vinti_insn, "vinti", VINTI)
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_init_simd_builtins (void)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
tree endlink = void_list_node;
|
|
|
|
|
tree V8HI_type_node = build_vector_type_for_mode (intHI_type_node, V8HImode);
|
|
|
|
|
|
|
|
|
|
tree v8hi_ftype_v8hi_v8hi
|
|
|
|
|
= build_function_type (V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, V8HI_type_node,
|
|
|
|
|
endlink)));
|
|
|
|
|
tree v8hi_ftype_v8hi_int
|
|
|
|
|
= build_function_type (V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
endlink)));
|
|
|
|
|
|
|
|
|
|
tree v8hi_ftype_v8hi_int_int
|
|
|
|
|
= build_function_type (V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE,
|
|
|
|
|
integer_type_node,
|
|
|
|
|
endlink))));
|
|
|
|
|
|
|
|
|
|
tree void_ftype_v8hi_int_int
|
|
|
|
|
= build_function_type (void_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE,
|
|
|
|
|
integer_type_node,
|
|
|
|
|
endlink))));
|
|
|
|
|
|
|
|
|
|
tree void_ftype_v8hi_int_int_int
|
|
|
|
|
= (build_function_type
|
|
|
|
|
(void_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE,
|
|
|
|
|
integer_type_node,
|
|
|
|
|
endlink))))));
|
|
|
|
|
|
|
|
|
|
tree v8hi_ftype_int_int
|
|
|
|
|
= build_function_type (V8HI_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
endlink)));
|
|
|
|
|
|
|
|
|
|
tree void_ftype_int_int
|
|
|
|
|
= build_function_type (void_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node,
|
|
|
|
|
endlink)));
|
|
|
|
|
|
|
|
|
|
tree void_ftype_int
|
|
|
|
|
= build_function_type (void_type_node,
|
|
|
|
|
tree_cons (NULL_TREE, integer_type_node, endlink));
|
|
|
|
|
|
|
|
|
|
tree v8hi_ftype_v8hi
|
|
|
|
|
= build_function_type (V8HI_type_node, tree_cons (NULL_TREE, V8HI_type_node,
|
|
|
|
|
endlink));
|
|
|
|
|
|
|
|
|
|
/* These asserts have been introduced to ensure that the order of builtins
|
|
|
|
|
does not get messed up, else the initialization goes wrong. */
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [0].args_type == Va_Vb_Vc);
|
|
|
|
|
for (i=0; arc_simd_builtin_desc_list [i].args_type == Va_Vb_Vc; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_v8hi_v8hi, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_Vb_rlimm);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_Vb_rlimm; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_v8hi_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_Vb_Ic);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_Vb_Ic; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_v8hi_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_Vb_u6);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_Vb_u6; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_v8hi_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_Vb_u8);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_Vb_u8; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_v8hi_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_rlimm_u8);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_rlimm_u8; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_int_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_Vb);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_Vb; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_v8hi, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Da_rlimm_rlimm);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Da_rlimm_rlimm; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list [i].name,
|
|
|
|
|
void_ftype_int_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Da_u3_rlimm);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Da_u3_rlimm; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
void_ftype_int_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == void_rlimm);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == void_rlimm; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
void_ftype_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_Vb_Ic_u8);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_Vb_Ic_u8; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_v8hi_int_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == Va_Ib_u8);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == Va_Ib_u8; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
v8hi_ftype_int_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == void_Va_Ib_u8);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == void_Va_Ib_u8; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list [i].name,
|
|
|
|
|
void_ftype_v8hi_int_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == void_Va_u3_Ib_u8);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == void_Va_u3_Ib_u8; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
void_ftype_v8hi_int_int_int,
|
|
|
|
|
arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert (arc_simd_builtin_desc_list [i].args_type == void_u6);
|
|
|
|
|
for (; arc_simd_builtin_desc_list [i].args_type == void_u6; i++)
|
|
|
|
|
def_mbuiltin (TARGET_SIMD_SET, arc_simd_builtin_desc_list[i].name,
|
|
|
|
|
void_ftype_int, arc_simd_builtin_desc_list[i].code);
|
|
|
|
|
|
|
|
|
|
gcc_assert(i == ARRAY_SIZE (arc_simd_builtin_desc_list));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Helper function of arc_expand_builtin; has the same parameters,
|
|
|
|
|
except that EXP is now known to be a call to a simd builtin. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_expand_simd_builtin (tree exp,
|
|
|
|
|
rtx target,
|
|
|
|
|
rtx subtarget ATTRIBUTE_UNUSED,
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode ATTRIBUTE_UNUSED,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
|
|
|
|
|
tree arg0;
|
|
|
|
|
tree arg1;
|
|
|
|
|
tree arg2;
|
|
|
|
|
tree arg3;
|
|
|
|
|
rtx op0;
|
|
|
|
|
rtx op1;
|
|
|
|
|
rtx op2;
|
|
|
|
|
rtx op3;
|
|
|
|
|
rtx op4;
|
|
|
|
|
rtx pat;
|
|
|
|
|
unsigned int i;
|
|
|
|
|
int fcode = DECL_FUNCTION_CODE (fndecl);
|
|
|
|
|
int icode;
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
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machine_mode mode0;
|
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machine_mode mode1;
|
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machine_mode mode2;
|
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machine_mode mode3;
|
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|
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machine_mode mode4;
|
2013-10-01 19:03:46 +02:00
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const struct builtin_description * d;
|
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for (i = 0, d = arc_simd_builtin_desc_list;
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i < ARRAY_SIZE (arc_simd_builtin_desc_list); i++, d++)
|
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|
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if (d->code == (const enum arc_builtins) fcode)
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break;
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/* We must get an entry here. */
|
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gcc_assert (i < ARRAY_SIZE (arc_simd_builtin_desc_list));
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switch (d->args_type)
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|
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{
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|
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case Va_Vb_rlimm:
|
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icode = d->icode;
|
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|
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arg0 = CALL_EXPR_ARG (exp, 0);
|
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arg1 = CALL_EXPR_ARG (exp, 1);
|
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op0 = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL);
|
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|
op1 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL);
|
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|
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target = gen_reg_rtx (V8HImode);
|
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mode0 = insn_data[icode].operand[1].mode;
|
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|
|
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mode1 = insn_data[icode].operand[2].mode;
|
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|
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|
|
if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
|
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|
|
op0 = copy_to_mode_reg (mode0, op0);
|
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|
|
|
|
|
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|
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if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
|
|
|
|
|
op1 = copy_to_mode_reg (mode1, op1);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op0, op1);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return target;
|
|
|
|
|
|
|
|
|
|
case Va_Vb_u6:
|
|
|
|
|
case Va_Vb_u8:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1);
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL);
|
|
|
|
|
op1 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
|
|
|
|
|
target = gen_reg_rtx (V8HImode);
|
|
|
|
|
mode0 = insn_data[icode].operand[1].mode;
|
|
|
|
|
mode1 = insn_data[icode].operand[2].mode;
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
|
|
|
|
|
op0 = copy_to_mode_reg (mode0, op0);
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[2].predicate) (op1, mode1)
|
|
|
|
|
|| (d->args_type == Va_Vb_u6 && !UNSIGNED_INT6 (INTVAL (op1)))
|
|
|
|
|
|| (d->args_type == Va_Vb_u8 && !UNSIGNED_INT8 (INTVAL (op1))))
|
|
|
|
|
error ("operand 2 of %s instruction should be an unsigned %d-bit value",
|
|
|
|
|
d->name,
|
|
|
|
|
(d->args_type == Va_Vb_u6)? 6: 8);
|
|
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|
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|
|
pat = GEN_FCN (icode) (target, op0, op1);
|
|
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|
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if (! pat)
|
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|
|
return 0;
|
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|
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|
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|
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emit_insn (pat);
|
|
|
|
|
return target;
|
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|
|
|
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case Va_rlimm_u8:
|
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|
|
|
icode = d->icode;
|
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|
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arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
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arg1 = CALL_EXPR_ARG (exp, 1);
|
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|
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op0 = expand_expr (arg0, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
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|
|
op1 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
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|
|
|
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|
|
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target = gen_reg_rtx (V8HImode);
|
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|
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mode0 = insn_data[icode].operand[1].mode;
|
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|
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mode1 = insn_data[icode].operand[2].mode;
|
|
|
|
|
|
|
|
|
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if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
|
|
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|
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op0 = copy_to_mode_reg (mode0, op0);
|
|
|
|
|
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|
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|
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if ( (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
|
|
|
|
|
|| !(UNSIGNED_INT8 (INTVAL (op1))))
|
|
|
|
|
error ("operand 2 of %s instruction should be an unsigned 8-bit value",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
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pat = GEN_FCN (icode) (target, op0, op1);
|
|
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|
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if (! pat)
|
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|
|
return 0;
|
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|
|
|
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|
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emit_insn (pat);
|
|
|
|
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return target;
|
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|
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case Va_Vb_Ic:
|
|
|
|
|
icode = d->icode;
|
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|
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arg0 = CALL_EXPR_ARG (exp, 0);
|
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arg1 = CALL_EXPR_ARG (exp, 1);
|
|
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|
|
op0 = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL);
|
|
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|
|
op1 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
op2 = gen_rtx_REG (V8HImode, ARC_FIRST_SIMD_VR_REG);
|
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|
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target = gen_reg_rtx (V8HImode);
|
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|
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mode0 = insn_data[icode].operand[1].mode;
|
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|
|
mode1 = insn_data[icode].operand[2].mode;
|
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|
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|
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if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
|
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|
|
op0 = copy_to_mode_reg (mode0, op0);
|
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|
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if ( (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
|
|
|
|
|
|| !(UNSIGNED_INT3 (INTVAL (op1))))
|
|
|
|
|
error ("operand 2 of %s instruction should be an unsigned 3-bit value (I0-I7)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op0, op1, op2);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return target;
|
|
|
|
|
|
|
|
|
|
case Va_Vb_Vc:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1);
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL);
|
|
|
|
|
op1 = expand_expr (arg1, NULL_RTX, V8HImode, EXPAND_NORMAL);
|
|
|
|
|
|
|
|
|
|
target = gen_reg_rtx (V8HImode);
|
|
|
|
|
mode0 = insn_data[icode].operand[1].mode;
|
|
|
|
|
mode1 = insn_data[icode].operand[2].mode;
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
|
|
|
|
|
op0 = copy_to_mode_reg (mode0, op0);
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
|
|
|
|
|
op1 = copy_to_mode_reg (mode1, op1);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op0, op1);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return target;
|
|
|
|
|
|
|
|
|
|
case Va_Vb:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL);
|
|
|
|
|
|
|
|
|
|
target = gen_reg_rtx (V8HImode);
|
|
|
|
|
mode0 = insn_data[icode].operand[1].mode;
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
|
|
|
|
|
op0 = copy_to_mode_reg (mode0, op0);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op0);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return target;
|
|
|
|
|
|
|
|
|
|
case Da_rlimm_rlimm:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1);
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
op1 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
if (icode == CODE_FOR_vdirun_insn)
|
|
|
|
|
target = gen_rtx_REG (SImode, 131);
|
|
|
|
|
else if (icode == CODE_FOR_vdorun_insn)
|
|
|
|
|
target = gen_rtx_REG (SImode, 139);
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
|
|
|
|
|
mode0 = insn_data[icode].operand[1].mode;
|
|
|
|
|
mode1 = insn_data[icode].operand[2].mode;
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
|
|
|
|
|
op0 = copy_to_mode_reg (mode0, op0);
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
|
|
|
|
|
op1 = copy_to_mode_reg (mode1, op1);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op0, op1);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
|
|
|
|
|
case Da_u3_rlimm:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1);
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
op1 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
if (! (GET_CODE (op0) == CONST_INT)
|
|
|
|
|
|| !(UNSIGNED_INT3 (INTVAL (op0))))
|
|
|
|
|
error ("operand 1 of %s instruction should be an unsigned 3-bit value (DR0-DR7)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
mode1 = insn_data[icode].operand[1].mode;
|
|
|
|
|
|
|
|
|
|
if (icode == CODE_FOR_vdiwr_insn)
|
|
|
|
|
target = gen_rtx_REG (SImode,
|
|
|
|
|
ARC_FIRST_SIMD_DMA_CONFIG_IN_REG + INTVAL (op0));
|
|
|
|
|
else if (icode == CODE_FOR_vdowr_insn)
|
|
|
|
|
target = gen_rtx_REG (SImode,
|
|
|
|
|
ARC_FIRST_SIMD_DMA_CONFIG_OUT_REG + INTVAL (op0));
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
|
|
|
|
|
op1 = copy_to_mode_reg (mode1, op1);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op1);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
|
|
|
|
|
case void_u6:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
|
|
|
|
|
|
fold (arg0);
|
|
|
|
|
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
mode0 = insn_data[icode].operand[0].mode;
|
|
|
|
|
|
|
|
|
|
/* op0 should be u6. */
|
|
|
|
|
if (! (*insn_data[icode].operand[0].predicate) (op0, mode0)
|
|
|
|
|
|| !(UNSIGNED_INT6 (INTVAL (op0))))
|
|
|
|
|
error ("operand of %s instruction should be an unsigned 6-bit value",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (op0);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
|
|
|
|
|
case void_rlimm:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0);
|
|
|
|
|
|
|
|
|
|
fold (arg0);
|
|
|
|
|
|
|
|
|
|
op0 = expand_expr (arg0, NULL_RTX, SImode, EXPAND_NORMAL);
|
|
|
|
|
mode0 = insn_data[icode].operand[0].mode;
|
|
|
|
|
|
|
|
|
|
if (! (*insn_data[icode].operand[0].predicate) (op0, mode0))
|
|
|
|
|
op0 = copy_to_mode_reg (mode0, op0);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (op0);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
|
|
|
|
|
case Va_Vb_Ic_u8:
|
|
|
|
|
{
|
|
|
|
|
rtx src_vreg;
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0); /* source vreg */
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1); /* [I]0-7 */
|
|
|
|
|
arg2 = CALL_EXPR_ARG (exp, 2); /* u8 */
|
|
|
|
|
|
|
|
|
|
src_vreg = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL);
|
|
|
|
|
op0 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL); /* [I]0-7 */
|
|
|
|
|
op1 = expand_expr (arg2, NULL_RTX, SImode, EXPAND_NORMAL); /* u8 */
|
|
|
|
|
op2 = gen_rtx_REG (V8HImode, ARC_FIRST_SIMD_VR_REG); /* VR0 */
|
|
|
|
|
|
|
|
|
|
/* target <- src vreg */
|
|
|
|
|
emit_insn (gen_move_insn (target, src_vreg));
|
|
|
|
|
|
|
|
|
|
/* target <- vec_concat: target, mem(Ib, u8) */
|
|
|
|
|
mode0 = insn_data[icode].operand[3].mode;
|
|
|
|
|
mode1 = insn_data[icode].operand[1].mode;
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[3].predicate) (op0, mode0))
|
|
|
|
|
|| !(UNSIGNED_INT3 (INTVAL (op0))))
|
|
|
|
|
error ("operand 1 of %s instruction should be an unsigned 3-bit value (I0-I7)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[1].predicate) (op1, mode1))
|
|
|
|
|
|| !(UNSIGNED_INT8 (INTVAL (op1))))
|
|
|
|
|
error ("operand 2 of %s instruction should be an unsigned 8-bit value",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op1, op2, op0);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return target;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case void_Va_Ib_u8:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0); /* src vreg */
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1); /* [I]0-7 */
|
|
|
|
|
arg2 = CALL_EXPR_ARG (exp, 2); /* u8 */
|
|
|
|
|
|
|
|
|
|
op0 = gen_rtx_REG (V8HImode, ARC_FIRST_SIMD_VR_REG); /* VR0 */
|
|
|
|
|
op1 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL); /* I[0-7] */
|
|
|
|
|
op2 = expand_expr (arg2, NULL_RTX, SImode, EXPAND_NORMAL); /* u8 */
|
|
|
|
|
op3 = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL); /* Vdest */
|
|
|
|
|
|
|
|
|
|
mode0 = insn_data[icode].operand[0].mode;
|
|
|
|
|
mode1 = insn_data[icode].operand[1].mode;
|
|
|
|
|
mode2 = insn_data[icode].operand[2].mode;
|
|
|
|
|
mode3 = insn_data[icode].operand[3].mode;
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[1].predicate) (op1, mode1))
|
|
|
|
|
|| !(UNSIGNED_INT3 (INTVAL (op1))))
|
|
|
|
|
error ("operand 2 of %s instruction should be an unsigned 3-bit value (I0-I7)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[2].predicate) (op2, mode2))
|
|
|
|
|
|| !(UNSIGNED_INT8 (INTVAL (op2))))
|
|
|
|
|
error ("operand 3 of %s instruction should be an unsigned 8-bit value",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
if (!(*insn_data[icode].operand[3].predicate) (op3, mode3))
|
|
|
|
|
op3 = copy_to_mode_reg (mode3, op3);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (op0, op1, op2, op3);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
|
|
|
|
|
case Va_Ib_u8:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0); /* dest vreg */
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1); /* [I]0-7 */
|
|
|
|
|
|
|
|
|
|
op0 = gen_rtx_REG (V8HImode, ARC_FIRST_SIMD_VR_REG); /* VR0 */
|
|
|
|
|
op1 = expand_expr (arg0, NULL_RTX, SImode, EXPAND_NORMAL); /* I[0-7] */
|
|
|
|
|
op2 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL); /* u8 */
|
|
|
|
|
|
|
|
|
|
/* target <- src vreg */
|
|
|
|
|
target = gen_reg_rtx (V8HImode);
|
|
|
|
|
|
|
|
|
|
/* target <- vec_concat: target, mem(Ib, u8) */
|
|
|
|
|
mode0 = insn_data[icode].operand[1].mode;
|
|
|
|
|
mode1 = insn_data[icode].operand[2].mode;
|
|
|
|
|
mode2 = insn_data[icode].operand[3].mode;
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
|
|
|
|
|
|| !(UNSIGNED_INT3 (INTVAL (op1))))
|
|
|
|
|
error ("operand 1 of %s instruction should be an unsigned 3-bit value (I0-I7)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[3].predicate) (op2, mode2))
|
|
|
|
|
|| !(UNSIGNED_INT8 (INTVAL (op2))))
|
|
|
|
|
error ("operand 2 of %s instruction should be an unsigned 8-bit value",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (target, op0, op1, op2);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return target;
|
|
|
|
|
|
|
|
|
|
case void_Va_u3_Ib_u8:
|
|
|
|
|
icode = d->icode;
|
|
|
|
|
arg0 = CALL_EXPR_ARG (exp, 0); /* source vreg */
|
|
|
|
|
arg1 = CALL_EXPR_ARG (exp, 1); /* u3 */
|
|
|
|
|
arg2 = CALL_EXPR_ARG (exp, 2); /* [I]0-7 */
|
|
|
|
|
arg3 = CALL_EXPR_ARG (exp, 3); /* u8 */
|
|
|
|
|
|
|
|
|
|
op0 = expand_expr (arg3, NULL_RTX, SImode, EXPAND_NORMAL); /* u8 */
|
|
|
|
|
op1 = gen_rtx_REG (V8HImode, ARC_FIRST_SIMD_VR_REG); /* VR */
|
|
|
|
|
op2 = expand_expr (arg2, NULL_RTX, SImode, EXPAND_NORMAL); /* [I]0-7 */
|
|
|
|
|
op3 = expand_expr (arg0, NULL_RTX, V8HImode, EXPAND_NORMAL);/* vreg to be stored */
|
|
|
|
|
op4 = expand_expr (arg1, NULL_RTX, SImode, EXPAND_NORMAL); /* vreg 0-7 subreg no. */
|
|
|
|
|
|
|
|
|
|
mode0 = insn_data[icode].operand[0].mode;
|
|
|
|
|
mode2 = insn_data[icode].operand[2].mode;
|
|
|
|
|
mode3 = insn_data[icode].operand[3].mode;
|
|
|
|
|
mode4 = insn_data[icode].operand[4].mode;
|
|
|
|
|
|
|
|
|
|
/* Do some correctness checks for the operands. */
|
|
|
|
|
if ( (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
|
|
|
|
|
|| !(UNSIGNED_INT8 (INTVAL (op0))))
|
|
|
|
|
error ("operand 4 of %s instruction should be an unsigned 8-bit value (0-255)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[2].predicate) (op2, mode2))
|
|
|
|
|
|| !(UNSIGNED_INT3 (INTVAL (op2))))
|
|
|
|
|
error ("operand 3 of %s instruction should be an unsigned 3-bit value (I0-I7)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
if (!(*insn_data[icode].operand[3].predicate) (op3, mode3))
|
|
|
|
|
op3 = copy_to_mode_reg (mode3, op3);
|
|
|
|
|
|
|
|
|
|
if ( (!(*insn_data[icode].operand[4].predicate) (op4, mode4))
|
|
|
|
|
|| !(UNSIGNED_INT3 (INTVAL (op4))))
|
|
|
|
|
error ("operand 2 of %s instruction should be an unsigned 3-bit value (subreg 0-7)",
|
|
|
|
|
d->name);
|
|
|
|
|
else if (icode == CODE_FOR_vst32_n_insn
|
|
|
|
|
&& ((INTVAL(op4) % 2 ) != 0))
|
|
|
|
|
error ("operand 2 of %s instruction should be an even 3-bit value (subreg 0,2,4,6)",
|
|
|
|
|
d->name);
|
|
|
|
|
|
|
|
|
|
pat = GEN_FCN (icode) (op0, op1, op2, op3, op4);
|
|
|
|
|
if (! pat)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
emit_insn (pat);
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
arc_preserve_reload_p (rtx in)
|
|
|
|
|
{
|
|
|
|
|
return (GET_CODE (in) == PLUS
|
|
|
|
|
&& RTX_OK_FOR_BASE_P (XEXP (in, 0), true)
|
|
|
|
|
&& CONST_INT_P (XEXP (in, 1))
|
|
|
|
|
&& !((INTVAL (XEXP (in, 1)) & 511)));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_register_move_cost (machine_mode,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
enum reg_class from_class, enum reg_class to_class)
|
|
|
|
|
{
|
|
|
|
|
/* The ARC600 has no bypass for extension registers, hence a nop might be
|
|
|
|
|
needed to be inserted after a write so that reads are safe. */
|
|
|
|
|
if (TARGET_ARC600)
|
|
|
|
|
{
|
|
|
|
|
if (to_class == MPY_WRITABLE_CORE_REGS)
|
|
|
|
|
return 3;
|
|
|
|
|
/* Instructions modifying LP_COUNT need 4 additional cycles before
|
|
|
|
|
the register will actually contain the value. */
|
|
|
|
|
else if (to_class == LPCOUNT_REG)
|
|
|
|
|
return 6;
|
|
|
|
|
else if (to_class == WRITABLE_CORE_REGS)
|
|
|
|
|
return 6;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The ARC700 stalls for 3 cycles when *reading* from lp_count. */
|
|
|
|
|
if (TARGET_ARC700
|
|
|
|
|
&& (from_class == LPCOUNT_REG || from_class == ALL_CORE_REGS
|
|
|
|
|
|| from_class == WRITABLE_CORE_REGS))
|
|
|
|
|
return 8;
|
|
|
|
|
|
|
|
|
|
/* Force an attempt to 'mov Dy,Dx' to spill. */
|
|
|
|
|
if (TARGET_ARC700 && TARGET_DPFP
|
|
|
|
|
&& from_class == DOUBLE_REGS && to_class == DOUBLE_REGS)
|
|
|
|
|
return 100;
|
|
|
|
|
|
|
|
|
|
return 2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit code for an addsi3 instruction with OPERANDS.
|
|
|
|
|
COND_P indicates if this will use conditional execution.
|
|
|
|
|
Return the length of the instruction.
|
|
|
|
|
If OUTPUT_P is false, don't actually output the instruction, just return
|
|
|
|
|
its length. */
|
|
|
|
|
int
|
|
|
|
|
arc_output_addsi (rtx *operands, bool cond_p, bool output_p)
|
|
|
|
|
{
|
|
|
|
|
char format[32];
|
|
|
|
|
|
|
|
|
|
int match = operands_match_p (operands[0], operands[1]);
|
|
|
|
|
int match2 = operands_match_p (operands[0], operands[2]);
|
|
|
|
|
int intval = (REG_P (operands[2]) ? 1
|
|
|
|
|
: CONST_INT_P (operands[2]) ? INTVAL (operands[2]) : 0xbadc057);
|
|
|
|
|
int neg_intval = -intval;
|
|
|
|
|
int short_0 = satisfies_constraint_Rcq (operands[0]);
|
|
|
|
|
int short_p = (!cond_p && short_0 && satisfies_constraint_Rcq (operands[1]));
|
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
|
|
#define ADDSI_OUTPUT1(FORMAT) do {\
|
|
|
|
|
if (output_p) \
|
|
|
|
|
output_asm_insn (FORMAT, operands);\
|
|
|
|
|
return ret; \
|
|
|
|
|
} while (0)
|
|
|
|
|
#define ADDSI_OUTPUT(LIST) do {\
|
|
|
|
|
if (output_p) \
|
|
|
|
|
sprintf LIST;\
|
|
|
|
|
ADDSI_OUTPUT1 (format);\
|
|
|
|
|
return ret; \
|
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
|
/* First try to emit a 16 bit insn. */
|
|
|
|
|
ret = 2;
|
|
|
|
|
if (!cond_p
|
|
|
|
|
/* If we are actually about to output this insn, don't try a 16 bit
|
|
|
|
|
variant if we already decided that we don't want that
|
|
|
|
|
(I.e. we upsized this insn to align some following insn.)
|
|
|
|
|
E.g. add_s r0,sp,70 is 16 bit, but add r0,sp,70 requires a LIMM -
|
|
|
|
|
but add1 r0,sp,35 doesn't. */
|
|
|
|
|
&& (!output_p || (get_attr_length (current_output_insn) & 2)))
|
|
|
|
|
{
|
|
|
|
|
if (short_p
|
|
|
|
|
&& (REG_P (operands[2])
|
|
|
|
|
? (match || satisfies_constraint_Rcq (operands[2]))
|
|
|
|
|
: (unsigned) intval <= (match ? 127 : 7)))
|
|
|
|
|
ADDSI_OUTPUT1 ("add%? %0,%1,%2");
|
|
|
|
|
if (short_0 && REG_P (operands[1]) && match2)
|
|
|
|
|
ADDSI_OUTPUT1 ("add%? %0,%2,%1");
|
|
|
|
|
if ((short_0 || REGNO (operands[0]) == STACK_POINTER_REGNUM)
|
|
|
|
|
&& REGNO (operands[1]) == STACK_POINTER_REGNUM && !(intval & ~124))
|
|
|
|
|
ADDSI_OUTPUT1 ("add%? %0,%1,%2");
|
|
|
|
|
|
|
|
|
|
if ((short_p && (unsigned) neg_intval <= (match ? 31 : 7))
|
|
|
|
|
|| (REGNO (operands[0]) == STACK_POINTER_REGNUM
|
|
|
|
|
&& match && !(neg_intval & ~124)))
|
|
|
|
|
ADDSI_OUTPUT1 ("sub%? %0,%1,%n2");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Now try to emit a 32 bit insn without long immediate. */
|
|
|
|
|
ret = 4;
|
|
|
|
|
if (!match && match2 && REG_P (operands[1]))
|
|
|
|
|
ADDSI_OUTPUT1 ("add%? %0,%2,%1");
|
|
|
|
|
if (match || !cond_p)
|
|
|
|
|
{
|
|
|
|
|
int limit = (match && !cond_p) ? 0x7ff : 0x3f;
|
|
|
|
|
int range_factor = neg_intval & intval;
|
|
|
|
|
int shift;
|
|
|
|
|
|
|
|
|
|
if (intval == -1 << 31)
|
|
|
|
|
ADDSI_OUTPUT1 ("bxor%? %0,%1,31");
|
|
|
|
|
|
|
|
|
|
/* If we can use a straight add / sub instead of a {add,sub}[123] of
|
|
|
|
|
same size, do, so - the insn latency is lower. */
|
|
|
|
|
/* -0x800 is a 12-bit constant for add /add3 / sub / sub3, but
|
|
|
|
|
0x800 is not. */
|
|
|
|
|
if ((intval >= 0 && intval <= limit)
|
|
|
|
|
|| (intval == -0x800 && limit == 0x7ff))
|
|
|
|
|
ADDSI_OUTPUT1 ("add%? %0,%1,%2");
|
|
|
|
|
else if ((intval < 0 && neg_intval <= limit)
|
|
|
|
|
|| (intval == 0x800 && limit == 0x7ff))
|
|
|
|
|
ADDSI_OUTPUT1 ("sub%? %0,%1,%n2");
|
|
|
|
|
shift = range_factor >= 8 ? 3 : (range_factor >> 1);
|
|
|
|
|
gcc_assert (shift == 0 || shift == 1 || shift == 2 || shift == 3);
|
|
|
|
|
gcc_assert ((((1 << shift) - 1) & intval) == 0);
|
|
|
|
|
if (((intval < 0 && intval != -0x4000)
|
|
|
|
|
/* sub[123] is slower than add_s / sub, only use it if it
|
|
|
|
|
avoids a long immediate. */
|
|
|
|
|
&& neg_intval <= limit << shift)
|
|
|
|
|
|| (intval == 0x4000 && limit == 0x7ff))
|
|
|
|
|
ADDSI_OUTPUT ((format, "sub%d%%? %%0,%%1,%d",
|
|
|
|
|
shift, neg_intval >> shift));
|
|
|
|
|
else if ((intval >= 0 && intval <= limit << shift)
|
|
|
|
|
|| (intval == -0x4000 && limit == 0x7ff))
|
|
|
|
|
ADDSI_OUTPUT ((format, "add%d%%? %%0,%%1,%d", shift, intval >> shift));
|
|
|
|
|
}
|
|
|
|
|
/* Try to emit a 16 bit opcode with long immediate. */
|
|
|
|
|
ret = 6;
|
|
|
|
|
if (short_p && match)
|
|
|
|
|
ADDSI_OUTPUT1 ("add%? %0,%1,%S2");
|
|
|
|
|
|
|
|
|
|
/* We have to use a 32 bit opcode, and with a long immediate. */
|
|
|
|
|
ret = 8;
|
|
|
|
|
ADDSI_OUTPUT1 (intval < 0 ? "sub%? %0,%1,%n2" : "add%? %0,%1,%S2");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Emit code for an commutative_cond_exec instruction with OPERANDS.
|
|
|
|
|
Return the length of the instruction.
|
|
|
|
|
If OUTPUT_P is false, don't actually output the instruction, just return
|
|
|
|
|
its length. */
|
|
|
|
|
int
|
|
|
|
|
arc_output_commutative_cond_exec (rtx *operands, bool output_p)
|
|
|
|
|
{
|
|
|
|
|
enum rtx_code commutative_op = GET_CODE (operands[3]);
|
|
|
|
|
const char *pat = NULL;
|
|
|
|
|
|
|
|
|
|
/* Canonical rtl should not have a constant in the first operand position. */
|
|
|
|
|
gcc_assert (!CONSTANT_P (operands[1]));
|
|
|
|
|
|
|
|
|
|
switch (commutative_op)
|
|
|
|
|
{
|
|
|
|
|
case AND:
|
|
|
|
|
if (satisfies_constraint_C1p (operands[2]))
|
|
|
|
|
pat = "bmsk%? %0,%1,%Z2";
|
|
|
|
|
else if (satisfies_constraint_Ccp (operands[2]))
|
|
|
|
|
pat = "bclr%? %0,%1,%M2";
|
|
|
|
|
else if (satisfies_constraint_CnL (operands[2]))
|
|
|
|
|
pat = "bic%? %0,%1,%n2-1";
|
|
|
|
|
break;
|
|
|
|
|
case IOR:
|
|
|
|
|
if (satisfies_constraint_C0p (operands[2]))
|
|
|
|
|
pat = "bset%? %0,%1,%z2";
|
|
|
|
|
break;
|
|
|
|
|
case XOR:
|
|
|
|
|
if (satisfies_constraint_C0p (operands[2]))
|
|
|
|
|
pat = "bxor%? %0,%1,%z2";
|
|
|
|
|
break;
|
|
|
|
|
case PLUS:
|
|
|
|
|
return arc_output_addsi (operands, true, output_p);
|
|
|
|
|
default: break;
|
|
|
|
|
}
|
|
|
|
|
if (output_p)
|
|
|
|
|
output_asm_insn (pat ? pat : "%O3.%d5 %0,%1,%2", operands);
|
|
|
|
|
if (pat || REG_P (operands[2]) || satisfies_constraint_L (operands[2]))
|
|
|
|
|
return 4;
|
|
|
|
|
return 8;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Helper function of arc_expand_movmem. ADDR points to a chunk of memory.
|
|
|
|
|
Emit code and return an potentially modified address such that offsets
|
|
|
|
|
up to SIZE are can be added to yield a legitimate address.
|
|
|
|
|
if REUSE is set, ADDR is a register that may be modified. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
force_offsettable (rtx addr, HOST_WIDE_INT size, bool reuse)
|
|
|
|
|
{
|
|
|
|
|
rtx base = addr;
|
|
|
|
|
rtx offs = const0_rtx;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (base) == PLUS)
|
|
|
|
|
{
|
|
|
|
|
offs = XEXP (base, 1);
|
|
|
|
|
base = XEXP (base, 0);
|
|
|
|
|
}
|
|
|
|
|
if (!REG_P (base)
|
|
|
|
|
|| (REGNO (base) != STACK_POINTER_REGNUM
|
|
|
|
|
&& REGNO_PTR_FRAME_P (REGNO (addr)))
|
|
|
|
|
|| !CONST_INT_P (offs) || !SMALL_INT (INTVAL (offs))
|
|
|
|
|
|| !SMALL_INT (INTVAL (offs) + size))
|
|
|
|
|
{
|
|
|
|
|
if (reuse)
|
|
|
|
|
emit_insn (gen_add2_insn (addr, offs));
|
|
|
|
|
else
|
|
|
|
|
addr = copy_to_mode_reg (Pmode, addr);
|
|
|
|
|
}
|
|
|
|
|
return addr;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Like move_by_pieces, but take account of load latency,
|
|
|
|
|
and actual offset ranges.
|
|
|
|
|
Return true on success. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
arc_expand_movmem (rtx *operands)
|
|
|
|
|
{
|
|
|
|
|
rtx dst = operands[0];
|
|
|
|
|
rtx src = operands[1];
|
|
|
|
|
rtx dst_addr, src_addr;
|
|
|
|
|
HOST_WIDE_INT size;
|
|
|
|
|
int align = INTVAL (operands[3]);
|
|
|
|
|
unsigned n_pieces;
|
|
|
|
|
int piece = align;
|
|
|
|
|
rtx store[2];
|
|
|
|
|
rtx tmpx[2];
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
if (!CONST_INT_P (operands[2]))
|
|
|
|
|
return false;
|
|
|
|
|
size = INTVAL (operands[2]);
|
|
|
|
|
/* move_by_pieces_ninsns is static, so we can't use it. */
|
|
|
|
|
if (align >= 4)
|
|
|
|
|
n_pieces = (size + 2) / 4U + (size & 1);
|
|
|
|
|
else if (align == 2)
|
|
|
|
|
n_pieces = (size + 1) / 2U;
|
|
|
|
|
else
|
|
|
|
|
n_pieces = size;
|
|
|
|
|
if (n_pieces >= (unsigned int) (optimize_size ? 3 : 15))
|
|
|
|
|
return false;
|
|
|
|
|
if (piece > 4)
|
|
|
|
|
piece = 4;
|
|
|
|
|
dst_addr = force_offsettable (XEXP (operands[0], 0), size, 0);
|
|
|
|
|
src_addr = force_offsettable (XEXP (operands[1], 0), size, 0);
|
|
|
|
|
store[0] = store[1] = NULL_RTX;
|
|
|
|
|
tmpx[0] = tmpx[1] = NULL_RTX;
|
|
|
|
|
for (i = 0; size > 0; i ^= 1, size -= piece)
|
|
|
|
|
{
|
|
|
|
|
rtx tmp;
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
if (piece > size)
|
|
|
|
|
piece = size & -size;
|
|
|
|
|
mode = smallest_mode_for_size (piece * BITS_PER_UNIT, MODE_INT);
|
|
|
|
|
/* If we don't re-use temporaries, the scheduler gets carried away,
|
|
|
|
|
and the register pressure gets unnecessarily high. */
|
|
|
|
|
if (0 && tmpx[i] && GET_MODE (tmpx[i]) == mode)
|
|
|
|
|
tmp = tmpx[i];
|
|
|
|
|
else
|
|
|
|
|
tmpx[i] = tmp = gen_reg_rtx (mode);
|
|
|
|
|
dst_addr = force_offsettable (dst_addr, piece, 1);
|
|
|
|
|
src_addr = force_offsettable (src_addr, piece, 1);
|
|
|
|
|
if (store[i])
|
|
|
|
|
emit_insn (store[i]);
|
|
|
|
|
emit_move_insn (tmp, change_address (src, mode, src_addr));
|
|
|
|
|
store[i] = gen_move_insn (change_address (dst, mode, dst_addr), tmp);
|
|
|
|
|
dst_addr = plus_constant (Pmode, dst_addr, piece);
|
|
|
|
|
src_addr = plus_constant (Pmode, src_addr, piece);
|
|
|
|
|
}
|
|
|
|
|
if (store[i])
|
|
|
|
|
emit_insn (store[i]);
|
|
|
|
|
if (store[i^1])
|
|
|
|
|
emit_insn (store[i^1]);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Prepare operands for move in MODE. Return true iff the move has
|
|
|
|
|
been emitted. */
|
|
|
|
|
|
|
|
|
|
bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
prepare_move_operands (rtx *operands, machine_mode mode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
/* We used to do this only for MODE_INT Modes, but addresses to floating
|
|
|
|
|
point variables may well be in the small data section. */
|
|
|
|
|
if (1)
|
|
|
|
|
{
|
|
|
|
|
if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[0], Pmode))
|
|
|
|
|
operands[0] = arc_rewrite_small_data (operands[0]);
|
|
|
|
|
else if (mode == SImode && flag_pic && SYMBOLIC_CONST (operands[1]))
|
|
|
|
|
{
|
|
|
|
|
emit_pic_move (operands, SImode);
|
|
|
|
|
|
|
|
|
|
/* Disable any REG_EQUALs associated with the symref
|
|
|
|
|
otherwise the optimization pass undoes the work done
|
|
|
|
|
here and references the variable directly. */
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (operands[0]) != MEM
|
|
|
|
|
&& !TARGET_NO_SDATA_SET
|
|
|
|
|
&& small_data_pattern (operands[1], Pmode))
|
|
|
|
|
{
|
|
|
|
|
/* This is to take care of address calculations involving sdata
|
|
|
|
|
variables. */
|
|
|
|
|
operands[1] = arc_rewrite_small_data (operands[1]);
|
|
|
|
|
|
|
|
|
|
emit_insn (gen_rtx_SET (mode, operands[0],operands[1]));
|
|
|
|
|
/* ??? This note is useless, since it only restates the set itself.
|
|
|
|
|
We should rather use the original SYMBOL_REF. However, there is
|
|
|
|
|
the problem that we are lying to the compiler about these
|
|
|
|
|
SYMBOL_REFs to start with. symbol@sda should be encoded specially
|
|
|
|
|
so that we can tell it apart from an actual symbol. */
|
|
|
|
|
set_unique_reg_note (get_last_insn (), REG_EQUAL, operands[1]);
|
|
|
|
|
|
|
|
|
|
/* Take care of the REG_EQUAL note that will be attached to mark the
|
|
|
|
|
output reg equal to the initial symbol_ref after this code is
|
|
|
|
|
executed. */
|
|
|
|
|
emit_move_insn (operands[0], operands[0]);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (MEM_P (operands[0])
|
|
|
|
|
&& !(reload_in_progress || reload_completed))
|
|
|
|
|
{
|
|
|
|
|
operands[1] = force_reg (mode, operands[1]);
|
|
|
|
|
if (!move_dest_operand (operands[0], mode))
|
|
|
|
|
{
|
|
|
|
|
rtx addr = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
|
|
|
|
|
/* This is like change_address_1 (operands[0], mode, 0, 1) ,
|
|
|
|
|
except that we can't use that function because it is static. */
|
|
|
|
|
rtx pat = change_address (operands[0], mode, addr);
|
|
|
|
|
MEM_COPY_ATTRIBUTES (pat, operands[0]);
|
|
|
|
|
operands[0] = pat;
|
|
|
|
|
}
|
|
|
|
|
if (!cse_not_expected)
|
|
|
|
|
{
|
|
|
|
|
rtx pat = XEXP (operands[0], 0);
|
|
|
|
|
|
|
|
|
|
pat = arc_legitimize_address_0 (pat, pat, mode);
|
|
|
|
|
if (pat)
|
|
|
|
|
{
|
|
|
|
|
pat = change_address (operands[0], mode, pat);
|
|
|
|
|
MEM_COPY_ATTRIBUTES (pat, operands[0]);
|
|
|
|
|
operands[0] = pat;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (MEM_P (operands[1]) && !cse_not_expected)
|
|
|
|
|
{
|
|
|
|
|
rtx pat = XEXP (operands[1], 0);
|
|
|
|
|
|
|
|
|
|
pat = arc_legitimize_address_0 (pat, pat, mode);
|
|
|
|
|
if (pat)
|
|
|
|
|
{
|
|
|
|
|
pat = change_address (operands[1], mode, pat);
|
|
|
|
|
MEM_COPY_ATTRIBUTES (pat, operands[1]);
|
|
|
|
|
operands[1] = pat;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Prepare OPERANDS for an extension using CODE to OMODE.
|
|
|
|
|
Return true iff the move has been emitted. */
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
prepare_extend_operands (rtx *operands, enum rtx_code code,
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode omode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[1], Pmode))
|
|
|
|
|
{
|
|
|
|
|
/* This is to take care of address calculations involving sdata
|
|
|
|
|
variables. */
|
|
|
|
|
operands[1]
|
|
|
|
|
= gen_rtx_fmt_e (code, omode, arc_rewrite_small_data (operands[1]));
|
|
|
|
|
emit_insn (gen_rtx_SET (omode, operands[0], operands[1]));
|
|
|
|
|
set_unique_reg_note (get_last_insn (), REG_EQUAL, operands[1]);
|
|
|
|
|
|
|
|
|
|
/* Take care of the REG_EQUAL note that will be attached to mark the
|
|
|
|
|
output reg equal to the initial extension after this code is
|
|
|
|
|
executed. */
|
|
|
|
|
emit_move_insn (operands[0], operands[0]);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Output a library call to a function called FNAME that has been arranged
|
|
|
|
|
to be local to any dso. */
|
|
|
|
|
|
|
|
|
|
const char *
|
|
|
|
|
arc_output_libcall (const char *fname)
|
|
|
|
|
{
|
|
|
|
|
unsigned len = strlen (fname);
|
|
|
|
|
static char buf[64];
|
|
|
|
|
|
|
|
|
|
gcc_assert (len < sizeof buf - 35);
|
|
|
|
|
if (TARGET_LONG_CALLS_SET
|
|
|
|
|
|| (TARGET_MEDIUM_CALLS && arc_ccfsm_cond_exec_p ()))
|
|
|
|
|
{
|
|
|
|
|
if (flag_pic)
|
|
|
|
|
sprintf (buf, "add r12,pcl,@%s-(.&-4)\n\tjl%%!%%* [r12]", fname);
|
|
|
|
|
else
|
|
|
|
|
sprintf (buf, "jl%%! @%s", fname);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
sprintf (buf, "bl%%!%%* @%s", fname);
|
|
|
|
|
return buf;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the SImode highpart of the DImode value IN. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
disi_highpart (rtx in)
|
|
|
|
|
{
|
|
|
|
|
return simplify_gen_subreg (SImode, in, DImode, TARGET_BIG_ENDIAN ? 0 : 4);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return length adjustment for INSN.
|
|
|
|
|
For ARC600:
|
|
|
|
|
A write to a core reg greater or equal to 32 must not be immediately
|
|
|
|
|
followed by a use. Anticipate the length requirement to insert a nop
|
|
|
|
|
between PRED and SUCC to prevent a hazard. */
|
|
|
|
|
|
|
|
|
|
static int
|
recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
|
|
|
|
arc600_corereg_hazard (rtx_insn *pred, rtx_insn *succ)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (!TARGET_ARC600)
|
|
|
|
|
return 0;
|
|
|
|
|
/* If SUCC is a doloop_end_i with a preceding label, we must output a nop
|
|
|
|
|
in front of SUCC anyway, so there will be separation between PRED and
|
|
|
|
|
SUCC. */
|
|
|
|
|
if (recog_memoized (succ) == CODE_FOR_doloop_end_i
|
|
|
|
|
&& LABEL_P (prev_nonnote_insn (succ)))
|
|
|
|
|
return 0;
|
|
|
|
|
if (recog_memoized (succ) == CODE_FOR_doloop_begin_i)
|
|
|
|
|
return 0;
|
|
|
|
|
if (GET_CODE (PATTERN (pred)) == SEQUENCE)
|
recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
|
|
|
|
pred = as_a <rtx_sequence *> (PATTERN (pred))->insn (1);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (GET_CODE (PATTERN (succ)) == SEQUENCE)
|
recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
|
|
|
|
succ = as_a <rtx_sequence *> (PATTERN (succ))->insn (0);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (recog_memoized (pred) == CODE_FOR_mulsi_600
|
|
|
|
|
|| recog_memoized (pred) == CODE_FOR_umul_600
|
|
|
|
|
|| recog_memoized (pred) == CODE_FOR_mac_600
|
|
|
|
|
|| recog_memoized (pred) == CODE_FOR_mul64_600
|
|
|
|
|
|| recog_memoized (pred) == CODE_FOR_mac64_600
|
|
|
|
|
|| recog_memoized (pred) == CODE_FOR_umul64_600
|
|
|
|
|
|| recog_memoized (pred) == CODE_FOR_umac64_600)
|
|
|
|
|
return 0;
|
2014-11-02 21:00:19 +01:00
|
|
|
|
subrtx_iterator::array_type array;
|
|
|
|
|
FOR_EACH_SUBRTX (iter, array, PATTERN (pred), NONCONST)
|
|
|
|
|
{
|
|
|
|
|
const_rtx x = *iter;
|
|
|
|
|
switch (GET_CODE (x))
|
|
|
|
|
{
|
|
|
|
|
case SET: case POST_INC: case POST_DEC: case PRE_INC: case PRE_DEC:
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
/* This is also fine for PRE/POST_MODIFY, because they
|
|
|
|
|
contain a SET. */
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
rtx dest = XEXP (x, 0);
|
|
|
|
|
/* Check if this sets a an extension register. N.B. we use 61 for the
|
|
|
|
|
condition codes, which is definitely not an extension register. */
|
|
|
|
|
if (REG_P (dest) && REGNO (dest) >= 32 && REGNO (dest) < 61
|
|
|
|
|
/* Check if the same register is used by the PAT. */
|
|
|
|
|
&& (refers_to_regno_p
|
|
|
|
|
(REGNO (dest),
|
|
|
|
|
REGNO (dest) + (GET_MODE_SIZE (GET_MODE (dest)) + 3) / 4U,
|
|
|
|
|
PATTERN (succ), 0)))
|
|
|
|
|
return 4;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* For ARC600:
|
|
|
|
|
A write to a core reg greater or equal to 32 must not be immediately
|
|
|
|
|
followed by a use. Anticipate the length requirement to insert a nop
|
|
|
|
|
between PRED and SUCC to prevent a hazard. */
|
|
|
|
|
|
|
|
|
|
int
|
recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
|
|
|
|
arc_hazard (rtx_insn *pred, rtx_insn *succ)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (!TARGET_ARC600)
|
|
|
|
|
return 0;
|
|
|
|
|
if (!pred || !INSN_P (pred) || !succ || !INSN_P (succ))
|
|
|
|
|
return 0;
|
|
|
|
|
/* We might have a CALL to a non-returning function before a loop end.
|
|
|
|
|
??? Although the manual says that's OK (the target is outside the loop,
|
|
|
|
|
and the loop counter unused there), the assembler barfs on this, so we
|
|
|
|
|
must instert a nop before such a call too. */
|
|
|
|
|
if (recog_memoized (succ) == CODE_FOR_doloop_end_i
|
|
|
|
|
&& (JUMP_P (pred) || CALL_P (pred)
|
|
|
|
|
|| GET_CODE (PATTERN (pred)) == SEQUENCE))
|
|
|
|
|
return 4;
|
|
|
|
|
return arc600_corereg_hazard (pred, succ);
|
|
|
|
|
}
|
|
|
|
|
|
|
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/* Return length adjustment for INSN. */
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int
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recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
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arc_adjust_insn_length (rtx_insn *insn, int len, bool)
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2013-10-01 19:03:46 +02:00
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{
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if (!INSN_P (insn))
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return len;
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/* We already handle sequences by ignoring the delay sequence flag. */
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if (GET_CODE (PATTERN (insn)) == SEQUENCE)
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return len;
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/* It is impossible to jump to the very end of a Zero-Overhead Loop, as
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the ZOL mechanism only triggers when advancing to the end address,
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so if there's a label at the end of a ZOL, we need to insert a nop.
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The ARC600 ZOL also has extra restrictions on jumps at the end of a
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loop. */
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if (recog_memoized (insn) == CODE_FOR_doloop_end_i)
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{
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config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
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rtx_insn *prev = prev_nonnote_insn (insn);
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2013-10-01 19:03:46 +02:00
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return ((LABEL_P (prev)
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|| (TARGET_ARC600
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&& (JUMP_P (prev)
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|| CALL_P (prev) /* Could be a noreturn call. */
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|| (NONJUMP_INSN_P (prev)
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&& GET_CODE (PATTERN (prev)) == SEQUENCE))))
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? len + 4 : len);
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}
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/* Check for return with but one preceding insn since function
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start / call. */
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if (TARGET_PAD_RETURN
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&& JUMP_P (insn)
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&& GET_CODE (PATTERN (insn)) != ADDR_VEC
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&& GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC
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&& get_attr_type (insn) == TYPE_RETURN)
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{
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Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
|
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|
rtx_insn *prev = prev_active_insn (insn);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
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|
if (!prev || !(prev = prev_active_insn (prev))
|
|
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|| ((NONJUMP_INSN_P (prev)
|
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|
&& GET_CODE (PATTERN (prev)) == SEQUENCE)
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
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? CALL_ATTR (as_a <rtx_sequence *> (PATTERN (prev))->insn (0),
|
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NON_SIBCALL)
|
2013-10-01 19:03:46 +02:00
|
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: CALL_ATTR (prev, NON_SIBCALL)))
|
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|
|
return len + 4;
|
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|
}
|
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|
if (TARGET_ARC600)
|
|
|
|
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{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *succ = next_real_insn (insn);
|
2013-10-01 19:03:46 +02:00
|
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|
/* One the ARC600, a write to an extension register must be separated
|
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|
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from a read. */
|
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|
|
if (succ && INSN_P (succ))
|
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|
|
len += arc600_corereg_hazard (insn, succ);
|
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|
|
|
}
|
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|
|
/* Restore extracted operands - otherwise splitters like the addsi3_mixed one
|
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|
can go awry. */
|
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|
|
extract_constrain_insn_cached (insn);
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|
|
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|
|
return len;
|
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|
}
|
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/* Values for length_sensitive. */
|
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enum
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{
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ARC_LS_NONE,// Jcc
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ARC_LS_25, // 25 bit offset, B
|
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ARC_LS_21, // 21 bit offset, Bcc
|
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ARC_LS_U13,// 13 bit unsigned offset, LP
|
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ARC_LS_10, // 10 bit offset, B_s, Beq_s, Bne_s
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ARC_LS_9, // 9 bit offset, BRcc
|
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ARC_LS_8, // 8 bit offset, BRcc_s
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ARC_LS_U7, // 7 bit unsigned offset, LPcc
|
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ARC_LS_7 // 7 bit offset, Bcc_s
|
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};
|
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/* While the infrastructure patch is waiting for review, duplicate the
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struct definitions, to allow this file to compile. */
|
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#if 1
|
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|
typedef struct
|
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{
|
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|
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unsigned align_set;
|
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|
|
/* Cost as a branch / call target or call return address. */
|
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|
|
int target_cost;
|
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|
|
int fallthrough_cost;
|
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|
|
int branch_cost;
|
|
|
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|
int length;
|
|
|
|
|
/* 0 for not length sensitive, 1 for largest offset range,
|
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* 2 for next smaller etc. */
|
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unsigned length_sensitive : 8;
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bool enabled;
|
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} insn_length_variant_t;
|
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typedef struct insn_length_parameters_s
|
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{
|
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int align_unit_log;
|
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int align_base_log;
|
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int max_variants;
|
recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
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int (*get_variants) (rtx_insn *, int, bool, bool, insn_length_variant_t *);
|
2013-10-01 19:03:46 +02:00
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} insn_length_parameters_t;
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static void
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arc_insn_length_parameters (insn_length_parameters_t *ilp) ATTRIBUTE_UNUSED;
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#endif
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static int
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recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
|
|
|
|
arc_get_insn_variants (rtx_insn *insn, int len, bool, bool target_p,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
insn_length_variant_t *ilv)
|
|
|
|
|
{
|
|
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|
|
if (!NONDEBUG_INSN_P (insn))
|
|
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|
return 0;
|
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|
enum attr_type type;
|
|
|
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|
/* shorten_branches doesn't take optimize_size into account yet for the
|
|
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|
get_variants mechanism, so turn this off for now. */
|
|
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|
|
if (optimize_size)
|
|
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|
|
return 0;
|
recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
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if (rtx_sequence *pat = dyn_cast <rtx_sequence *> (PATTERN (insn)))
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2013-10-01 19:03:46 +02:00
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{
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/* The interaction of a short delay slot insn with a short branch is
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too weird for shorten_branches to piece together, so describe the
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entire SEQUENCE. */
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recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
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rtx_insn *inner;
|
2013-10-01 19:03:46 +02:00
|
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if (TARGET_UPSIZE_DBR
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
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&& get_attr_length (pat->insn (1)) <= 2
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recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
2014-09-09 18:34:56 +02:00
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&& (((type = get_attr_type (inner = pat->insn (0)))
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2013-10-01 19:03:46 +02:00
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== TYPE_UNCOND_BRANCH)
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|| type == TYPE_BRANCH)
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&& get_attr_delay_slot_filled (inner) == DELAY_SLOT_FILLED_YES)
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{
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int n_variants
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= arc_get_insn_variants (inner, get_attr_length (inner), true,
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target_p, ilv+1);
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/* The short variant gets split into a higher-cost aligned
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and a lower cost unaligned variant. */
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gcc_assert (n_variants);
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gcc_assert (ilv[1].length_sensitive == ARC_LS_7
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|| ilv[1].length_sensitive == ARC_LS_10);
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gcc_assert (ilv[1].align_set == 3);
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ilv[0] = ilv[1];
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ilv[0].align_set = 1;
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ilv[0].branch_cost += 1;
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ilv[1].align_set = 2;
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n_variants++;
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for (int i = 0; i < n_variants; i++)
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ilv[i].length += 2;
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/* In case an instruction with aligned size is wanted, and
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|
|
|
|
the short variants are unavailable / too expensive, add
|
|
|
|
|
versions of long branch + long delay slot. */
|
|
|
|
|
for (int i = 2, end = n_variants; i < end; i++, n_variants++)
|
|
|
|
|
{
|
|
|
|
|
ilv[n_variants] = ilv[i];
|
|
|
|
|
ilv[n_variants].length += 2;
|
|
|
|
|
}
|
|
|
|
|
return n_variants;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
insn_length_variant_t *first_ilv = ilv;
|
|
|
|
|
type = get_attr_type (insn);
|
|
|
|
|
bool delay_filled
|
|
|
|
|
= (get_attr_delay_slot_filled (insn) == DELAY_SLOT_FILLED_YES);
|
|
|
|
|
int branch_align_cost = delay_filled ? 0 : 1;
|
|
|
|
|
int branch_unalign_cost = delay_filled ? 0 : TARGET_UNALIGN_BRANCH ? 0 : 1;
|
|
|
|
|
/* If the previous instruction is an sfunc call, this insn is always
|
|
|
|
|
a target, even though the middle-end is unaware of this. */
|
|
|
|
|
bool force_target = false;
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *prev = prev_active_insn (insn);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (prev && arc_next_active_insn (prev, 0) == insn
|
|
|
|
|
&& ((NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
|
|
|
|
? CALL_ATTR (as_a <rtx_sequence *> (PATTERN (prev))->insn (0),
|
|
|
|
|
NON_SIBCALL)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
: (CALL_ATTR (prev, NON_SIBCALL)
|
|
|
|
|
&& NEXT_INSN (PREV_INSN (prev)) == prev)))
|
|
|
|
|
force_target = true;
|
|
|
|
|
|
|
|
|
|
switch (type)
|
|
|
|
|
{
|
|
|
|
|
case TYPE_BRCC:
|
|
|
|
|
/* Short BRCC only comes in no-delay-slot version, and without limm */
|
|
|
|
|
if (!delay_filled)
|
|
|
|
|
{
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->length = 2;
|
|
|
|
|
ilv->branch_cost = 1;
|
|
|
|
|
ilv->enabled = (len == 2);
|
|
|
|
|
ilv->length_sensitive = ARC_LS_8;
|
|
|
|
|
ilv++;
|
|
|
|
|
}
|
|
|
|
|
/* Fall through. */
|
|
|
|
|
case TYPE_BRCC_NO_DELAY_SLOT:
|
|
|
|
|
/* doloop_fallback* patterns are TYPE_BRCC_NO_DELAY_SLOT for
|
|
|
|
|
(delay slot) scheduling purposes, but they are longer. */
|
|
|
|
|
if (GET_CODE (PATTERN (insn)) == PARALLEL
|
|
|
|
|
&& GET_CODE (XVECEXP (PATTERN (insn), 0, 1)) == SET)
|
|
|
|
|
return 0;
|
|
|
|
|
/* Standard BRCC: 4 bytes, or 8 bytes with limm. */
|
|
|
|
|
ilv->length = ((type == TYPE_BRCC) ? 4 : 8);
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->branch_cost = branch_align_cost;
|
|
|
|
|
ilv->enabled = (len <= ilv->length);
|
|
|
|
|
ilv->length_sensitive = ARC_LS_9;
|
|
|
|
|
if ((target_p || force_target)
|
|
|
|
|
|| (!delay_filled && TARGET_UNALIGN_BRANCH))
|
|
|
|
|
{
|
|
|
|
|
ilv[1] = *ilv;
|
|
|
|
|
ilv->align_set = 1;
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->align_set = 2;
|
|
|
|
|
ilv->target_cost = 1;
|
|
|
|
|
ilv->branch_cost = branch_unalign_cost;
|
|
|
|
|
}
|
|
|
|
|
ilv++;
|
|
|
|
|
|
|
|
|
|
rtx op, op0;
|
|
|
|
|
op = XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 0);
|
|
|
|
|
op0 = XEXP (op, 0);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (op0) == ZERO_EXTRACT
|
|
|
|
|
&& satisfies_constraint_L (XEXP (op0, 2)))
|
|
|
|
|
op0 = XEXP (op0, 0);
|
|
|
|
|
if (satisfies_constraint_Rcq (op0))
|
|
|
|
|
{
|
|
|
|
|
ilv->length = ((type == TYPE_BRCC) ? 6 : 10);
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->branch_cost = 1 + branch_align_cost;
|
|
|
|
|
ilv->fallthrough_cost = 1;
|
|
|
|
|
ilv->enabled = true;
|
|
|
|
|
ilv->length_sensitive = ARC_LS_21;
|
|
|
|
|
if (!delay_filled && TARGET_UNALIGN_BRANCH)
|
|
|
|
|
{
|
|
|
|
|
ilv[1] = *ilv;
|
|
|
|
|
ilv->align_set = 1;
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->align_set = 2;
|
|
|
|
|
ilv->branch_cost = 1 + branch_unalign_cost;
|
|
|
|
|
}
|
|
|
|
|
ilv++;
|
|
|
|
|
}
|
|
|
|
|
ilv->length = ((type == TYPE_BRCC) ? 8 : 12);
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->branch_cost = 1 + branch_align_cost;
|
|
|
|
|
ilv->fallthrough_cost = 1;
|
|
|
|
|
ilv->enabled = true;
|
|
|
|
|
ilv->length_sensitive = ARC_LS_21;
|
|
|
|
|
if ((target_p || force_target)
|
|
|
|
|
|| (!delay_filled && TARGET_UNALIGN_BRANCH))
|
|
|
|
|
{
|
|
|
|
|
ilv[1] = *ilv;
|
|
|
|
|
ilv->align_set = 1;
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->align_set = 2;
|
|
|
|
|
ilv->target_cost = 1;
|
|
|
|
|
ilv->branch_cost = 1 + branch_unalign_cost;
|
|
|
|
|
}
|
|
|
|
|
ilv++;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case TYPE_SFUNC:
|
|
|
|
|
ilv->length = 12;
|
|
|
|
|
goto do_call;
|
|
|
|
|
case TYPE_CALL_NO_DELAY_SLOT:
|
|
|
|
|
ilv->length = 8;
|
|
|
|
|
goto do_call;
|
|
|
|
|
case TYPE_CALL:
|
|
|
|
|
ilv->length = 4;
|
|
|
|
|
ilv->length_sensitive
|
|
|
|
|
= GET_CODE (PATTERN (insn)) == COND_EXEC ? ARC_LS_21 : ARC_LS_25;
|
|
|
|
|
do_call:
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->fallthrough_cost = branch_align_cost;
|
|
|
|
|
ilv->enabled = true;
|
|
|
|
|
if ((target_p || force_target)
|
|
|
|
|
|| (!delay_filled && TARGET_UNALIGN_BRANCH))
|
|
|
|
|
{
|
|
|
|
|
ilv[1] = *ilv;
|
|
|
|
|
ilv->align_set = 1;
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->align_set = 2;
|
|
|
|
|
ilv->target_cost = 1;
|
|
|
|
|
ilv->fallthrough_cost = branch_unalign_cost;
|
|
|
|
|
}
|
|
|
|
|
ilv++;
|
|
|
|
|
break;
|
|
|
|
|
case TYPE_UNCOND_BRANCH:
|
|
|
|
|
/* Strictly speaking, this should be ARC_LS_10 for equality comparisons,
|
|
|
|
|
but that makes no difference at the moment. */
|
|
|
|
|
ilv->length_sensitive = ARC_LS_7;
|
|
|
|
|
ilv[1].length_sensitive = ARC_LS_25;
|
|
|
|
|
goto do_branch;
|
|
|
|
|
case TYPE_BRANCH:
|
|
|
|
|
ilv->length_sensitive = ARC_LS_10;
|
|
|
|
|
ilv[1].length_sensitive = ARC_LS_21;
|
|
|
|
|
do_branch:
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->length = 2;
|
|
|
|
|
ilv->branch_cost = branch_align_cost;
|
|
|
|
|
ilv->enabled = (len == ilv->length);
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->length = 4;
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->branch_cost = branch_align_cost;
|
|
|
|
|
ilv->enabled = true;
|
|
|
|
|
if ((target_p || force_target)
|
|
|
|
|
|| (!delay_filled && TARGET_UNALIGN_BRANCH))
|
|
|
|
|
{
|
|
|
|
|
ilv[1] = *ilv;
|
|
|
|
|
ilv->align_set = 1;
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->align_set = 2;
|
|
|
|
|
ilv->target_cost = 1;
|
|
|
|
|
ilv->branch_cost = branch_unalign_cost;
|
|
|
|
|
}
|
|
|
|
|
ilv++;
|
|
|
|
|
break;
|
|
|
|
|
case TYPE_JUMP:
|
|
|
|
|
return 0;
|
|
|
|
|
default:
|
|
|
|
|
/* For every short insn, there is generally also a long insn.
|
|
|
|
|
trap_s is an exception. */
|
|
|
|
|
if ((len & 2) == 0 || recog_memoized (insn) == CODE_FOR_trap_s)
|
|
|
|
|
return 0;
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->length = len;
|
|
|
|
|
ilv->enabled = 1;
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->align_set = 3;
|
|
|
|
|
ilv->length = len + 2;
|
|
|
|
|
ilv->enabled = 1;
|
|
|
|
|
if (target_p || force_target)
|
|
|
|
|
{
|
|
|
|
|
ilv[1] = *ilv;
|
|
|
|
|
ilv->align_set = 1;
|
|
|
|
|
ilv++;
|
|
|
|
|
ilv->align_set = 2;
|
|
|
|
|
ilv->target_cost = 1;
|
|
|
|
|
}
|
|
|
|
|
ilv++;
|
|
|
|
|
}
|
|
|
|
|
/* If the previous instruction is an sfunc call, this insn is always
|
|
|
|
|
a target, even though the middle-end is unaware of this.
|
|
|
|
|
Therefore, if we have a call predecessor, transfer the target cost
|
|
|
|
|
to the fallthrough and branch costs. */
|
|
|
|
|
if (force_target)
|
|
|
|
|
{
|
|
|
|
|
for (insn_length_variant_t *p = first_ilv; p < ilv; p++)
|
|
|
|
|
{
|
|
|
|
|
p->fallthrough_cost += p->target_cost;
|
|
|
|
|
p->branch_cost += p->target_cost;
|
|
|
|
|
p->target_cost = 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return ilv - first_ilv;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
arc_insn_length_parameters (insn_length_parameters_t *ilp)
|
|
|
|
|
{
|
|
|
|
|
ilp->align_unit_log = 1;
|
|
|
|
|
ilp->align_base_log = 1;
|
|
|
|
|
ilp->max_variants = 7;
|
|
|
|
|
ilp->get_variants = arc_get_insn_variants;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return a copy of COND from *STATEP, inverted if that is indicated by the
|
|
|
|
|
CC field of *STATEP. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_get_ccfsm_cond (struct arc_ccfsm *statep, bool reverse)
|
|
|
|
|
{
|
|
|
|
|
rtx cond = statep->cond;
|
|
|
|
|
int raw_cc = get_arc_condition_code (cond);
|
|
|
|
|
if (reverse)
|
|
|
|
|
raw_cc = ARC_INVERSE_CONDITION_CODE (raw_cc);
|
|
|
|
|
|
|
|
|
|
if (statep->cc == raw_cc)
|
|
|
|
|
return copy_rtx (cond);
|
|
|
|
|
|
|
|
|
|
gcc_assert (ARC_INVERSE_CONDITION_CODE (raw_cc) == statep->cc);
|
|
|
|
|
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode ccm = GET_MODE (XEXP (cond, 0));
|
2013-10-01 19:03:46 +02:00
|
|
|
|
enum rtx_code code = reverse_condition (GET_CODE (cond));
|
|
|
|
|
if (code == UNKNOWN || ccm == CC_FP_GTmode || ccm == CC_FP_GEmode)
|
|
|
|
|
code = reverse_condition_maybe_unordered (GET_CODE (cond));
|
|
|
|
|
|
|
|
|
|
return gen_rtx_fmt_ee (code, GET_MODE (cond),
|
|
|
|
|
copy_rtx (XEXP (cond, 0)), copy_rtx (XEXP (cond, 1)));
|
|
|
|
|
}
|
|
|
|
|
|
2014-03-11 17:21:33 +01:00
|
|
|
|
/* Return version of PAT conditionalized with COND, which is part of INSN.
|
|
|
|
|
ANNULLED indicates if INSN is an annulled delay-slot insn.
|
|
|
|
|
Register further changes if necessary. */
|
|
|
|
|
static rtx
|
|
|
|
|
conditionalize_nonjump (rtx pat, rtx cond, rtx insn, bool annulled)
|
|
|
|
|
{
|
|
|
|
|
/* For commutative operators, we generally prefer to have
|
|
|
|
|
the first source match the destination. */
|
|
|
|
|
if (GET_CODE (pat) == SET)
|
|
|
|
|
{
|
|
|
|
|
rtx src = SET_SRC (pat);
|
|
|
|
|
|
|
|
|
|
if (COMMUTATIVE_P (src))
|
|
|
|
|
{
|
|
|
|
|
rtx src0 = XEXP (src, 0);
|
|
|
|
|
rtx src1 = XEXP (src, 1);
|
|
|
|
|
rtx dst = SET_DEST (pat);
|
|
|
|
|
|
|
|
|
|
if (rtx_equal_p (src1, dst) && !rtx_equal_p (src0, dst)
|
|
|
|
|
/* Leave add_n alone - the canonical form is to
|
|
|
|
|
have the complex summand first. */
|
|
|
|
|
&& REG_P (src0))
|
|
|
|
|
pat = gen_rtx_SET (VOIDmode, dst,
|
|
|
|
|
gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src),
|
|
|
|
|
src1, src0));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* dwarf2out.c:dwarf2out_frame_debug_expr doesn't know
|
|
|
|
|
what to do with COND_EXEC. */
|
|
|
|
|
if (RTX_FRAME_RELATED_P (insn))
|
|
|
|
|
{
|
|
|
|
|
/* If this is the delay slot insn of an anulled branch,
|
|
|
|
|
dwarf2out.c:scan_trace understands the anulling semantics
|
|
|
|
|
without the COND_EXEC. */
|
|
|
|
|
gcc_assert (annulled);
|
|
|
|
|
rtx note = alloc_reg_note (REG_FRAME_RELATED_EXPR, pat,
|
|
|
|
|
REG_NOTES (insn));
|
|
|
|
|
validate_change (insn, ®_NOTES (insn), note, 1);
|
|
|
|
|
}
|
|
|
|
|
pat = gen_rtx_COND_EXEC (VOIDmode, cond, pat);
|
|
|
|
|
return pat;
|
|
|
|
|
}
|
|
|
|
|
|
2013-10-01 19:03:46 +02:00
|
|
|
|
/* Use the ccfsm machinery to do if conversion. */
|
|
|
|
|
|
|
|
|
|
static unsigned
|
|
|
|
|
arc_ifcvt (void)
|
|
|
|
|
{
|
|
|
|
|
struct arc_ccfsm *statep = &cfun->machine->ccfsm_current;
|
|
|
|
|
basic_block merge_bb = 0;
|
|
|
|
|
|
|
|
|
|
memset (statep, 0, sizeof *statep);
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
for (rtx_insn *insn = get_insns (); insn; insn = next_insn (insn))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
arc_ccfsm_advance (insn, statep);
|
|
|
|
|
|
|
|
|
|
switch (statep->state)
|
|
|
|
|
{
|
|
|
|
|
case 0:
|
|
|
|
|
if (JUMP_P (insn))
|
|
|
|
|
merge_bb = 0;
|
|
|
|
|
break;
|
|
|
|
|
case 1: case 2:
|
|
|
|
|
{
|
|
|
|
|
/* Deleted branch. */
|
|
|
|
|
gcc_assert (!merge_bb);
|
|
|
|
|
merge_bb = BLOCK_FOR_INSN (insn);
|
|
|
|
|
basic_block succ_bb
|
|
|
|
|
= BLOCK_FOR_INSN (NEXT_INSN (NEXT_INSN (PREV_INSN (insn))));
|
|
|
|
|
arc_ccfsm_post_advance (insn, statep);
|
2013-10-24 19:11:01 +02:00
|
|
|
|
gcc_assert (!IN_RANGE (statep->state, 1, 2));
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *seq = NEXT_INSN (PREV_INSN (insn));
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (seq != insn)
|
|
|
|
|
{
|
|
|
|
|
rtx slot = XVECEXP (PATTERN (seq), 0, 1);
|
|
|
|
|
rtx pat = PATTERN (slot);
|
|
|
|
|
if (INSN_ANNULLED_BRANCH_P (insn))
|
|
|
|
|
{
|
|
|
|
|
rtx cond
|
|
|
|
|
= arc_get_ccfsm_cond (statep, INSN_FROM_TARGET_P (slot));
|
|
|
|
|
pat = gen_rtx_COND_EXEC (VOIDmode, cond, pat);
|
|
|
|
|
}
|
|
|
|
|
if (!validate_change (seq, &PATTERN (seq), pat, 0))
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
PUT_CODE (slot, NOTE);
|
|
|
|
|
NOTE_KIND (slot) = NOTE_INSN_DELETED;
|
|
|
|
|
if (merge_bb && succ_bb)
|
|
|
|
|
merge_blocks (merge_bb, succ_bb);
|
|
|
|
|
}
|
|
|
|
|
else if (merge_bb && succ_bb)
|
|
|
|
|
{
|
|
|
|
|
set_insn_deleted (insn);
|
|
|
|
|
merge_blocks (merge_bb, succ_bb);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
PUT_CODE (insn, NOTE);
|
|
|
|
|
NOTE_KIND (insn) = NOTE_INSN_DELETED;
|
|
|
|
|
}
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
case 3:
|
|
|
|
|
if (LABEL_P (insn)
|
|
|
|
|
&& statep->target_label == CODE_LABEL_NUMBER (insn))
|
|
|
|
|
{
|
|
|
|
|
arc_ccfsm_post_advance (insn, statep);
|
|
|
|
|
basic_block succ_bb = BLOCK_FOR_INSN (insn);
|
|
|
|
|
if (merge_bb && succ_bb)
|
|
|
|
|
merge_blocks (merge_bb, succ_bb);
|
|
|
|
|
else if (--LABEL_NUSES (insn) == 0)
|
|
|
|
|
{
|
|
|
|
|
const char *name = LABEL_NAME (insn);
|
|
|
|
|
PUT_CODE (insn, NOTE);
|
|
|
|
|
NOTE_KIND (insn) = NOTE_INSN_DELETED_LABEL;
|
|
|
|
|
NOTE_DELETED_LABEL_NAME (insn) = name;
|
|
|
|
|
}
|
|
|
|
|
merge_bb = 0;
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
/* Fall through. */
|
|
|
|
|
case 4: case 5:
|
|
|
|
|
if (!NONDEBUG_INSN_P (insn))
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* Conditionalized insn. */
|
|
|
|
|
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *prev, *pprev;
|
|
|
|
|
rtx *patp, pat, cond;
|
2014-03-11 17:21:33 +01:00
|
|
|
|
bool annulled; annulled = false;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
/* If this is a delay slot insn in a non-annulled branch,
|
|
|
|
|
don't conditionalize it. N.B., this should be fine for
|
|
|
|
|
conditional return too. However, don't do this for
|
|
|
|
|
unconditional branches, as these would be encountered when
|
|
|
|
|
processing an 'else' part. */
|
|
|
|
|
prev = PREV_INSN (insn);
|
|
|
|
|
pprev = PREV_INSN (prev);
|
|
|
|
|
if (pprev && NEXT_INSN (NEXT_INSN (pprev)) == NEXT_INSN (insn)
|
2014-03-11 17:21:33 +01:00
|
|
|
|
&& JUMP_P (prev) && get_attr_cond (prev) == COND_USE)
|
|
|
|
|
{
|
|
|
|
|
if (!INSN_ANNULLED_BRANCH_P (prev))
|
|
|
|
|
break;
|
|
|
|
|
annulled = true;
|
|
|
|
|
}
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
patp = &PATTERN (insn);
|
|
|
|
|
pat = *patp;
|
|
|
|
|
cond = arc_get_ccfsm_cond (statep, INSN_FROM_TARGET_P (insn));
|
|
|
|
|
if (NONJUMP_INSN_P (insn) || CALL_P (insn))
|
|
|
|
|
{
|
|
|
|
|
/* ??? don't conditionalize if all side effects are dead
|
|
|
|
|
in the not-execute case. */
|
2013-11-07 18:37:11 +01:00
|
|
|
|
|
2014-03-11 17:21:33 +01:00
|
|
|
|
pat = conditionalize_nonjump (pat, cond, insn, annulled);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
else if (simplejump_p (insn))
|
|
|
|
|
{
|
|
|
|
|
patp = &SET_SRC (pat);
|
|
|
|
|
pat = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, *patp, pc_rtx);
|
|
|
|
|
}
|
|
|
|
|
else if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
|
|
|
|
|
{
|
|
|
|
|
pat = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, pat, pc_rtx);
|
|
|
|
|
pat = gen_rtx_SET (VOIDmode, pc_rtx, pat);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
validate_change (insn, patp, pat, 1);
|
|
|
|
|
if (!apply_change_group ())
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
if (JUMP_P (insn))
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *next = next_nonnote_insn (insn);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (GET_CODE (next) == BARRIER)
|
|
|
|
|
delete_insn (next);
|
|
|
|
|
if (statep->state == 3)
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
arc_ccfsm_post_advance (insn, statep);
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2013-11-16 12:53:21 +01:00
|
|
|
|
/* Find annulled delay insns and convert them to use the appropriate predicate.
|
|
|
|
|
This allows branch shortening to size up these insns properly. */
|
|
|
|
|
|
|
|
|
|
static unsigned
|
|
|
|
|
arc_predicate_delay_insns (void)
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
for (rtx_insn *insn = get_insns (); insn; insn = NEXT_INSN (insn))
|
2013-11-16 12:53:21 +01:00
|
|
|
|
{
|
|
|
|
|
rtx pat, jump, dlay, src, cond, *patp;
|
|
|
|
|
int reverse;
|
|
|
|
|
|
|
|
|
|
if (!NONJUMP_INSN_P (insn)
|
|
|
|
|
|| GET_CODE (pat = PATTERN (insn)) != SEQUENCE)
|
|
|
|
|
continue;
|
|
|
|
|
jump = XVECEXP (pat, 0, 0);
|
|
|
|
|
dlay = XVECEXP (pat, 0, 1);
|
|
|
|
|
if (!JUMP_P (jump) || !INSN_ANNULLED_BRANCH_P (jump))
|
|
|
|
|
continue;
|
|
|
|
|
/* If the branch insn does the annulling, leave the delay insn alone. */
|
|
|
|
|
if (!TARGET_AT_DBR_CONDEXEC && !INSN_FROM_TARGET_P (dlay))
|
|
|
|
|
continue;
|
|
|
|
|
/* ??? Could also leave DLAY un-conditionalized if its target is dead
|
|
|
|
|
on the other path. */
|
|
|
|
|
gcc_assert (GET_CODE (PATTERN (jump)) == SET);
|
|
|
|
|
gcc_assert (SET_DEST (PATTERN (jump)) == pc_rtx);
|
|
|
|
|
src = SET_SRC (PATTERN (jump));
|
|
|
|
|
gcc_assert (GET_CODE (src) == IF_THEN_ELSE);
|
|
|
|
|
cond = XEXP (src, 0);
|
|
|
|
|
if (XEXP (src, 2) == pc_rtx)
|
|
|
|
|
reverse = 0;
|
|
|
|
|
else if (XEXP (src, 1) == pc_rtx)
|
|
|
|
|
reverse = 1;
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
2014-09-06 18:14:47 +02:00
|
|
|
|
if (reverse != !INSN_FROM_TARGET_P (dlay))
|
2013-11-16 12:53:21 +01:00
|
|
|
|
{
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode ccm = GET_MODE (XEXP (cond, 0));
|
2013-11-16 12:53:21 +01:00
|
|
|
|
enum rtx_code code = reverse_condition (GET_CODE (cond));
|
|
|
|
|
if (code == UNKNOWN || ccm == CC_FP_GTmode || ccm == CC_FP_GEmode)
|
|
|
|
|
code = reverse_condition_maybe_unordered (GET_CODE (cond));
|
|
|
|
|
|
|
|
|
|
cond = gen_rtx_fmt_ee (code, GET_MODE (cond),
|
|
|
|
|
copy_rtx (XEXP (cond, 0)),
|
|
|
|
|
copy_rtx (XEXP (cond, 1)));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
cond = copy_rtx (cond);
|
|
|
|
|
patp = &PATTERN (dlay);
|
|
|
|
|
pat = *patp;
|
2014-03-13 01:02:37 +01:00
|
|
|
|
pat = conditionalize_nonjump (pat, cond, dlay, true);
|
2013-11-16 12:53:21 +01:00
|
|
|
|
validate_change (dlay, patp, pat, 1);
|
|
|
|
|
if (!apply_change_group ())
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2013-10-01 19:03:46 +02:00
|
|
|
|
/* For ARC600: If a write to a core reg >=32 appears in a delay slot
|
|
|
|
|
(other than of a forward brcc), it creates a hazard when there is a read
|
|
|
|
|
of the same register at the branch target. We can't know what is at the
|
|
|
|
|
branch target of calls, and for branches, we don't really know before the
|
|
|
|
|
end of delay slot scheduling, either. Not only can individual instruction
|
|
|
|
|
be hoisted out into a delay slot, a basic block can also be emptied this
|
|
|
|
|
way, and branch and/or fall through targets be redirected. Hence we don't
|
|
|
|
|
want such writes in a delay slot. */
|
|
|
|
|
|
|
|
|
|
/* Return nonzreo iff INSN writes to an extension core register. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
arc_write_ext_corereg (rtx insn)
|
|
|
|
|
{
|
2014-11-02 21:00:25 +01:00
|
|
|
|
subrtx_iterator::array_type array;
|
|
|
|
|
FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
|
|
|
|
|
{
|
|
|
|
|
const_rtx x = *iter;
|
|
|
|
|
switch (GET_CODE (x))
|
|
|
|
|
{
|
|
|
|
|
case SET: case POST_INC: case POST_DEC: case PRE_INC: case PRE_DEC:
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
/* This is also fine for PRE/POST_MODIFY, because they
|
|
|
|
|
contain a SET. */
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
const_rtx dest = XEXP (x, 0);
|
|
|
|
|
if (REG_P (dest) && REGNO (dest) >= 32 && REGNO (dest) < 61)
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
2013-10-01 19:03:46 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This is like the hook, but returns NULL when it can't / won't generate
|
|
|
|
|
a legitimate address. */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_legitimize_address_0 (rtx x, rtx oldx ATTRIBUTE_UNUSED,
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
rtx addr, inner;
|
|
|
|
|
|
|
|
|
|
if (flag_pic && SYMBOLIC_CONST (x))
|
|
|
|
|
(x) = arc_legitimize_pic_address (x, 0);
|
|
|
|
|
addr = x;
|
|
|
|
|
if (GET_CODE (addr) == CONST)
|
|
|
|
|
addr = XEXP (addr, 0);
|
|
|
|
|
if (GET_CODE (addr) == PLUS
|
|
|
|
|
&& CONST_INT_P (XEXP (addr, 1))
|
|
|
|
|
&& ((GET_CODE (XEXP (addr, 0)) == SYMBOL_REF
|
|
|
|
|
&& !SYMBOL_REF_FUNCTION_P (XEXP (addr, 0)))
|
|
|
|
|
|| (REG_P (XEXP (addr, 0))
|
|
|
|
|
&& (INTVAL (XEXP (addr, 1)) & 252))))
|
|
|
|
|
{
|
|
|
|
|
HOST_WIDE_INT offs, upper;
|
|
|
|
|
int size = GET_MODE_SIZE (mode);
|
|
|
|
|
|
|
|
|
|
offs = INTVAL (XEXP (addr, 1));
|
|
|
|
|
upper = (offs + 256 * size) & ~511 * size;
|
|
|
|
|
inner = plus_constant (Pmode, XEXP (addr, 0), upper);
|
|
|
|
|
#if 0 /* ??? this produces worse code for EEMBC idctrn01 */
|
|
|
|
|
if (GET_CODE (x) == CONST)
|
|
|
|
|
inner = gen_rtx_CONST (Pmode, inner);
|
|
|
|
|
#endif
|
|
|
|
|
addr = plus_constant (Pmode, force_reg (Pmode, inner), offs - upper);
|
|
|
|
|
x = addr;
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (addr) == SYMBOL_REF && !SYMBOL_REF_FUNCTION_P (addr))
|
|
|
|
|
x = force_reg (Pmode, x);
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
if (memory_address_p ((machine_mode) mode, x))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
return x;
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static rtx
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_legitimize_address (rtx orig_x, rtx oldx, machine_mode mode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
rtx new_x = arc_legitimize_address_0 (orig_x, oldx, mode);
|
|
|
|
|
|
|
|
|
|
if (new_x)
|
|
|
|
|
return new_x;
|
|
|
|
|
return orig_x;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_delegitimize_address_0 (rtx x)
|
|
|
|
|
{
|
|
|
|
|
rtx u, gp;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == CONST && GET_CODE (u = XEXP (x, 0)) == UNSPEC)
|
|
|
|
|
{
|
|
|
|
|
if (XINT (u, 1) == ARC_UNSPEC_GOT)
|
|
|
|
|
return XVECEXP (u, 0, 0);
|
|
|
|
|
}
|
|
|
|
|
else if (GET_CODE (x) == PLUS
|
|
|
|
|
&& ((REG_P (gp = XEXP (x, 0))
|
|
|
|
|
&& REGNO (gp) == PIC_OFFSET_TABLE_REGNUM)
|
|
|
|
|
|| (GET_CODE (gp) == CONST
|
|
|
|
|
&& GET_CODE (u = XEXP (gp, 0)) == UNSPEC
|
|
|
|
|
&& XINT (u, 1) == ARC_UNSPEC_GOT
|
|
|
|
|
&& GET_CODE (XVECEXP (u, 0, 0)) == SYMBOL_REF
|
|
|
|
|
&& !strcmp (XSTR (XVECEXP (u, 0, 0), 0), "_DYNAMIC")))
|
|
|
|
|
&& GET_CODE (XEXP (x, 1)) == CONST
|
|
|
|
|
&& GET_CODE (u = XEXP (XEXP (x, 1), 0)) == UNSPEC
|
|
|
|
|
&& XINT (u, 1) == ARC_UNSPEC_GOTOFF)
|
|
|
|
|
return XVECEXP (u, 0, 0);
|
|
|
|
|
else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == PLUS
|
|
|
|
|
&& ((REG_P (gp = XEXP (XEXP (x, 0), 1))
|
|
|
|
|
&& REGNO (gp) == PIC_OFFSET_TABLE_REGNUM)
|
|
|
|
|
|| (GET_CODE (gp) == CONST
|
|
|
|
|
&& GET_CODE (u = XEXP (gp, 0)) == UNSPEC
|
|
|
|
|
&& XINT (u, 1) == ARC_UNSPEC_GOT
|
|
|
|
|
&& GET_CODE (XVECEXP (u, 0, 0)) == SYMBOL_REF
|
|
|
|
|
&& !strcmp (XSTR (XVECEXP (u, 0, 0), 0), "_DYNAMIC")))
|
|
|
|
|
&& GET_CODE (XEXP (x, 1)) == CONST
|
|
|
|
|
&& GET_CODE (u = XEXP (XEXP (x, 1), 0)) == UNSPEC
|
|
|
|
|
&& XINT (u, 1) == ARC_UNSPEC_GOTOFF)
|
|
|
|
|
return gen_rtx_PLUS (GET_MODE (x), XEXP (XEXP (x, 0), 0),
|
|
|
|
|
XVECEXP (u, 0, 0));
|
|
|
|
|
else if (GET_CODE (x) == PLUS
|
|
|
|
|
&& (u = arc_delegitimize_address_0 (XEXP (x, 1))))
|
|
|
|
|
return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), u);
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_delegitimize_address (rtx x)
|
|
|
|
|
{
|
|
|
|
|
rtx orig_x = x = delegitimize_mem_from_attrs (x);
|
|
|
|
|
if (GET_CODE (x) == MEM)
|
|
|
|
|
x = XEXP (x, 0);
|
|
|
|
|
x = arc_delegitimize_address_0 (x);
|
|
|
|
|
if (x)
|
|
|
|
|
{
|
|
|
|
|
if (MEM_P (orig_x))
|
|
|
|
|
x = replace_equiv_address_nv (orig_x, x);
|
|
|
|
|
return x;
|
|
|
|
|
}
|
|
|
|
|
return orig_x;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return a REG rtx for acc1. N.B. the gcc-internal representation may
|
|
|
|
|
differ from the hardware register number in order to allow the generic
|
|
|
|
|
code to correctly split the concatenation of acc1 and acc2. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
gen_acc1 (void)
|
|
|
|
|
{
|
|
|
|
|
return gen_rtx_REG (SImode, TARGET_BIG_ENDIAN ? 56: 57);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return a REG rtx for acc2. N.B. the gcc-internal representation may
|
|
|
|
|
differ from the hardware register number in order to allow the generic
|
|
|
|
|
code to correctly split the concatenation of acc1 and acc2. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
gen_acc2 (void)
|
|
|
|
|
{
|
|
|
|
|
return gen_rtx_REG (SImode, TARGET_BIG_ENDIAN ? 57: 56);
|
|
|
|
|
}
|
|
|
|
|
|
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|
/* Return a REG rtx for mlo. N.B. the gcc-internal representation may
|
|
|
|
|
differ from the hardware register number in order to allow the generic
|
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|
|
|
code to correctly split the concatenation of mhi and mlo. */
|
|
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|
|
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|
rtx
|
|
|
|
|
gen_mlo (void)
|
|
|
|
|
{
|
|
|
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|
return gen_rtx_REG (SImode, TARGET_BIG_ENDIAN ? 59: 58);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
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|
/* Return a REG rtx for mhi. N.B. the gcc-internal representation may
|
|
|
|
|
differ from the hardware register number in order to allow the generic
|
|
|
|
|
code to correctly split the concatenation of mhi and mlo. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
gen_mhi (void)
|
|
|
|
|
{
|
|
|
|
|
return gen_rtx_REG (SImode, TARGET_BIG_ENDIAN ? 58: 59);
|
|
|
|
|
}
|
|
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|
/* FIXME: a parameter should be added, and code added to final.c,
|
|
|
|
|
to reproduce this functionality in shorten_branches. */
|
|
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|
#if 0
|
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|
|
/* Return nonzero iff BRANCH should be unaligned if possible by upsizing
|
|
|
|
|
a previous instruction. */
|
|
|
|
|
int
|
|
|
|
|
arc_unalign_branch_p (rtx branch)
|
|
|
|
|
{
|
|
|
|
|
rtx note;
|
|
|
|
|
|
|
|
|
|
if (!TARGET_UNALIGN_BRANCH)
|
|
|
|
|
return 0;
|
|
|
|
|
/* Do not do this if we have a filled delay slot. */
|
|
|
|
|
if (get_attr_delay_slot_filled (branch) == DELAY_SLOT_FILLED_YES
|
Replace INSN_DELETED_P with rtx_insn member functions
gcc/
* cfgrtl.c, combine.c, config/arc/arc.c, config/mcore/mcore.c,
config/rs6000/rs6000.c, config/sh/sh.c, cprop.c, dwarf2out.c,
emit-rtl.c, final.c, function.c, gcse.c, jump.c, reg-stack.c,
reload1.c, reorg.c, resource.c, sel-sched-ir.c: Replace INSN_DELETED_P
macro with statically checked member functions.
* rtl.h (rtx_insn::deleted): New method.
(rtx_insn::set_deleted): Likewise.
(rtx_insn::set_undeleted): Likewise.
(INSN_DELETED_P): Remove.
From-SVN: r215282
2014-09-16 03:23:42 +02:00
|
|
|
|
&& !NEXT_INSN (branch)->deleted ())
|
2013-10-01 19:03:46 +02:00
|
|
|
|
return 0;
|
|
|
|
|
note = find_reg_note (branch, REG_BR_PROB, 0);
|
|
|
|
|
return (!note
|
|
|
|
|
|| (arc_unalign_prob_threshold && !br_prob_note_reliable_p (note))
|
|
|
|
|
|| INTVAL (XEXP (note, 0)) < arc_unalign_prob_threshold);
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
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|
|
/* When estimating sizes during arc_reorg, when optimizing for speed, there
|
|
|
|
|
are three reasons why we need to consider branches to be length 6:
|
|
|
|
|
- annull-false delay slot insns are implemented using conditional execution,
|
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|
|
|
thus preventing short insn formation where used.
|
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|
|
|
- for ARC600: annul-true delay slot insns are implemented where possible
|
|
|
|
|
using conditional execution, preventing short insn formation where used.
|
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|
|
- for ARC700: likely or somewhat likely taken branches are made long and
|
|
|
|
|
unaligned if possible to avoid branch penalty. */
|
|
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|
|
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|
|
bool
|
|
|
|
|
arc_branch_size_unknown_p (void)
|
|
|
|
|
{
|
|
|
|
|
return !optimize_size && arc_reorg_in_progress;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We are about to output a return insn. Add padding if necessary to avoid
|
|
|
|
|
a mispredict. A return could happen immediately after the function
|
|
|
|
|
start, but after a call we know that there will be at least a blink
|
|
|
|
|
restore. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_pad_return (void)
|
|
|
|
|
{
|
final.c: Use rtx_insn (also touches output.c and config/arc/arc.c)
gcc/
* output.h (final_scan_insn): Strengthen return type from rtx to
rtx_insn *.
(final_forward_branch_p): Likewise for param.
(current_output_insn): Likewise for this global.
* final.c (rtx debug_insn): Likewise for this variable.
(current_output_insn): Likewise.
(get_attr_length_1): Rename param "insn" to "uncast_insn",
adding "insn" back in as an rtx_insn * with a checked cast, so
that macro ADJUST_INSN_LENGTH can be passed an rtx_insn * as the
first param.
(compute_alignments): Strengthen local "label" from rtx to
rtx_insn *.
(shorten_branches): Rename param from "first" to "uncast_first",
introducing a new local rtx_insn * "first" using a checked cast to
effectively strengthen "first" from rtx to rtx_insn * without
affecting the type signature. Strengthen locals "insn", "seq",
"next", "label" from rtx to rtx_insn *.
(change_scope): Strengthen param "orig_insn" and local "insn" from
rtx to rtx_insn *.
(final_start_function): Rename param from "first" to "uncast_first",
introducing a new local rtx_insn * "first" using a checked cast to
effectively strengthen "first" from rtx to rtx_insn * without
affecting the type signature. Strengthen local "insn" from rtx to
rtx_insn *.
(dump_basic_block_info): Strengthen param "insn" from rtx to
rtx_insn *.
(final): Rename param from "first" to "uncast_first",
introducing a new local rtx_insn * "first" using a checked cast to
effectively strengthen "first" from rtx to rtx_insn * without
affecting the type signature. Strengthen locals "insn", "next"
from rtx to rtx_insn *.
(output_alternate_entry_point): Strengthen param "insn" from rtx to
rtx_insn *.
(call_from_call_insn): Strengthen param "insn" from rtx to
rtx_call_insn *.
(final_scan_insn): Rename param from "insn" to "uncast_insn",
introducing a new local rtx_insn * "insn" using a checked cast to
effectively strengthen "insn" from rtx to rtx_insn * without
affecting the type signature. Strengthen return type and locals
"next", "note", "prev", "new_rtx" from rtx to rtx_insn *. Remove
now-redundant checked cast to rtx_insn * from both invocations of
debug_hooks->var_location. Convert CALL_P into a dyn_cast,
introducing a local "call_insn" for use when invoking
call_from_call_insn.
(notice_source_line): Strengthen param "insn" from rtx to
rtx_insn *.
(leaf_function_p): Likewise for local "insn".
(final_forward_branch_p): Likewise.
(leaf_renumber_regs): Likewise for param "first".
(rest_of_clean_state): Likewise for locals "insn" and "next".
(self_recursive_call_p): Likewise for param "insn".
(collect_fn_hard_reg_usage): Likewise for local "insn".
(get_call_fndecl): Likewise for param "insn".
(get_call_cgraph_rtl_info): Likewise.
(get_call_reg_set_usage): Rename param from "insn" to "uncast_insn",
introducing a new local rtx_insn * "insn" using a checked cast to
effectively strengthen "insn" from rtx to rtx_insn * without
affecting the type signature.
* config/arc/arc.c (arc_final_prescan_insn): For now, add checked
cast when assigning from param "insn" to current_output_insn.
(arc_pad_return): Strengthen local "insn" from rtx to rtx_insn *
so that we can assign it back to current_output_insn.
From-SVN: r214326
2014-08-22 18:26:36 +02:00
|
|
|
|
rtx_insn *insn = current_output_insn;
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *prev = prev_active_insn (insn);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int want_long;
|
|
|
|
|
|
|
|
|
|
if (!prev)
|
|
|
|
|
{
|
|
|
|
|
fputs ("\tnop_s\n", asm_out_file);
|
|
|
|
|
cfun->machine->unalign ^= 2;
|
|
|
|
|
want_long = 1;
|
|
|
|
|
}
|
|
|
|
|
/* If PREV is a sequence, we know it must be a branch / jump or a tailcall,
|
|
|
|
|
because after a call, we'd have to restore blink first. */
|
|
|
|
|
else if (GET_CODE (PATTERN (prev)) == SEQUENCE)
|
|
|
|
|
return;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
want_long = (get_attr_length (prev) == 2);
|
|
|
|
|
prev = prev_active_insn (prev);
|
|
|
|
|
}
|
|
|
|
|
if (!prev
|
|
|
|
|
|| ((NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
|
|
|
|
? CALL_ATTR (as_a <rtx_sequence *> (PATTERN (prev))->insn (0),
|
|
|
|
|
NON_SIBCALL)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
: CALL_ATTR (prev, NON_SIBCALL)))
|
|
|
|
|
{
|
|
|
|
|
if (want_long)
|
|
|
|
|
cfun->machine->size_reason
|
|
|
|
|
= "call/return and return/return must be 6 bytes apart to avoid mispredict";
|
|
|
|
|
else if (TARGET_UNALIGN_BRANCH && cfun->machine->unalign)
|
|
|
|
|
{
|
|
|
|
|
cfun->machine->size_reason
|
|
|
|
|
= "Long unaligned jump avoids non-delay slot penalty";
|
|
|
|
|
want_long = 1;
|
|
|
|
|
}
|
|
|
|
|
/* Disgorge delay insn, if there is any, and it may be moved. */
|
|
|
|
|
if (final_sequence
|
|
|
|
|
/* ??? Annulled would be OK if we can and do conditionalize
|
|
|
|
|
the delay slot insn accordingly. */
|
|
|
|
|
&& !INSN_ANNULLED_BRANCH_P (insn)
|
|
|
|
|
&& (get_attr_cond (insn) != COND_USE
|
|
|
|
|
|| !reg_set_p (gen_rtx_REG (CCmode, CC_REG),
|
|
|
|
|
XVECEXP (final_sequence, 0, 1))))
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
prev = as_a <rtx_insn *> (XVECEXP (final_sequence, 0, 1));
|
2013-10-01 19:03:46 +02:00
|
|
|
|
gcc_assert (!prev_real_insn (insn)
|
|
|
|
|
|| !arc_hazard (prev_real_insn (insn), prev));
|
|
|
|
|
cfun->machine->force_short_suffix = !want_long;
|
|
|
|
|
rtx save_pred = current_insn_predicate;
|
|
|
|
|
final_scan_insn (prev, asm_out_file, optimize, 1, NULL);
|
|
|
|
|
cfun->machine->force_short_suffix = -1;
|
Replace INSN_DELETED_P with rtx_insn member functions
gcc/
* cfgrtl.c, combine.c, config/arc/arc.c, config/mcore/mcore.c,
config/rs6000/rs6000.c, config/sh/sh.c, cprop.c, dwarf2out.c,
emit-rtl.c, final.c, function.c, gcse.c, jump.c, reg-stack.c,
reload1.c, reorg.c, resource.c, sel-sched-ir.c: Replace INSN_DELETED_P
macro with statically checked member functions.
* rtl.h (rtx_insn::deleted): New method.
(rtx_insn::set_deleted): Likewise.
(rtx_insn::set_undeleted): Likewise.
(INSN_DELETED_P): Remove.
From-SVN: r215282
2014-09-16 03:23:42 +02:00
|
|
|
|
prev->set_deleted ();
|
2013-10-01 19:03:46 +02:00
|
|
|
|
current_output_insn = insn;
|
|
|
|
|
current_insn_predicate = save_pred;
|
|
|
|
|
}
|
|
|
|
|
else if (want_long)
|
|
|
|
|
fputs ("\tnop\n", asm_out_file);
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
fputs ("\tnop_s\n", asm_out_file);
|
|
|
|
|
cfun->machine->unalign ^= 2;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The usual; we set up our machine_function data. */
|
|
|
|
|
|
|
|
|
|
static struct machine_function *
|
|
|
|
|
arc_init_machine_status (void)
|
|
|
|
|
{
|
|
|
|
|
struct machine_function *machine;
|
2014-05-18 01:07:23 +02:00
|
|
|
|
machine = ggc_cleared_alloc<machine_function> ();
|
2013-10-01 19:03:46 +02:00
|
|
|
|
machine->fn_type = ARC_FUNCTION_UNKNOWN;
|
|
|
|
|
machine->force_short_suffix = -1;
|
|
|
|
|
|
|
|
|
|
return machine;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implements INIT_EXPANDERS. We just set up to call the above
|
|
|
|
|
function. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_init_expanders (void)
|
|
|
|
|
{
|
|
|
|
|
init_machine_status = arc_init_machine_status;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check if OP is a proper parallel of a millicode call pattern. OFFSET
|
|
|
|
|
indicates a number of elements to ignore - that allows to have a
|
|
|
|
|
sibcall pattern that starts with (return). LOAD_P is zero for store
|
|
|
|
|
multiple (for prologues), and one for load multiples (for epilogues),
|
|
|
|
|
and two for load multiples where no final clobber of blink is required.
|
|
|
|
|
We also skip the first load / store element since this is supposed to
|
|
|
|
|
be checked in the instruction pattern. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
arc_check_millicode (rtx op, int offset, int load_p)
|
|
|
|
|
{
|
|
|
|
|
int len = XVECLEN (op, 0) - offset;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
if (load_p == 2)
|
|
|
|
|
{
|
|
|
|
|
if (len < 2 || len > 13)
|
|
|
|
|
return 0;
|
|
|
|
|
load_p = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
rtx elt = XVECEXP (op, 0, --len);
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (elt) != CLOBBER
|
|
|
|
|
|| !REG_P (XEXP (elt, 0))
|
|
|
|
|
|| REGNO (XEXP (elt, 0)) != RETURN_ADDR_REGNUM
|
|
|
|
|
|| len < 3 || len > 13)
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
for (i = 1; i < len; i++)
|
|
|
|
|
{
|
|
|
|
|
rtx elt = XVECEXP (op, 0, i + offset);
|
|
|
|
|
rtx reg, mem, addr;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (elt) != SET)
|
|
|
|
|
return 0;
|
|
|
|
|
mem = XEXP (elt, load_p);
|
|
|
|
|
reg = XEXP (elt, 1-load_p);
|
|
|
|
|
if (!REG_P (reg) || REGNO (reg) != 13U+i || !MEM_P (mem))
|
|
|
|
|
return 0;
|
|
|
|
|
addr = XEXP (mem, 0);
|
|
|
|
|
if (GET_CODE (addr) != PLUS
|
|
|
|
|
|| !rtx_equal_p (stack_pointer_rtx, XEXP (addr, 0))
|
|
|
|
|
|| !CONST_INT_P (XEXP (addr, 1)) || INTVAL (XEXP (addr, 1)) != i*4)
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Accessor functions for cfun->machine->unalign. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
arc_get_unalign (void)
|
|
|
|
|
{
|
|
|
|
|
return cfun->machine->unalign;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_clear_unalign (void)
|
|
|
|
|
{
|
|
|
|
|
if (cfun)
|
|
|
|
|
cfun->machine->unalign = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
arc_toggle_unalign (void)
|
|
|
|
|
{
|
|
|
|
|
cfun->machine->unalign ^= 2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Operands 0..2 are the operands of a addsi which uses a 12 bit
|
|
|
|
|
constant in operand 2, but which would require a LIMM because of
|
|
|
|
|
operand mismatch.
|
|
|
|
|
operands 3 and 4 are new SET_SRCs for operands 0. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
split_addsi (rtx *operands)
|
|
|
|
|
{
|
|
|
|
|
int val = INTVAL (operands[2]);
|
|
|
|
|
|
|
|
|
|
/* Try for two short insns first. Lengths being equal, we prefer
|
|
|
|
|
expansions with shorter register lifetimes. */
|
|
|
|
|
if (val > 127 && val <= 255
|
|
|
|
|
&& satisfies_constraint_Rcq (operands[0]))
|
|
|
|
|
{
|
|
|
|
|
operands[3] = operands[2];
|
|
|
|
|
operands[4] = gen_rtx_PLUS (SImode, operands[0], operands[1]);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
operands[3] = operands[1];
|
|
|
|
|
operands[4] = gen_rtx_PLUS (SImode, operands[0], operands[2]);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Operands 0..2 are the operands of a subsi which uses a 12 bit
|
|
|
|
|
constant in operand 1, but which would require a LIMM because of
|
|
|
|
|
operand mismatch.
|
|
|
|
|
operands 3 and 4 are new SET_SRCs for operands 0. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
split_subsi (rtx *operands)
|
|
|
|
|
{
|
|
|
|
|
int val = INTVAL (operands[1]);
|
|
|
|
|
|
|
|
|
|
/* Try for two short insns first. Lengths being equal, we prefer
|
|
|
|
|
expansions with shorter register lifetimes. */
|
|
|
|
|
if (satisfies_constraint_Rcq (operands[0])
|
|
|
|
|
&& satisfies_constraint_Rcq (operands[2]))
|
|
|
|
|
{
|
|
|
|
|
if (val >= -31 && val <= 127)
|
|
|
|
|
{
|
|
|
|
|
operands[3] = gen_rtx_NEG (SImode, operands[2]);
|
|
|
|
|
operands[4] = gen_rtx_PLUS (SImode, operands[0], operands[1]);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
else if (val >= 0 && val < 255)
|
|
|
|
|
{
|
|
|
|
|
operands[3] = operands[1];
|
|
|
|
|
operands[4] = gen_rtx_MINUS (SImode, operands[0], operands[2]);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* If the destination is not an ARCompact16 register, we might
|
|
|
|
|
still have a chance to make a short insn if the source is;
|
|
|
|
|
we need to start with a reg-reg move for this. */
|
|
|
|
|
operands[3] = operands[2];
|
|
|
|
|
operands[4] = gen_rtx_MINUS (SImode, operands[1], operands[0]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Handle DOUBLE_REGS uses.
|
|
|
|
|
Operand 0: destination register
|
|
|
|
|
Operand 1: source register */
|
|
|
|
|
|
|
|
|
|
static rtx
|
|
|
|
|
arc_process_double_reg_moves (rtx *operands)
|
|
|
|
|
{
|
|
|
|
|
rtx dest = operands[0];
|
|
|
|
|
rtx src = operands[1];
|
|
|
|
|
rtx val;
|
|
|
|
|
|
|
|
|
|
enum usesDxState { none, srcDx, destDx, maxDx };
|
|
|
|
|
enum usesDxState state = none;
|
|
|
|
|
|
|
|
|
|
if (refers_to_regno_p (40, 44, src, 0))
|
|
|
|
|
state = srcDx;
|
|
|
|
|
if (refers_to_regno_p (40, 44, dest, 0))
|
|
|
|
|
{
|
|
|
|
|
/* Via arc_register_move_cost, we should never see D,D moves. */
|
|
|
|
|
gcc_assert (state == none);
|
|
|
|
|
state = destDx;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (state == none)
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
|
|
|
|
|
start_sequence ();
|
|
|
|
|
|
|
|
|
|
if (state == srcDx)
|
|
|
|
|
{
|
|
|
|
|
/* Without the LR insn, we need to split this into a
|
|
|
|
|
sequence of insns which will use the DEXCLx and DADDHxy
|
|
|
|
|
insns to be able to read the Dx register in question. */
|
|
|
|
|
if (TARGET_DPFP_DISABLE_LRSR)
|
|
|
|
|
{
|
|
|
|
|
/* gen *movdf_insn_nolrsr */
|
|
|
|
|
rtx set = gen_rtx_SET (VOIDmode, dest, src);
|
|
|
|
|
rtx use1 = gen_rtx_USE (VOIDmode, const1_rtx);
|
|
|
|
|
emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, use1)));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* When we have 'mov D, r' or 'mov D, D' then get the target
|
|
|
|
|
register pair for use with LR insn. */
|
|
|
|
|
rtx destHigh = simplify_gen_subreg(SImode, dest, DFmode, 4);
|
|
|
|
|
rtx destLow = simplify_gen_subreg(SImode, dest, DFmode, 0);
|
|
|
|
|
|
|
|
|
|
/* Produce the two LR insns to get the high and low parts. */
|
|
|
|
|
emit_insn (gen_rtx_SET (VOIDmode,
|
|
|
|
|
destHigh,
|
|
|
|
|
gen_rtx_UNSPEC_VOLATILE (Pmode, gen_rtvec (1, src),
|
|
|
|
|
VUNSPEC_LR_HIGH)));
|
|
|
|
|
emit_insn (gen_rtx_SET (VOIDmode,
|
|
|
|
|
destLow,
|
|
|
|
|
gen_rtx_UNSPEC_VOLATILE (Pmode, gen_rtvec (1, src),
|
|
|
|
|
VUNSPEC_LR)));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (state == destDx)
|
|
|
|
|
{
|
|
|
|
|
/* When we have 'mov r, D' or 'mov D, D' and we have access to the
|
|
|
|
|
LR insn get the target register pair. */
|
|
|
|
|
rtx srcHigh = simplify_gen_subreg(SImode, src, DFmode, 4);
|
|
|
|
|
rtx srcLow = simplify_gen_subreg(SImode, src, DFmode, 0);
|
|
|
|
|
|
|
|
|
|
emit_insn (gen_rtx_UNSPEC_VOLATILE (Pmode,
|
|
|
|
|
gen_rtvec (3, dest, srcHigh, srcLow),
|
|
|
|
|
VUNSPEC_DEXCL_NORES));
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
|
|
|
|
|
val = get_insns ();
|
|
|
|
|
end_sequence ();
|
|
|
|
|
return val;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* operands 0..1 are the operands of a 64 bit move instruction.
|
|
|
|
|
split it into two moves with operands 2/3 and 4/5. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
arc_split_move (rtx *operands)
|
|
|
|
|
{
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
machine_mode mode = GET_MODE (operands[0]);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int i;
|
|
|
|
|
int swap = 0;
|
|
|
|
|
rtx xop[4];
|
|
|
|
|
rtx val;
|
|
|
|
|
|
|
|
|
|
if (TARGET_DPFP)
|
|
|
|
|
{
|
|
|
|
|
val = arc_process_double_reg_moves (operands);
|
|
|
|
|
if (val)
|
|
|
|
|
return val;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < 2; i++)
|
|
|
|
|
{
|
|
|
|
|
if (MEM_P (operands[i]) && auto_inc_p (XEXP (operands[i], 0)))
|
|
|
|
|
{
|
|
|
|
|
rtx addr = XEXP (operands[i], 0);
|
|
|
|
|
rtx r, o;
|
|
|
|
|
enum rtx_code code;
|
|
|
|
|
|
|
|
|
|
gcc_assert (!reg_overlap_mentioned_p (operands[0], addr));
|
|
|
|
|
switch (GET_CODE (addr))
|
|
|
|
|
{
|
|
|
|
|
case PRE_DEC: o = GEN_INT (-8); goto pre_modify;
|
|
|
|
|
case PRE_INC: o = GEN_INT (8); goto pre_modify;
|
|
|
|
|
case PRE_MODIFY: o = XEXP (XEXP (addr, 1), 1);
|
|
|
|
|
pre_modify:
|
|
|
|
|
code = PRE_MODIFY;
|
|
|
|
|
break;
|
|
|
|
|
case POST_DEC: o = GEN_INT (-8); goto post_modify;
|
|
|
|
|
case POST_INC: o = GEN_INT (8); goto post_modify;
|
|
|
|
|
case POST_MODIFY: o = XEXP (XEXP (addr, 1), 1);
|
|
|
|
|
post_modify:
|
|
|
|
|
code = POST_MODIFY;
|
|
|
|
|
swap = 2;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
r = XEXP (addr, 0);
|
|
|
|
|
xop[0+i] = adjust_automodify_address_nv
|
|
|
|
|
(operands[i], SImode,
|
|
|
|
|
gen_rtx_fmt_ee (code, Pmode, r,
|
|
|
|
|
gen_rtx_PLUS (Pmode, r, o)),
|
|
|
|
|
0);
|
|
|
|
|
xop[2+i] = adjust_automodify_address_nv
|
|
|
|
|
(operands[i], SImode, plus_constant (Pmode, r, 4), 4);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
xop[0+i] = operand_subword (operands[i], 0, 0, mode);
|
|
|
|
|
xop[2+i] = operand_subword (operands[i], 1, 0, mode);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (reg_overlap_mentioned_p (xop[0], xop[3]))
|
|
|
|
|
{
|
|
|
|
|
swap = 2;
|
|
|
|
|
gcc_assert (!reg_overlap_mentioned_p (xop[2], xop[1]));
|
|
|
|
|
}
|
|
|
|
|
operands[2+swap] = xop[0];
|
|
|
|
|
operands[3+swap] = xop[1];
|
|
|
|
|
operands[4-swap] = xop[2];
|
|
|
|
|
operands[5-swap] = xop[3];
|
|
|
|
|
|
|
|
|
|
start_sequence ();
|
|
|
|
|
emit_insn (gen_rtx_SET (VOIDmode, operands[2], operands[3]));
|
|
|
|
|
emit_insn (gen_rtx_SET (VOIDmode, operands[4], operands[5]));
|
|
|
|
|
val = get_insns ();
|
|
|
|
|
end_sequence ();
|
|
|
|
|
|
|
|
|
|
return val;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Select between the instruction output templates s_tmpl (for short INSNs)
|
|
|
|
|
and l_tmpl (for long INSNs). */
|
|
|
|
|
|
|
|
|
|
const char *
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
arc_short_long (rtx_insn *insn, const char *s_tmpl, const char *l_tmpl)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
int is_short = arc_verify_short (insn, cfun->machine->unalign, -1);
|
|
|
|
|
|
|
|
|
|
extract_constrain_insn_cached (insn);
|
|
|
|
|
return is_short ? s_tmpl : l_tmpl;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Searches X for any reference to REGNO, returning the rtx of the
|
|
|
|
|
reference found if any. Otherwise, returns NULL_RTX. */
|
|
|
|
|
|
|
|
|
|
rtx
|
|
|
|
|
arc_regno_use_in (unsigned int regno, rtx x)
|
|
|
|
|
{
|
|
|
|
|
const char *fmt;
|
|
|
|
|
int i, j;
|
|
|
|
|
rtx tem;
|
|
|
|
|
|
2015-01-05 23:04:53 +01:00
|
|
|
|
if (REG_P (x) && refers_to_regno_p (regno, x))
|
2013-10-01 19:03:46 +02:00
|
|
|
|
return x;
|
|
|
|
|
|
|
|
|
|
fmt = GET_RTX_FORMAT (GET_CODE (x));
|
|
|
|
|
for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
|
|
|
|
|
{
|
|
|
|
|
if (fmt[i] == 'e')
|
|
|
|
|
{
|
|
|
|
|
if ((tem = regno_use_in (regno, XEXP (x, i))))
|
|
|
|
|
return tem;
|
|
|
|
|
}
|
|
|
|
|
else if (fmt[i] == 'E')
|
|
|
|
|
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
|
|
|
|
if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
|
|
|
|
|
return tem;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return NULL_RTX;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the integer value of the "type" attribute for INSN, or -1 if
|
|
|
|
|
INSN can't have attributes. */
|
|
|
|
|
|
|
|
|
|
int
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
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arc_attr_type (rtx_insn *insn)
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2013-10-01 19:03:46 +02:00
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{
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if (NONJUMP_INSN_P (insn)
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? (GET_CODE (PATTERN (insn)) == USE
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|| GET_CODE (PATTERN (insn)) == CLOBBER)
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: JUMP_P (insn)
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? (GET_CODE (PATTERN (insn)) == ADDR_VEC
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|| GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
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: !CALL_P (insn))
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return -1;
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return get_attr_type (insn);
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}
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/* Return true if insn sets the condition codes. */
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bool
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Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
|
|
|
|
arc_sets_cc_p (rtx_insn *insn)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
2014-09-15 18:14:15 +02:00
|
|
|
|
if (NONJUMP_INSN_P (insn))
|
|
|
|
|
if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
|
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|
|
|
insn = seq->insn (seq->len () - 1);
|
2013-10-01 19:03:46 +02:00
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return arc_attr_type (insn) == TYPE_COMPARE;
|
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}
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|
/* Return true if INSN is an instruction with a delay slot we may want
|
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to fill. */
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bool
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
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arc_need_delay (rtx_insn *insn)
|
2013-10-01 19:03:46 +02:00
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{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
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rtx_insn *next;
|
2013-10-01 19:03:46 +02:00
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if (!flag_delayed_branch)
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return false;
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/* The return at the end of a function needs a delay slot. */
|
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if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
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&& (!(next = next_active_insn (insn))
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|| ((!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) != SEQUENCE)
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&& arc_attr_type (next) == TYPE_RETURN))
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&& (!TARGET_PAD_RETURN
|
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|| (prev_active_insn (insn)
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&& prev_active_insn (prev_active_insn (insn))
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&& prev_active_insn (prev_active_insn (prev_active_insn (insn))))))
|
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return true;
|
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if (NONJUMP_INSN_P (insn)
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? (GET_CODE (PATTERN (insn)) == USE
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|| GET_CODE (PATTERN (insn)) == CLOBBER
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|| GET_CODE (PATTERN (insn)) == SEQUENCE)
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: JUMP_P (insn)
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? (GET_CODE (PATTERN (insn)) == ADDR_VEC
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|| GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
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: !CALL_P (insn))
|
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return false;
|
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return num_delay_slots (insn) != 0;
|
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}
|
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/* Return true if the scheduling pass(es) has/have already run,
|
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i.e. where possible, we should try to mitigate high latencies
|
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by different instruction selection. */
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bool
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arc_scheduling_not_expected (void)
|
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{
|
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return cfun->machine->arc_reorg_started;
|
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}
|
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/* Oddly enough, sometimes we get a zero overhead loop that branch
|
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shortening doesn't think is a loop - observed with compile/pr24883.c
|
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-O3 -fomit-frame-pointer -funroll-loops. Make sure to include the
|
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alignment visible for branch shortening (we actually align the loop
|
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insn before it, but that is equivalent since the loop insn is 4 byte
|
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long.) */
|
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|
|
int
|
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|
|
arc_label_align (rtx label)
|
|
|
|
|
{
|
|
|
|
|
int loop_align = LOOP_ALIGN (LABEL);
|
|
|
|
|
|
|
|
|
|
if (loop_align > align_labels_log)
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *prev = prev_nonnote_insn (label);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
|
|
|
|
|
if (prev && NONJUMP_INSN_P (prev)
|
|
|
|
|
&& GET_CODE (PATTERN (prev)) == PARALLEL
|
|
|
|
|
&& recog_memoized (prev) == CODE_FOR_doloop_begin_i)
|
|
|
|
|
return loop_align;
|
|
|
|
|
}
|
|
|
|
|
/* Code has a minimum p2 alignment of 1, which we must restore after an
|
|
|
|
|
ADDR_DIFF_VEC. */
|
|
|
|
|
if (align_labels_log < 1)
|
|
|
|
|
{
|
config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
|
|
|
|
rtx_insn *next = next_nonnote_nondebug_insn (label);
|
2013-10-01 19:03:46 +02:00
|
|
|
|
if (INSN_P (next) && recog_memoized (next) >= 0)
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
return align_labels_log;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if LABEL is in executable code. */
|
|
|
|
|
|
|
|
|
|
bool
|
NEXT_INSN and PREV_INSN take a const rtx_insn
gcc/
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* rtl.h (RTX_PREV): Added checked casts to uses of PREV_INSN and
NEXT_INSN.
(PREV_INSN): Strengthen param from const_rtx to const rtx_insn *.
(NEXT_INSN): Likewise.
(JUMP_LABEL_AS_INSN): Add a "const" modifier to param.
(reg_used_between_p): Strengthen params 2 and 3 from const_rtx to
const rtx_insn *.
(no_labels_between_p): Likewise for both params.
* config/aarch64/aarch64.c (aarch64_output_casesi): Add a checked
cast when using NEXT_INSN on operands[2].
* config/alpha/alpha.c (alpha_set_memflags): Strengthen local
"insn" from rtx to rtx_insn *, adding a checked cast.
(alpha_handle_trap_shadows): Strengthen locals "i", "n" from rtx to
rtx_insn *.
* config/arc/arc-protos.h (arc_ccfsm_record_condition): Likewise
for third param.
(arc_text_label): Likewise for param "insn".
* config/arc/arc.c (arc_expand_epilogue): Likewise for local
"insn".
(arc_ccfsm_record_condition): Likewise for param "jump".
(arc_text_label): Likewise for local "label".
* config/arc/arc.md (doloop_begin_i): Likewise for local "scan".
Introduce a local "seq" via a dyn_cast to rtx_sequence *, and use
a method for typesafety. Add a checked cast.
* config/arc/constraints.md (Clb): Add a checked cast when getting
the CODE_LABEL from a LABEL_REF.
* config/arm/arm.c (require_pic_register): Strengthen locals
"seq", "insn" from rtx to rtx_insn *.
(create_fix_barrier): Likewise for locals "selected", "next".
(thumb1_reorg): Likewise for locals "prev", "insn".
(arm_expand_prologue): Likewise for local "last".
(thumb1_output_casesi): Add a checked cast when using NEXT_INSN on
operands[0].
(thumb2_output_casesi): Likewise for operands[2].
* config/avr/avr-log.c (avr_log_vadump): Within 'L' case,
strengthen local "insn" from rtx to rtx_insn *.
* config/bfin/bfin.c (find_next_insn_start): Likewise for return
type and param "insn".
(find_prev_insn_start): Likewise.
(hwloop_optimize): Likewise for locals "insn", "last_insn",
"prev".
(gen_one_bundle): Likewise for loal "t".
(find_load): Likewise for param "insn".
(workaround_speculation): Likewise for locals "insn", "next",
"target", "next_tgt".
* config/c6x/c6x.c (assign_reservations): Likewise for both params
and for locals "insn", "within", "last".
(count_unit_reqs): Likewise for params "head", "tail" and local
"insn".
(try_rename_operands): Likewise for params "head", "tail".
(reshuffle_units): Likewise for locals "head", "tail", "insn".
(struct c6x_sched_context): Likewise for fields
"last_scheduled_insn", "last_scheduled_iter0".
(init_sched_state): Replace NULL_RTX with NULL.
(reorg_split_calls): Strengthen local "new_cycle_first" from rtx
to rtx_insn *.
(undo_split_delayed_nonbranch): Likewise for param and for local
"prev".
(conditionalize_after_sched): Likewise for local "insn".
(bb_earliest_end_cycle): Likewise.
(filter_insns_above): Likewise for locals "insn", "next".
(hwloop_optimize): Remove redundant checked cast.
(hwloop_fail): Strengthen local "t" from rtx to rtx_insn *.
* config/cris/cris.c (cris_initial_frame_pointer_offset): Replace
NULL_RTX with NULL.
(cris_simple_epilogue): Likewise.
(cris_expand_prologue): Likewise.
(cris_expand_epilogue): Likewise.
* config/frv/frv.c (frv_function_contains_far_jump): Strengthen
local "insn" from rtx to rtx_insn *.
(frv_ifcvt_modify_tests): Likewise for locals "last_insn", "insn".
(struct frv_packet_group): Likewise for the elements within array
fields "insns", "sorted", and for field "nop".
(frv_packet): Likewise for the elements within array field
"insns".
(frv_add_insn_to_packet): Likewise for param "insn".
(frv_insert_nop_in_packet): Likewise for param "insn" and local
"last".
(frv_for_each_packet): Likewise for locals "insn", "next_insn".
(frv_sort_insn_group_1): Likewise for local "insn".
(frv_optimize_membar_local): Likewise.
(frv_align_label): Likewise for locals "x", "last", "barrier",
"label".
* config/ia64/ia64.c (last_scheduled_insn): Likewise for this
local.
(ia64_sched_init): Likewise for local "insn".
(scheduled_good_insn): Likewise for param "last".
(struct _ia64_sched_context): Likewise for field
"last_scheduled_insn".
(ia64_init_sched_context): Replace NULL_RTX with NULL.
(struct bundle_state): Likewise for field "insn".
(issue_nops_and_insn): Likewise for param "insn".
(get_next_important_insn): Likewise for return type and both
params.
(ia64_add_bundle_selector_before): Likewise for param "insn".
(bundling): Likewise for params "prev_head_insn", "tail" and
locals "insn", "next_insn", "b". Eliminate top-level local rtx
"nop" in favor of new locals rtx "nop_pat" and rtx_insn *nop;
* config/iq2000/iq2000-protos.h (iq2000_fill_delay_slot):
Strengthen final param from rtx to rtx_insn *.
(iq2000_move_1word): Likewise for second param.
* config/iq2000/iq2000.c (iq2000_fill_delay_slot): Likewise for
param "cur_insn" and local "next_insn".
(iq2000_move_1word): Likewise for param "insn".
* config/iq2000/iq2000.md (insn before ADDR_DIFF_VEC): Add checked
casts when using NEXT_INSN on operands[1].
* config/m32c/m32c.c (m32c_function_needs_enter): Strengthen local
"insn" from rtx to rtx_insn *.
* config/m68k/m68k.c (m68k_jump_table_ref_p): Split out uses of
"x", introducing local rtx_insn * "insn" for when working with the
CODE_LABEL of the LABEL_REF.
(m68k_sched_md_init_global): Strengthen local "insn" from rtx to
rtx_insn *.
* config/mcore/mcore-protos.h (mcore_is_dead): Likewise for first
param.
* config/mcore/mcore.c (emit_new_cond_insn): Likewise for return
type.
(conditionalize_block): Likewise for return type and param.
(mcore_is_dead): Likewise for param "first" and local "insn".
(emit_new_cond_insn): Likewise for return type.
(conditionalize_block): Likewise for return type, param, and
locals "insn", "blk_1_br", "end_blk_2_insn", "start_blk_3_lab",
"newinsn".
(conditionalize_optimization): Likewise for local "insn".
* config/mep/mep.c (mep_jmp_return_reorg): Add checked cast when
using NEXT_INSN.
* config/microblaze/microblaze.md: Add checked casts when using
NEXT_INSN.
* config/mips/mips.c (mips_expand_prologue): Eliminate top-level
rtx "insn" in favor of various more tightly-scoped rtx "insn" and
and rtx_insn * "insn".
* config/mips/mips.md (casesi_internal_mips16_<mode>): Add a
checked cast when using NEXT_INSN on operands[2].
* config/mn10300/mn10300.c (mn10300_insert_setlb_lcc): Strengthen
local "insn" from rtx to rtx_insn *.
* config/nds32/nds32-fp-as-gp.c (nds32_fp_as_gp_check_available):
Likewise.
* config/nds32/nds32-md-auxiliary.c (nds32_output_casesi_pc_relative):
Add a checked cast when using NEXT_INSN on operands[1].
* config/pa/pa-protos.h (pa_following_call): Strengthen param from
rtx to rtx_insn *.
(pa_output_cbranch): Likewise for final param.
(pa_output_lbranch): Likewise for second param.
(pa_output_bb): Likewise for third param.
(pa_output_bvb): Likewise.
(pa_output_dbra): Likewise for second param.
(pa_output_movb): Likewise.
(pa_output_parallel_movb): Likewise.
(pa_output_parallel_addb): Likewise.
(pa_output_millicode_call): Likewise for first param.
(pa_output_mul_insn): Likewise for second param.
(pa_output_div_insn): Likewise for third param.
(pa_output_mod_insn): Likewise for second param.
(pa_jump_in_call_delay): Likewise for param.
* config/pa/pa.c (pa_output_mul_insn): Likewise for param "insn".
(pa_output_div_insn): Likewise.
(pa_output_mod_insn): Likewise.
(pa_output_cbranch): Likewise.
(pa_output_lbranch): Likewise.
(pa_output_bb): Likewise.
(pa_output_bvb): Likewise.
(pa_output_dbra): Likewise.
(pa_output_movb): Likewise.
(pa_output_millicode_call): Likewise; use method of rtx_sequence *
to simplify and for typesafety.
(pa_output_call): Use method of rtx_sequence *.
(forward_branch_p): Strengthen param "insn" from rtx to rtx_insn *.
(pa_jump_in_call_delay): Likewise.
(pa_output_parallel_movb): Likewise.
(pa_output_parallel_addb): Likewise.
(pa_following_call): Likewise.
(pa_combine_instructions): Likewise for locals "anchor",
"floater".
(pa_can_combine_p): Likewise for params "anchor", "floater" and
locals "start", "end".
* config/picochip/picochip.c (picochip_reset_vliw): Likewise for
param "insn" and local "local_insn".
(picochip_final_prescan_insn): Likewise for local "local_insn".
* config/rs6000/rs6000.c (compute_save_world_info): Likewise for
local "insn".
(uses_TOC): Likewise.
* config/s390/s390.c (get_some_local_dynamic_name): Likewise.
(s390_mainpool_finish): Eliminate top-level local rtx "insn",
splitting out to more tightly-scoped locals, 3 as rtx and one as
rtx_insn *.
(s390_optimize_nonescaping_tx): Strengthen local "tmp" from rtx
to rtx_insn *.
(s390_emit_prologue): Introduce a local "insn" to be an rtx_insn *
where needed.
* config/sh/sh-protos.h (barrier_align): Strenghten param from rtx
to rtx_insn *.
(fixup_addr_diff_vecs): Likewise.
(reg_unused_after): Likewise for param 2.
(sh_can_redirect_branch): Likewise for both params.
(check_use_sfunc_addr): Likewise for param 1.
* config/sh/sh.c (fixup_mova): Likewise for local "worker".
(find_barrier): Likewise for local "last_got".
(gen_block_redirect): Likewise for return type, param "jump" and
locals "prev", "scan", "next", "insn".
(struct far_branch): Likewise for fields "near_label",
"insert_place", "far_label".
(gen_far_branch): Likewise for local "jump".
(fixup_addr_diff_vecs): Likewise for param "first" and locals
"insn", "prev".
(barrier_align): Likewise for param and for locals "prev", "x".
Introduce local rtx_sequence * "prev_seq" and use insn method for
typesafety and clarity.
(sh_reorg): Strengthen local "scan" from rtx to rtx_insn *.
(get_dest_uid): Likewise for local "dest".
(split_branches): Likewise for locals "next", "beyond", "label",
"block", "far_label". Add checked casts when assigning to
bp->far_label and "far_label".
(reg_unused_after): Strengthen param "scan" from rtx to rtx_insn *.
(sequence_insn_p): Likewise.
(mark_constant_pool_use): Likewise for locals "insn", "lab". Add a
more loop-scoped rtx "insn" when walking LABEL_REFS.
(sh_can_redirect_branch): Strengthen both params from rtx to
rtx_insn *.
(check_use_sfunc_addr): Likewise for param "insn". Introduce a
new local rtx_sequence * "seq" via a dyn_cast, and use a method
for clarity and typesafety.
* config/sh/sh.md (define_expand "epilogue"): Strengthen local
"insn" from rtx to rtx_insn *.
(define_insn "casesi_worker_1"): Add a checked cast to rtx_insn *
when using NEXT_INSN on the CODE_LABEL in operands[2].
(define_insn "casesi_worker_2"): Likewise.
(define_insn "casesi_shift_media"): Likewise.
(define_insn "casesi_load_media"): Likewise for the CODE_LABEL in
operands[3].
* config/sh/sh_optimize_sett_clrt.cc (struct ccreg_value):
Strengthen field "insn" from rtx to rtx_insn *.
(sh_optimize_sett_clrt::execute): Likewise for locals "next_i", "i".
(sh_optimize_sett_clrt::find_last_ccreg_values): Likewise for
param "start_insn" and local "start_insn".
* config/sh/sh_treg_combine.cc (struct set_of_reg): Likewise for
field "insn".
(find_set_of_reg_bb): Likewise for param "insn".
(trace_reg_uses_1): Likewise for param "start_insn" and local "i".
(trace_reg_uses): Likewise for param "start_insn".
(sh_treg_combine::cbranch_trace): Likewise for field
"cbranch_insn".
(sh_treg_combine::cbranch_trace::cbranch_trace): Likewise for
param "insn".
(sh_treg_combine::record_set_of_reg): Likewise for param
"start_insn" and local "i".
(sh_treg_combine::can_remove_cstore): Likewise for local
"prev_insn".
(sh_treg_combine::try_optimize_cbranch): Likewise for param
"insn".
(sh_treg_combine::execute): Likewise for local "i".
* config/sparc/sparc-protos.h (empty_delay_slot): Likewise for
param.
(sparc_check_64): Likewise for second param.
* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
locals "insn", "next". Introduce local rtx_sequence * "seq" via a
dyn_cast, using its insn method for typesafety and clarity.
(empty_delay_slot): Strengthen param "insn" from rtx to
rtx_insn *.
(set_extends): Likewise.
(sparc_check_64): Likewise.
* config/stormy16/stormy16.c (xstormy16_split_cbranch): Likewise
for locals "seq", "last_insn".
(combine_bnp): Likewise for param "insn".
(xstormy16_reorg): Likewise for local "insn".
* config/v850/v850.c (substitute_ep_register): Likewise for params
"first_insn", "last_insn" and local "insn".
(v850_reorg): Likewise for fields "first_insn", "last_insn" within
elements of "regs" array, and local "insn".
* except.c (emit_note_eh_region_end): Likewise for param "insn".
* final.c (final_sequence): Strengthen this global from rtx to
rtx_sequence *.
(shorten_branches): Strenthen locals "rel_lab", "prev" from rtx to
rtx_insn *.
(final_scan_insn): Update assignment to "final_sequence" to be
from "seq", the cast version of "body", for type-safety.
* function.c (assign_parm_setup_reg): Strengthen locals "insn",
"insns" from rtx to rtx_insn *.
(thread_prologue_and_epilogue_insns): Likewise for local "seq".
* genattr.c (main): When writing out generated insn-attr.h,
strengthen params 1 and 3 of eligible_for_delay,
eligible_for_annul_true, eligible_for_annul_false from rtx to
rtx_insn *.
* genattrtab.c (write_eligible_delay): Likewise when writing out
generated insn-attrtab.c; also local "insn" the generated
functions.
* hw-doloop.c (discover_loops): Strengthen local "insn" from rtx
to rtx_insn *.
* hw-doloop.h (struct GTY hwloop_info_d): Strengthen field
"start_label" from rtx to rtx_insn *.
* ira.c (decrease_live_ranges_number): Likewise for local "p".
(ira_update_equiv_info_by_shuffle_insn): Likewise for param
"insns" and local "insn".
(validate_equiv_mem): Likewise for param "start" and local "insn".
(memref_used_between_p): Likewise for params "start", "end" and
local "insn".
* ira.h (ira_update_equiv_info_by_shuffle_insn): Likewise for
final param.
* loop-doloop.c (doloop_optimize): Within region guarded by
INSN_P (doloop_pat), introduce a new local rtx_insn *
"doloop_insn" via a checked cast, and use it for typesafety,
eventually writing the value back into doloop_pat.
* output.h (final_sequence): Strengthen this global from rtx to
rtx_sequence *.
* recog.c (peep2_attempt): Rename param "insn" to "uncast_insn",
reintroducing "insn" as an rtx_insn * via a checked cast.
Strengthen param "attempt" and local "new_insn"from rtx to
rtx_insn *.
(peephole2_optimize): Strengthen locals "insn", "attempt" from rtx
to rtx_insn *.
* ree.c (emit_note_eh_region_end): Likewise for local "insn".
* reload1.c (reload_as_needed): Eliminate top-level locals "x" and
"p" in favor of more tightly-scoped replacements, sometimes rtx
and sometimes rtx_insn *, as appropriate.
(delete_output_reload): Eliminate top-level rtx "i1", splitting
into two loop-scoped locals, one an rtx, the other an rtx_insn *.
* reorg.c (delete_scheduled_jump): Add checked cast. Strengthen
local "trial" from rtx to rtx_insn *.
(redirect_with_delay_slots_safe_p): Strengthen param "jump" from
rtx to rtx_insn *. Strenghten local "pat" from rtx to
rtx_sequence * and use methods for clarity and typesafety.
(redirect_with_delay_list_safe_p): Strengthen param "jump" from
rtx to rtx_insn *. Strenghten local "li" from rtx to
rtx_insn_list * and use its methods for clarity and typesafety.
(steal_delay_list_from_target): Strengthen param "insn" from rtx
to rtx_insn *.
(steal_delay_list_from_fallthrough): Likewise.
(try_merge_delay_insns): Likewise for param "thread" and locals
"trial", "next_trial", "delay_insn".
(redundant_insn): Likewise for param "target" and local "trial".
(own_thread_p): Likewise for param "thread" and locals
"active_insn", "insn".
(get_label_before): Likewise for param "insn".
(fill_simple_delay_slots): Likewise for local "new_label"; use
JUMP_LABEL_AS_INSN as necessary when calling own_thread_p.
(label_before_next_insn): Strengthen return type and local "insn"
from rtx to rtx_insn *.
(relax_delay_slots): Likewise for locals "other", "tmp".
(make_return_insns): Likewise for param "first" and locals "insn",
"jump_insn", "prev". Move declaration of "pat" to its assignment
and strengthen from rtx to rtx_sequence *. Use its methods for
clarity and typesafety.
* rtlanal.c (no_labels_between_p): Strengthen params from
const_rtx to const rtx_insn *. Strengthen local "p" from rtx to
rtx_insn *.
(reg_used_between_p): Strengthen params "from_insn", "to_insn"
from const_rtx to const rtx_insn *.
(reg_set_between_p): Rename param "from_insn" to
"uncast_from_insn", and reintroduce "from_insn" as a
const rtx_insn * via a checked cast.
(modified_between_p): Likewise for param "start" as "uncast_start".
(tablejump_p): Add a cast when invoking NEXT_INSN on "label".
* sel-sched-ir.c (get_seqno_by_preds): Strengthen param and locals
"tmp", head" from rtx to rtx_insn *.
(recompute_rev_top_order): Likewise for local "insn".
* sel-sched-ir.h (get_seqno_by_preds): Likewise for param.
* store-motion.c (build_store_vectors): Likewise for local "insn".
Strengthen local "st" from rtx to rtx_insn_list * and use methods
for clarity and typesafety.
* tree-ssa-loop-ivopts.c (seq_cost): Strengthen param "seq" from
rtx to rtx_insn *.
(computation_cost): Likewise for local "seq".
(get_address_cost): Likewise.
/
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* rtx-classes-status.txt (TODO): NEXT_INSN/PREV_INSN are done.
From-SVN: r214698
2014-08-28 23:29:38 +02:00
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arc_text_label (rtx_insn *label)
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2013-10-01 19:03:46 +02:00
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{
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config/arc: Use rtx_insn
gcc/
* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
first param from rtx to rtx_insn *.
(arc_verify_short): Likewise.
(arc_short_long): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (struct arc_ccfsm): Likewise for field
"target_insn".
(arc_ccfsm_advance): Likewise for param "insn" and locals
"start_insn", "this_insn".
(arc_ccfsm_record_condition): Likewise for local "seq_insn".
(arc_ccfsm_post_advance): Likewise for param "insn".
(arc_next_active_insn): Likewise for return type and param "insn".
Convert NULL_RTX to NULL as appropriate. Add a checked cast.
(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
(output_short_suffix): Likewise for local "insn".
(arc_final_prescan_insn): Likewise for param "insn". Remove
now-redundant checked cast.
(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
rtx_insn *. Add a checked cast. Introduce local "lc_set_insn"
for use where lc_set became an insn.
(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
rtx to rtx_insn *.
(arc_get_insn_variants): Likewise for local "prev".
(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
"next".
(arc_predicate_delay_insns): Likewise for local "insn".
(arc_pad_return): Likewise for local "prev". For now, add a
checked cast when extracting the insn from "final_sequence".
(arc_short_long): Likewise for param "insn".
(arc_need_delay): Likewise for param "insn" and local "next".
(arc_label_align): Likewise for locals "prev", "next".
From-SVN: r214436
2014-08-25 18:36:54 +02:00
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rtx_insn *next;
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2013-10-01 19:03:46 +02:00
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/* ??? We use deleted labels like they were still there, see
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gcc.c-torture/compile/20000326-2.c . */
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gcc_assert (GET_CODE (label) == CODE_LABEL
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|| (GET_CODE (label) == NOTE
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&& NOTE_KIND (label) == NOTE_INSN_DELETED_LABEL));
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next = next_nonnote_insn (label);
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if (next)
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return (!JUMP_TABLE_DATA_P (next)
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|| GET_CODE (PATTERN (next)) != ADDR_VEC);
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else if (!PREV_INSN (label))
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/* ??? sometimes text labels get inserted very late, see
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gcc.dg/torture/stackalign/comp-goto-1.c */
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return true;
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return false;
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}
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/* Return the size of the pretend args for DECL. */
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int
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arc_decl_pretend_args (tree decl)
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{
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/* struct function is in DECL_STRUCT_FUNCTION (decl), but no
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pretend_args there... See PR38391. */
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gcc_assert (decl == current_function_decl);
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return crtl->args.pretend_args_size;
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}
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/* Without this, gcc.dg/tree-prof/bb-reorg.c fails to assemble
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when compiling with -O2 -freorder-blocks-and-partition -fprofile-use
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2014-05-19 08:49:58 +02:00
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-D_PROFILE_USE; delay branch scheduling then follows a crossing jump
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2013-10-01 19:03:46 +02:00
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to redirect two breqs. */
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static bool
|
2014-09-15 17:49:09 +02:00
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arc_can_follow_jump (const rtx_insn *follower, const rtx_insn *followee)
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2013-10-01 19:03:46 +02:00
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{
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/* ??? get_attr_type is declared to take an rtx. */
|
2014-09-15 17:49:09 +02:00
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union { const rtx_insn *c; rtx_insn *r; } u;
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2013-10-01 19:03:46 +02:00
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u.c = follower;
|
2014-05-19 08:49:58 +02:00
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if (CROSSING_JUMP_P (followee))
|
2013-10-01 19:03:46 +02:00
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switch (get_attr_type (u.r))
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{
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case TYPE_BRCC:
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case TYPE_BRCC_NO_DELAY_SLOT:
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return false;
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default:
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return true;
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}
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return true;
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}
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/* Implement EPILOGUE__USES.
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Return true if REGNO should be added to the deemed uses of the epilogue.
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We use the return address
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arc_return_address_regs[arc_compute_function_type (cfun)] .
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But also, we have to make sure all the register restore instructions
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are known to be live in interrupt functions. */
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bool
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arc_epilogue_uses (int regno)
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{
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if (reload_completed)
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{
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if (ARC_INTERRUPT_P (cfun->machine->fn_type))
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{
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if (!fixed_regs[regno])
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return true;
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return regno == arc_return_address_regs[cfun->machine->fn_type];
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}
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else
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return regno == RETURN_ADDR_REGNUM;
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}
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else
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return regno == arc_return_address_regs[arc_compute_function_type (cfun)];
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}
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#ifndef TARGET_NO_LRA
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#define TARGET_NO_LRA !TARGET_LRA
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#endif
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static bool
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|
|
arc_lra_p (void)
|
|
|
|
|
{
|
|
|
|
|
return !TARGET_NO_LRA;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* ??? Should we define TARGET_REGISTER_PRIORITY? We might perfer to use
|
|
|
|
|
Rcq registers, because some insn are shorter with them. OTOH we already
|
|
|
|
|
have separate alternatives for this purpose, and other insns don't
|
|
|
|
|
mind, so maybe we should rather prefer the other registers?
|
|
|
|
|
We need more data, and we can only get that if we allow people to
|
|
|
|
|
try all options. */
|
|
|
|
|
static int
|
|
|
|
|
arc_register_priority (int r)
|
|
|
|
|
{
|
|
|
|
|
switch (arc_lra_priority_tag)
|
|
|
|
|
{
|
|
|
|
|
case ARC_LRA_PRIORITY_NONE:
|
|
|
|
|
return 0;
|
|
|
|
|
case ARC_LRA_PRIORITY_NONCOMPACT:
|
|
|
|
|
return ((((r & 7) ^ 4) - 4) & 15) != r;
|
|
|
|
|
case ARC_LRA_PRIORITY_COMPACT:
|
|
|
|
|
return ((((r & 7) ^ 4) - 4) & 15) == r;
|
|
|
|
|
default:
|
|
|
|
|
gcc_unreachable ();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static reg_class_t
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_spill_class (reg_class_t /* orig_class */, machine_mode)
|
2013-10-01 19:03:46 +02:00
|
|
|
|
{
|
|
|
|
|
return GENERAL_REGS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
2014-10-29 13:02:45 +01:00
|
|
|
|
arc_legitimize_reload_address (rtx *p, machine_mode mode, int opnum,
|
2013-10-01 19:03:46 +02:00
|
|
|
|
int itype)
|
|
|
|
|
{
|
|
|
|
|
rtx x = *p;
|
|
|
|
|
enum reload_type type = (enum reload_type) itype;
|
|
|
|
|
|
|
|
|
|
if (GET_CODE (x) == PLUS
|
|
|
|
|
&& CONST_INT_P (XEXP (x, 1))
|
|
|
|
|
&& (RTX_OK_FOR_BASE_P (XEXP (x, 0), true)
|
|
|
|
|
|| (REG_P (XEXP (x, 0))
|
|
|
|
|
&& reg_equiv_constant (REGNO (XEXP (x, 0))))))
|
|
|
|
|
{
|
|
|
|
|
int scale = GET_MODE_SIZE (mode);
|
|
|
|
|
int shift;
|
|
|
|
|
rtx index_rtx = XEXP (x, 1);
|
|
|
|
|
HOST_WIDE_INT offset = INTVAL (index_rtx), offset_base;
|
|
|
|
|
rtx reg, sum, sum2;
|
|
|
|
|
|
|
|
|
|
if (scale > 4)
|
|
|
|
|
scale = 4;
|
|
|
|
|
if ((scale-1) & offset)
|
|
|
|
|
scale = 1;
|
|
|
|
|
shift = scale >> 1;
|
|
|
|
|
offset_base = (offset + (256 << shift)) & (-512 << shift);
|
|
|
|
|
/* Sometimes the normal form does not suit DImode. We
|
|
|
|
|
could avoid that by using smaller ranges, but that
|
|
|
|
|
would give less optimized code when SImode is
|
|
|
|
|
prevalent. */
|
|
|
|
|
if (GET_MODE_SIZE (mode) + offset - offset_base <= (256 << shift))
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
|
|
|
|
|
|
|
|
|
reg = XEXP (x, 0);
|
|
|
|
|
regno = REGNO (reg);
|
|
|
|
|
sum2 = sum = plus_constant (Pmode, reg, offset_base);
|
|
|
|
|
|
|
|
|
|
if (reg_equiv_constant (regno))
|
|
|
|
|
{
|
|
|
|
|
sum2 = plus_constant (Pmode, reg_equiv_constant (regno),
|
|
|
|
|
offset_base);
|
|
|
|
|
if (GET_CODE (sum2) == PLUS)
|
|
|
|
|
sum2 = gen_rtx_CONST (Pmode, sum2);
|
|
|
|
|
}
|
|
|
|
|
*p = gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base));
|
|
|
|
|
push_reload (sum2, NULL_RTX, &XEXP (*p, 0), NULL,
|
|
|
|
|
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, opnum,
|
|
|
|
|
type);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* We must re-recognize what we created before. */
|
|
|
|
|
else if (GET_CODE (x) == PLUS
|
|
|
|
|
&& GET_CODE (XEXP (x, 0)) == PLUS
|
|
|
|
|
&& CONST_INT_P (XEXP (XEXP (x, 0), 1))
|
|
|
|
|
&& REG_P (XEXP (XEXP (x, 0), 0))
|
|
|
|
|
&& CONST_INT_P (XEXP (x, 1)))
|
|
|
|
|
{
|
|
|
|
|
/* Because this address is so complex, we know it must have
|
|
|
|
|
been created by LEGITIMIZE_RELOAD_ADDRESS before; thus,
|
|
|
|
|
it is already unshared, and needs no further unsharing. */
|
|
|
|
|
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
|
|
|
|
|
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, opnum, type);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2014-11-01 09:44:39 +01:00
|
|
|
|
/* Implement TARGET_USE_BY_PIECES_INFRASTRUCTURE_P. */
|
|
|
|
|
|
|
|
|
|
static bool
|
2014-11-18 23:45:21 +01:00
|
|
|
|
arc_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT size,
|
2014-11-01 09:44:39 +01:00
|
|
|
|
unsigned int align,
|
|
|
|
|
enum by_pieces_operation op,
|
|
|
|
|
bool speed_p)
|
|
|
|
|
{
|
|
|
|
|
/* Let the movmem expander handle small block moves. */
|
|
|
|
|
if (op == MOVE_BY_PIECES)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
return default_use_by_pieces_infrastructure_p (size, align, op, speed_p);
|
|
|
|
|
}
|
|
|
|
|
|
2013-10-01 19:03:46 +02:00
|
|
|
|
struct gcc_target targetm = TARGET_INITIALIZER;
|
|
|
|
|
|
|
|
|
|
#include "gt-arc.h"
|