2019-01-01 13:31:55 +01:00
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/* Copyright (C) 2000-2019 Free Software Foundation, Inc.
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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This file was pretty much copied from newlib.
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2003-09-27 06:48:30 +02:00
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This file is part of GCC.
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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2003-09-27 06:48:30 +02:00
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GCC is free software; you can redistribute it and/or modify it
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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under the terms of the GNU General Public License as published by the
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2009-04-09 17:00:19 +02:00
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Free Software Foundation; either version 3, or (at your option) any
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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later version.
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2003-09-27 06:48:30 +02:00
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GCC is distributed in the hope that it will be useful,
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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2009-04-09 17:00:19 +02:00
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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2014-12-17 03:01:10 +01:00
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#include "crt.h"
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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#ifdef MMU_SUPPORT
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/* Section used for exception/timer interrupt stack area */
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.section .data.vbr.stack,"aw"
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.align 4
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.global __ST_VBR
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__ST_VBR:
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.zero 1024 * 2 /* ; 2k for VBR handlers */
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/* Label at the highest stack address where the stack grows from */
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__timer_stack:
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#endif /* MMU_SUPPORT */
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/* ;----------------------------------------
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Move crtstuff support to toplevel libgcc
gcc:
* config.gcc (extra_parts): Remove.
(*-*-freebsd*): Remove extra_parts.
(*-*-linux*, frv-*-*linux*, *-*-kfreebsd*-gnu, *-*-knetbsd*-gnu,
*-*-gnu*, *-*-kopensolaris*-gnu): Likewise.
(*-*-netbsd*): Remove t-libc-ok, t-netbsd from tmake_file.
Remove extra_parts for *-*-netbsd*1.[7-9]*, *-*-netbsd[2-9]*,
*-*-netbsdelf[2-9]*.
(*-*-openbsd*): Remove t-libc-ok from tmake_file.
(alpha*-*-linux*): Remove extra_parts.
(alpha*-*-freebsd*): Likewise.
(bfin*-linux-uclibc*): Likewise.
(fr30-*-elf): Likewise.
(moxie-*-elf): Likewise.
(moxie-*-uclinux*): Likewise.
(h8300-*-rtems*): Remove h8300/t-elf from tmake_file.
(h8300-*-elf*): Likewise.
(hppa*64*-*-hpux11*): Remove extra_parts.
(i[34567]86-*-elf*): Remove i386/t-i386elf, i386/t-crtstuff from
tmake_file.
(x86_64-*-elf*): Likewise.
(i[34567]86-*-freebsd*): Remove tmake_file.
(x86_64-*-freebsd*): Likewise.
(x86_64-*-netbsd*): Likewise.
(i[34567]86-*-openbsd2.*, i[34567]86-*openbsd3.[0123]): Remove
t-libc-ok from tmake_file.
(i[34567]86-*-linux*, i[34567]86-*-kfreebsd*-gnu,
i[34567]86-*-knetbsd*-gnu, i[34567]86-*-gnu*,
i[34567]86-*-kopensolaris*-gnu): Remove i386/t-crtstuff from tmake_file.
Remove extra_parts.
(x86_64-*-linux*, x86_64-*-kfreebsd*-gnu, x86_64-*-knetbsd*-gnu):
Remove i386/t-crtstuff from tmake_file.
(i[34567]86-*-lynxos*): Likewise.
Remove extra_parts.
(ia64*-*-elf*): Remove extra_parts.
(ia64*-*-freebsd*): Likewise.
(ia64*-*-linux*): Likewise.
(ia64-hp-*vms*): Remove ia64/t-vms from tmake_file.
(m32r-*-elf*): Remove extra_parts.
(m32rle-*-elf*): Likewise.
(m32r-*-rtems*): Likewise.
(m68k-*-elf*, fido-*-elf*): Likewise.
(m68k*-*-openbsd*): Remove t-libc-ok from tmake_file.
(m68k-*-rtems*): Remove extra_parts.
(mep-*-*): Likewise.
(microblaze*-linux*): Likewise.
(mips64*-*-linux*, mipsisa64*-*-linux*): Likewise.
(mips*-*-linux*): Likewise.
(powerpc-*-lynxos*): Likewise.
(s390x-ibm-tpf*): Likewise.
(score-*-elf): Likewise.
Remove tmake_file.
(sh-*-elf*, sh[12346l]*-*-elf*, sh-*-linux*, sh[2346lbe]*-*-linux*,
sh-*-netbsdelf*, shl*-*-netbsdelf*, sh5-*-netbsd*, sh5l*-*-netbsd*,
sh64-*-netbsd*, sh64l*-*-netbsd*): Remove sh/t-elf from tmake_file.
Remove sh/t-superh from tmake_file for sh*-superh-elf.
Remove sh/t-linux64 from tmake_file for sh64*-*-linux*.
(sh-*-rtems*): Remove sh/t-elf from tmake_file.
(sh-wrs-vxworks): Likewise.
(sparc-*-linux*): Remove extra_parts.
(sparc64-*-linux*): Likewise.
(sparc64-*-freebsd*, ultrasparc-*-freebsd*): Likewise.
(xstormy16-*-elf): Likewise.
(xtensa*-*-linux*): Remove xtensa/t-linux from tmake_file.
(am33_2.0-*-linux*): Remove extra_parts.
* configure.ac (extra_parts): Don't substitute.
* configure: Regenerate.
* crtstuff.c: Move to ../libgcc.
* Makefile.in (CRTSTUFF_CFLAGS): Remove.
(EXTRA_PARTS): Remove.
(CRTSTUFF_T_CFLAGS): Remove.
(MOSTLYCLEANFILES): Remove $(EXTRA_PARTS).
(GCC_EXTRA_PARTS): Remove.
(libgcc.mvars): Remove GCC_EXTRA_PARTS, CRTSTUFF_CFLAGS,
CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S.
Emit GCC_CFLAGS, INHIBIT_LIBC_CFLAGS.
($(T)crtbegin.o, $(T)crtend.o, $(T)crtbeginS.o, $(T)crtendS.o)
($(T)crtbeginT.o): Remove.
* config/alpha/t-vms (EXTRA_PARTS): Remove.
($(T)vms-dwarf2.o, $(T)vms-dwarf2eh.o): Remove.
* config/alpha/vms-dwarf2.asm: Move to
../libgcc/config/alpha/vms-dwarf2.S.
* config/alpha/vms-dwarf2eh.asm: Move to
../libgcc/config/alpha/vms-dwarf2eh.S.
* config/arm/crti.asm: Move to ../libgcc/config/arm/crti.S.
* config/arm/crtn.asm: Move to ../libgcc/config/arm/crtn.S.
* config/arm/t-arm-elf (EXTRA_MULTILIB_PARTS): Remove.
($(T)crti.o, $(T)crtn.o): Remove.
* config/arm/t-linux: Remove comment.
* config/arm/t-linux-eabi (EXTRA_MULTILIB_PARTS): Remove.
* config/arm/t-strongarm-elf (EXTRA_MULTILIB_PARTS): Remove.
($(T)crti.o, $(T)crtn.o): Remove.
* config/arm/t-symbian (EXTRA_MULTILIB_PARTS): Remove.
* config/bfin/crti.s: Move to ../libgcc/config/bfin/crti.S.
* config/bfin/crtn.s: Move to ../libgcc/config/bfin/crtn.S.
* config/bfin/crtlibid.s: Move to ../libgcc/config/bfin/crtlibid.S.
* config/bfin/t-bfin (EXTRA_PARTS): Remove.
($(T)crti.o, $(T)crtn.o): Remove.
* config/bfin/t-bfin-elf (CRTSTUFF_T_CFLAGS): Remove.
($(T)crti.o, $(T)crtn.o, $(T)crtlibid.o): Remove
(EXTRA_MULTILIB_PARTS): Remove.
* config/bfin/t-bfin-linux (CRTSTUFF_T_CFLAGS,
EXTRA_MULTILIB_PARTS): Remove.
* config/bfin/t-bfin-uclinux (CRTSTUFF_T_CFLAGS): Remove.
($(T)crtlibid.o): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
* config/c6x/crti.s: Move to ../libgcc/config/c6x/crti.S.
* config/c6x/crtn.s: Move to ../libgcc/config/c6x/crtn.S.
* config/c6x/t-c6x-elf ($(T)crti.o, $(T)crtn.o): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
(CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S): Remove.
* config/c6x/t-c6x-uclinux (CRTSTUFF_T_CFLAGS,
CRTSTUFF_T_CFLAGS_S): Remove.
* config/cris/t-elfmulti (CRTSTUFF_T_CFLAGS): Remove.
* config/cris/t-linux (CRTSTUFF_T_CFLAGS_S): Remove.
* config/fr30/crti.asm: Move to ../libgcc/config/fr30/crti.S.
* config/fr30/crtn.asm: Move to ../libgcc/config/fr30/crtn.S.
* config/fr30/t-fr30 ($(T)crti.o, $(T)crtn.o): Remove.
* config/frv/frvbegin.c, config/frv/frvend.c: Move to
../libgcc/config/frv.
* config/frv/t-frv (EXTRA_MULTILIB_PARTS): Remove.
(FRVSTUFF_CFLAGS, $(T)frvbegin$(objext), $(T)frvend$(objext)): Remove.
* config/frv/t-linux (EXTRA_MULTILIB_PARTS): Remove.
(CRTSTUFF_T_CFLAGS): Remove.
* config/h8300/crti.asm: Move to ../libgcc/config/h8300/crti.S.
* config/h8300/crtn.asm: Move to ../libgcc/config/h8300/crtn.S.
* config/h8300/t-elf: Remove.
* config/i386/cygming-crtbegin.c, config/i386/cygming-crtend.c:
Move to ../libgcc/config/i386.
* config/i386/t-crtstuff: Remove.
* config/i386/t-i386elf: Remove.
* config/i386/t-linux64 (EXTRA_MULTILIB_PARTS): Remove.
* config/i386/t-nto (CRTSTUFF_T_CFLAGS, EXTRA_PARTS): Remove.
* config/ia64/crtbegin.asm: Move to
../libgcc/config/ia64/crtbegin.S.
* config/ia64/crtend.asm: Move to
../libgcc/config/ia64/crtend.S.
* config/ia64/crti.asm: Move to ../libgcc/config/ia64/crti.S.
* config/ia64/crtn.asm: Move to ../libgcc/config/ia64/crtn.S.
* config/ia64/t-vms: Remove.
* config/ia64/vms-crtinit.asm: Move to
../libgcc/config/ia64/vms-crtinit.S.
* config/m32c/t-m32c (EXTRA_MULTILIB_PARTS): Remove.
* config/m32r/initfini.c: Move to ../libgcc/config/m32r.
* config/m32r/t-linux (CRTSTUFF_T_CFLAGS_S): Remove.
* config/m32r/t-m32r (CRTSTUFF_T_CFLAGS): Remove.
($(T)crtinit.o, $(T)crtfini.o): Remove.
(m32rx, m32r2): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
* config/m68k/crti.s: Move to ../libgcc/config/m68k/crti.S.
* config/m68k/crtn.s: Move to ../libgcc/config/m68k/crtn.S.
* config/m68k/t-crtstuff: Remove.
* config/m68k/t-linux (EXTRA_MULTILIB_PARTS): Remove.
* config/m68k/t-m68kelf: Remove.
* config/m68k/t-uclinux (EXTRA_MULTILIB_PARTS): Remove.
* config/mcore/crti.asm: Move to ../libgcc/config/mcore/crti.S.
* config/mcore/crtn.asm: Move to ../libgcc/config/mcore/crtn.S.
* config/mcore/t-mcore ($(T)crti.o, $(T)crtn.o): Remove.
(EXTRA_PARTS, EXTRA_MULTILIB_PARTS): Remove.
* config/mep/t-mep (CRTSTUFF_CFLAGS): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
* config/microblaze/crti.s: Move to ../libgcc/config/microblaze/crti.S.
* config/microblaze/crtn.s: Move to ../libgcc/config/microblaze/crtn.S.
* config/microblaze/t-microblaze (EXTRA_MULTILIB_PARTS,
EXTRA_PARTS): Remove.
($(T)crti$(objext), $(T)crtn$(objext)): Remove.
* config/mips/crti.asm: Move to ../libgcc/config/mips/crti.S.
* config/mips/crtn.asm: Move to ../libgcc/config/mips/crtn.S.
* config/mips/t-elf (CRTSTUFF_T_CFLAGS): Remove.
($(T)crti.o, $(T)crtn.o): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
* config/mips/t-isa3264: Likewise.
* config/mips/t-linux64 (EXTRA_MULTILIB_PARTS): Remove.
* config/mips/t-r3900 (EXTRA_MULTILIB_PARTS): Remove.
(CRTSTUFF_T_CFLAGS): Remove.
* config/mips/t-sde (CRTSTUFF_T_CFLAGS): Remove.
($(T)crti.o, $(T)crtn.o): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
* config/mips/t-sr71k (EXTRA_MULTILIB_PARTS, CRTSTUFF_T_CFLAGS):
Remove.
($(T)crti.o, $(T)crtn.o): Remove.
* config/mips/t-st (EXTRA_MULTILIB_PARTS): Remove.
* config/mips/t-vr (CRTSTUFF_T_CFLAGS): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
($(T)crti.o, $(T)crtn.o): Remove.
* config/mmix/crti.asm: Move to ../libgcc/config/crti.S.
* config/mmix/crtn.asm: Move to ../libgcc/config/crtn.S.
* config/mmix/t-mmix (CRTSTUFF_T_CFLAGS): Remove.
* config/moxie/crti.asm, config/moxie/crtn.asm: Remove.
* config/pa/stublib.c: Move to libgcc/config/pa.
* config/pa/t-linux (CRTSTUFF_T_CFLAGS_S): Remove.
* config/pa/t-linux64 (CRTSTUFF_T_CFLAGS_S): Remove.
* config/pa/t-pa-hpux11 (LIBGCCSTUB_OBJS, stublib.c): Remove.
(pthread_default_stacksize_np-stub.o, pthread_mutex_lock-stub.o)
(pthread_mutex_unlock-stub.o, pthread_once-stub.o)
($(T)libgcc_stub.a): Remove.
* config/pa/t-pa64 (LIBGCCSTUB_OBJS, stublib.c): Remove.
(rfi-stub.o, dfi-stub.o, cxaf-stub.o, jvrc-stub.o)
(pthread_default_stacksize_np-stub.o, pthread_mutex_lock-stub.o)
(pthread_mutex_unlock-stub.o, pthread_once-stub.o)
($(T)libgcc_stub.a): Remove.
* config/rs6000/eabi-cn.asm: Move to
../../../libgcc/config/rs6000/eabi-cn.S.
* config/rs6000/eabi-ci.asm: Move to
../../../libgcc/config/rs6000/eabi-ci.S.
* config/rs6000/sol-ci.asm: Move to
../../../libgcc/config/rs6000/sol-ci.S.
* config/rs6000/sol-cn.asm: Move to
../../../libgcc/config/rs6000/sol-cn.S.
* config/rs6000/t-lynx (EXTRA_MULTILIB_PARTS): Remove.
(CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S): Remove.
* config/rs6000/t-netbsd (CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S):
Remove.
(EXTRA_MULTILIB_PARTS): Remove.
* config/rs6000/t-ppccomm (EXTRA_MULTILIB_PARTS): Remove.
(ecrti.S, ecrtn.S, ncrti.S, ncrtn.S): Remove.
($(T)ecrti$(objext), $(T)ecrtn$(objext), $(T)ncrti$(objext),
$(T)ncrtn$(objext)): Remove.
(CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S): Remove.
* config/rs6000/t-vxworks (EXTRA_MULTILIB_PARTS): Remove.
* config/rx/t-rx (EXTRA_MULTILIB_PARTS): Remove.
* config/score/crti.asm: Move to ../libgcc/config/score/crti.S.
* config/score/crtn.asm: Move to ../libgcc/config/score/crtn.S.
* config/score/t-score-elf: Remove.
* config/sh/crt1.asm: Move to ../libgcc/config/sh/crt1.S.
* config/sh/crti.asm: Move to ../libgcc/config/sh/crti.S.
* config/sh/crtn.asm: Move to ../libgcc/config/sh/crtn.S.
* config/sh/lib1funcs-4-300.asm: Move to
../../../libgcc/config/sh/lib1funcs-4-300.S.
* config/sh/lib1funcs-Os-4-200.asm: Move to
../libgcc/config/sh/lib1funcs-Os-4-200.S.
* config/sh/t-elf: Remove.
* config/sh/t-linux (EXTRA_MULTILIB_PARTS): Remove.
* config/sh/t-linux64: Remove.
* config/sh/t-netbsd (EXTRA_MULTILIB_PARTS): Remove.
* config/sh/t-sh ($(T)crt1.o, $(T)crti.o, $(T)crtn.o): Remove.
(IC_EXTRA_PARTS, OPT_EXTRA_PARTS, EXTRA_MULTILIB_PARTS): Remove.
($(T)ic_invalidate_array_4-100.o)
($(T)libic_invalidate_array_4-100.a)
($(T)ic_invalidate_array_4-200.o)
($(T)libic_invalidate_array_4-200.a, $(T)ic_invalidate_array_4a.o)
($(T)libic_invalidate_array_4a.a, $(T)sdivsi3_i4i-Os-4-200.o)
($(T)udivsi3_i4i-Os-4-200.o, $(T)unwind-dw2-Os-4-200.o)
($(T)libgcc-Os-4-200.a, $(T)div_table-4-300.o)
($(T)libgcc-4-300.a): Remove.
* config/sh/t-superh: Remove.
* config/sh/t-vxworks (EXTRA_MULTILIB_PARTS): Remove.
* config/sparc/t-linux64 (CRTSTUFF_T_CFLAGS): Remove.
* config/spu/cache.S: Move to ../libgcc/config/spu.
* config/spu/cachemgr.c: Move to ../libgcc/config/spu.
* config/spu/t-spu-elf (CRTSTUFF_T_CFLAGS): Remove.
(EXTRA_MULTILIB_PARTS): Remove.
($(T)cachemgr.o, $(T)cachemgr_nonatomic.o, $(T)libgcc_%.a): Remove.
($(T)cache8k.o, $(T)cache16k.o, $(T)cache32k.o, $(T)cache32k.o)
($(T)cache64k.o, $(T)cache128k.o): Remove.
* config/t-freebsd (CRTSTUFF_T_CFLAGS_S): Remove.
* config/t-libc-ok: Remove.
* config/t-linux (CRTSTUFF_T_CFLAGS_S): Remove.
* config/t-lynx (CRTSTUFF_T_CFLAGS_S): Remove.
* config/t-netbsd: Remove.
* config/t-svr4 (CRTSTUFF_T_CFLAGS_S): Remove.
* config/t-vxworks (EXTRA_MULTILIB_PARTS): Remove.
* config/vms/t-vms (VMS_EXTRA_PARTS): Remove.
($(T)vcrt0.o, $(T)pcrt0.o): Remove.
* config/vms/vms-ucrt0.c: Move to ../libgcc/config/vms.
* config/xtensa/crti.asm: Move to ../libgcc/config/xtensa/crti.S.
* config/xtensa/crtn.asm: Move to ../libgcc/config/xtensa/crtn.S.
* config/xtensa/t-elf (CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S):
Remove.
(EXTRA_MULTILIB_PARTS): Remove.
* config/xtensa/t-linux: Remove.
* config/xtensa/t-xtensa ($(T)crti.o, $(T)crtn.o): Remove.
gcc/po:
* EXCLUDES (crtstuff.c): Remove.
libgcc:
* crtstuff.c: New file.
* Makefile.in (CRTSTUFF_CFLAGS): Define.
(CRTSTUFF_T_CFLAGS): Define.
(extra-parts, INSTALL_PARTS): Remove conditional assignments.
(crtbegin$(objext), crtend$(objext), crtbeginS$(objext))
(crtendS$(objext), crtbeginT.o): Use $(srcdir) to refer to
crtstuff.c.
Use $<.
(crtbeginT.o): Use $(objext).
[!CUSTOM_CRTIN] (crti$(objext), crtn$(objext)): New rules.
(libgcc-extra-parts): Don't compare EXTRA_PARTS, GCC_EXTRA_PARTS.
(gcc-extra-parts): Remove.
* config.host (*-*-freebsd*): Add t-crtstuff-pic to tmake_file.
Set extra_parts.
(*-*-linux*, frv-*-*linux*, *-*-kfreebsd*-gnu, *-*-knetbsd*-gnu,
*-*-gnu*): Also handle *-*-kopensolaris*-gnu.
Add t-crtstuff-pic to tmake_file.
(*-*-lynxos*): New case.
Set tmake_file, extra_parts.
(*-*-netbsd*): Add t-crtstuff-pic to tmake_file.
Set extra_parts for *-*-netbsd*1.[7-9]*, *-*-netbsd[2-9]*,
*-*-netbsdelf[2-9]*.
(*-*-openbsd*): Add t-crtstuff-pic to tmake_file.
(*-*-rtems*): Set extra_parts.
(*-*-solaris2*): Remove t-crtin from tmake_file for Solaris < 10.
(*-*-uclinux*): New case.
Set extra_parts.
(*-*-vms*): New case.
Set tmake_file, extra_parts.
(*-*-elf): Set extra_parts.
(alpha*-*-freebsd*): Add crtbeginT.o to extra_parts.
(alpha64-dec-*vms*): Append to tmake_file, remove vms/t-vms,
vms/t-vms64.
Set extra_parts.
(alpha*-dec-*vms*): Append to tmake_file, remove vms/t-vms.
Set extra_parts.
(arm*-*-freebsd*): Add t-crtin to tmake_file.
Add crtbegin.o, crtend.o, crti.o, crtn.o to extra_parts.
(arm-wrs-vxworks): Append to tmake_file.
Set extra_parts.
(arm*-*-uclinux*): Set extra_parts.
(arm*-*-ecos-elf): Likewise.
(arm*-*-eabi*, arm*-*-symbianelf*): Set extra_parts for
arm*-*-eabi*.
(arm*-*-rtems*): Set extra_parts.
(arm*-*-elf): Likewise.
(avr-*-rtems*): Clear extra_parts.
(bfin*-elf*): Add bfin/t-crtlibid, bfin/t-crtstuff to extra_parts.
Set extra_parts.
(bfin*-uclinux*): Likewise.
(bfin*-linux-uclibc*): Add bfin/t-crtstuff to tmake_file.
(bfin*-rtems*): Append to tmake_file.
Set extra_parts.
(bfin*-*): Likewise.
(crisv32-*-elf, crisv32-*-none, cris-*-elf, cris-*-none): Split into ...
(crisv32-*-elf): ... this.
(crisv32-*-none): ... this.
(cris-*-elf, cris-*-none): New cases.
Add cris/t-elfmulti to tmake_file.
(fr30-*-elf): Append to tmake_file.
Set extra_parts.
(frv-*-elf): Append to tmake_file, add frv/t-frv.
Set extra_parts.
(h8300-*-rtems*): Append to tmake_file.
Set extra_parts.
(h8300-*-elf*): Likewise.
(hppa*64*-*-hpux11*): Add pa/t-stublib, pa/t-stublib64 to tmake_file.
Set extra_parts.
(hppa[12]*-*-hpux11*): Add pa/t-stublib to tmake_file.
Set extra_parts.
(i[34567]86-*-elf*): Add i386/t-crtstuff, t-crtstuff-pic to tmake_file.
(x86_64-*-elf*): Likewise.
(i[34567]86-*-freebsd*): Add i386/t-crtstuff to tmake_file.
(x86_64-*-freebsd*): Likewise.
(x86_64-*-netbsd*): Likewise.
(i[34567]86-*-linux*): Likewise.
(i[34567]86-*-kfreebsd*-gnu, i[34567]86-*-knetbsd*-gnu)
(i[34567]86-*-gnu*, i[34567]86-*-kopensolaris*-gnu): Likewise.
(x86_64-*-linux*): Likewise.
(x86_64-*-kfreebsd*-gnu, x86_64-*-knetbsd*-gnu): Likewise.
(i[34567]86-*-lynxos*): Add t-crtstuff-pic, i386/t-crtstuff to
tmake_file.
Set extra_parts.
(i[34567]86-*-nto-qnx*): Set tmake_file, extra_parts.
(i[34567]86-*-rtems*): Append to tmake_file, remove t-crtin.
Append to extra_parts, remove crtbegin.o, crtend.o.
(ia64*-*-elf*): Append to extra_parts, remove crtbegin.o, crtend.o.
(ia64*-*-freebsd*): Append to extra_parts, remove crtbegin.o,
crtend.o, crtbeginS.o, crtendS.o.
(ia64*-*-linux*): Comment extra_parts.
(ia64-hp-*vms*): Append to tmake_file, remove vms/t-vms, vms/t-vms64.
Set extra_parts.
(iq2000*-*-elf*): Clear extra_parts.
(lm32-*-elf*, lm32-*-rtems*): Add t-crtin to tmake_file.
(lm32-*-uclinux*): Add to extra_parts, remove crtbegin.o, crtend.o
(m32r-*-elf*, m32r-*-rtems*): Split off ...
(m32r-*-rtems*): ... this.
Add m32r/t-m32r to tmake_file.
(m68k-*-elf*): Add t-crtin to tmake_file.
(m68k-*-rtems*): Add crti.o, crtn.o to extra_parts.
(mcore-*-elf): Likewise.
(microblaze*-*-*): Set extra_parts.
(mips*-sde-elf*): New case.
Set tmake_file, extra_parts.
(mipsisa32-*-elf*, mipsisa32el-*-elf*, mipsisa32r2-*-elf*)
(mipsisa32r2el-*-elf*, mipsisa64-*-elf*, mipsisa64el-*-elf*)
(mipsisa64r2-*-elf*, mipsisa64r2el-*-elf*): Add mips/t-crtstuff to
tmake_file.
Set extra_parts.
(mipsisa64sr71k-*-elf*): Likewise.
(mipsisa64sb1-*-elf*, mipsisa64sb1el-*-elf*): Likewise.
(mips-*-elf*, mipsel-*-elf*): Likewise.
(mips64-*-elf*, mips64el-*-elf*): Likewise.
(mips64vr-*-elf*, mips64vrel-*-elf*): Likewise.
(mips64orion-*-elf*, mips64orionel-*-elf*): Likewise.
(mips*-*-rtems*): Likewise.
(mipstx39-*-elf*, mipstx39el-*-elf*): Likewise.
(moxie-*-*): Split into ...
(moxie-*-elf, moxie-*-uclinux*): ... this.
Add to extra_parts, remove crtbegin.o, crtend.o.
(moxie-*-rtems*): New case.
Set tmake_file.
Clear extra_parts.
(powerpc-*-freebsd*): Add rs6000/t-crtstuff to tmake_file.
Set extra_parts.
(powerpc-*-netbsd*): Add rs6000/t-netbsd to tmake_file.
(powerpc-*-eabispe*): Add rs6000/t-crtstuff, t-crtstuff-pic to
tmake_file.
Set extra_parts.
(powerpc-*-eabisimaltivec*): Add to tmake_file, add rs6000/t-ppccomm,
rs6000/t-crtstuff, t-crtstuff-pic to tmake_file.
Set extra_parts.
(powerpc-*-eabisim*): Likewise.
(powerpc-*-elf*): Likewise.
(powerpc-*-eabialtivec*): Likewise.
(powerpc-xilinx-eabi*): Likewise.
(powerpc-*-eabi*): Likewise.
(powerpc-*-rtems*): Likewise.
(powerpc-*-linux*, powerpc64-*-linux*): Add rs6000/t-crtstuff to
tmake_file.
Set extra_parts.
(powerpc-*-lynxos*): Add to tmake_file.
(powerpcle-*-elf*): Add to tmake_file, add rs6000/t-ppccomm,
rs6000/t-crtstuff, t-crtstuff-pic.
Set extra_parts.
(powerpcle-*-eabisim*): Likewise.
(powerpcle-*-eabi*): Likewise.
(rx-*-elf): Remove extra_parts.
(s390x-ibm-tpf*): Set extra_parts.
(score-*-elf): Set extra_parts.
(sh-*-elf*, sh[12346l]*-*-elf*, sh-*-linux*)
(sh[2346lbe]*-*-linux*, sh-*-netbsdelf*, shl*-*-netbsdelf*)
(sh5-*-netbsd*, sh5l*-*-netbsd*, sh64-*-netbsd*)
(sh64l*-*-netbsd*): Split into ...
(sh-*-elf*, sh[12346l]*-*-elf*): ... this.
Add t-crtstuff-pic to tmake_file.
Set extra_parts.
(sh-*-rtems*): Add to tmake_file, add t-crtstuff-pic.
Set extra_parts.
(sh-wrs-vxworks): Add to tmake_file, add t-crtstuff-pic.
(sparc-*-elf*): Remove t-crtin from tmake_file.
Add to extra_parts, remove crtbegin.o, crtend.o.
(sparc-*-linux*): Add sparc/t-linux64 to tmake_file.
(sparc64-*-linux*): Likewise.
(sparc-*-rtems*): Remove sparc/t-elf from tmake_file.
Add to extra_parts, remove crtbegin.o, crtend.o.
(sparc64-*-elf*): Remove t-crtin from tmake_file.
Add to extra_parts, remove crtbegin.o, crtend.o.
(sparc64-*-rtems*): Remove t-crtin from tmake_file.
Add to extra_parts, remove crtbegin.o, crtend.o.
(sparc64-*-freebsd*, ultrasparc-*-freebsd*): Add to extra_parts.
(sparc64-*-linux*): Add sparc/t-linux64 to tmake_file.
(spu-*-elf*): Add to tmake_file, add spu/t-elf.
Set extra_parts.
(tic6x-*-uclinux): Add c6x/t-uxlinux, t-crtstuff-pic to tmake_file.
Set extra_parts.
(tic6x-*-*): Change to ...
(tic6x-*-elf): ... this.
Set extra_parts.
(xtensa*-*-elf*): Add to tmake_file, add xtensa/t-elf.
Set extra_parts.
(am33_2.0-*-linux*): Add comment.
(mep*-*-*): Add mep/t-mep to tmake_file.
Set extra_parts.
* config/alpha/t-vms: New file.
* config/alpha/vms-dwarf2.S, config/alpha/vms-dwarf2eh.S: New files.
* config/arm/crti.S, config/arm/crtn.S: New files.
* config/bfin/crti.S, config/bfin/crtn.S: New files.
* config/bfin/crtlibid.S: New file.
* config/bfin/t-crtlibid, config/bfin/t-crtstuff: New files.
* config/c6x/crti.S, config/c6x/crtn.S: New files.
* config/c6x/t-elf (CUSTOM_CRTIN): Set.
(crti.o, crtin.o): New rules.
(CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S): Set.
* config/c6x/t-uclinux: New file.
* config/cris/t-elfmulti: New file.
* config/cris/t-linux (CRTSTUFF_T_CFLAGS_S): Set.
* config/fr30/crti.S, config/fr30/crtn.S: New files.
* config/frv/frvbegin.c, config/frv/frvend.c: New files.
* config/frv/t-frv: New file.
* config/frv/t-linux (CRTSTUFF_T_CFLAGS): Set.
* config/h8300/crti.S, config/h8300/crtn.S: New files.
* config/i386/cygming-crtbegin.c, config/i386/cygming-crtend.c:
New files.
* config/i386/t-cygming (crtbegin.o, crtend.o): Use $(srcdir) to
refer to cygming-crtbegin.c, cygming-crtend.c.
Use $<.
* config/i386/t-nto: New file.
* config/ia64/crtbegin.S, config/ia64/crtend.S: New files.
* config/ia64/crti.S, config/ia64/crtn.S: New files.
* config/ia64/t-ia64 (crtbegin.o, crtend.o, crtbeginS.o,
crtendS.o): Use $(srcdir) to refer to crtbegin.S, crtend.S.
Use .S extension.
Use $<.
* config/ia64/t-vms (CRTSTUFF_T_CFLAGS, CRTSTUFF_T_CFLAGS_S): Set.
(crtinitS.o): New rule.
* config/ia64/vms-crtinit.S: New file.
* config/lm32/t-elf ($(T)crti.o, $(T)crtn.o): Remove.
* config/m32r/initfini.c: New file.
* config/m32r/t-linux, config/m32r/t-m32r: New files.
* config/m68k/crti.S, config/m68k/crtn.S: New files.
* config/mcore/crti.S, config/mcore/crtn.S: New files.
* config/mep/t-mep: New file.
* config/microblaze/crti.S, config/microblaze/crtn.S: New files.
* config/microblaze/t-microblaze (MULTILIB_OPTIONS): Remove.
* config/mips/crti.S, config/mips/crtn.S: New files.
* config/mips/t-crtstuff: New file.
* config/mmix/crti.S, config/mmix/crtn.S: New files.
* config/mmix/t-mmix (CRTSTUFF_T_CFLAGS): Set.
(CUSTOM_CRTIN): Set.
($(T)crti.o, $(T)crtn.o): Remove $(T),
dependencies.
Use $(srcdir) to refer to crti.S, crtn.S.
Use .S extension, $<.
* config/moxie/crti.asm: Rename to ...
* config/moxie/crti.S: ... this.
* config/moxie/crtn.asm: Rename to ...
* config/moxie/crtn.S: ... this.
* config/moxie/t-moxie: Remove.
* config/pa/stublib.c: New file.
* config/pa/t-stublib, config/pa/t-stublib64: New files.
* config/rs6000/eabi-ci.S, config/rs6000/eabi-cn.S: New files.
* config/rs6000/sol-ci.S, config/rs6000/sol-cn.S: New files.
* config/rs6000/t-crtstuff: New file.
* config/rs6000/t-ppccomm (EXTRA_PARTS): Remove.
(ecrti.S, ecrtn.S, ncrti.S, ncrtn.S): Remove.
(ecrti$(objext)): Depend on $(srcdir)/config/rs6000/eabi-ci.S.
Make output file explicit.
(ecrtn$(objext)): Depend on $(srcdir)/config/rs6000/eabi-cn.S.
Make output file explicit.
(ncrti$(objext): Depend on $(srcdir)/config/rs6000/sol-ci.S.
Make output file explicit.
(ncrtn$(objext)): Depend on $(srcdir)/config/rs6000/sol-cn.S.
Make output file explicit.
* config/score/crti.S, config/score/crtn.S: New files.
* config/sh/crt1.S, config/sh/crti.S, config/sh/crtn.S: New files.
* config/sh/lib1funcs-4-300.S, config/sh/lib1funcs-Os-4-200.S: New
files.
* config/sh/t-sh, config/sh/t-superh: New files.
* config/sparc/t-linux64: New file.
* config/spu/cache.S, config/spu/cachemgr.c: New files.
* config/spu/t-elf (CRTSTUFF_T_CFLAGS): Set.
(cachemgr.o, cachemgr_nonatomic.o, libgcc_%.a, cache8k.o)
(cache16k.o, cache32k.o, cache64k.o, cache128k.o): New rules.
* config/t-crtin: Remove.
* config/t-crtstuff-pic: New file.
* config/t-sol2 (CUSTOM_CRTIN): Set.
(crti.o, crtn.o): New rules.
* config/vms/t-vms: New file.
* config/vms/vms-ucrt0.c: New file.
* config/xtensa/t-elf: New file.
From-SVN: r180771
2011-11-02 15:33:56 +01:00
|
|
|
Normal newlib crt1.S */
|
Contribute sh64-elf.
2002-02-09 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (TARGET_CANNOT_MODIFY_JUMPS_P): Define to...
(sh_cannot_modify_jumps_p): New function.
2002-02-05 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (TARGET_MS_BITFIELD_LAYOUT_P): Define to...
(sh_ms_bitfield_layout_p): New function.
2002-02-04 Alexandre Oliva <aoliva@redhat.com>
Zack Weinberg <zack@codesourcery.com>
* config/sh/sh.h (TRAMPOLINE_ADJUST_ADDRESS): Use
expand_simple_binop instead of expand_binop.
2002-02-03 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (OVERRIDE_OPTIONS) [! TARGET_SH5]: Disable
use of .quad and .uaquad.
* config/sh/sh.c (TARGET_ASM_UNALIGNED_DI_OP,
TARGET_ASM_ALIGNED_DI_OP): Add comment pointing to the above.
2002-01-24 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (movdi_const, movdi_const_32bit,
movdi_const_16bit): Make sure all CONSTs have modes.
(sym2PIC): Ditto, but by adjusting all callers.
* config/sh/sh.c (calc_live_regs) [TARGET_SHCOMPACT]: Set pr_live
if the prologue calls the SHmedia argument decoder or register
saver.
2002-01-24 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (TARGET_ASM_UNALIGNED_DI_OP): Define.
(TARGET_ASM_ALIGNED_DI_OP): Likewise.
(sh_expand_epilogue): Don't emit USE of return target register.
(prepare_move_operands): Legitimize DImode PIC addresses.
(sh_media_register_for_return): Skip tr0, used to initialize the
PIC register.
(sh_expand_prologue): Remove explicit USE of return register.
(nonpic_symbol_mentioned_p): PC is non-PIC. Don't recurse in
CONST_DOUBLEs. UNSPEC_GOTPLT is PIC.
* config/sh/sh.h (ASM_OUTPUT_DOUBLE_INT): Removed, obsolete.
(OVERRIDE_OPTIONS): Don't disable PIC on SH5.
(EXTRA_CONSTRAINT_S): Use MOVI_SHORI_BASE_OPERAND_P instead of
EXTRA_CONSTRAINT_T.
(GOT_ENTRY_P, GOTPLT_ENTRY_P, GOTOFF_P, PIC_ADDR_P): New.
(MOVI_SHORI_BASE_OPERAND_P): New.
(NON_PIC_REFERENCE_P, PIC_REFERENCE_P): New.
(EXTRA_CONSTRAINT_T): Define in terms of them.
(OUTPUT_ADDR_CONST_EXTRA): Handle UNSPEC_GOTPLT.
* config/sh/sh.md (movsi_media, movsi_media_nofpu,
movdi_media, movdi_media_nofpu): Add SIBCALL_REGS class to
alternatives supporting TARGET_REGS.
(UNSPEC_GOTPLT): New constant.
(movdi split): Move incrementing of LABEL_NUSES...
(movdi_const, movdi_const_32bit): Here. Use
MOVI_SHORI_BASE_OPERAND_P instead of EXTRA_CONSTRAINT_T.
(movdi_const_16bit): New.
(call, call_value) [flag_pic]: Use GOTPLT.
(call_pop, call_value_pop): New expands.
(call_pop_compact, call_pop_rettramp): New insns.
(call_value_pop_compact, call_value_pop_rettramp): New insns.
(sibcall) [flag_pic]: Use GOT.
(builtint_setjmp_receiver): Remove bogus, unused expand.
(GOTaddr2picreg): Implement for SHcompact and SHmedia.
(*pt, *ptb, ptrel): New insns.
(sym2GOT): Handle DImode GOT.
(sym2GOTPLT, symGOTPLT2reg): New expands.
(sym2PIC): New expand.
(shcompact_return_tramp): Use GOTPLT to return trampoline.
(shcompact_return_tramp_i): Use return register explicitly.
* config/sh/sh.h (OVERRIDE_OPTIONS) [TARGET_SHMEDIA]: Don't
disable flag_reorder_blocks.
2002-01-19 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (sibcall_compact): Reorder return, uses and
clobbers, for clarity.
(sibcall_epilogue) [TARGET_SHCOMPACT]: Mark saving and
restoring of r0 in macl as MAYBE_DEAD.
2002-01-18 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (LONG_DOUBLE_TYPE_SIZE): Define.
* config/sh/sh.md (movv4sf_i, movv16sf_i): Fix uses of
alter_subreg all over.
(jump) [TARGET_SHMEDIA]: FAIL to create new jumps after
reload, instead of emitting instructions that would require
reloading.
(casesi_load_media): Add missing modes.
2001-11-09 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (sh_expand_prologue): Mark the PIC register
as used if the argument decoder is called.
2001-08-28 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (udivsi3, divsi3): Load libcall symbol name in
Pmode, then extend it to DImode if necessary.
2001-08-28 Stephen Clarke <Stephen.Clarke@st.com>
* config/sh/sh.h (LEGITIMATE_CONSTANT_P): Don't accept DFmode
constants in FPU-enabled SHmedia, let them be loaded from memory.
2001-08-28 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (cmpeqdi_media, cmpgtdi_media, cmpgtudi_media):
Adjust whitespace in assembly output templates.
2001-08-28 Stephen Clarke <Stephen.Clarke@st.com>
* config/sh/sh.md (movdicc_false, movdicc_true, movdicc): Adjust
mode of if_then_else.
2001-08-04 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh64.h (CPP_DEFAULT_CPU_SPEC): Override definition in
sh.h.
2001-07-26 Andrew Haley <aph@cambridge.redhat.com>
Joern Rennecke <amylaar@redhat.com>
* config/sh/sh64.h (CPP_DEFAULT_CPU_SPEC): New.
(SUBTARGET_CPP_PTR_SPEC): New.
(SUBTARGET_CPP_SPEC): Remove.
2001-07-06 Chandrakala Chavva <cchavva@redhat.com>
* config/sh/sh.md (movsf_media_nofpu+1, movdf_media_nofpu+1):
Fix typo in previous checkin.
2001-07-11 Chandrakala Chavva <cchavva@redhat.com>
* config/sh/sh.h (MODES_TIEABLE_P): Fix redact indentations.
2001-07-10 Chandrakala Chavva <cchavva@cygnus.com>
Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (MODES_TIEABLE_P): Don't tie modes wider than
what single FP register can hold for SHmedia target.
2001-07-06 Chandrakala Chavva <cchavva@redhat.com>
Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (movsf_media_nofpu+1, movdf_media_nofpu+1):
Do not split into SUBREG.
2001-06-14 Alexandre Oliva <aoliva@redhat.com>
* config/sh/ushmedia.h, config/sh/sshmedia.h: Updated signatures
and added new functions as specified in SH5 ABI r9.
2001-06-04 Alexandre Oliva <aoliva@redhat.com>
* config/sh/lib1funcs.asm (GCC_nested_trampoline): Align to an
8-byte boundary.
2001-06-03 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (dump_table): Add const0_rtx in calls of
gen_consttable_4 and gen_consttable_8. Emit multiple labels
and consttable_window_ends.
2001-06-03 Graham Stott <grahams@redhat,com>
* config/sh/sh.md (movdi split): Remove unused variable last_insn.
2001-05-16 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (print_operand): Handle floating-point pair,
vector and matrix registers.
* config/sh/sh.h (REGISTER_MOVE_COST): Take floating-pointer
vector modes into account.
* config/sh/sh.md (movv2sf): Split move between registers into
movdf.
(movv4sf, movv16sf): Introduce insns that get split only after
reload.
* config/sh/shmedia.h: Fix Copyright dates.
* config/sh/ushmedia.h: Likewise. Move loop counter
declarations into conditionals that uses them.
(sh_media_FVADD_S, sh_media_FVSUB_S): Fix off-by-one error in
loop boundary.
* config/sh/sshmedia.h: Fix Copyright dates.
(sh_media_PUTCFG): Fix constraints.
2001-05-12 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (TARGET_PTRMEMFUNC_VBIT_LOCATION): Define to
ptrmemfunc_vbit_in_delta for SH5.
2001-05-08 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (TARGET_SWITCHES): Document -m5-*.
* invoke.texi: Likewise.
2001-04-14 Alexandre Oliva <aoliva@redhat.com>
* config/sh/lib1funcs.asm (GCC_push_shmedia_regs,
GCC_push_shmedia_regs_nofpu, GCC_pop_shmedia_regs,
GCC_pop_shmedia_regs_nofpu): New global symbols.
* config/sh/t-sh64 (LIB1ASMFUNCS): Add them.
* config/sh/sh.h (SHMEDIA_REGS_STACK_ADJUST): New macro.
* config/sh/sh.c (calc_live_regs): Account for PR's saving in
compact function with nonlocal labels.
(sh_expand_prologue) [SHcompact]: Push SHmedia regs if needed.
(sh_expand_epilogue) [SHcompact]: Pop them when appropriate.
(initial_elimination_offset): Account for their stack space.
* config/sh/sh.md (shmedia_save_restore_regs_compact): New insn.
* config/sh/sh.md (movsi_media, movsi_media_nofpu, movqi_media,
movhi_media, movdi_media, movdi_media_nofpu, movdf_media,
movdf_media_nofpu, movsf_media, movsf_media_nofpu): Require at
least one of the operands to be a register.
(movv2sf): Likewise. Renamed to movv2sf_i.
(movdi, movdf, movv2sf, movv4sf, movv16sf, movsf):
prepare_move_operands() before emitting SHmedia insns.
2001-04-03 Alexandre Oliva <aoliva@redhat.com>
* config/sh/crti.asm (init, fini) [__SH5__ && ! __SHMEDIA__]:
Don't save nor initialize r12. Don't mis-align the stack.
Pad the code with a nop.
* config/sh/crti.asm: Don't restore r12. Don't mis-align the
stack.
2001-03-13 Alexandre Oliva <aoliva@redhat.com>
* gcc/longlong.h (__umulsidi3, count_leading_zeros)
[__SHMEDIA__]: Implement.
2001-03-11 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md: Set latency of `pt' closer to reality.
(movsi_media, movsi_media_nofpu, movdi_media, movdi_media_nofpu,
movdf_media, movdf_media_nofpu, movsf_media, movsf_media_nofpu):
Set move, load and store type attributes.
* config/sh/sh.c (sh_loop_align) [TARGET_SH5]: Set to 3.
* config/sh/sh.h (OVERRIDE_OPTIONS) [TARGET_SH5]: Disable
profiling.
* config/sh/sh.h (PROMOTE_MODE): Sign-extend SImode to DImode.
* config/sh/sh-protos.h (sh_media_register_for_return): Declare.
* config/sh/sh.c (sh_media_register_for_return): New function.
(sh_expand_prologue) [TARGET_SHMEDIA]: Copy r18 to an available
branch-target register.
(sh_expand_epilogue) [TARGET_SHMEDIA]: Explicitly USE it.
* config/sh/sh.md (return_media_i): Use any call-clobbered
branch-target register.
(return_media): If r18 wasn't copied in the prologue, copy it
here.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE) [TARGET_SHMEDIA]:
Clear class FP0_REGS.
* config/sh/sh64.h (LINK_SPEC): Removed incorrect default copied
from elf.h.
2001-03-08 DJ Delorie <dj@redhat.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Disable relaxing for SHMEDIA.
2001-02-09 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (sibcall_compact): Set fp_mode to single.
2001-02-07 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (INT_ASM_OP) [SHMEDIA64]: Use `.quad'.
2001-02-03 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (INIT_CUMULATIVE_ARGS): Compute size of BLKmode
return value correctly for call_cookie.
2001-02-01 Alexandre Oliva <aoliva@redhat.com>
* config/sh/crt1.asm (start): Modified so as to call
___setup_argv_and_call_main.
2001-01-26 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (FUNCTION_ARG_ADVANCE): Don't count stack_regs in
SHmedia mode.
2001-01-20 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (STRIP_DATALABEL_ENCODING): New macro.
(STRIP_NAME_ENCODING): Use it.
(ASM_OUTPUT_LABELREF): Likewise. Don't call assemble_name().
2001-01-19 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (sgeu) [! SHMEDIA]: Fix invocation of
prepare_scc_operands().
* config/sh/sh.h (SH_DATALABEL_ENCODING): Change to "#"...
(DATALABEL_SYMNAME_P): ... so that we don't need memcmp here.
2001-01-17 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (STRIP_NAME_ENCODING): Strip leading `*'.
2001-01-13 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (shcompact_incoming_args): Use R0_REG.
* config/sh/sh.md (R7_REG, R8_REG, R9_REG): Define as constants,
used in shcompact_incoming_args.
* config/sh/sh.c (sh_expand_epilogue): Fix thinko in previous
change.
* config/sh/crt1.asm (start) [SH5]: Switch to single-precision
mode.
* config/sh/lib1funcs.asm (sdivsi3_i4, udivsi3_i4, set_fpscr):
Adjust accordingly.
* config/sh/sh.c (sh_expand_prologue, sh_expand_epilogue):
Simplify. Adjust. Add sanity check.
* config/sh/sh.h (TARGET_SWITCHES) [5-compact]: Set
FPU_SINGLE_BIT.
* config/sh/sh.md (udivsi3_i4_single, divsi3_i4_single): Match
TARGET_SHCOMPACT.
(udivsi3, divsi3): Use them.
(force_mode_for_call): New insn.
(call, call_value, sibcall_value): Emit it before SHcompact
calls.
2001-01-11 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (call, call_value, sibcall): Make sure the
call cookie is non-NULL before taking its value.
2001-01-10 Alexandre Oliva <aoliva@redhat.com>
* config.gcc (sh64): Set target_requires_64bit_host_wide_int.
2001-01-09 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (shcompact_incoming_args): Set argument memory
block.
* config/sh/sh.h (STATIC_CHAIN_REGNUM) [SH5]: Use r1.
* config/sh/sh.c (sh_expand_prologue) [SH5]: Use r0 as
temporary for stack adjusts. Use MACL and MACH to pass
arguments to shcompact_incoming_args.
* config/sh/sh.md (shcompact_incoming_args): Adjust. Don't
clobber r1.
* config/sh/lib1funcs.asm (shcompact_incoming_args): Likewise.
(nested_trampoline): Load static chain address into r1.
* config/sh/sh.md (movdi_media splits): Fix sign-extension.
2001-01-07 Alexandre Oliva <aoliva@redhat.com
* config/sh/sh.c (fpul_operand) [SHMEDIA]: Just call
fp_arith_reg_operand().
2001-01-06 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (casesi): Sign-extend the first two operands,
and use signed compares for them.
* config/sh/sh.c (dump_table): Don't emit 8-byte constants after
4-byte ones. Instead, inter-leave them, maintaining the 8-byte
ones properly aligned.
(find_barrier): Account for extra alignment needed for 8-byte wide
constants.
(machine_dependent_reorg): Require a label for the second 4-byte
constant after an 8-byte one.
* config/sh/lib1funcs.asm (sdivsi3): Fix typo in yesterday's
change.
2001-01-05 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (machine_dependent_reorg) [SHCOMPACT]: Reset
last_float when switching float modes.
* config/sh/sh.md (movdf) [SH5]: Don't use stack-pointer
auto-increment for general-purpose registers.
* config/sh/lib1funcs.asm (sdivsi3) [SHMEDIA]: Sign-extend the
result.
* config/sh/sh.c (sh_expand_prologue) [SH5]: Use r1 as temporary
for stack adjust.
* config/sh/sh.c (sh_builtin_saveregs): Support using all
registers for varargs.
2001-01-01 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (FUNCTION_ARG_ADVANCE): Simplify.
* config/sh/sh.h (CALL_COOKIE_STACKSEQ,
CALL_COOKIE_STACKSEQ_SHIFT, CALL_COOKIE_STACKSEQ_GET): New macros.
(CALL_COOKIE_INT_REG_SHIFT): Adjust.
(FUNCTION_ARG_ADVANCE): Use SHCOMPACT_FORCE_ON_STACK. Adjust
call_cookie accordingly.
(FUNCTION_ARG): Test SHCOMPACT_FORCE_ON_STACK.
(SHCOMPACT_BYREF): Likewise.
(SHCOMPACT_FORCE_ON_STACK): New macro.
* config/sh/sh.c (sh_expand_prologue): Use new call_cookie format.
(sh_builtin_saveregs): Likewise.
* config/sh/lib1funcs.asm (shcompact_call_trampoline,
shcompact_incoming_args): Use new shift values. Support
sequences of consecutive and non-consecutive pushes/pops.
* config/sh/sh.md (return): Don't explicitly use PR_REG.
2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com>
* config/sh/sh.h (TEXT_SECTION): Define.
* config/sh/elf.h (ASM_FILE_START): Output TEXT_SECTION_ASM_OP.
2001-01-05 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (INIT_CUMULATIVE_LIBCALL_ARGS): New macro.
* config/sh/sh.h (BASE_RETURN_VALUE_REG): Use FP regs for
return values on FPU-enabled SHmedia.
(FUNCTION_VALUE_REGNO_P): Mark FIRST_FP_RET_REG as used on
FPU-enabled SHmedia.
(INIT_CUMULATIVE_ARGS): Set up return trampoline only if
value is returned in a non-FP reg and is not returned by
reference.
* config/sh/sh.md (shcompact_return_tramp_i): Change type to
jump_ind.
2000-01-04 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (SH_MIN_ALIGN_FOR_CALLEE_COPY): New.
(FUNCTION_ARG_CALLEE_COPIES): Require argument to be
quad-aligned to be passed by callee-copy reference.
2001-01-03 Alexandre Oliva <aoliva@redhat.com>
* config/sh/elf.h (MAX_WCHAR_TYPE_SIZE): Define.
* config/sh/sh64.h (MAX_WCHAR_TYPE_SIZE): Undefine.
2001-01-02 Alexandre Oliva <aoliva@redhat.com>
* config/sh/lib1funcs.asm (shcompact_call_trampoline): Fix error in
copying low-numbered FP regs to r7 and r8.
* config/sh/sh.h (FUNCTION_ARG_ADVANCE): Don't request copying of
FP regs to general-purpose regs only if the copy was passed on the
stack.
* config/sh/lib1funcs.asm (shcompact_call_trampoline): Fix typo in
copying FP reg to r9.
* config/sh/sh.h (FUNCTION_ARG_ADVANCE): Use trampoline to
copy FP regs to general-purpose regs only in outgoing calls.
* config/sh/sh.md (movdf_media, movsf_media): Revert incorrect
change from 2000-10-30. Adjust for 64-bit (or 32-bit)
HOST_WIDE_INT.
* config/sh/sh.h (struct sh_args): Document all fields.
(FUNCTION_OK_FOR_SIBCALL): Functions that receive arguments
passed partially on the stack should not consider making
sibcalls.
* config/sh/sh.h (FUNCTION_ARG_ADVANCE): Add byref regs to
stack_regs only for incoming calls. When passing FP args,
make sure there are FP regs available before modifying
call_cookie.
(SHCOMPACT_BYREF): Pass double args in general-purpose
registers by reference.
2000-12-30 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (FUNCTION_OK_FOR_SIBCALL) [SHCOMPACT]: Don't
attempt to generate sibcalls if the caller got any arguments
by reference.
* config/sh/lib1funcs.asm (set_fpscr) [SH5]: Default to double.
* config/sh/sh.c (dump_table) [SHCOMPACT]: Align DImode and DFmode
to 8-byte boundaries.
* config/sh/sh.md (shcompact_preserve_incoming_args): New insn.
* config/sh/sh.h (CALL_COOKIE_INT_REG_GET): New macro.
* config/sh/sh.c (sh_expand_prologue): Preserve args that will be
stored in the stack.
* config/sh/lib1funcs.asm (ct_main_table, ia_main_table): Arrange
for the offsets to have the ISA bit set.
(shcompact_call_trampoline): Document. Swap r0 and r1, to match
invocation. Use beq instead of bgt to mark end of sequence of
loads.
(shcompact_incoming_args): Fix store of r2. Use beq instead of
bgt to mark end of sequence of stores.
* config/sh/sh.c (arith_operand): Don't check whether
CONST_OK_FOR_J for now.
* config/sh/sh.md (movdf_media, movsf_media): Use HOST_WIDE_INT
instead of long for conversion.
2000-12-29 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (print_operand_address): Convert INTVAL to int
before passing it to fprintf.
2000-12-28 Alexandre Oliva <aoliva@redhat.com>
* config/sh/crt1.asm (start): Reset SR.FD, to enable the FP unit.
Call set_fpscr before reading/writing SR.
* config/sh/crt1.asm (start): Set SR.SZ and SR.PR, but not SR.FR.
Call set_fpscr.
* config/sh/lib1funcs.asm: Add `.align 2' directives before
SHmedia code.
(FMOVD_WORKS): Define on SH5 with FPU.
(set_fpscr): Define on SH5. Remove separate _fpscr_values
setting.
* config/sh/t-sh64 (LIB1ASMFUNCS): Add _set_fpscr instead of
_fpscr_values.
2000-12-28 Hans-Peter Nilsson <hpn@cygnus.com>
* config/sh/lib1funcs.asm (ct_main_table): Align contents to even
address.
(ia_main_table): Ditto.
2000-12-27 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (MAX_WCHAR_TYPE_SIZE): Don't define.
* config/sh/sh64.h (WCHAR_TYPE, WCHAR_TYPE_SIZE): Reinstate
the definitions from sh.h.
* config/sh/sh.h (PTRDIFF_TYPE): Define as conditional on
TARGET_SH5.
(SUBTARGET_CPP_SPEC): Arrange for __PTRDIFF_TYPE__ to be defined.
* config/sh/elf.h (PTRDIFF_TYPE): Likewise.
* config/sh/sh64.h (SUBTARGET_CPP_SPEC): Likewise.
2000-12-26 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.md (movdi_media split): Don't add REG_LABEL notes.
Increment LABEL_NUSES.
From-SVN: r49630
2002-02-09 04:08:08 +01:00
|
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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! make a place to keep any previous value of the vbr register
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! this will only have a value if it has been set by redboot (for example)
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.section .bss
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old_vbr:
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.long 0
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2006-03-27 16:11:14 +02:00
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#ifdef PROFILE
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profiling_enabled:
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.long 0
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#endif
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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.section .text
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.global start
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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.import ___rtos_profiler_start_timer
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.weak ___rtos_profiler_start_timer
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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start:
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mov.l stack_k,r15
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2013-11-25 18:11:50 +01:00
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#if defined (__SH3__) || (defined (__SH_FPU_ANY__) && ! defined (__SH2E__) && ! defined (__SH2A__)) || defined (__SH4_NOFPU__)
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
|
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#define VBR_SETUP
|
|
|
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! before zeroing the bss ...
|
|
|
|
! if the vbr is already set to vbr_start then the program has been restarted
|
|
|
|
! (i.e. it is not the first time the program has been run since reset)
|
|
|
|
! reset the vbr to its old value before old_vbr (in bss) is wiped
|
|
|
|
! this ensures that the later code does not create a circular vbr chain
|
|
|
|
stc vbr, r1
|
|
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|
mov.l vbr_start_k, r2
|
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|
cmp/eq r1, r2
|
|
|
|
bf 0f
|
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|
|
! reset the old vbr value
|
|
|
|
mov.l old_vbr_k, r1
|
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mov.l @r1, r2
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ldc r2, vbr
|
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0:
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#endif /* VBR_SETUP */
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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! zero out bss
|
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|
|
mov.l edata_k,r0
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mov.l end_k,r1
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mov #0,r2
|
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start_l:
|
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mov.l r2,@r0
|
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|
add #4,r0
|
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cmp/ge r0,r1
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bt start_l
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
|
|
#if defined (__SH_FPU_ANY__)
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
|
|
|
mov.l set_fpscr_k, r1
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
|
|
mov #4,r4
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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jsr @r1
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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shll16 r4 ! Set DN bit (flush denormal inputs to zero)
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lds r3,fpscr ! Switch to default precision
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#endif /* defined (__SH_FPU_ANY__) */
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#ifdef VBR_SETUP
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! save the existing contents of the vbr
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! there will only be a prior value when using something like redboot
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! otherwise it will be zero
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stc vbr, r1
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mov.l old_vbr_k, r2
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mov.l r1, @r2
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! setup vbr
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mov.l vbr_start_k, r1
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ldc r1,vbr
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#endif /* VBR_SETUP */
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! if an rtos is exporting a timer start fn,
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! then pick up an SR which does not enable ints
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! (the rtos will take care of this)
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mov.l rtos_start_fn, r0
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mov.l sr_initial_bare, r1
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tst r0, r0
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bt set_sr
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mov.l sr_initial_rtos, r1
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set_sr:
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! Set status register (sr)
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ldc r1, sr
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
|
|
|
|
|
|
|
! arrange for exit to call fini
|
|
|
|
mov.l atexit_k,r0
|
|
|
|
mov.l fini_k,r4
|
2000-11-18 01:07:16 +01:00
|
|
|
jsr @r0
|
|
|
|
nop
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
|
|
|
|
2006-03-27 16:11:14 +02:00
|
|
|
#ifdef PROFILE
|
|
|
|
! arrange for exit to call _mcleanup (via stop_profiling)
|
|
|
|
mova stop_profiling,r0
|
|
|
|
mov.l atexit_k,r1
|
|
|
|
jsr @r1
|
|
|
|
mov r0, r4
|
|
|
|
|
|
|
|
! Call profiler startup code
|
|
|
|
mov.l monstartup_k, r0
|
|
|
|
mov.l start_k, r4
|
|
|
|
mov.l etext_k, r5
|
|
|
|
jsr @r0
|
|
|
|
nop
|
|
|
|
|
|
|
|
! enable profiling trap
|
|
|
|
! until now any trap 33s will have been ignored
|
|
|
|
! This means that all library functions called before this point
|
|
|
|
! (directly or indirectly) may have the profiling trap at the start.
|
|
|
|
! Therefore, only mcount itself may not have the extra header.
|
|
|
|
mov.l profiling_enabled_k2, r0
|
|
|
|
mov #1, r1
|
|
|
|
mov.l r1, @r0
|
|
|
|
#endif /* PROFILE */
|
|
|
|
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
|
|
|
! call init
|
|
|
|
mov.l init_k,r0
|
|
|
|
jsr @r0
|
|
|
|
nop
|
|
|
|
|
|
|
|
! call the mainline
|
|
|
|
mov.l main_k,r0
|
|
|
|
jsr @r0
|
|
|
|
nop
|
|
|
|
|
|
|
|
! call exit
|
|
|
|
mov r0,r4
|
|
|
|
mov.l exit_k,r0
|
|
|
|
jsr @r0
|
|
|
|
nop
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
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|
|
2006-03-27 16:11:14 +02:00
|
|
|
.balign 4
|
|
|
|
#ifdef PROFILE
|
|
|
|
stop_profiling:
|
|
|
|
# stop mcount counting
|
|
|
|
mov.l profiling_enabled_k2, r0
|
|
|
|
mov #0, r1
|
|
|
|
mov.l r1, @r0
|
|
|
|
|
|
|
|
# call mcleanup
|
|
|
|
mov.l mcleanup_k, r0
|
|
|
|
jmp @r0
|
|
|
|
nop
|
|
|
|
|
|
|
|
.balign 4
|
|
|
|
mcleanup_k:
|
|
|
|
.long __mcleanup
|
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monstartup_k:
|
|
|
|
.long ___monstartup
|
|
|
|
profiling_enabled_k2:
|
|
|
|
.long profiling_enabled
|
|
|
|
start_k:
|
|
|
|
.long _start
|
|
|
|
etext_k:
|
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|
|
.long __etext
|
|
|
|
#endif /* PROFILE */
|
|
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|
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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|
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.align 2
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
|
|
#if defined (__SH_FPU_ANY__)
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
|
|
|
set_fpscr_k:
|
|
|
|
.long ___set_fpscr
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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#endif /* defined (__SH_FPU_ANY__) */
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2003-01-24 16:45:53 +01:00
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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stack_k:
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.long _stack
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edata_k:
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.long _edata
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end_k:
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.long _end
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main_k:
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2001-02-01 22:34:26 +01:00
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.long ___setup_argv_and_call_main
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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exit_k:
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.long _exit
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atexit_k:
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.long _atexit
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init_k:
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2014-12-17 03:01:10 +01:00
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.long GLOBAL(_init)
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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fini_k:
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2014-12-17 03:01:10 +01:00
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.long GLOBAL(_fini)
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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#ifdef VBR_SETUP
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old_vbr_k:
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.long old_vbr
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vbr_start_k:
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.long vbr_start
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#endif /* VBR_SETUP */
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sr_initial_rtos:
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! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
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! Whether profiling or not, keep interrupts masked,
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! the RTOS will enable these if required.
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.long 0x600000f1
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rtos_start_fn:
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.long ___rtos_profiler_start_timer
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2006-03-27 16:11:14 +02:00
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#ifdef PROFILE
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sr_initial_bare:
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! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
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! For bare machine, we need to enable interrupts to get profiling working
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.long 0x60000001
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#else
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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sr_initial_bare:
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! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
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! Keep interrupts disabled - the application will enable as required.
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.long 0x600000f1
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2006-03-27 16:11:14 +02:00
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#endif
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t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
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! supplied for backward compatibility only, in case of linking
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! code whose main() was compiled with an older version of GCC.
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
|
|
.global ___main
|
t-elf, [...]: New files.
* config/sh/t-elf, config/sh/crt1.asm, config/sh/crti.asm,
config/sh/crtn.asm: New files.
* config/sh/t-sh (EXTRA_MULTILIB_PARTS): Set.
(crt1.o, crti.o, crtn.o): New targets.
* configure.in [sh-*-elf*, sh-*-rtemself*] (tmake_file): Added
sh/t-elf.
* configure: Rebuilt.
* config/sh/sh.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP,
STARTFILE_SPEC, ENDFILE_SPEC, CRT_CALL_STATIC_FUNCTION): Define.
* config/sh/elf.h (INIT_SECTION_ASM_OP, FINI_SECTION_ASM_OP):
Undefine for config/elfos.h to redefine.
(STARTFILE_SPEC, ENDFILE_SPEC): Redefine after config/elfos.h.
* config/sh/sh-protos.h (nonpic_symbol_mentioned_p,
legitimize_pic_address, output_pic_addr_const): Declare.
* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Fix PIC register.
(PREFERGOT_BIT, TARGET_PREFERGOT): Likewise.
(TARGET_SWITCHES): New switch -mprefergot.
(OVERRIDE_OPTIONS): Set flag_no_function_cse unless -mprefergot.
(PIC_OFFSET_TABLE_REGNUM): Define.
(GOT_SYMBOL_TABLE): Likewise.
(LEGITIMIZE_ADDRESS): Use legitimize_pic_address.
(ENCODE_SECTION_INFO): Define.
(FINALIZE_PIC): New macros.
(LEGITIMATE_PIC_OPERAND_P, SYMBOLIC_CONST_P): New macro.
(ASM_OUTPUT_INT, ASM_OUTPUT_SHORT): Use output_pic_addr_const.
* config/sh/sh.c (print_operand_address): Use output_pic_addr_const.
(prepare_move_operands): Call emit_pic_move or
emit_pic_const_move if appropriate.
(output_far_jump): For PIC, use braf and output long offset.
(machine_dependent_reorg):
(sh_expand_prologue): Save and initialize the PIC register.
(sh_expand_epilogue): Restore it.
(initial_elimination_offset): Account for it.
(nonpic_symbol_mentioned_p): New function.
(legitimize_pic_address): Likewise.
(output_pic_addr_const): Likewise.
* config/sh/sh.md (calli_pcrel, call_valuei_pcrel): New insns.
(call, call_value): Use them.
(GOTaddr2picreg, sym_label2reg, symGOT2reg, symGOTOFF2reg,
symPLT_label2reg): New expands.
* invoke.texi (SH Options): Document -mprefergot.
From-SVN: r36111
2000-09-02 05:28:47 +02:00
|
|
|
___main:
|
|
|
|
rts
|
|
|
|
nop
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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#ifdef VBR_SETUP
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! Exception handlers
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crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
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.section .text.vbr, "ax"
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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vbr_start:
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crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
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.org 0x100
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
|
|
vbr_100:
|
crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
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#ifdef PROFILE
|
2006-03-27 16:11:14 +02:00
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|
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! Note on register usage.
|
|
|
|
! we use r0..r3 as scratch in this code. If we are here due to a trapa for profiling
|
|
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|
! then this is OK as we are just before executing any function code.
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! The other r4..r7 we save explicityl on the stack
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|
|
! Remaining registers are saved by normal ABI conventions and we assert we do not
|
|
|
|
! use floating point registers.
|
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|
|
mov.l expevt_k1, r1
|
|
|
|
mov.l @r1, r1
|
|
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|
mov.l event_mask, r0
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|
|
|
and r0,r1
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|
|
mov.l trapcode_k, r2
|
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|
|
cmp/eq r1,r2
|
|
|
|
bt 1f
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|
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|
bra handler_100 ! if not a trapa, go to default handler
|
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|
|
nop
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|
1:
|
|
|
|
mov.l trapa_k, r0
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|
|
|
mov.l @r0, r0
|
|
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|
shlr2 r0 ! trapa code is shifted by 2.
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|
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|
cmp/eq #33, r0
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|
|
|
bt 2f
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|
|
bra handler_100
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|
|
nop
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2:
|
|
|
|
|
|
|
|
! If here then it looks like we have trap #33
|
|
|
|
! Now we need to call mcount with the following convention
|
|
|
|
! Save and restore r4..r7
|
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|
|
mov.l r4,@-r15
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|
mov.l r5,@-r15
|
|
|
|
mov.l r6,@-r15
|
|
|
|
mov.l r7,@-r15
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|
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sts.l pr,@-r15
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|
|
|
|
|
|
|
! r4 is frompc.
|
|
|
|
! r5 is selfpc
|
|
|
|
! r0 is the branch back address.
|
|
|
|
! The code sequence emitted by gcc for the profiling trap is
|
|
|
|
! .align 2
|
|
|
|
! trapa #33
|
|
|
|
! .align 2
|
|
|
|
! .long lab Where lab is planted by the compiler. This is the address
|
|
|
|
! of a datum that needs to be incremented.
|
|
|
|
sts pr, r4 ! frompc
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stc spc, r5 ! selfpc
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|
|
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mov #2, r2
|
|
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not r2, r2 ! pattern to align to 4
|
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|
and r2, r5 ! r5 now has aligned address
|
|
|
|
! add #4, r5 ! r5 now has address of address
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mov r5, r2 ! Remember it.
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! mov.l @r5, r5 ! r5 has value of lable (lab in above example)
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add #8, r2
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ldc r2, spc ! our return address avoiding address word
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! only call mcount if profiling is enabled
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mov.l profiling_enabled_k, r0
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mov.l @r0, r0
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cmp/eq #0, r0
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bt 3f
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! call mcount
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|
mov.l mcount_k, r2
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jsr @r2
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|
nop
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3:
|
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lds.l @r15+,pr
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mov.l @r15+,r7
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mov.l @r15+,r6
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mov.l @r15+,r5
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mov.l @r15+,r4
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rte
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nop
|
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|
.balign 4
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|
event_mask:
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|
.long 0xfff
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trapcode_k:
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|
.long 0x160
|
|
|
|
expevt_k1:
|
|
|
|
.long 0xff000024 ! Address of expevt
|
|
|
|
trapa_k:
|
|
|
|
.long 0xff000020
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|
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|
mcount_k:
|
|
|
|
.long __call_mcount
|
|
|
|
profiling_enabled_k:
|
|
|
|
.long profiling_enabled
|
|
|
|
#endif
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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! Non profiling case.
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handler_100:
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mov.l 2f, r0 ! load the old vbr setting (if any)
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mov.l @r0, r0
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cmp/eq #0, r0
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bf 1f
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! no previous vbr - jump to own generic handler
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bra handler
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nop
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1: ! there was a previous handler - chain them
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add #0x7f, r0 ! 0x7f
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add #0x7f, r0 ! 0xfe
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add #0x2, r0 ! add 0x100 without corrupting another register
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jmp @r0
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nop
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.balign 4
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2:
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.long old_vbr
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crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
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.org 0x400
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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vbr_400: ! Should be at vbr+0x400
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mov.l 2f, r0 ! load the old vbr setting (if any)
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mov.l @r0, r0
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cmp/eq #0, r0
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! no previous vbr - jump to own generic handler
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bt handler
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! there was a previous handler - chain them
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2006-03-27 16:11:14 +02:00
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rotcr r0
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rotcr r0
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add #0x7f, r0 ! 0x1fc
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add #0x7f, r0 ! 0x3f8
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add #0x02, r0 ! 0x400
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rotcl r0
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rotcl r0 ! Add 0x400 without corrupting another register
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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jmp @r0
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nop
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.balign 4
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2:
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.long old_vbr
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handler:
|
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/* If the trap handler is there call it */
|
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mov.l superh_trap_handler_k, r0
|
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cmp/eq #0, r0 ! True if zero.
|
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bf 3f
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bra chandler
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nop
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3:
|
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|
|
! Here handler available, call it.
|
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/* Now call the trap handler with as much of the context unchanged as possible.
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Move trapping address into PR to make it look like the trap point */
|
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stc spc, r1
|
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lds r1, pr
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mov.l expevt_k, r4
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mov.l @r4, r4 ! r4 is value of expevt, first parameter.
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mov r1, r5 ! Remember trapping pc.
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mov r1, r6 ! Remember trapping pc.
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mov.l chandler_k, r1
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mov.l superh_trap_handler_k, r2
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! jmp to trap handler to avoid disturbing pr.
|
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jmp @r2
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nop
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crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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vbr_600:
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2006-03-27 16:11:14 +02:00
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#ifdef PROFILE
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! Should be at vbr+0x600
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! Now we are in the land of interrupts so need to save more state.
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! Save register state
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mov.l interrupt_stack_k, r15 ! r15 has been saved to sgr.
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mov.l r0,@-r15
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mov.l r1,@-r15
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mov.l r2,@-r15
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mov.l r3,@-r15
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mov.l r4,@-r15
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mov.l r5,@-r15
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mov.l r6,@-r15
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mov.l r7,@-r15
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sts.l pr,@-r15
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crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
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sts.l mach,@-r15
|
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sts.l macl,@-r15
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#if defined(__SH_FPU_ANY__)
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! Save fpul and fpscr, save fr0-fr7 in 64 bit mode
|
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! and set the pervading precision for the timer_handler
|
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mov #0,r0
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sts.l fpul,@-r15
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sts.l fpscr,@-r15
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lds r0,fpscr ! Clear fpscr
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fmov fr0,@-r15
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fmov fr1,@-r15
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fmov fr2,@-r15
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fmov fr3,@-r15
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mov.l pervading_precision_k,r0
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fmov fr4,@-r15
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fmov fr5,@-r15
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mov.l @r0,r0
|
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fmov fr6,@-r15
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fmov fr7,@-r15
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lds r0,fpscr
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#endif /* __SH_FPU_ANY__ */
|
2006-03-27 16:11:14 +02:00
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|
|
! Pass interrupted pc to timer_handler as first parameter (r4).
|
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|
|
stc spc, r4
|
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mov.l timer_handler_k, r0
|
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jsr @r0
|
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nop
|
crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
|
|
|
#if defined(__SH_FPU_ANY__)
|
|
|
|
mov #0,r0
|
|
|
|
lds r0,fpscr ! Clear the fpscr
|
|
|
|
fmov @r15+,fr7
|
|
|
|
fmov @r15+,fr6
|
|
|
|
fmov @r15+,fr5
|
|
|
|
fmov @r15+,fr4
|
|
|
|
fmov @r15+,fr3
|
|
|
|
fmov @r15+,fr2
|
|
|
|
fmov @r15+,fr1
|
|
|
|
fmov @r15+,fr0
|
|
|
|
lds.l @r15+,fpscr
|
|
|
|
lds.l @r15+,fpul
|
|
|
|
#endif /* __SH_FPU_ANY__ */
|
|
|
|
lds.l @r15+,macl
|
|
|
|
lds.l @r15+,mach
|
2006-03-27 16:11:14 +02:00
|
|
|
lds.l @r15+,pr
|
|
|
|
mov.l @r15+,r7
|
|
|
|
mov.l @r15+,r6
|
|
|
|
mov.l @r15+,r5
|
|
|
|
mov.l @r15+,r4
|
|
|
|
mov.l @r15+,r3
|
|
|
|
mov.l @r15+,r2
|
|
|
|
mov.l @r15+,r1
|
|
|
|
mov.l @r15+,r0
|
|
|
|
stc sgr, r15 ! Restore r15, destroyed by this sequence.
|
|
|
|
rte
|
|
|
|
nop
|
crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
|
|
|
#if defined(__SH_FPU_ANY__)
|
|
|
|
.balign 4
|
|
|
|
pervading_precision_k:
|
2014-12-17 03:01:10 +01:00
|
|
|
.long GLOBAL(__fpscr_values)+4
|
crt1.asm: Fix #ifdef indent.
gcc:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 J"orn Rennecke <joern.rennecke@st.com>
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs <andrew.stubbs@st.com>
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 J"orn Rennecke <joern.rennecke@st.com>
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x80000000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 J"orn Rennecke <joern.rennecke@st.com>
SH4-300 scheduling description & fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, "cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only): Likewise.
(mbranch-cost=): Likewise.
* superh.h (STARTFILE_SPEC): Take -m4-340 into account.
* sh.md (mulsf3): Remove special expansion code.
(mulsf3_ie): Now a define_insn_and_split.
(macsf3): Allow for TARGET_SH4.
* sh.md (cbranchsi4, cbranchdi4, cbranchdi4_i): New patterns.
* sh.c (prepare_cbranch_operands, expand_cbranchsi4): New functions.
(expand_cbranchdi4): Likewise.
(sh_rtx_costs): Give lower cost for certain CONST_INT values and for
CONST_DOUBLE if the outer code is COMPARE.
* sh.h (OPTIMIZATION_OPTIONS): If not optimizing for size, set
TARGET_CBRANCHDI4 and TARGET_EXPAND_CBRANCHDI4.
(OVERRIDE_OPTIONS): For TARGET_SHMEDIA, clear TARGET_CBRANCHDI4.
(LEGITIMATE_CONSTANT_P): Also allow DImode and VOIDmode CONST_DOUBLEs.
Remove redundant fp_{zero,one}_operand checks.
* sh.opt (mcbranchdi, mexpand-cbranchdi, mcmpeqdi): New options.
* sh-protos.h (prepare_cbranch_operands, expand_cbranchsi4): Declare.
(expand_cbranchdi4): Likewise.
2006-04-20 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (LOCAL_ALIGNMENT): Use DATA_ALIGNMENT.
gcc/testsuite:
2006-11-03 J"orn Rennecke <joern.rennecke@st.com>
* testsuite/gcc.c-torture/execute/arith-rand-ll.c:
Also test for bogus rest sign.
From-SVN: r118458
2006-11-03 15:52:19 +01:00
|
|
|
#endif
|
2006-03-27 16:11:14 +02:00
|
|
|
#else
|
|
|
|
mov.l 2f, r0 ! Load the old vbr setting (if any).
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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mov.l @r0, r0
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cmp/eq #0, r0
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! no previous vbr - jump to own handler
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bt chandler
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! there was a previous handler - chain them
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2006-03-27 16:11:14 +02:00
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rotcr r0
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rotcr r0
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add #0x7f, r0 ! 0x1fc
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add #0x7f, r0 ! 0x3f8
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add #0x7f, r0 ! 0x5f4
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add #0x03, r0 ! 0x600
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rotcl r0
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rotcl r0 ! Add 0x600 without corrupting another register
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
|
|
|
jmp @r0
|
|
|
|
nop
|
|
|
|
.balign 4
|
|
|
|
2:
|
|
|
|
.long old_vbr
|
2006-03-27 16:11:14 +02:00
|
|
|
#endif /* PROFILE code */
|
re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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chandler:
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mov.l expevt_k, r4
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mov.l @r4, r4 ! r4 is value of expevt hence making this the return code
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mov.l handler_exit_k,r0
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jsr @r0
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nop
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! We should never return from _exit but in case we do we would enter the
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! the following tight loop
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limbo:
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bra limbo
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nop
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.balign 4
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2006-03-27 16:11:14 +02:00
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#ifdef PROFILE
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interrupt_stack_k:
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.long __timer_stack ! The high end of the stack
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timer_handler_k:
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.long __profil_counter
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#endif
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re PR target/20695 (sh64-*-* port deos not handle 32 / 64 bit conversions properly)
gcc:
2005-05-09 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh.h (OVERRIDE_OPTIONS): Don't set flag_finite_math_only
if flag_signaling_nans is set.
For TARGET_SH2E, if flag_finite_math_only is not set, set IEEE_BIT.
* doc/invoke.texi (SH -mieee): Document relation to -ffinite-math-only.
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of sh-elf specific patches from sh-elf-4_1-branch:
2005-05-05 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (ASM_OUTPUT_REG_PUSH): Provide SHMEDIA version.
(ASM_OUTPUT_REG_POP): Likewise.
2005-05-05 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_builtin_saveregs): Use copy_to_mode_reg
and plus_constant.
2005-05-04 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (sh_div_strategy): Initialize with
SH_DIV_STRATEGY_DEFAULT.
* config/sh/sh.c (SH_DIV_STR_FOR_SIZE): Define.
(SH_DIV_STRATEGY_DEFAULT): Likewise.
(OPTIMIZATION_OPTIONS): Set sh_div_str to SH_DIV_STR_FOR_SIZE
when optimized for size.
* config/sh/linux.h (SH_DIV_STRATEGY_DEFAULT): Redefine.
(SH_DIV_STR_FOR_SIZE): Likewise.
* config/sh/netbsd-elf.h (SH_DIV_STRATEGY_DEFAULT): Likewise.
(SH_DIV_STR_FOR_SIZE): Likewise.
2005-05-04 J"orn Rennecke <joern.rennecke@st.com>
* config/sh/sh-modes.def (PDImode): Add.
* config/sh/sh-protos.h (shmedia_prepare_call_address): Declare.
* config/sh/sh.c (print_operand): Handle IF_THEN_ELSE.
(target_reg_operand): Allow PDImode.
(sh_register_move_cost): If neither sh_gettrcost_str nor
TARGET_PT_FIXED is set, assume gettr costs 100.
(shmedia_prepare_call_address): New function.
(sh_gettrcost_str): Initialize to empty string.
(sh_divsi3_libfunc): New variable.
* config/sh/sh.h (PT_FIXED_BIT, TARGET_INVALID_SYMBOLS): Define.
(TARGET_SWITCH_SH5_32_ANY_EXTRA): Likewise.
(TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA): Likewise.
(TARGET_SWITCHES): Use TARGET_SWITCH_SH5_32_ANY_EXTRA and
TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA.
(TARGET_OPTIONS): Add -mdivsi3_libfunc.
(OVERRIDE_OPTIONS): Set sh_divsi3_libfunc if it hasn't been set
by the user.
Also set flag_no_function_cse for (TARGET_SHMEDIA && !TARGET_PT_FIXED).
(HARD_REGNO_MODE_OK): Allow TARGET_REGS in PDImode.
(CONSTRAINT_LEN): Remove debug version.
(SECONDARY_INOUT_RELOAD_CLASS:) Break out of
(SECONDARY_OUTPUT_RELOAD_CLASS). Use EXTRA_CONSTRAINT_Csy for check
if a target register needs a secondary reload through GENERAL_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Use SECONDARY_INOUT_RELOAD_CLASS.
(sh_divsi3_libfunc): Declare.
(FUNCTION_PROFILER): Provide SHMEDIA version.
* config/sh/predicates.md: New file.
* config/sh/sh.md (predicates.md): Include.
(divsi_inv_call_combine, divsi3): Use sh_divsi3_libfunc.
(reload_insi): Fix predicates and constraints.
(ptabs): New expander.
(*extendsipdi_media, *truncdipdi_media): New insns.
(call, call_value, sibcall): Use shmedia_prepare_call_address.
* doc/invoke.texi (-multcost, -mdiv): Document new SH options.
(-mdivsi3_libfunc, -madjust-unroll, -mindexed-addressing): Likewise.
(-mgettrcost, -mpt-fixed, -minvalid-symbols): Likewise.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.c (print_operand): Remove sh_rep_vec extraction.
(sh_output_mi_thunk): Make i unsigned.
* sh.c (TARGET_ADJUST_UNROLL_MAX): Only redefine if already defined.
(sh_adjust_unroll_max): Only define if TARGET_ADJUST_UNROLL_MAX
is defined. Update label detection code and iteration lookup,
enable basic functionality, but without IV analysis.
2005-04-11 J"orn Rennecke <joern.rennecke@st.com>
* sh.h (OPTIMIZATION_OPTIONS): Don't make setting of
flag_branch_target_load_optimize dependent on TARGET_SHMEDIA.
Set flag_finite_math_only to 2.
If flag_finite_math_only set set to 2, set it to 1 iff
we use SH2E..SH4 arithmetic without full IEEE support.
2005-04-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/lib1funcs.asm (ic_invalidate): Fix typos.
* config/sh/t-linux (LIB1ASMFUNCS_CACHE): Add _ic_invalidate_array.
2005-04-06 J"orn Rennecke <joern.rennecke@st.com>
Merge of SuperH / STM SH specific patches, including fix for
PR target/20695:
* config.gcc (sh*-superh-elf, sh*elf (newlib)): Use newlib.h
when building with libgloss.
(sh*elf): Implement --without-fp option.
(sh64-superh-linux*): Don't multilib.
(sh*-*-linux): Use sh3 as basic multilib.
* config/sh/crt1.asm (SHmedia start): Add code to enable the MMU,
and to set up vbr. Enable FPU before calling set_fpscr.
Load atexit address just before use. Use __SH_FPU_ANY__.
(SH3*/SH4* start): Add code to set up vbr. Use __SH_FPU_ANY__.
Set DN bit in fpscr.
* config/sh/elf.h (SUBTARGET_ASM_ISA_SPEC): Merge into:
config/sh/sh.h (SH_ASM_SPEC, SUBTARGET_ASM_ISA_SPEC): Here.
* config/sh/lib1funcs.asm (HIDDEN_FUNC, HIDDEN_ALIAS): Define.
(FMOVD_WORKS): Don't define for __SH5__.
(ashiftrt_r4_0, ashiftrt_r4_1, ashiftrt_r4_2, ashiftrt_r4_3): Hide.
(ashiftrt_r4_4, ashiftrt_r4_5, ashiftrt_r4_6, ashiftrt_r4_7): Hide.
(ashiftrt_r4_8, ashiftrt_r4_9, ashiftrt_r4_10, ashiftrt_r4_11): Hide.
(ashiftrt_r4_12, ashiftrt_r4_13, ashiftrt_r4_14, ashiftrt_r4_15): Hide.
(ashiftrt_r4_16, ashiftrt_r4_17, ashiftrt_r4_18, ashiftrt_r4_19): Hide.
(ashiftrt_r4_20, ashiftrt_r4_21, ashiftrt_r4_22, ashiftrt_r4_23): Hide.
(ashiftrt_r4_24, ashiftrt_r4_25, ashiftrt_r4_26, ashiftrt_r4_27): Hide.
(ashiftrt_r4_28, ashiftrt_r4_29, ashiftrt_r4_30, ashiftrt_r4_31): Hide.
(ashiftrt_r4_32, ashrsi3, ashlsi3, lshrsi3, movmem, movstr): Hide.
(movstrSI64, movmemSI64, movstrSI60, movmemSI60): Hide.
(movstrSI56, movmemSI56, movstrSI52, movmemSI52): Hide.
(movstrSI48, movmemSI48, movstrSI44, movmemSI44): Hide.
(movstrSI40, movmemSI40, movstrSI36, movmemSI36): Hide.
(movstrSI32, movmemSI32, movstrSI28, movmemSI28): Hide.
(movstrSI24, movmemSI24, movstrSI20, movmemSI20): Hide.
(movstrSI16,movmemSI16, movstrSI12,movmemSI12): Hide.
(movstrSI8,movmemSI8, movstrSI4,movmemSI4): Hide.
(movmemSI0, movstrSI0): Remove.
(movmemSI4): Schedule last store into rts delay slot.
(movmem): Shorten code. Provide ENDFUNC.
(movmem_i4_even, movmem_i4_odd, movmemSI12_i4, mulsi3): Hide.
(mulsi3): Provide ENDFUNC.
(sdivsi3_i4, sdivsi3_i4, udivsi3_i4, udivsi3, set_fpscr): Hide.
(SH5 sdivsi3): Reimplement, using:
(div_table): New, linear approximation table lookup for division seed.
(sdivsi3_2): New SH5 entry point.
(divdi3): Use hidden alias for udivdi3.
(moddi3): Use hidden alias for umoddi3.
(init_trampoline): Hide. Provide exact ENDFUNC.
(ic_invalidate): Hide. Re-implement SH4 version, using
(ic_invalidate_array): New global.
(GCC_shcompact_return_trampoline, GCC_nested_trampoline): Hide.
(GCC_push_shmedia_regs_nofpu): Only provide for __SH4_NOFPU__.
(GCC_pop_shmedia_regs_nofpu): Likewise.
* config/sh/libgcc-excl.ver (__mulsi3): Add.
* config/sh/linux.h (TARGET_DEFAULT): Include TARGET_OPT_DEFAULT.
* config/sh/sh-protos.h (sh_function_kind): New enum.
(sh_gen_truncate, replace_n_hard_rtx): Declare.
(function_symbol): Update declaration.
(shmedia_cleanup_truncate, sh_contains_memref_p): Declare.
* sh.c (cfgloop.h): Include.
(TARGET_ADJUST_UNROLL_MAX): Redefine.
(print_operand): Add '>' and 'U' support. Handle TRUNCATE and
SIGN_EXTEND.
(function_sybol): Add arguments for target and kind of symbol.
If not an ordinary function symbol, make sure the string becomes
unique. For PIC, load appropriately depending on kind of symbol.
Changed all callers.
(prepare_move_operands): Dont copy R0 to a pseudo for SHmedia.
(multcosts): Check sh_multcost_str. If not set, return 2 for
SHMEDIA TARGET_SMALLCODE.
(sh_rtx_costs): Lower some costs when outer_code is SET. Add code
for CONST_VECTOR, MINUS and PARALLEL.
(gen_shifty_op): Don't emit nop.
(expand_ashiftrt): While expanding to rtl, do shift by 31 using a
register set to zero.
(gen_datalabel_ref): Make sure that the string is shared.
(MAX_POOL_SIZE): Define as 372.
(find_barrier): Remove spurious adjustment.
(sh_media_register_for_return): Return -1 for interrupt handlers.
(sh_pch_valid_p): Use a copy of TARGET_OPTIONS.
(general_movsrc_operand): Accept vector that match sh_rep_vec.
(general_movdst_operand): For SHmedia, recject paradoxical DImode
subregs before high_life / reload.
(arith_reg_operand): Allow no-op sign extensions.
(logical_reg_operand, fp_arith_reg_dest, xor_operand): New functions.
(cmp_operand, shift_operator, logical_operator): Likewise.
(minuend_operand, ua_address_operand, cache_address_operand): Likewise.
(ua_offset, shift_count_reg_operand, shift_count_operand): Likewise.
(sh_adjust_unroll_max, replace_n_hard_rtx, sh_gen_truncate): Likewise.
(shmedia_cleanup_truncate, sh_contains_memref_p_1): Likewise.
(sh_contains_memref_p): Likewise.
(shmedia_6bit_operand): Remove.
(arith_operand): Allow some TRUNCATEs.
(logical_operand): Disallow subregs <= SImode of >= DImode.
(greater_comparison_operator): Fix mode comparison.
(less_comparison_operator): Likewise.
(target_reg_operand, target_operand): Compare modes with Pmode.
(sh_adjust_cost): Consider the dependency between a target register
load and its use in a subsequent block.
Implement mac_media latency exception.
Before reload, anticipate floating point latencies to be at least four.
Give preference to the ptabs feeding a casesi_jump_media.
Handle UNSPEC in a CALL address.
(sh_optimize_target_register_callee_saved): Improve handling of
borderline cases.
(sh_function_ok_for_sibcall): Allow for non-pic, and also when we
will use the symbol with @GOTOFF addressing.
(SH_BLTIN_UDI): Remove.
(SH_BLTIN_LDUA_L64, SH_BLTIN_LDUA_Q64, SH_BLTIN_STUA_L64): New.
(SH_BLTIN_STUA_Q64): Likewise.
(signature_args, SH_BLTIN_NUM_SHARED_SIGNATURES): Update.
(SH_BLTIN_2, SH_BLTIN_SU, SH_BLTIN_3, SH_BLTIN_SUS): Renumber.
(SH_BLTIN_PSSV, SH_BLTIN_XXUU, SH_BLTIN_UUUU, SH_BLTIN_PV): Likewise.
(bdesc): Add entries for alloco, mac_media, sqrtdf2, sqrtsf2, fsrra_s,
{ld,st}{hi,lo}.[lq] and prefetch.
Change mextr entries to use SH_BLTIN_V8QI3.
(sh_media_init_builtins): Implement specific TARGET_SHMEDIA32 /
TARGET_SHMEDIA64 checks for pointer arguments.
(sh_expand_builtin): For pointer types, use ptr_mode / ptr_type_mode.
(sh_register_move_cost): Check sh_gettrcost_str.
(cmpsi_operand): T_REG is only allowed for TARGET_SH1.
(sh_output_mi_thunk): Make static. Check that needed registers are
actually available. Make sure that the sibcall won't go via the PLT.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): New variables.
(cut2_workaround_str, sh_div_strategy, boardtype, osruntime): Likewise.
(arith_reg_dest): Allow paradoxical DImode subreg for ! TARGET_SHMEDIA.
* sh.h (TARGET_CPU_CPP_BUILTINS): Define __SH_FPU_ANY__ and
__SH_FPU_DOUBLE__.
(INDEXED_ADDRESS_BIT, ADJUST_UNROLL_BIT, TARGET_DIVIDE_INV): Define.
(TARGET_HARVARD): Also true for TARGET_SH5.
(TARGET_DIVIDE_FP, TARGET_DIVIDE_INV_FP, TARGET_DIVIDE_CALL2): Define.
(TARGET_DIVIDE_INV_MINLAT, TARGET_DIVIDE_INV20U): Define.
(TARGET_DIVIDE_INV20L, TARGET_DIVIDE_INV_CALL): Define.
(TARGET_DIVIDE_INV_CALL2, TARGET_ALLOW_INDEXED_ADDRESS): Define.
(TARGET_ADJUST_UNROLL, TARGET_OPT_DEFAULT, SUBTARGET_OPTIONS): Define.
(TARGET_SWITCHES): Removed excessive whitespace. Added options
indexed-addressing, no-indexed-addressing, adjust-unroll and
no-adjust-unroll.
(TARGET_DEFAULT): Add TARGET_OPT_DEFAULT.
(TARGET_OPTIONS): Define.
(EXTRA_SPECS): Add subtarget_asm_spec.
(SH_ASM_SPEC): Pass cut2-workaround option.
(SUBTARGET_ASM_ISA_SPEC): Enforce STRICT_NOFPU for SH4 --without-fp.
(LINK_EMUL_PREFIX): If target defaults to little endian, default to shl.
(OPTIMIZATION_OPTIONS): Set sh_div_str. If not using if not -mieee,
set flag_finite_math_only.
(sh_divide_strategy_e): New enum.
(sh_div_strategy): Declare.
(OVERRIDE_OPTIONS): Don't set FMOVD_BIT for TARGET_SHCOMPACT.
Clear flag_if_conversion2 for SHMEDIA.
Set sh_div_strategy.
Leave profile_flag and profile_arc_flag alone.
(LOOP_ALIGN): Replace TARGET_HARVARD test with TARGET_HARD_SH4 test.
(HARD_REGNO_MODE_OK): Allow TImode in aligned FP registers.
(MODES_TIEABLE_P): For TARGET_SHMEDIA, allow tying of integral modes
of the same size.
(CONST_OK_FOR_I): Fix detection of I06 constraint.
(PREFERRED_RELOAD_CLASS): Also choose GENERAL_REGS for
PIC_DIRECT_ADDR_P.
(SECONDARY_INPUT_RELOAD_CLASS): Fix parentheses. For TARGET_SHMEDIA,
check for inqhi_operand, LABEL_REF and PIC_DIRECT_ADDR_P.
(FUNCTION_VALUE, PROMOTE_MODE): Don't promote from SImode. For
TARGET_SHMEDIA32, promote to SImode.
(EXTRA_CONSTRAINT_C16): Allow SIGN_EXTEND to SImode.
(DATALABEL_REF_NO_CONST_P: Don't allow SYMBOL_REF.
(DATALABEL_REF_P): Don't define.
(NON_PIC_REFERENCE_P): Allow LABEL_REF and SYMBOL_REF directly inside
a CONST. Don't allow DATALABEL_REF_NO_CONST_P outside of a CONST.
Allow a LABEL_REF in a sum.
(BASE_REGISTER_RTX_P): Check TRULY_NOOP_TRUNCATION.
(INDEX_REGISTER_RTX_P): Likewise.
(GO_IF_LEGITIMATE_INDEX): Check if pased the address of an unaligned
load / store.
(ALLOW_INDEXED_ADDRESS): Define.
(GO_IF_LEGITIMATE_ADDRESS): Use it.
(TRULY_NOOP_TRUNCATION): Don't allow no-op truncation from 64 bit or
beyond to less than 64 bit.
(PRINT_OPERAND_PUNCT_VALID_P): Allow '>'.
(rtx_equal_function_value_matters): Don't declare.
(arith_reg_operand): Allow sign_extend.
(PREDICATE_CODES): Allow SIGN_EXTEND in arith_reg_operand. Add
any_arith_reg_dest, cache_address_operand, cmp_operand,
fp_arith_reg_dest, logical_operator, logical_reg_operand,
minuend_operand, shift_count_operand, shift_count_reg_operand,
shift_operator, ua_address_operand, ua_offset, unary_float_operator,
xor_operand. Don't allow PARALLEL in sh_1el_vec and sh_rep_vec
Remove shmedia_6bit_operand.
(SPECIAL_MODE_PREDICATES): Add any-arith_reg_dest, target_operand
and target_reg_operand.
(SIDI_OFF, SIMULTANEOUS_PREFETCHES, high_life_started): Define.
(sh_multcost_str, sh_gettrcost_str, sh_div_str): Declare.
(cut2_workaround_str): Declare.
(INDEX_REG_CLASS): Is NO_REGS if ALLOW_INDEXED_ADDRESS is zero.
(LEGITIMIZE_RELOAD_ADDRESS): Check ALLOW_INDEXED_ADDRESS.
Substitute INDEX_REG_CLASS with R0_REGS.
* sh.md (UNSPEC_DIV_INV_M0, UNSPEC_DIV_INV_M1): New constants.
(UNSPEC_DIV_INV_M2, UNSPEC_DIV_INV_M3, UNSPEC_DIV_INV20): Likewise.
(UNSPEC_ASHIFTRT, UNSPEC_THUNK): Likewise.
(Attribute "length"): jump_media has length 8 if
TARGET_SH5_CUT2_WORKAROUND is true.
("highpart"): New attribute.
(cmpsi): Allow TARGET_SHMEDIA.
(cmpeqsi_media, cmpgtsi_media, cmpgtusi_media): New patterns.
(cmpsieqsi_media, cmpsieqdi_media, cmpsigtsi_media): Likewise.
(cmpsigtdi_media, cmpsigtusi_media, cmpsigtudi_media): Likewise.
(*cmpne0si_media, *cmpne0sisi_media, movdicc_true+1): Likewise.
(movdicc_true+2, movsicc_false, movsicc_true): Likewise.
(movsicc_true+1, movsicc_true+2, movsicc_true+3): Likewise.
(*movsicc_umin, movsicc, movqicc, *adddisi3_media): Likewise.
(addsidi3_media, subdisi3_media, mov_neg_si_t): Likewise.
(*subsi3_media+1, *subsi3_media+2, divsi3_media_2): Likewise.
(divsi_inv_call, *divsi_inv_call_combine, divsi_inv_m0): Likewise.
(divsi_inv_m1, divsi_inv_m2, divsi_inv_m3, divsi_inv_m1_3): Likewise.
(divsi_inv20, divsi_inv_fp, *divsi_inv_fp_combine, muldi3): Likewise.
(*andsi3_media, andcsi3): Likewise.
(cmpeqdi_media): Use cmp_operand operand predicate.
(*adddi3_media, adddi3z_media): Use arith_reg_dest operand predicate.
(adddi3_compact, adddi3_compact+1, addc, addc1): Likewise.
(addsi3_media, *addsi3_compact, *subdi3_media): Likewise.
(subdi3_compact, subdi3_compact+1, subc, subc1): Likewise.
(*subsi3_internal, *subsi3_media, udivsi3_sh2a, divsi3_sh2a): Likewise.
(mul_r, mulsidi3_media, mulsidi3_compact): Likewise.
(mulsidi3_compact+1, umulsidi3_media, umulsidi3_compact): Likewise.
(umulsidi3_compact+1, *andsi3_compact, anddi3, andcdi3): Likewise.
(*subsi3_media): Make define_insn_and_split. Use minuend_operand
operand predicate.
(subsi3): Don't force operand 1 into a register if it is a SUBREG.
(udivsi3_i1_media, udivsi3): Use Pmode for function/target address.
(divsi3_i1_media, beq_media, *beq_media_i, bne_media): Likewise.
(bgt_media, bge_media, bgtu_media, bgeu_media, *bgt_media_i): Likewise.
(*blt_media_i, bunordered, jump_media, jump, call_media): Likewise.
(call_value_media, call, call_value, sibcall_media, sibcall): Likewise.
(indirect_jump, casesi_jump_media, GOTaddr2picreg, *ptb): Likewise.
(symGOT_load, casesi, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, return_media): Likewise.
(udivsi3_i1_media): Enable also for ! TARGET_DIVIDE_FP.
(divsi3_i1_media): Likewise. Don't clobber R2 / R3 / TR1 / TR2.
(divsi3): Add support for division by multiplying with inverse.
(andsi3): Use logical_reg_operand predicate. Add SHmedia support.
(iorsi3): Rename to:
(*iorsi3_compact).
(xorsi3): Rename to:
(*xorsi3_compact).
(iorsi3, *iorsi3_media, *logical_sidi3, xorsi3): New patterns.
(*logical_sidisi3, *logical_sidi3_2, rotrdi3_mextr+1): Likewise.
(ashrsi2_31+2, *ashlsi_c_void, *ashldisi3_media): Likewise.
(*lshrdisi3_media, *ashrdisi3_media, ashrdisi3_media_high): Likewise.
(ashrdisi3_media_opaque, one_cmpldi2+1, cneg, movsi_const): Likewise.
(movsi_const_16bit, *movdi_media_I16, *shori_media_si): Likewise.
(*beq_media_i32, *bgt_media_i32, *blt_media_i32): Likewise.
(bunordered+1, sibcalli_thunk, ptrel_si, cmpsieqsf_media): Likewise.
(cmpsieqdf_media, addv2hi3, ashlv2si3+1, subv2hi3, ldhi_l): Likewise.
(ldhi_q, *ldhi_q_comb0, *ldhi_q_comb1, ldlo_l, ldlo_q): Likewise.
(*ldlo_q_comb0, *ldlo_q_comb1, sthi_l, sthi_q): Likewise.
(*sthi_q_comb0, *sthi_q_comb1, stlo_l, stlo_q): Likewise.
(*stlo_q_comb0, *stlo_q_comb1, ldhi_l64, ldhi_q64, ldlo_l64): Likewise.
(ldlo_q64, sthi_l64, sthi_q64, stlo_l64, stlo_q64, alloco_i): Likewise.
(alloca_i+1): Likewise.
(prefetch_media): Inhibit generator function generation.
(prefetch_i4): Likewise. Also enable for TARGET_SHCOMPACT.
(*iorsi3_compact, iordi3): Use arith_reg_dest operand predicate.
(*xorsi3_compact, xordi3, xordi3+1, rotlsi3_1, rotlsi3_31): Likewise.
(rotlsi3_16, rotlsi3, *rotlhi3_8, ashlsi3_sh2a, ashlsi3_std): Likewise.
(ashlhi3_k, ashlsi3_n, ashlsi3_n+1, ashlsi3_media): Likewise.
(*ashlhi3_n, ashlhi3+1, ashrsi3_sh2a, ashrsi3_k, ashrsi2_16): Likewise.
(ashrsi2_16+1, ashrsi2_31, ashrsi2_31+1, ashlsi_c): Likewise.
(ashrsi3_d, ashrsi3_media, lshrsi3_sh2a, lshrsi3_d): Likewise.
(lshrsi3_m, lshrsi3_k, lshrsi3_n, lshrsi3_n, lshrsi3_media): Likewise.
(lshrsi3, ashldi3_k, ashldi3_mediai, lshrdi3_k): Likewise.
(ashrdi3_k, xtrct_left, xtrct_right, negc, *negdi_media): Likewise.
(negsi2, one_cmplsi2, one_cmpldi2, zero_extendsidi2): Likewise.
(*zero_extendhisi2_compact, *zero_extendqisi2_compact): Likewise.
(zero_extendqihi2, extendhisi2, *extendhisi2_compact): Likewise.
(extendqisi2, *extendqisi2_compact, extendqihi2): Likewise.
(movsi_const_16bit+1, *movdi_media_I16+1): Likewise.
(movdf_media_nofpu+1, movsf_media_nofpu+1, dect, movt, seq): Likewise.
(movnegt+1, divsf3_i): Likewise.
(xordi3): Use xor_operand operand predicate.
(ashlsi3_media): Use shift_count_operand operand predicate.
(ashrsi3_media, lshrsi3_media, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media): Likewise.
(ashrsi2_31+1): Use mov_neg_si_t.
(lshrdi3_media, ashrdi3_media): Use ext_dest_operand predicate.
Make sure that either the destination is not a subreg, or that the
shift generates a sufficient number of sign bit copies.
(*loaddi_trunc): Use any_register_operand predicate.
(ic_invalidate_line_sh4a): Likewise.
(*zero_extendhisi2_media+1): Use simplify_gen_subreg.
(*extendhisi2_media+1i, *extendqisi2_media+1): Likewise.
(extendsidi2): Add fmov.sl alternative.
(load_ra): Add mode for operand 1.
(*movsi_media): Discourage the use of floating point registers.
Allow TRUNCATE.
(*movsi_media_nofpu): Ignore target register alternative for register
preferencing. Allow TRUNCATE.
(movsi_const_16bit+1): Use gen_movsi_const, and add an REG_EQUAL note.
(*movqi_media): Use extend_reg_or_0_operand predicate.
(*movdi_media): Ignore target register alternative for register
preferencing. Discourage the use of floating point registers.
(*movdi_media_nofpu): Ignore target register alternative for register
preferencing.
(movdi_const_16bit+1): If the source is subregged from SImode,
sign-extend highpart. Use ext_dest_operand predicate.
(movdi_const_16bit+2, shori_media): Use ext_dest_operand predicate.
(reload_outdf+7, reload_outdf+8): Check ALLOW_INDEXED_ADDRESS.
(stuff_delay_slot): Add modes for operands 0 and 1.
(*beq_media_i, *bgt_media_i): Add '>' to output templates.
(*blt_media_i, jump_media): Likewise.
(beq, bne): Pass through SImode inputs, and I06 constants.
(bgt, blt, ble, bge, bgtu): Pass through SImode inputs, the constant 0.
(bltu, bgeu, bleu): Likewise.
(GOTaddr2picreg): Don't call gen_datalabel_ref.
(ptrel): Rename to:
(ptrel_di).
(tls_global_dynamic, tls_local_dynamic): Add mode for call.
(seq): Properly support input modes other than DImode.
(slt, sle, sgt, sge,sne): Properly support SImode.
(addsf3_i, negdf2_i, sqrtdf2_i, absdf2_i): Use fp_arith_reg_operand.
(mac_media) Enable generator function generation.
(fix_truncsfdi2): Use fp_arith_reg_dest operand predicate.
(fix_truncdfdi2): Likewise.
(movv8qi_i+3): Enable for CONST0_RTX too.
(movv2hi_i): Use add.l, not addz.l.
(ashlv2si3, ashlv4hi3, lshrv2si3): Use shift_count_reg_operand.
(lshrv4hi3): Likewise.
(ussubv8qi3): Allow zero for operand 1.
(prefetch): Allow any mode for operand 0. Enable for SHCOMPACT.
Use force_reg.
* config/sh/shmedia.md: (shmedia): Remove automaton declaration.
(sh5inst_pipe, sh5fpu_pipe): New automatons.
(sh5issue): Use sh5inst_pipe.
(sh5fds): Use sh5fpu_pipe.
(shmedia_fdiv, shmedia_dfdiv): Also use sh5issue.
* config/sh/sshmedia.h (sh_media_GETCON, sh_media_PUTCON): Declare
with always_inline Attribute.
* t-sh64 (LIB1ASMFUNCS): Add _div_table.
* config/sh/ushmedia.h (sh_media_MABS_L): Use builtin function.
(sh_media_MABS_W, sh_media_MADD_L, sh_media_MADD_W): Likewise.
(sh_media_MADDS_L, sh_media_MADDS_UB, sh_media_MADDS_W): Likewise.
(sh_media_MCMPEQ_B, sh_media_MCMPEQ_L, sh_media_MCMPEQ_W): Likewise.
(sh_media_MCMPGT_UB, sh_media_MCMPGT_L, sh_media_MCMPGT_W): Likewise.
(sh_media_MCMV, sh_media_MCNVS_LW, sh_media_MCNVS_WB): Likewise.
(sh_media_MCNVS_WUB, sh_media_MEXTR1, sh_media_MEXTR2): Likewise.
(sh_media_MEXTR3, sh_media_MEXTR4, sh_media_MEXTR5): Likewise.
(sh_media_MEXTR6, sh_media_MEXTR7, sh_media_MMACFX_WL): Likewise.
(sh_media_MMACNFX_WL, sh_media_MMUL_L, sh_media_MMUL_W): Likewise.
(sh_media_MMULFX_L, sh_media_MMULFX_W, sh_media_MMULFXRP_W): Likewise.
(sh_media_MMULHI_WL, sh_media_MMULLO_WL): Likewise.
(sh_media_MMULSUM_WQ, sh_media_MPERM_W, sh_media_MSAD_UBQ): Likewise.
(sh_media_MSHALDS_L, sh_media_MSHALDS_W, sh_media_MSHARD_L): Likewise.
(sh_media_MSHARD_W, sh_media_MSHARDS_Q, sh_media_MSHFHI_B): Likewise.
(sh_media_MSHFHI_L, sh_media_MSHFHI_W, sh_media_MSHFLO_B): Likewise.
(sh_media_MSHFLO_L, sh_media_MSHFLO_W, sh_media_MSHLLD_L): Likewise.
(sh_media_MSHLLD_W, sh_media_MSHLRD_L, sh_media_MSHLRD_W): Likewise.
(sh_media_MSUB_L, sh_media_MSUB_W, sh_media_MSUBS_L): Likewise.
(sh_media_MSUBS_UB, sh_media_MSUBS_W, sh_media_FABS_D): Likewise.
(sh_media_FABS_S, sh_media_FCMPUN_D, sh_media_FCMPUN_S): Likewise.
(sh_media_FIPR_S, sh_media_FMAC_S, sh_media_FSQRT_D): Likewise.
(sh_media_FSQRT_S, sh_media_FTRV_S, sh_media_LDHI_L): Likewise.
(sh_media_LDHI_Q, sh_media_LDLO_L, sh_media_LDLO_Q): Likewise.
(sh_media_STHI_L, sh_media_STHI_Q, sh_media_STLO_L): Likewise.
(sh_media_STLO_Q, sh_media_NSB, sh_media_BYTEREV): Likewise.
(sh_media_PREFO, sh_media_ALLOCO): Likewise.
(sh_media_FCOSA_S, sh_media_FSINA_S): New function.
(sh_media_FMOV_DQ, sh_media_FMOV_LS): Use union assignment.
(sh_media_FMOV_QD, sh_media_FMOV_SL): Likewise.
(sh_media_CMVEQ): Use C code. Add attribute always_inline.
(sh_media_CMVNE): Likewise.
(sh_media_ADDZ_L): Use C code.
(sh_media_unaligned_LD_L): Use intrinsics directly.
(sh_media_unaligned_LD_Q, sh_media_unaligned_ST_L): Likewise.
(sh_media_unaligned_ST_Q): Likewise.
* config/sh/divtab.c: New file.
2005-04-06 Andrew Stubbs <andrew.stubbs@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* config/sh/superh64.h, config/sh/superh.h: New files.
* config/sh/newlib.h, config/sh/t-superh: Likewise.
* config.gcc: Add support for sh*-superh-elf* and sh64-superh-linux*.
gcc/testsuite:
2005-05-06 J"orn Rennecke <joern.rennecke@st.com>
* gcc.dg/pr15784-3.c: Add -fno-finite-math-only option.
* gcc.dg/20021029-1.c: For sh64*-*-*, add -mpt-fixed.
From-SVN: r99460
2005-05-09 19:42:55 +02:00
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expevt_k:
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.long 0xff000024 ! Address of expevt
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chandler_k:
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.long chandler
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superh_trap_handler_k:
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.long __superh_trap_handler
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handler_exit_k:
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.long _exit
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.align 2
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! Simulated compile of trap handler.
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.section .debug_abbrev,"",@progbits
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.Ldebug_abbrev0:
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.section .debug_info,"",@progbits
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.Ldebug_info0:
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.section .debug_line,"",@progbits
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.Ldebug_line0:
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.text
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.Ltext0:
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.align 5
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.type __superh_trap_handler,@function
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__superh_trap_handler:
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.LFB1:
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mov.l r14,@-r15
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.LCFI0:
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add #-4,r15
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.LCFI1:
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mov r15,r14
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.LCFI2:
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mov.l r4,@r14
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lds r1, pr
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add #4,r14
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mov r14,r15
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mov.l @r15+,r14
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rts
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nop
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.LFE1:
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.Lfe1:
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.size __superh_trap_handler,.Lfe1-__superh_trap_handler
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.section .debug_frame,"",@progbits
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.Lframe0:
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.ualong .LECIE0-.LSCIE0
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.LSCIE0:
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.ualong 0xffffffff
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.byte 0x1
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.string ""
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.uleb128 0x1
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.sleb128 -4
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.byte 0x11
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.byte 0xc
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.uleb128 0xf
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.uleb128 0x0
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.align 2
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.LECIE0:
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.LSFDE0:
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.ualong .LEFDE0-.LASFDE0
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.LASFDE0:
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.ualong .Lframe0
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.ualong .LFB1
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.ualong .LFE1-.LFB1
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.byte 0x4
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.ualong .LCFI0-.LFB1
|
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|
|
.byte 0xe
|
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|
.uleb128 0x4
|
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|
.byte 0x4
|
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|
.ualong .LCFI1-.LCFI0
|
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|
|
.byte 0xe
|
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|
.uleb128 0x8
|
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|
.byte 0x8e
|
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.uleb128 0x1
|
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|
.byte 0x4
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|
.ualong .LCFI2-.LCFI1
|
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|
.byte 0xd
|
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|
.uleb128 0xe
|
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.align 2
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|
.LEFDE0:
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|
.text
|
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|
.Letext0:
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|
.section .debug_info
|
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|
.ualong 0xb3
|
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|
|
.uaword 0x2
|
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|
.ualong .Ldebug_abbrev0
|
|
|
|
.byte 0x4
|
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|
.uleb128 0x1
|
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|
|
.ualong .Ldebug_line0
|
|
|
|
.ualong .Letext0
|
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|
.ualong .Ltext0
|
|
|
|
.string "trap_handler.c"
|
|
|
|
.string "xxxxxxxxxxxxxxxxxxxxxxxxxxxx"
|
|
|
|
.string "GNU C 3.2 20020529 (experimental)"
|
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|
|
.byte 0x1
|
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|
.uleb128 0x2
|
|
|
|
.ualong 0xa6
|
|
|
|
.byte 0x1
|
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|
|
.string "_superh_trap_handler"
|
|
|
|
.byte 0x1
|
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|
|
.byte 0x2
|
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|
|
.byte 0x1
|
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|
.ualong .LFB1
|
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|
|
.ualong .LFE1
|
|
|
|
.byte 0x1
|
|
|
|
.byte 0x5e
|
|
|
|
.uleb128 0x3
|
|
|
|
.string "trap_reason"
|
|
|
|
.byte 0x1
|
|
|
|
.byte 0x1
|
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|
|
.ualong 0xa6
|
|
|
|
.byte 0x2
|
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|
|
.byte 0x91
|
|
|
|
.sleb128 0
|
|
|
|
.byte 0x0
|
|
|
|
.uleb128 0x4
|
|
|
|
.string "unsigned int"
|
|
|
|
.byte 0x4
|
|
|
|
.byte 0x7
|
|
|
|
.byte 0x0
|
|
|
|
.section .debug_abbrev
|
|
|
|
.uleb128 0x1
|
|
|
|
.uleb128 0x11
|
|
|
|
.byte 0x1
|
|
|
|
.uleb128 0x10
|
|
|
|
.uleb128 0x6
|
|
|
|
.uleb128 0x12
|
|
|
|
.uleb128 0x1
|
|
|
|
.uleb128 0x11
|
|
|
|
.uleb128 0x1
|
|
|
|
.uleb128 0x3
|
|
|
|
.uleb128 0x8
|
|
|
|
.uleb128 0x1b
|
|
|
|
.uleb128 0x8
|
|
|
|
.uleb128 0x25
|
|
|
|
.uleb128 0x8
|
|
|
|
.uleb128 0x13
|
|
|
|
.uleb128 0xb
|
|
|
|
.byte 0x0
|
|
|
|
.byte 0x0
|
|
|
|
.uleb128 0x2
|
|
|
|
.uleb128 0x2e
|
|
|
|
.byte 0x1
|
|
|
|
.uleb128 0x1
|
|
|
|
.uleb128 0x13
|
|
|
|
.uleb128 0x3f
|
|
|
|
.uleb128 0xc
|
|
|
|
.uleb128 0x3
|
|
|
|
.uleb128 0x8
|
|
|
|
.uleb128 0x3a
|
|
|
|
.uleb128 0xb
|
|
|
|
.uleb128 0x3b
|
|
|
|
.uleb128 0xb
|
|
|
|
.uleb128 0x27
|
|
|
|
.uleb128 0xc
|
|
|
|
.uleb128 0x11
|
|
|
|
.uleb128 0x1
|
|
|
|
.uleb128 0x12
|
|
|
|
.uleb128 0x1
|
|
|
|
.uleb128 0x40
|
|
|
|
.uleb128 0xa
|
|
|
|
.byte 0x0
|
|
|
|
.byte 0x0
|
|
|
|
.uleb128 0x3
|
|
|
|
.uleb128 0x5
|
|
|
|
.byte 0x0
|
|
|
|
.uleb128 0x3
|
|
|
|
.uleb128 0x8
|
|
|
|
.uleb128 0x3a
|
|
|
|
.uleb128 0xb
|
|
|
|
.uleb128 0x3b
|
|
|
|
.uleb128 0xb
|
|
|
|
.uleb128 0x49
|
|
|
|
.uleb128 0x13
|
|
|
|
.uleb128 0x2
|
|
|
|
.uleb128 0xa
|
|
|
|
.byte 0x0
|
|
|
|
.byte 0x0
|
|
|
|
.uleb128 0x4
|
|
|
|
.uleb128 0x24
|
|
|
|
.byte 0x0
|
|
|
|
.uleb128 0x3
|
|
|
|
.uleb128 0x8
|
|
|
|
.uleb128 0xb
|
|
|
|
.uleb128 0xb
|
|
|
|
.uleb128 0x3e
|
|
|
|
.uleb128 0xb
|
|
|
|
.byte 0x0
|
|
|
|
.byte 0x0
|
|
|
|
.byte 0x0
|
|
|
|
.section .debug_pubnames,"",@progbits
|
|
|
|
.ualong 0x27
|
|
|
|
.uaword 0x2
|
|
|
|
.ualong .Ldebug_info0
|
|
|
|
.ualong 0xb7
|
|
|
|
.ualong 0x67
|
|
|
|
.string "_superh_trap_handler"
|
|
|
|
.ualong 0x0
|
|
|
|
.section .debug_aranges,"",@progbits
|
|
|
|
.ualong 0x1c
|
|
|
|
.uaword 0x2
|
|
|
|
.ualong .Ldebug_info0
|
|
|
|
.byte 0x4
|
|
|
|
.byte 0x0
|
|
|
|
.uaword 0x0
|
|
|
|
.uaword 0x0
|
|
|
|
.ualong .Ltext0
|
|
|
|
.ualong .Letext0-.Ltext0
|
|
|
|
.ualong 0x0
|
|
|
|
.ualong 0x0
|
|
|
|
#endif /* VBR_SETUP */
|