2004-08-03 15:27:02 +02:00
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# Rules common to all arm targets
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ABOUT-GCC-NLS, [...]: Add copyright and license notices.
* ABOUT-GCC-NLS, ChangeLog, ChangeLog-1997, ChangeLog-1998,
ChangeLog-1999, ChangeLog-2000, ChangeLog-2001, ChangeLog-2002,
ChangeLog-2003, ChangeLog-2004, ChangeLog-2005, ChangeLog-2006,
ChangeLog-2007, ChangeLog-2008, ChangeLog.dataflow, ChangeLog.lib,
ChangeLog.ptr, ChangeLog.tree-ssa, ChangeLog.tuples, FSFChangeLog,
FSFChangeLog.10, FSFChangeLog.11, LANGUAGES, ONEWS, acinclude.m4,
config/alpha/gnu.h, config/alpha/libgcc-alpha-ldbl.ver,
config/alpha/t-osf4, config/alpha/t-vms, config/alpha/va_list.h,
config/alpha/x-vms, config/arc/t-arc,
config/arm/README-interworking, config/arm/arm-c.c,
config/arm/gentune.sh, config/arm/libgcc-bpabi.ver,
config/arm/t-arm, config/arm/t-arm-elf, config/arm/t-arm-softfp,
config/arm/t-bpabi, config/arm/t-linux, config/arm/t-linux-eabi,
config/arm/t-netbsd, config/arm/t-pe, config/arm/t-strongarm-elf,
config/arm/t-symbian, config/arm/t-vxworks, config/arm/t-wince-pe,
config/avr/t-avr, config/bfin/elf.h, config/bfin/libgcc-bfin.ver,
config/bfin/linux.h, config/bfin/t-bfin, config/bfin/t-bfin-elf,
config/bfin/t-bfin-linux, config/bfin/t-bfin-uclinux,
config/bfin/uclinux.h, config/cris/mulsi3.asm, config/cris/t-cris,
config/cris/t-elfmulti, config/crx/t-crx,
config/darwin-ppc-ldouble-patch.def, config/darwin-sections.def,
config/divmod.c, config/fr30/t-fr30, config/frv/libgcc-frv.ver,
config/frv/t-frv, config/frv/t-linux, config/h8300/genmova.sh,
config/h8300/t-h8300, config/i386/athlon.md,
config/i386/darwin-libgcc.10.4.ver,
config/i386/darwin-libgcc.10.5.ver, config/i386/libgcc-glibc.ver,
config/i386/mach.h, config/i386/netbsd.h, config/i386/t-crtpc,
config/i386/t-cygming, config/i386/t-cygwin, config/i386/t-i386,
config/i386/t-linux64, config/i386/t-nwld,
config/i386/t-rtems-i386, config/i386/t-sol2-10,
config/i386/x-mingw32, config/ia64/div.md, config/ia64/elf.h,
config/ia64/ia64.opt, config/ia64/libgcc-glibc.ver,
config/ia64/libgcc-ia64.ver, config/ia64/linux.h,
config/ia64/sysv4.h, config/ia64/t-hpux, config/ia64/t-ia64,
config/iq2000/abi, config/iq2000/lib2extra-funcs.c,
config/iq2000/t-iq2000, config/libgcc-glibc.ver,
config/m32r/libgcc-glibc.ver, config/m32r/t-linux,
config/m32r/t-m32r, config/m68hc11/t-m68hc11,
config/m68k/t-floatlib, config/m68k/t-linux, config/m68k/t-mlibs,
config/m68k/t-uclinux, config/mcore/t-mcore,
config/mcore/t-mcore-pe, config/mips/20kc.md, config/mips/4130.md,
config/mips/5400.md, config/mips/5500.md, config/mips/crti.asm,
config/mips/crtn.asm, config/mips/irix-crti.asm,
config/mips/irix-crtn.asm, config/mips/libgcc-mips16.ver,
config/mips/mips-dsp.md, config/mips/mips-dspr2.md,
config/mips/mips-fixed.md, config/mips/sb1.md,
config/mips/sr71k.md, config/mips/t-elf, config/mips/t-gofast,
config/mips/t-iris6, config/mips/t-isa3264,
config/mips/t-libgcc-mips16, config/mips/t-linux64,
config/mips/t-mips, config/mips/t-r3900, config/mips/t-rtems,
config/mips/t-sb1, config/mips/t-sde, config/mips/t-sdemtk,
config/mips/t-slibgcc-irix, config/mips/t-sr71k, config/mips/t-st,
config/mips/t-vr, config/mips/t-vxworks, config/mmix/t-mmix,
config/mn10300/t-linux, config/mn10300/t-mn10300,
config/pa/pa32-regs.h, config/pa/t-hpux-shlib, config/pa/t-linux,
config/pa/t-linux64, config/pa/t-pa64, config/pdp11/t-pdp11,
config/picochip/libgccExtras/clzsi2.asm,
config/picochip/t-picochip, config/rs6000/darwin-ldouble-format,
config/rs6000/darwin-libgcc.10.4.ver,
config/rs6000/darwin-libgcc.10.5.ver,
config/rs6000/libgcc-ppc-glibc.ver, config/rs6000/ppc-asm.h,
config/rs6000/t-aix43, config/rs6000/t-aix52,
config/rs6000/t-darwin, config/rs6000/t-fprules,
config/rs6000/t-fprules-fpbit, config/rs6000/t-linux64,
config/rs6000/t-lynx, config/rs6000/t-netbsd,
config/rs6000/t-ppccomm, config/rs6000/t-ppcendian,
config/rs6000/t-ppcgas, config/rs6000/t-rs6000,
config/rs6000/t-rtems, config/rs6000/t-spe,
config/rs6000/t-vxworks, config/s390/libgcc-glibc.ver,
config/score/t-score-elf, config/sh/divcost-analysis,
config/sh/libgcc-glibc.ver, config/sh/t-netbsd, config/sh/t-sh,
config/sh/t-sh64, config/sh/t-superh, config/sh/t-symbian,
config/sparc/libgcc-sparc-glibc.ver, config/sparc/sol2-bi.h,
config/sparc/sol2-gas.h, config/sparc/sol2-gld-bi.h,
config/sparc/t-elf, config/sparc/t-linux64, config/sparc/t-sol2,
config/stormy16/stormy-abi, config/stormy16/t-stormy16,
config/t-darwin, config/t-libunwind, config/t-libunwind-elf,
config/t-linux, config/t-lynx, config/t-slibgcc-elf-ver,
config/t-slibgcc-sld, config/t-sol2, config/t-vxworks,
config/udivmod.c, config/udivmodsi4.c, config/v850/t-v850,
config/v850/t-v850e, config/xtensa/t-xtensa, diagnostic.def,
gdbinit.in, glimits.h, gstab.h, gsyms.h, java/ChangeLog,
java/ChangeLog.ptr, java/ChangeLog.tree-ssa, libgcc-std.ver,
limitx.h, version.c, xcoff.h: Add copyright and license notices.
* config/h8300/genmova.sh: Include copyright and license notices
in generated output.
* config/h8300/mova.md: Regenerate.
* doc/install.texi2html: Include word "Copyright" in copyright
notice and use name "Free Software Foundation, Inc.".
* ChangeLog, ChangeLog-2000, ChangeLog-2001, ChangeLog-2002,
ChangeLog-2003, ChangeLog-2004, ChangeLog-2005, ChangeLog-2006,
ChangeLog-2007, ChangeLog-2008: Correct dates.
ada:
* ChangeLog, ChangeLog.ptr, ChangeLog.tree-ssa: Add copyright and
license notices.
cp:
* ChangeLog, ChangeLog-1993, ChangeLog-1994, ChangeLog-1995,
ChangeLog-1996, ChangeLog-1997, ChangeLog-1998, ChangeLog-1999,
ChangeLog-2000, ChangeLog-2001, ChangeLog-2002, ChangeLog-2003,
ChangeLog-2004, ChangeLog-2005, ChangeLog-2006, ChangeLog-2007,
ChangeLog-2008, ChangeLog.ptr, ChangeLog.tree-ssa, NEWS,
cfns.gperf: Add copyright and license notices.
* cfns.h: Regenerate.
* ChangeLog, ChangeLog-2004: Correct dates.
fortran:
* ChangeLog, ChangeLog-2002, ChangeLog-2003, ChangeLog-2004,
ChangeLog-2005, ChangeLog-2006, ChangeLog-2007, ChangeLog-2008,
ChangeLog.ptr, config-lang.in, ioparm.def, mathbuiltins.def: Add
copyright and license notices.
* ChangeLog, ChangeLog-2005, ChangeLog-2006, ChangeLog-2007,
ChangeLog-2008: Correct dates.
java:
* ChangeLog, ChangeLog.ptr, ChangeLog.tree-ssa: Add copyright and
license notices.
objc:
* ChangeLog: Add copyright and license notices.
objcp:
* ChangeLog: Add copyright and license notices.
po:
* ChangeLog, EXCLUDES: Add copyright and license notices.
testsuite:
* ChangeLog, ChangeLog-1993-2007, ChangeLog-2008, ChangeLog.ptr,
ChangeLog.tree-ssa, README, README.QMTEST, README.compat,
README.gcc, g++.dg/README, g++.dg/compat/break/README,
g++.dg/gomp/gomp.exp, g++.old-deja/g++.brendan/README,
g++.old-deja/g++.oliva/ChangeLog, g++.old-deja/g++.robertl/README,
gcc.c-torture/ChangeLog.0,
gcc.c-torture/execute/builtins/builtins.exp, gcc.dg/README,
gcc.dg/gomp/gomp.exp, gcc.target/frv/frv.exp,
gcc.target/i386/math-torture/math-torture.exp,
gcc.target/mips/inter/mips16-inter.exp,
gcc.target/mips/mips-nonpic/README,
gcc.target/x86_64/abi/README.gcc,
gcc.target/xstormy16/xstormy16.exp, gcc.test-framework/README,
gfortran.dg/g77/README, gfortran.dg/gomp/gomp.exp,
gfortran.fortran-torture/ChangeLog.g95: Add copyright and license
notices.
* ChangeLog-1993-2007, ChangeLog: Correct dates.
From-SVN: r146533
2009-04-21 21:03:23 +02:00
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#
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# Copyright (C) 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
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#
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# This file is part of GCC.
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#
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# GCC is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3, or (at your option)
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# any later version.
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#
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# GCC is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with GCC; see the file COPYING3. If not see
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# <http://www.gnu.org/licenses/>.
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2004-08-03 15:27:02 +02:00
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MD_INCLUDES= $(srcdir)/config/arm/arm-tune.md \
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arm.md: Include predicates.md.
* arm.md: Include predicates.md.
* predicates.md: New file.
* arm.c (s_register_operand, arm_hard_register_operand)
(arm_general_register_operand, f_register_operand, reg_or_int_operand)
(arm_immediate_operand, arm_neg_immediate_operand)
(arm_not_immediate_operand, arm_rhs_operand, arm_rhsm_operand)
(arm_add_operand, arm_addimm_operand, arm_not_operand)
(offsettable_memory_operand, alignable_memory_operand)
(arm_reload_memory_operand, arm_float_rhs_operand)
(arm_float_add_operand, vfp_compare_operand, arm_float_compare_operand)
(index_operand, shiftable_operator, logical_binary_operator)
(shift_operator, equality_operator, arm_comparison_operator)
(minmax_operator, cc_register, dominant_cc_register)
(arm_extendqisi_mem_op, power_of_two_operand, nonimmediate_di_operand)
(di_operand, nonimmediate_soft_df_operand, soft_df_operand)
(const_shift_operand, load_multiple_operation)
(store_multiple_operation, multi_register_push, thumb_cmp_operand)
(thumb_cmpneg_operand, thumb_cbrch_target_operand)
(cirrus_register_operand, cirrus_fp_register)
(cirrus_shift_const): Delete, replaced with equivalents in
predicates.md.
(shift_op): Handle ROTATE.
* arm-protos.h: Delete declarations for above.
* arm.h (PREDICATE_CODES, SPECIAL_MODE_PREDICATES): Delete.
* t-arm (MD_INCLUDES): Add predicates.md.
(s-preds): Depends on MD_INCLUDES.
From-SVN: r86512
2004-08-24 22:16:41 +02:00
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$(srcdir)/config/arm/predicates.md \
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2004-08-03 15:27:02 +02:00
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$(srcdir)/config/arm/arm-generic.md \
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* arm.md (bunordered, bordered, bungt, bunlt, bunge, bunle, buneq)
(bltgt, arm_buneq, arm_bltgt, sunordered, sordered, sungt, sunge)
(sunlt, sunle): Enable patterns on VFP.
* arm.md (attribute 'type'): Add new types - f_loads floadd, f_stores,
f_stored, f_flag, f_cvt.
(generic_sched): No-longer used for the arm1020e and arm1022e cores.
Include arm1020e.md.
* vfp.md (fmstat): New cpu unit. Add an exclusion set between it and
the ds and fmac pipelines. Re-work all load and store patterns and
all conversion patterns to use new attributes. Adjust reservation
descriptions accordingly.
* arm1020e.md: New file.
* t-arm: Add dependency.
From-SVN: r100452
2005-06-01 16:52:16 +02:00
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$(srcdir)/config/arm/arm1020e.md \
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2004-08-03 15:27:02 +02:00
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$(srcdir)/config/arm/arm1026ejs.md \
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$(srcdir)/config/arm/arm1136jfs.md \
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$(srcdir)/config/arm/arm926ejs.md \
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$(srcdir)/config/arm/cirrus.md \
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$(srcdir)/config/arm/fpa.md \
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Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi.
gcc/
* Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi.
* config.gcc (arm*-*-*): Add arm_neon.h to extra headers.
(with_fpu): Allow --with-fpu=neon.
* config/arm/aof.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/aout.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/arm-modes.def (EI, OI, CI, XI): New modes.
* config/arm/arm-protos.h (neon_immediate_valid_for_move)
(neon_immediate_valid_for_logic, neon_output_logic_immediate)
(neon_pairwise_reduce, neon_expand_vector_init, neon_reinterpret)
(neon_emit_pair_result_insn, neon_disambiguate_copy)
(neon_vector_mem_operand, neon_struct_mem_operand, output_move_quad)
(output_move_neon): Add prototypes.
* config/arm/arm.c (FL_NEON): New flag for NEON processor capability.
(all_fpus): Add FPUTYPE_NEON.
(fp_model_for_fpu): Add NEON field.
(arm_return_in_memory): Return vectors <= 16 bytes in ARM registers.
(arm_arg_partial_bytes): Allow NEON vectors to be passed partially
in registers.
(arm_legitimate_address_p): Don't support fancy addressing for NEON
structure moves.
(thumb2_legitimate_address_p): Likewise.
(neon_valid_immediate): Recognize and prepare constants suitable for
NEON instructions.
(neon_immediate_valid_for_move): New function. Recognize and prepare
immediates for NEON move instructions.
(neon_immediate_valid_for_logic): New function. Recognize and
prepare immediates for NEON logic instructions.
(neon_output_logic_immediate): New function. Create asm string
suitable for outputting immediate logic instructions.
(neon_pairwise_reduce): New function. Implement reduction using
pairwise operations.
(neon_expand_vector_init): New function. Expand a (possibly
non-constant) vector initialization.
(neon_vector_mem_operand): New function. Memory operands supported
for quad-word loads/stores to/from ARM or NEON registers. Don't
allow base+offset addressing for core regs.
(neon_struct_mem_operand): New function. Valid mems for NEON
structure moves.
(coproc_secondary_reload_class): Enable NEON registers to be loaded
from neon_vector_mem_operand addresses without a secondary register.
(add_minipool_forward_ref): Handle >8-byte minipool entries.
(add_minipool_backward_ref): Likewise.
(dump_minipool): Likewise.
(push_minipool_fix): Likewise.
(output_move_quad): New function. Output quad-word moves, loads and
stores using ARM registers.
(output_move_vfp): Add support for vectors in VFP (NEON) D
registers.
(output_move_neon): Output a NEON load/store to/from a quadword
register.
(arm_print_operand): Implement new codes:
- 'c' for unadorned integers (without a # sign).
- 'J', 'K' for reg+2/reg+3, reg+3/reg+2 in little/big-endian
mode.
- 'e', 'f' for the low and high D parts of a NEON Q register.
- 'q' outputs a NEON Q register.
- 'h' outputs ranges of D registers for VLDM/VSTM etc.
- 'T' prints NEON opcode features from a coded bitmask.
- 'F' is similar to T, but signed/unsigned codes both print as
'i'.
- 't' is similar to T, but 'u' is printed instead of 'p'.
- 'O' prints 'r' if NEON instruction should perform rounding (as
specified by bitmask), else prints nothing.
- '#' is a punctuation character to stop operand numbers from
running together with following digits in the assembler
strings for instructions (when using mode attributes).
(arm_assemble_integer): Handle extra NEON vector modes. Permute
constant vectors in big-endian mode, where necessary.
(arm_hard_regno_mode_ok): Allow vectors in VFP/NEON registers.
Handle EI, OI, CI, XI modes.
(ashlv4hi3, ashlv2si3, lshrv4hi3, lshrv2si3, ashrv4hi3)
(ashrv2si3): Rename IWMMXT2_BUILTINs to...
(ashlv4hi3_iwmmxt, ashlv2si3_iwmmxt, lshrv4hi3_iwmmxt)
(lshrv2si3_iwmmxt, ashrv4hi3_iwmmxt, ashrv2si3_iwmmxt): New names.
(neon_builtin_type_bits): Add enumeration, one bit for each vector
type.
(v8qi_UP, v4hi_UP, v2si_UP, v2sf_UP, di_UP, v16qi_UP, v8hi_UP)
(v4si_UP, v4sf_UP, v2di_UP, ti_UP, ei_UP, oi_UP, UP): Define macros
to turn v8qi, etc. into bits defined above.
(neon_itype): New enumeration. Classifications of NEON builtins.
(neon_builtin_datum): Define struct. Contains information about
a single builtin (with multiple modes).
(CF): Define helper macro for...
(VAR1...VAR10): Define builtins with a type, name and 1-10 different
modes.
(neon_builtin_data): New array. Define information about builtins
for use during initialization/expansion.
(arm_init_neon_builtins): New function.
(arm_init_builtins): Call arm_init_neon_builtins if TARGET_NEON is
true.
(neon_builtin_compare): New function.
(locate_neon_builtin_icode): New function. Find an insn code for a
builtin given a function code for that builtin. Also return type of
builtin (NEON_BINOP, NEON_UNOP etc.).
(builtin_arg): New enumeration. Types of arguments for builtins.
(arm_expand_neon_args): New function. Expand a generic NEON builtin.
Takes a variable argument list of builtin_arg types, terminated by
NEON_ARG_STOP.
(arm_expand_neon_builtin): New function. Expand a NEON builtin.
(neon_reinterpret): New function. Expand NEON reinterpret intrinsic.
(neon_emit_pair_result_insn): New function. Support returning pairs
of vectors via a pointer.
(neon_disambiguate_copy): New function. Set up operands for a
multi-word copy such that registers do not get clobbered.
(arm_expand_builtin): Call arm_expand_neon_builtin if fcode >=
ARM_BUILTIN_NEON_BASE.
(arm_file_start): Set float-abi attribute for NEON.
(arm_vector_mode_supported_p): Enable NEON vector modes.
(arm_mangle_map_entry): New.
(arm_mangle_map): New.
(arm_mangle_vector_type): New.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_NEON__
when appropriate.
(TARGET_NEON): New macro. Target supports NEON.
(fputype): Add FPUTYPE_NEON.
(UNITS_PER_SIMD_WORD): Define. Allow quad-word registers to be used
for vectorization based on command-line arg.
(NEON_REGNO_OK_FOR_NREGS): Define.
(VALID_NEON_DREG_MODE, VALID_NEON_QREG_MODE)
(VALID_NEON_STRUCT_MODE): Define.
(PRINT_OPERAND_PUNCT_VALID_P): '#' is valid punctuation.
(arm_builtins): Add ARM_BUILTIN_NEON_BASE.
* config/arm/arm.md (VUNSPEC_POOL_16): Insert constant for unspec.
(consttable_16): Add pattern for outputting 16-byte minipool
entries.
(movv2si, movv4hi, movv8qi): Remove blank expanders (redefined in
vec-common.md).
(vec-common.md, neon.md): Include md files.
* config/arm/arm.opt (mvectorize-with-neon-quad): Add option.
* config/arm/constraints.md (constraint "Dn", "Dl", "DL"): Define.
(memory_constraint "Ut", "Un", "Us"): Define.
* config/arm/iwmmxt.md (VMMX, VSHFT): New mode macros.
(MMX_char): New mode attribute.
(addv8qi3, addv4hi3, addv2si3): Remove. Replace with...
(*add<mode>3_iwmmxt): New insn pattern.
(subv8qi3, subv4hi3, subv2si3): Remove. Replace with...
(*sub<mode>3_iwmmxt): New insn pattern.
(mulv4hi3): Rename to...
(*mulv4hi3_iwmmxt): This.
(smaxv8qi3, smaxv4hi3, smaxv2si3, umaxv8qi3, umaxv4hi3)
(umaxv2si3, sminv8qi3, sminv4hi3, sminv2si3, uminv8qi3)
(uminv4hi3, uminv2si3): Remove. Replace with...
(*smax<mode>3_iwmmxt, *umax<mode>3_iwmmxt, *smin<mode>3_iwmmxt)
(*umin<mode>3_iwmmxt): These.
(ashrv4hi3, ashrv2si3, ashrdi3_iwmmxt): Replace with...
(ashr<mode>3_iwmmxt): This new pattern.
(lshrv4hi3, lshrv2si3, lshrdi3_iwmmxt): Replace with...
(lshr<mode>3_iwmmxt): This new pattern.
(ashlv4hi3, ashlv2si3, ashldi3_iwmmxt): Replace with...
(ashl<mode>3_iwmmxt): This new pattern.
* config/arm/neon-docgen.ml: New file. Generate documentation for
intrinsics.
* config/arm/neon-gen.ml: New file. Generate arm_neon.h header.
* config/arm/arm_neon.h: New (autogenerated).
* config/arm/neon-testgen.ml: New file. Generate NEON tests
automatically.
* config/arm/neon.md: New file. Define NEON instructions.
* config/arm/neon.ml: New file. Abstract description of NEON
instructions, used to generate arm_neon.h header, documentation and tests.
* config/arm/t-arm (MD_INCLUDES): Add vec-common.md, neon.md.
* vec-common.md: New file. Shared parts for iWMMXt and NEON vector
support.
* doc/extend.texi (ARM Built-in Functions): Rename and remove
extraneous comma.
(ARM NEON Intrinsics): New subsection.
* doc/arm-neon-intrinsics.texi: New (autogenerated).
gcc/testsuite/
* gcc.dg/vect/vect.exp: Check is-effective-target arm_neon_hw.
* gcc.dg/vect/tree-vect.h: Check for NEON SIMD support.
* lib/gcc-dg.exp (cleanup-saved-temps): Fix comment.
* lib/target-supports.exp (check_effective_target_arm_neon_ok)
(check_effective_target_arm_neon_hw): New.
* gcc.target/arm/neon/neon.exp: New file.
* gcc.target/arm/neon/polytypes.c: New file.
* gcc.target/arm/neon/v*.c (1870 files): New (autogenerated).
Co-Authored-By: Joseph Myers <joseph@codesourcery.com>
Co-Authored-By: Mark Shinwell <shinwell@codesourcery.com>
Co-Authored-By: Paul Brook <paul@codesourcery.com>
From-SVN: r126911
2007-07-25 14:28:31 +02:00
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$(srcdir)/config/arm/vec-common.md \
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2004-08-03 15:27:02 +02:00
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|
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$(srcdir)/config/arm/iwmmxt.md \
|
backport: thumb2.md: New file.
2007-01-03 Paul Brook <paul@codesourcery.com>
Merge from sourcerygxx-4_1.
gcc/
* config/arm/thumb2.md: New file.
* config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Return True for
Thumb-2.
* config/arm/coff.h (JUMP_TABLES_IN_TEXT_SECTION): Ditto.
* config/arm/aout.h (ASM_OUTPUT_ADDR_VEC_ELT): Add !Thumb-2 assertion.
(ASM_OUTPUT_ADDR_DIFF_ELT): Output Thumb-2 jump tables.
* config/arm/aof.h (ASM_OUTPUT_ADDR_DIFF_ELT): Output Thumb-2 jump
tables.
(ASM_OUTPUT_ADDR_VEC_ELT): Add !Thumb-2 assertion.
* config/arm/ieee754-df.S: Use macros for Thumb-2/Unified asm
comptibility.
* config/arm/ieee754-sf.S: Ditto.
* config/arm/arm.c (thumb_base_register_rtx_p): Rename...
(thumb1_base_register_rtx_p): ... to this.
(thumb_index_register_rtx_p): Rename...
(thumb1_index_register_rtx_p): ... to this.
(thumb_output_function_prologue): Rename...
(thumb1_output_function_prologue): ... to this.
(thumb_legitimate_address_p): Rename...
(thumb1_legitimate_address_p): ... to this.
(thumb_rtx_costs): Rename...
(thumb1_rtx_costs): ... to this.
(thumb_compute_save_reg_mask): Rename...
(thumb1_compute_save_reg_mask): ... to this.
(thumb_final_prescan_insn): Rename...
(thumb1_final_prescan_insn): ... to this.
(thumb_expand_epilogue): Rename...
(thumb1_expand_epilogue): ... to this.
(arm_unwind_emit_stm): Rename...
(arm_unwind_emit_sequence): ... to this.
(thumb2_legitimate_index_p, thumb2_legitimate_address_p,
thumb1_compute_save_reg_mask, arm_dwarf_handle_frame_unspec,
thumb2_index_mul_operand, output_move_vfp, arm_shift_nmem,
arm_save_coproc_regs, thumb_set_frame_pointer, arm_print_condition,
thumb2_final_prescan_insn, thumb2_asm_output_opcode, arm_output_shift,
thumb2_output_casesi): New functions.
(TARGET_DWARF_HANDLE_FRAME_UNSPEC): Define.
(FL_THUMB2, FL_NOTM, FL_DIV, FL_FOR_ARCH6T2, FL_FOR_ARCH7,
FL_FOR_ARCH7A, FL_FOR_ARCH7R, FL_FOR_ARCH7M, ARM_LSL_NAME,
THUMB2_WORK_REGS): Define.
(arm_arch_notm, arm_arch_thumb2, arm_arch_hwdiv, arm_condexec_count,
arm_condexec_mask, arm_condexec_masklen)): New variables.
(all_architectures): Add armv6t2, armv7, armv7a, armv7r and armv7m.
(arm_override_options): Check new CPU capabilities.
Set new architecture flag variables.
(arm_isr_value): Handle v7m interrupt functions.
(user_return_insn): Return 0 for v7m interrupt functions. Handle
Thumb-2.
(const_ok_for_arm): Handle Thumb-2 constants.
(arm_gen_constant): Ditto. Use movw when available.
(arm_function_ok_for_sibcall): Return false for v7m interrupt
functions.
(legitimize_pic_address, arm_call_tls_get_addr): Handle Thumb-2.
(thumb_find_work_register, arm_load_pic_register,
legitimize_tls_address, arm_address_cost, load_multiple_sequence,
emit_ldm_seq, emit_stm_seq, arm_select_cc_mode, get_jump_table_size,
print_multi_reg, output_mov_long_double_fpa_from_arm,
output_mov_long_double_arm_from_fpa, output_mov_double_fpa_from_arm,
output_mov_double_fpa_from_arm, output_move_double,
arm_compute_save_reg_mask, arm_compute_save_reg0_reg12_mask,
output_return_instruction, arm_output_function_prologue,
arm_output_epilogue, arm_get_frame_offsets, arm_regno_class,
arm_output_mi_thunk, thumb_set_return_address): Ditto.
(arm_expand_prologue): Handle Thumb-2. Use arm_save_coproc_regs.
(arm_coproc_mem_operand): Allow POST_INC/PRE_DEC.
(arithmetic_instr, shift_op): Use arm_shift_nmem.
(arm_print_operand): Use arm_print_condition. Handle '(', ')', '.',
'!' and 'L'.
(arm_final_prescan_insn): Use extract_constrain_insn_cached.
(thumb_expand_prologue): Use thumb_set_frame_pointer.
(arm_file_start): Output directive for unified syntax.
(arm_unwind_emit_set): Handle stack alignment instruction.
* config/arm/lib1funcs.asm: Remove default for __ARM_ARCH__.
Add v6t2, v7, v7a, v7r and v7m.
(RETLDM): Add Thumb-2 code.
(do_it, shift1, do_push, do_pop, COND, THUMB_SYNTAX): New macros.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __thumb2__.
(TARGET_THUMB1, TARGET_32BIT, TARGET_THUMB2, TARGET_DSP_MULTIPLY,
TARGET_INT_SIMD, TARGET_UNIFIED_ASM, ARM_FT_STACKALIGN, IS_STACKALIGN,
THUMB2_TRAMPOLINE_TEMPLATE, TRAMPOLINE_ADJUST_ADDRESS,
ASM_OUTPUT_OPCODE, THUMB2_GO_IF_LEGITIMATE_ADDRESS,
THUMB2_LEGITIMIZE_ADDRESS, CASE_VECTOR_PC_RELATIVE,
CASE_VECTOR_SHORTEN_MODE, ADDR_VEC_ALIGN, ASM_OUTPUT_CASE_END,
ADJUST_INSN_LENGTH): Define.
(TARGET_REALLY_IWMMXT, TARGET_IWMMXT_ABI, CONDITIONAL_REGISTER_USAGE,
STATIC_CHAIN_REGNUM, HARD_REGNO_NREGS, INDEX_REG_CLASS,
BASE_REG_CLASS, MODE_BASE_REG_CLASS, SMALL_REGISTER_CLASSES,
PREFERRED_RELOAD_CLASS, SECONDARY_OUTPUT_RELOAD_CLASS,
SECONDARY_INPUT_RELOAD_CLASS, LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P,
TRAMPOLINE_SIZE, INITIALIZE_TRAMPOLINE, HAVE_PRE_INCREMENT,
HAVE_POST_DECREMENT, HAVE_PRE_DECREMENT, HAVE_PRE_MODIFY_DISP,
HAVE_POST_MODIFY_DISP, HAVE_PRE_MODIFY_REG, HAVE_POST_MODIFY_REG,
REGNO_MODE_OK_FOR_BASE_P, LEGITIMATE_CONSTANT_P,
REG_MODE_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P, GO_IF_LEGITIMATE_ADDRESS,
LEGITIMIZE_ADDRESS, THUMB2_LEGITIMIZE_ADDRESS,
GO_IF_MODE_DEPENDENT_ADDRESS, MEMORY_MOVE_COST, BRANCH_COST,
ASM_APP_OFF, ASM_OUTPUT_CASE_LABEL, ARM_DECLARE_FUNCTION_NAME,
FINAL_PRESCAN_INSN, PRINT_OPERAND_PUNCT_VALID_P,
PRINT_OPERAND_ADDRESS): Adjust for Thumb-2.
(arm_arch_notm, arm_arch_thumb2, arm_arch_hwdiv): New declarations.
* config/arm/arm-cores.def: Add arm1156t2-s, cortex-a8, cortex-r4 and
cortex-m3.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm-protos.h: Update prototypes.
* config/arm/vfp.md: Enable patterns for Thumb-2.
(arm_movsi_vfp): Add movw alternative. Use output_move_vfp.
(arm_movdi_vfp, movsf_vfp, movdf_vfp): Use output_move_vfp.
(thumb2_movsi_vfp, thumb2_movdi_vfp, thumb2_movsf_vfp,
thumb2_movdf_vfp, thumb2_movsfcc_vfp, thumb2_movdfcc_vfp): New.
* config/arm/libunwind.S: Add Thumb-2 code.
* config/arm/constraints.md: Update include Thumb-2.
* config/arm/ieee754-sf.S: Add Thumb-2/Unified asm support.
* config/arm/ieee754-df.S: Ditto.
* config/arm/bpabi.S: Ditto.
* config/arm/t-arm (MD_INCLUDES): Add thumb2.md.
* config/arm/predicates.md (low_register_operand,
low_reg_or_int_operand, thumb_16bit_operator): New.
(thumb_cmp_operand, thumb_cmpneg_operand): Rename...
(thumb1_cmp_operand, thumb1_cmpneg_operand): ... to this.
* config/arm/t-arm-elf: Add armv7 multilib.
* config/arm/arm.md: Update patterns for Thumb-2 and Unified asm.
Include thumb2.md.
(UNSPEC_STACK_ALIGN, ce_count): New.
(arm_incscc, arm_decscc, arm_umaxsi3, arm_uminsi3,
arm_zero_extendsidi2, arm_zero_extendqidi2): New
insns/expanders.
* config/arm/fpa.md: Update patterns for Thumb-2 and Unified asm.
(thumb2_movsf_fpa, thumb2_movdf_fpa, thumb2_movxf_fpa,
thumb2_movsfcc_fpa, thumb2_movdfcc_fpa): New insns.
* config/arm/cirrus.md: Update patterns for Thumb-2 and Unified asm.
(cirrus_thumb2_movdi, cirrus_thumb2_movsi_insn,
thumb2_cirrus_movsf_hard_insn, thumb2_cirrus_movdf_hard_insn): New
insns.
* doc/extend.texi: Document ARMv7-M interrupt functions.
* doc/invoke.texi: Document Thumb-2 new cores+architectures.
From-SVN: r120408
2007-01-04 00:48:10 +01:00
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$(srcdir)/config/arm/vfp.md \
|
Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi.
gcc/
* Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi.
* config.gcc (arm*-*-*): Add arm_neon.h to extra headers.
(with_fpu): Allow --with-fpu=neon.
* config/arm/aof.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/aout.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/arm-modes.def (EI, OI, CI, XI): New modes.
* config/arm/arm-protos.h (neon_immediate_valid_for_move)
(neon_immediate_valid_for_logic, neon_output_logic_immediate)
(neon_pairwise_reduce, neon_expand_vector_init, neon_reinterpret)
(neon_emit_pair_result_insn, neon_disambiguate_copy)
(neon_vector_mem_operand, neon_struct_mem_operand, output_move_quad)
(output_move_neon): Add prototypes.
* config/arm/arm.c (FL_NEON): New flag for NEON processor capability.
(all_fpus): Add FPUTYPE_NEON.
(fp_model_for_fpu): Add NEON field.
(arm_return_in_memory): Return vectors <= 16 bytes in ARM registers.
(arm_arg_partial_bytes): Allow NEON vectors to be passed partially
in registers.
(arm_legitimate_address_p): Don't support fancy addressing for NEON
structure moves.
(thumb2_legitimate_address_p): Likewise.
(neon_valid_immediate): Recognize and prepare constants suitable for
NEON instructions.
(neon_immediate_valid_for_move): New function. Recognize and prepare
immediates for NEON move instructions.
(neon_immediate_valid_for_logic): New function. Recognize and
prepare immediates for NEON logic instructions.
(neon_output_logic_immediate): New function. Create asm string
suitable for outputting immediate logic instructions.
(neon_pairwise_reduce): New function. Implement reduction using
pairwise operations.
(neon_expand_vector_init): New function. Expand a (possibly
non-constant) vector initialization.
(neon_vector_mem_operand): New function. Memory operands supported
for quad-word loads/stores to/from ARM or NEON registers. Don't
allow base+offset addressing for core regs.
(neon_struct_mem_operand): New function. Valid mems for NEON
structure moves.
(coproc_secondary_reload_class): Enable NEON registers to be loaded
from neon_vector_mem_operand addresses without a secondary register.
(add_minipool_forward_ref): Handle >8-byte minipool entries.
(add_minipool_backward_ref): Likewise.
(dump_minipool): Likewise.
(push_minipool_fix): Likewise.
(output_move_quad): New function. Output quad-word moves, loads and
stores using ARM registers.
(output_move_vfp): Add support for vectors in VFP (NEON) D
registers.
(output_move_neon): Output a NEON load/store to/from a quadword
register.
(arm_print_operand): Implement new codes:
- 'c' for unadorned integers (without a # sign).
- 'J', 'K' for reg+2/reg+3, reg+3/reg+2 in little/big-endian
mode.
- 'e', 'f' for the low and high D parts of a NEON Q register.
- 'q' outputs a NEON Q register.
- 'h' outputs ranges of D registers for VLDM/VSTM etc.
- 'T' prints NEON opcode features from a coded bitmask.
- 'F' is similar to T, but signed/unsigned codes both print as
'i'.
- 't' is similar to T, but 'u' is printed instead of 'p'.
- 'O' prints 'r' if NEON instruction should perform rounding (as
specified by bitmask), else prints nothing.
- '#' is a punctuation character to stop operand numbers from
running together with following digits in the assembler
strings for instructions (when using mode attributes).
(arm_assemble_integer): Handle extra NEON vector modes. Permute
constant vectors in big-endian mode, where necessary.
(arm_hard_regno_mode_ok): Allow vectors in VFP/NEON registers.
Handle EI, OI, CI, XI modes.
(ashlv4hi3, ashlv2si3, lshrv4hi3, lshrv2si3, ashrv4hi3)
(ashrv2si3): Rename IWMMXT2_BUILTINs to...
(ashlv4hi3_iwmmxt, ashlv2si3_iwmmxt, lshrv4hi3_iwmmxt)
(lshrv2si3_iwmmxt, ashrv4hi3_iwmmxt, ashrv2si3_iwmmxt): New names.
(neon_builtin_type_bits): Add enumeration, one bit for each vector
type.
(v8qi_UP, v4hi_UP, v2si_UP, v2sf_UP, di_UP, v16qi_UP, v8hi_UP)
(v4si_UP, v4sf_UP, v2di_UP, ti_UP, ei_UP, oi_UP, UP): Define macros
to turn v8qi, etc. into bits defined above.
(neon_itype): New enumeration. Classifications of NEON builtins.
(neon_builtin_datum): Define struct. Contains information about
a single builtin (with multiple modes).
(CF): Define helper macro for...
(VAR1...VAR10): Define builtins with a type, name and 1-10 different
modes.
(neon_builtin_data): New array. Define information about builtins
for use during initialization/expansion.
(arm_init_neon_builtins): New function.
(arm_init_builtins): Call arm_init_neon_builtins if TARGET_NEON is
true.
(neon_builtin_compare): New function.
(locate_neon_builtin_icode): New function. Find an insn code for a
builtin given a function code for that builtin. Also return type of
builtin (NEON_BINOP, NEON_UNOP etc.).
(builtin_arg): New enumeration. Types of arguments for builtins.
(arm_expand_neon_args): New function. Expand a generic NEON builtin.
Takes a variable argument list of builtin_arg types, terminated by
NEON_ARG_STOP.
(arm_expand_neon_builtin): New function. Expand a NEON builtin.
(neon_reinterpret): New function. Expand NEON reinterpret intrinsic.
(neon_emit_pair_result_insn): New function. Support returning pairs
of vectors via a pointer.
(neon_disambiguate_copy): New function. Set up operands for a
multi-word copy such that registers do not get clobbered.
(arm_expand_builtin): Call arm_expand_neon_builtin if fcode >=
ARM_BUILTIN_NEON_BASE.
(arm_file_start): Set float-abi attribute for NEON.
(arm_vector_mode_supported_p): Enable NEON vector modes.
(arm_mangle_map_entry): New.
(arm_mangle_map): New.
(arm_mangle_vector_type): New.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_NEON__
when appropriate.
(TARGET_NEON): New macro. Target supports NEON.
(fputype): Add FPUTYPE_NEON.
(UNITS_PER_SIMD_WORD): Define. Allow quad-word registers to be used
for vectorization based on command-line arg.
(NEON_REGNO_OK_FOR_NREGS): Define.
(VALID_NEON_DREG_MODE, VALID_NEON_QREG_MODE)
(VALID_NEON_STRUCT_MODE): Define.
(PRINT_OPERAND_PUNCT_VALID_P): '#' is valid punctuation.
(arm_builtins): Add ARM_BUILTIN_NEON_BASE.
* config/arm/arm.md (VUNSPEC_POOL_16): Insert constant for unspec.
(consttable_16): Add pattern for outputting 16-byte minipool
entries.
(movv2si, movv4hi, movv8qi): Remove blank expanders (redefined in
vec-common.md).
(vec-common.md, neon.md): Include md files.
* config/arm/arm.opt (mvectorize-with-neon-quad): Add option.
* config/arm/constraints.md (constraint "Dn", "Dl", "DL"): Define.
(memory_constraint "Ut", "Un", "Us"): Define.
* config/arm/iwmmxt.md (VMMX, VSHFT): New mode macros.
(MMX_char): New mode attribute.
(addv8qi3, addv4hi3, addv2si3): Remove. Replace with...
(*add<mode>3_iwmmxt): New insn pattern.
(subv8qi3, subv4hi3, subv2si3): Remove. Replace with...
(*sub<mode>3_iwmmxt): New insn pattern.
(mulv4hi3): Rename to...
(*mulv4hi3_iwmmxt): This.
(smaxv8qi3, smaxv4hi3, smaxv2si3, umaxv8qi3, umaxv4hi3)
(umaxv2si3, sminv8qi3, sminv4hi3, sminv2si3, uminv8qi3)
(uminv4hi3, uminv2si3): Remove. Replace with...
(*smax<mode>3_iwmmxt, *umax<mode>3_iwmmxt, *smin<mode>3_iwmmxt)
(*umin<mode>3_iwmmxt): These.
(ashrv4hi3, ashrv2si3, ashrdi3_iwmmxt): Replace with...
(ashr<mode>3_iwmmxt): This new pattern.
(lshrv4hi3, lshrv2si3, lshrdi3_iwmmxt): Replace with...
(lshr<mode>3_iwmmxt): This new pattern.
(ashlv4hi3, ashlv2si3, ashldi3_iwmmxt): Replace with...
(ashl<mode>3_iwmmxt): This new pattern.
* config/arm/neon-docgen.ml: New file. Generate documentation for
intrinsics.
* config/arm/neon-gen.ml: New file. Generate arm_neon.h header.
* config/arm/arm_neon.h: New (autogenerated).
* config/arm/neon-testgen.ml: New file. Generate NEON tests
automatically.
* config/arm/neon.md: New file. Define NEON instructions.
* config/arm/neon.ml: New file. Abstract description of NEON
instructions, used to generate arm_neon.h header, documentation and tests.
* config/arm/t-arm (MD_INCLUDES): Add vec-common.md, neon.md.
* vec-common.md: New file. Shared parts for iWMMXt and NEON vector
support.
* doc/extend.texi (ARM Built-in Functions): Rename and remove
extraneous comma.
(ARM NEON Intrinsics): New subsection.
* doc/arm-neon-intrinsics.texi: New (autogenerated).
gcc/testsuite/
* gcc.dg/vect/vect.exp: Check is-effective-target arm_neon_hw.
* gcc.dg/vect/tree-vect.h: Check for NEON SIMD support.
* lib/gcc-dg.exp (cleanup-saved-temps): Fix comment.
* lib/target-supports.exp (check_effective_target_arm_neon_ok)
(check_effective_target_arm_neon_hw): New.
* gcc.target/arm/neon/neon.exp: New file.
* gcc.target/arm/neon/polytypes.c: New file.
* gcc.target/arm/neon/v*.c (1870 files): New (autogenerated).
Co-Authored-By: Joseph Myers <joseph@codesourcery.com>
Co-Authored-By: Mark Shinwell <shinwell@codesourcery.com>
Co-Authored-By: Paul Brook <paul@codesourcery.com>
From-SVN: r126911
2007-07-25 14:28:31 +02:00
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$(srcdir)/config/arm/neon.md \
|
backport: thumb2.md: New file.
2007-01-03 Paul Brook <paul@codesourcery.com>
Merge from sourcerygxx-4_1.
gcc/
* config/arm/thumb2.md: New file.
* config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Return True for
Thumb-2.
* config/arm/coff.h (JUMP_TABLES_IN_TEXT_SECTION): Ditto.
* config/arm/aout.h (ASM_OUTPUT_ADDR_VEC_ELT): Add !Thumb-2 assertion.
(ASM_OUTPUT_ADDR_DIFF_ELT): Output Thumb-2 jump tables.
* config/arm/aof.h (ASM_OUTPUT_ADDR_DIFF_ELT): Output Thumb-2 jump
tables.
(ASM_OUTPUT_ADDR_VEC_ELT): Add !Thumb-2 assertion.
* config/arm/ieee754-df.S: Use macros for Thumb-2/Unified asm
comptibility.
* config/arm/ieee754-sf.S: Ditto.
* config/arm/arm.c (thumb_base_register_rtx_p): Rename...
(thumb1_base_register_rtx_p): ... to this.
(thumb_index_register_rtx_p): Rename...
(thumb1_index_register_rtx_p): ... to this.
(thumb_output_function_prologue): Rename...
(thumb1_output_function_prologue): ... to this.
(thumb_legitimate_address_p): Rename...
(thumb1_legitimate_address_p): ... to this.
(thumb_rtx_costs): Rename...
(thumb1_rtx_costs): ... to this.
(thumb_compute_save_reg_mask): Rename...
(thumb1_compute_save_reg_mask): ... to this.
(thumb_final_prescan_insn): Rename...
(thumb1_final_prescan_insn): ... to this.
(thumb_expand_epilogue): Rename...
(thumb1_expand_epilogue): ... to this.
(arm_unwind_emit_stm): Rename...
(arm_unwind_emit_sequence): ... to this.
(thumb2_legitimate_index_p, thumb2_legitimate_address_p,
thumb1_compute_save_reg_mask, arm_dwarf_handle_frame_unspec,
thumb2_index_mul_operand, output_move_vfp, arm_shift_nmem,
arm_save_coproc_regs, thumb_set_frame_pointer, arm_print_condition,
thumb2_final_prescan_insn, thumb2_asm_output_opcode, arm_output_shift,
thumb2_output_casesi): New functions.
(TARGET_DWARF_HANDLE_FRAME_UNSPEC): Define.
(FL_THUMB2, FL_NOTM, FL_DIV, FL_FOR_ARCH6T2, FL_FOR_ARCH7,
FL_FOR_ARCH7A, FL_FOR_ARCH7R, FL_FOR_ARCH7M, ARM_LSL_NAME,
THUMB2_WORK_REGS): Define.
(arm_arch_notm, arm_arch_thumb2, arm_arch_hwdiv, arm_condexec_count,
arm_condexec_mask, arm_condexec_masklen)): New variables.
(all_architectures): Add armv6t2, armv7, armv7a, armv7r and armv7m.
(arm_override_options): Check new CPU capabilities.
Set new architecture flag variables.
(arm_isr_value): Handle v7m interrupt functions.
(user_return_insn): Return 0 for v7m interrupt functions. Handle
Thumb-2.
(const_ok_for_arm): Handle Thumb-2 constants.
(arm_gen_constant): Ditto. Use movw when available.
(arm_function_ok_for_sibcall): Return false for v7m interrupt
functions.
(legitimize_pic_address, arm_call_tls_get_addr): Handle Thumb-2.
(thumb_find_work_register, arm_load_pic_register,
legitimize_tls_address, arm_address_cost, load_multiple_sequence,
emit_ldm_seq, emit_stm_seq, arm_select_cc_mode, get_jump_table_size,
print_multi_reg, output_mov_long_double_fpa_from_arm,
output_mov_long_double_arm_from_fpa, output_mov_double_fpa_from_arm,
output_mov_double_fpa_from_arm, output_move_double,
arm_compute_save_reg_mask, arm_compute_save_reg0_reg12_mask,
output_return_instruction, arm_output_function_prologue,
arm_output_epilogue, arm_get_frame_offsets, arm_regno_class,
arm_output_mi_thunk, thumb_set_return_address): Ditto.
(arm_expand_prologue): Handle Thumb-2. Use arm_save_coproc_regs.
(arm_coproc_mem_operand): Allow POST_INC/PRE_DEC.
(arithmetic_instr, shift_op): Use arm_shift_nmem.
(arm_print_operand): Use arm_print_condition. Handle '(', ')', '.',
'!' and 'L'.
(arm_final_prescan_insn): Use extract_constrain_insn_cached.
(thumb_expand_prologue): Use thumb_set_frame_pointer.
(arm_file_start): Output directive for unified syntax.
(arm_unwind_emit_set): Handle stack alignment instruction.
* config/arm/lib1funcs.asm: Remove default for __ARM_ARCH__.
Add v6t2, v7, v7a, v7r and v7m.
(RETLDM): Add Thumb-2 code.
(do_it, shift1, do_push, do_pop, COND, THUMB_SYNTAX): New macros.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __thumb2__.
(TARGET_THUMB1, TARGET_32BIT, TARGET_THUMB2, TARGET_DSP_MULTIPLY,
TARGET_INT_SIMD, TARGET_UNIFIED_ASM, ARM_FT_STACKALIGN, IS_STACKALIGN,
THUMB2_TRAMPOLINE_TEMPLATE, TRAMPOLINE_ADJUST_ADDRESS,
ASM_OUTPUT_OPCODE, THUMB2_GO_IF_LEGITIMATE_ADDRESS,
THUMB2_LEGITIMIZE_ADDRESS, CASE_VECTOR_PC_RELATIVE,
CASE_VECTOR_SHORTEN_MODE, ADDR_VEC_ALIGN, ASM_OUTPUT_CASE_END,
ADJUST_INSN_LENGTH): Define.
(TARGET_REALLY_IWMMXT, TARGET_IWMMXT_ABI, CONDITIONAL_REGISTER_USAGE,
STATIC_CHAIN_REGNUM, HARD_REGNO_NREGS, INDEX_REG_CLASS,
BASE_REG_CLASS, MODE_BASE_REG_CLASS, SMALL_REGISTER_CLASSES,
PREFERRED_RELOAD_CLASS, SECONDARY_OUTPUT_RELOAD_CLASS,
SECONDARY_INPUT_RELOAD_CLASS, LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P,
TRAMPOLINE_SIZE, INITIALIZE_TRAMPOLINE, HAVE_PRE_INCREMENT,
HAVE_POST_DECREMENT, HAVE_PRE_DECREMENT, HAVE_PRE_MODIFY_DISP,
HAVE_POST_MODIFY_DISP, HAVE_PRE_MODIFY_REG, HAVE_POST_MODIFY_REG,
REGNO_MODE_OK_FOR_BASE_P, LEGITIMATE_CONSTANT_P,
REG_MODE_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P, GO_IF_LEGITIMATE_ADDRESS,
LEGITIMIZE_ADDRESS, THUMB2_LEGITIMIZE_ADDRESS,
GO_IF_MODE_DEPENDENT_ADDRESS, MEMORY_MOVE_COST, BRANCH_COST,
ASM_APP_OFF, ASM_OUTPUT_CASE_LABEL, ARM_DECLARE_FUNCTION_NAME,
FINAL_PRESCAN_INSN, PRINT_OPERAND_PUNCT_VALID_P,
PRINT_OPERAND_ADDRESS): Adjust for Thumb-2.
(arm_arch_notm, arm_arch_thumb2, arm_arch_hwdiv): New declarations.
* config/arm/arm-cores.def: Add arm1156t2-s, cortex-a8, cortex-r4 and
cortex-m3.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm-protos.h: Update prototypes.
* config/arm/vfp.md: Enable patterns for Thumb-2.
(arm_movsi_vfp): Add movw alternative. Use output_move_vfp.
(arm_movdi_vfp, movsf_vfp, movdf_vfp): Use output_move_vfp.
(thumb2_movsi_vfp, thumb2_movdi_vfp, thumb2_movsf_vfp,
thumb2_movdf_vfp, thumb2_movsfcc_vfp, thumb2_movdfcc_vfp): New.
* config/arm/libunwind.S: Add Thumb-2 code.
* config/arm/constraints.md: Update include Thumb-2.
* config/arm/ieee754-sf.S: Add Thumb-2/Unified asm support.
* config/arm/ieee754-df.S: Ditto.
* config/arm/bpabi.S: Ditto.
* config/arm/t-arm (MD_INCLUDES): Add thumb2.md.
* config/arm/predicates.md (low_register_operand,
low_reg_or_int_operand, thumb_16bit_operator): New.
(thumb_cmp_operand, thumb_cmpneg_operand): Rename...
(thumb1_cmp_operand, thumb1_cmpneg_operand): ... to this.
* config/arm/t-arm-elf: Add armv7 multilib.
* config/arm/arm.md: Update patterns for Thumb-2 and Unified asm.
Include thumb2.md.
(UNSPEC_STACK_ALIGN, ce_count): New.
(arm_incscc, arm_decscc, arm_umaxsi3, arm_uminsi3,
arm_zero_extendsidi2, arm_zero_extendqidi2): New
insns/expanders.
* config/arm/fpa.md: Update patterns for Thumb-2 and Unified asm.
(thumb2_movsf_fpa, thumb2_movdf_fpa, thumb2_movxf_fpa,
thumb2_movsfcc_fpa, thumb2_movdfcc_fpa): New insns.
* config/arm/cirrus.md: Update patterns for Thumb-2 and Unified asm.
(cirrus_thumb2_movdi, cirrus_thumb2_movsi_insn,
thumb2_cirrus_movsf_hard_insn, thumb2_cirrus_movdf_hard_insn): New
insns.
* doc/extend.texi: Document ARMv7-M interrupt functions.
* doc/invoke.texi: Document Thumb-2 new cores+architectures.
From-SVN: r120408
2007-01-04 00:48:10 +01:00
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$(srcdir)/config/arm/thumb2.md
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2004-08-03 15:27:02 +02:00
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arm.md: Include predicates.md.
* arm.md: Include predicates.md.
* predicates.md: New file.
* arm.c (s_register_operand, arm_hard_register_operand)
(arm_general_register_operand, f_register_operand, reg_or_int_operand)
(arm_immediate_operand, arm_neg_immediate_operand)
(arm_not_immediate_operand, arm_rhs_operand, arm_rhsm_operand)
(arm_add_operand, arm_addimm_operand, arm_not_operand)
(offsettable_memory_operand, alignable_memory_operand)
(arm_reload_memory_operand, arm_float_rhs_operand)
(arm_float_add_operand, vfp_compare_operand, arm_float_compare_operand)
(index_operand, shiftable_operator, logical_binary_operator)
(shift_operator, equality_operator, arm_comparison_operator)
(minmax_operator, cc_register, dominant_cc_register)
(arm_extendqisi_mem_op, power_of_two_operand, nonimmediate_di_operand)
(di_operand, nonimmediate_soft_df_operand, soft_df_operand)
(const_shift_operand, load_multiple_operation)
(store_multiple_operation, multi_register_push, thumb_cmp_operand)
(thumb_cmpneg_operand, thumb_cbrch_target_operand)
(cirrus_register_operand, cirrus_fp_register)
(cirrus_shift_const): Delete, replaced with equivalents in
predicates.md.
(shift_op): Handle ROTATE.
* arm-protos.h: Delete declarations for above.
* arm.h (PREDICATE_CODES, SPECIAL_MODE_PREDICATES): Delete.
* t-arm (MD_INCLUDES): Add predicates.md.
(s-preds): Depends on MD_INCLUDES.
From-SVN: r86512
2004-08-24 22:16:41 +02:00
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s-config s-conditions s-flags s-codes s-constants s-emit s-recog s-preds \
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2004-08-03 15:27:02 +02:00
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s-opinit s-extract s-peep s-attr s-attrtab s-output: $(MD_INCLUDES)
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$(srcdir)/config/arm/arm-tune.md: $(srcdir)/config/arm/gentune.sh \
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$(srcdir)/config/arm/arm-cores.def
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$(SHELL) $(srcdir)/config/arm/gentune.sh \
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$(srcdir)/config/arm/arm-cores.def > \
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$(srcdir)/config/arm/arm-tune.md
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2007-11-05 18:13:46 +01:00
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sourcebuild.texi, [...]: Revert automatic dependency patch.
gcc/
* doc/sourcebuild.texi, doc/install.texi, configure, aclocal.m4,
configure.ac, Makefile.in, config/t-darwin, config/m32c/t-m32c,
config/spu/t-spu-elf, config/i386/t-interix,
config/i386/t-cygming, config/i386/x-i386, config/i386/t-cygwin,
config/i386/x-darwin, config/i386/x-mingw32,
config/i386/t-netware, config/i386/x-cygwin, config/i386/t-nwld,
config/sh/t-sh, config/sh/t-symbian, config/x-linux,
config/t-sol2, config/x-hpux, config/x-darwin, config/ia64/t-ia64,
config/x-solaris, config/t-vxworks, config/m68k/t-uclinux,
config/rs6000/x-rs6000, config/rs6000/x-darwin64,
config/rs6000/x-darwin, config/rs6000/t-rs6000,
config/score/t-score-elf, config/arm/t-strongarm-pe,
config/arm/t-pe, config/arm/t-arm, config/arm/t-wince-pe,
config/v850/t-v850, config/v850/t-v850e, config/bfin/t-bfin-linux:
Revert automatic dependency patch.
gcc/java/
* Make-lang.in: Revert automatic dependency patch.
gcc/objc/
* Make-lang.in: Revert automatic dependency patch.
gcc/objcp/
* Make-lang.in: Revert automatic dependency patch.
gcc/cp/
* Make-lang.in: Revert automatic dependency patch.
gcc/fortran/
* Make-lang.in: Revert automatic dependency patch.
From-SVN: r133652
2008-03-27 20:20:18 +01:00
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arm-c.o: $(srcdir)/config/arm/arm-c.c $(CONFIG_H) $(SYSTEM_H) \
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coretypes.h $(TM_H) $(TREE_H) output.h $(C_COMMON_H)
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$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/arm/arm-c.c
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