i386: Add combiner splitter to optimize V2SImode memory rotation [PR96166]
Since the x86 backend enabled V2SImode vectorization (with TARGET_MMX_WITH_SSE), slp vectorization can kick in and emit movq (%rdi), %xmm1 pshufd $225, %xmm1, %xmm0 movq %xmm0, (%rdi) instead of rolq $32, (%rdi) we used to emit (or emit when slp vectorization is disabled). I think the rotate is both smaller and faster, so this patch adds a combiner splitter to optimize that back. 2021-02-13 Jakub Jelinek <jakub@redhat.com> PR target/96166 * config/i386/mmx.md (*mmx_pshufd_1): Add a combine splitter for swap of V2SImode elements in memory into DImode memory rotate by 32. * gcc.target/i386/pr96166.c: New test.
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(set_attr "length_immediate" "1")
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(set_attr "mode" "TI")])
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;; Optimize V2SImode load from memory, swapping the elements and
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;; storing back into the memory into DImode rotate of the memory by 32.
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(define_split
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[(set (match_operand:V2SI 0 "memory_operand")
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(vec_select:V2SI (match_dup 0)
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(parallel [(const_int 1) (const_int 0)])))]
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"TARGET_64BIT && (TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())"
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[(set (match_dup 0)
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(rotate:DI (match_dup 0) (const_int 32)))]
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"operands[0] = adjust_address (operands[0], DImode, 0);")
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(define_insn "mmx_pswapdv2si2"
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[(set (match_operand:V2SI 0 "register_operand" "=y,Yv")
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(vec_select:V2SI
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gcc/testsuite/gcc.target/i386/pr96166.c
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gcc/testsuite/gcc.target/i386/pr96166.c
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/* PR target/96166 */
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-options "-O3 -mtune=generic -masm=att" } */
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/* { dg-final { scan-assembler "rolq\\s\\\$32, \\\(%\[re]di\\\)" } } */
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static inline void
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swap (int *x, int *y)
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{
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int tmp = *x;
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*x = *y;
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*y = tmp;
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}
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void
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bar (int (*x)[2])
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{
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int y[2];
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__builtin_memcpy (&y, x, sizeof *x);
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swap (&y[0], &y[1]);
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__builtin_memcpy (x, &y, sizeof *x);
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}
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