0f3a743b68
Since the x86 backend enabled V2SImode vectorization (with
TARGET_MMX_WITH_SSE), slp vectorization can kick in and emit
movq (%rdi), %xmm1
pshufd $225, %xmm1, %xmm0
movq %xmm0, (%rdi)
instead of
rolq $32, (%rdi)
we used to emit (or emit when slp vectorization is disabled).
I think the rotate is both smaller and faster, so this patch adds
a combiner splitter to optimize that back.
2021-02-13 Jakub Jelinek <jakub@redhat.com>
PR target/96166
* config/i386/mmx.md (*mmx_pshufd_1): Add a combine splitter for
swap of V2SImode elements in memory into DImode memory rotate by 32.
* gcc.target/i386/pr96166.c: New test.
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