[AArch64_be] Don't fold reduction intrinsics.
gcc/ * config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin): Don't fold reduction operations for BYTES_BIG_ENDIAN. From-SVN: r213379
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@ -1,3 +1,9 @@
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2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
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* config/aarch64/aarch64-builtins.c
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(aarch64_gimple_fold_builtin): Don't fold reduction operations for
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BYTES_BIG_ENDIAN.
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2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
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2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
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* config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
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* config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
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@ -1383,6 +1383,20 @@ aarch64_gimple_fold_builtin (gimple_stmt_iterator *gsi)
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tree call = gimple_call_fn (stmt);
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tree call = gimple_call_fn (stmt);
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tree fndecl;
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tree fndecl;
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gimple new_stmt = NULL;
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gimple new_stmt = NULL;
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/* The operations folded below are reduction operations. These are
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defined to leave their result in the 0'th element (from the perspective
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of GCC). The architectural instruction we are folding will leave the
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result in the 0'th element (from the perspective of the architecture).
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For big-endian systems, these perspectives are not aligned.
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It is therefore wrong to perform this fold on big-endian. There
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are some tricks we could play with shuffling, but the mid-end is
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inconsistent in the way it treats reduction operations, so we will
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end up in difficulty. Until we fix the ambiguity - just bail out. */
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if (BYTES_BIG_ENDIAN)
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return false;
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if (call)
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if (call)
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{
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{
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fndecl = gimple_call_fndecl (stmt);
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fndecl = gimple_call_fndecl (stmt);
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