i386.md (pro_epilogue_adjust_stack_<mode>_add): Merge from pro_epilogue_adjust_stack_<mode>_{1,2}.
* config/i386/i386.md (pro_epilogue_adjust_stack_<mode>_add): Merge from pro_epilogue_adjust_stack_<mode>_{1,2}. (pro_epilogue_adjust_stack_<mode>_add): Rename from pro_epilogue_adjust_stack_<mode>_3. * config/i386/i386.c (pro_epilogue_adjust_stack): Update for renamed pro_epilogue_adjust_stack_{si,di}_add. (ix86_expand_prologue): Use indirect functions. Update for renamed pro_epilogue_adjust_stack_{si,di}_sub. From-SVN: r164635
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@ -1,3 +1,14 @@
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2010-09-26 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (pro_epilogue_adjust_stack_<mode>_add): Merge
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from pro_epilogue_adjust_stack_<mode>_{1,2}.
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(pro_epilogue_adjust_stack_<mode>_add): Rename from
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pro_epilogue_adjust_stack_<mode>_3.
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* config/i386/i386.c (pro_epilogue_adjust_stack): Update for
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renamed pro_epilogue_adjust_stack_{si,di}_add.
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(ix86_expand_prologue): Use indirect functions. Update for renamed
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pro_epilogue_adjust_stack_{si,di}_sub.
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2010-09-26 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (movmsk_df): New insn.
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@ -8777,9 +8777,11 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset,
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rtx insn;
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if (! TARGET_64BIT)
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insn = emit_insn (gen_pro_epilogue_adjust_stack_si_1 (dest, src, offset));
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insn = emit_insn (gen_pro_epilogue_adjust_stack_si_add (dest,
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src, offset));
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else if (x86_64_immediate_operand (offset, DImode))
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insn = emit_insn (gen_pro_epilogue_adjust_stack_di_1 (dest, src, offset));
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insn = emit_insn (gen_pro_epilogue_adjust_stack_di_add (dest,
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src, offset));
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else
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{
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rtx tmp;
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@ -8796,7 +8798,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset,
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insn = emit_insn (gen_rtx_SET (DImode, tmp, offset));
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if (style < 0)
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RTX_FRAME_RELATED_P (insn) = 1;
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insn = emit_insn (gen_pro_epilogue_adjust_stack_di_2 (dest, src, tmp));
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insn = emit_insn (gen_pro_epilogue_adjust_stack_di_add (dest, src, tmp));
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}
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if (style >= 0)
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@ -9698,6 +9700,8 @@ ix86_expand_prologue (void)
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{
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rtx eax = gen_rtx_REG (Pmode, AX_REG);
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rtx r10 = NULL;
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rtx (*adjust_stack_insn)(rtx, rtx, rtx);
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bool eax_live = false;
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bool r10_live = false;
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@ -9722,13 +9726,12 @@ ix86_expand_prologue (void)
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emit_insn (ix86_gen_allocate_stack_worker (eax, eax));
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/* Use the fact that AX still contains ALLOCATE. */
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if (TARGET_64BIT)
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insn = gen_pro_epilogue_adjust_stack_di_3 (stack_pointer_rtx,
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stack_pointer_rtx, eax);
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else
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insn = gen_pro_epilogue_adjust_stack_si_3 (stack_pointer_rtx,
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stack_pointer_rtx, eax);
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insn = emit_insn (insn);
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adjust_stack_insn = (TARGET_64BIT
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? gen_pro_epilogue_adjust_stack_di_sub
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: gen_pro_epilogue_adjust_stack_si_sub);
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insn = emit_insn (adjust_stack_insn (stack_pointer_rtx,
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stack_pointer_rtx, eax));
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if (m->fs.cfa_reg == stack_pointer_rtx)
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{
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@ -16246,10 +16246,10 @@
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;;
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;; in proper program order.
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(define_insn "pro_epilogue_adjust_stack_<mode>_1"
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(define_insn "pro_epilogue_adjust_stack_<mode>_add"
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[(set (match_operand:P 0 "register_operand" "=r,r")
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(plus:P (match_operand:P 1 "register_operand" "0,r")
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(match_operand:P 2 "<immediate_operand>" "<i>,<i>")))
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(match_operand:P 2 "<nonmemory_operand>" "r<i>,l<i>")))
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(clobber (reg:CC FLAGS_REG))
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(clobber (mem:BLK (scratch)))]
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""
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@ -16289,18 +16289,7 @@
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(const_string "*")))
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(set_attr "mode" "<MODE>")])
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(define_insn "pro_epilogue_adjust_stack_<mode>_2"
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[(set (match_operand:P 0 "register_operand" "=r")
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(plus:P (match_operand:DI 1 "register_operand" "0")
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(match_operand:DI 2 "register_operand" "r")))
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(clobber (reg:CC FLAGS_REG))
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(clobber (mem:BLK (scratch)))]
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""
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"add{<imodesuffix>}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "mode" "<MODE>")])
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(define_insn "pro_epilogue_adjust_stack_<mode>_3"
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(define_insn "pro_epilogue_adjust_stack_<mode>_sub"
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[(set (match_operand:P 0 "register_operand" "=r")
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(minus:P (match_operand:P 1 "register_operand" "0")
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(match_operand:P 2 "register_operand" "r")))
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