cfgexpand.c (expand_debug_locations): Encapsulate test for CONST_DOUBLE in macro.

2012-08-02  Kenneth Zadeck <zadeck@naturalbridge.com>

	* cfgexpand.c (expand_debug_locations):  Encapsulate test for
	CONST_DOUBLE in macro.
	* combine.c (try_combine, gen_lowpart_for_combine): Ditto.
	* cprop.c (implicit_set_cond_p): Ditto.
	* cselib.c (rtx_equal_for_cselib_1): Ditto.
	* expmed.c (expand_mult): Ditto.
	* expr.c (convert_modes): Ditto.
	* ira-costs.c (record_reg_classes): Ditto.
	* ira-lives.c (single_reg_class): Ditto.
	* optabs.c (expand_copysign_absneg, expand_copysign): Ditto.
	* print-rtl.c (print_rtx): Ditto.
	* recog.c (simplify_while_replacing, const_double_operand)
	(asm_operand_ok, constrain_operands): Ditto.
	* reg-stack.c (subst_stack_regs_pat): Ditto.
	* reload.c (find_reloads, find_equiv_reg): Ditto.
	* rtlanal.c (replace_rtx): Remove test.
	* rtlanal.c (constant_pool_constant_p, split_double): Encapsulate test for
	CONST_DOUBLE in macro.
	* simplify-rtx.c (mode_signbit_p, avoid_constant_pool_reference)
	(simplify_unary_operation_1, simplify_const_unary_operation)
	(simplify_binary_operation_1, simplify_const_binary_operation)
	(simplify_relational_operation_1)
	(simplify_const_relational_operations)
	(implify_subreg): Ditto.
	* varasm.c (output_constant_pool_2): Ditto.
	* rtl.h (CONST_DOUBLE_AS_INT_P, CONST_DOUBLE_AS_FLOAT_P): New
	macros.
	* rtl.def (CONST_DOUBLE):  Updated comments.

From-SVN: r190105
This commit is contained in:
Kenneth Zadeck 2012-08-02 22:39:57 +00:00 committed by Kenneth Zadeck
parent 36be1dee1d
commit 481755378d
20 changed files with 136 additions and 136 deletions

View File

@ -1,3 +1,34 @@
2012-08-02 Kenneth Zadeck <zadeck@naturalbridge.com>
* cfgexpand.c (expand_debug_locations): Encapsulate test for
CONST_DOUBLE in macro.
* combine.c (try_combine, gen_lowpart_for_combine): Ditto.
* cprop.c (implicit_set_cond_p): Ditto.
* cselib.c (rtx_equal_for_cselib_1): Ditto.
* expmed.c (expand_mult): Ditto.
* expr.c (convert_modes): Ditto.
* ira-costs.c (record_reg_classes): Ditto.
* ira-lives.c (single_reg_class): Ditto.
* optabs.c (expand_copysign_absneg, expand_copysign): Ditto.
* print-rtl.c (print_rtx): Ditto.
* recog.c (simplify_while_replacing, const_double_operand)
(asm_operand_ok, constrain_operands): Ditto.
* reg-stack.c (subst_stack_regs_pat): Ditto.
* reload.c (find_reloads, find_equiv_reg): Ditto.
* rtlanal.c (replace_rtx): Remove test.
* rtlanal.c (constant_pool_constant_p, split_double): Encapsulate test for
CONST_DOUBLE in macro.
* simplify-rtx.c (mode_signbit_p, avoid_constant_pool_reference)
(simplify_unary_operation_1, simplify_const_unary_operation)
(simplify_binary_operation_1, simplify_const_binary_operation)
(simplify_relational_operation_1)
(simplify_const_relational_operations)
(implify_subreg): Ditto.
* varasm.c (output_constant_pool_2): Ditto.
* rtl.h (CONST_DOUBLE_AS_INT_P, CONST_DOUBLE_AS_FLOAT_P): New
macros.
* rtl.def (CONST_DOUBLE): Updated comments.
2012-08-02 Richard Sandiford <rdsandiford@googlemail.com>
PR target/51931

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@ -3627,7 +3627,7 @@ expand_debug_locations (void)
|| (GET_MODE (val) == VOIDmode
&& (CONST_INT_P (val)
|| GET_CODE (val) == CONST_FIXED
|| GET_CODE (val) == CONST_DOUBLE
|| CONST_DOUBLE_AS_INT_P (val)
|| GET_CODE (val) == LABEL_REF)));
}

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@ -2620,10 +2620,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
if (i1 == 0
&& (temp = single_set (i2)) != 0
&& (CONST_INT_P (SET_SRC (temp))
|| GET_CODE (SET_SRC (temp)) == CONST_DOUBLE)
|| CONST_DOUBLE_AS_INT_P (SET_SRC (temp)))
&& GET_CODE (PATTERN (i3)) == SET
&& (CONST_INT_P (SET_SRC (PATTERN (i3)))
|| GET_CODE (SET_SRC (PATTERN (i3))) == CONST_DOUBLE)
|| CONST_DOUBLE_AS_INT_P (SET_SRC (PATTERN (i3))))
&& reg_subword_p (SET_DEST (PATTERN (i3)), SET_DEST (temp)))
{
rtx dest = SET_DEST (PATTERN (i3));
@ -5105,8 +5105,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy)
return new_rtx;
if (GET_CODE (x) == SUBREG
&& (CONST_INT_P (new_rtx)
|| GET_CODE (new_rtx) == CONST_DOUBLE))
&& (CONST_INT_P (new_rtx) || CONST_DOUBLE_AS_INT_P (new_rtx)))
{
enum machine_mode mode = GET_MODE (x);
@ -7134,8 +7133,7 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos,
if (mode == tmode)
return new_rtx;
if (CONST_INT_P (new_rtx)
|| GET_CODE (new_rtx) == CONST_DOUBLE)
if (CONST_INT_P (new_rtx) || CONST_DOUBLE_AS_INT_P (new_rtx))
return simplify_unary_operation (unsignedp ? ZERO_EXTEND : SIGN_EXTEND,
mode, new_rtx, tmode);
@ -10646,9 +10644,7 @@ gen_lowpart_for_combine (enum machine_mode omode, rtx x)
/* We can only support MODE being wider than a word if X is a
constant integer or has a mode the same size. */
if (GET_MODE_SIZE (omode) > UNITS_PER_WORD
&& ! ((imode == VOIDmode
&& (CONST_INT_P (x)
|| GET_CODE (x) == CONST_DOUBLE))
&& ! ((CONST_INT_P (x) || CONST_DOUBLE_AS_INT_P (x))
|| isize == osize))
goto fail;

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@ -1327,7 +1327,7 @@ implicit_set_cond_p (const_rtx cond)
the optimization can't be performed. */
/* ??? The complex and vector checks are not implemented yet. We just
always return zero for them. */
if (GET_CODE (cst) == CONST_DOUBLE)
if (CONST_DOUBLE_AS_FLOAT_P (cst))
{
REAL_VALUE_TYPE d;
REAL_VALUE_FROM_CONST_DOUBLE (d, cst);

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@ -1009,8 +1009,9 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, enum machine_mode memmode)
static rtx
wrap_constant (enum machine_mode mode, rtx x)
{
if (!CONST_INT_P (x) && GET_CODE (x) != CONST_FIXED
&& (GET_CODE (x) != CONST_DOUBLE || GET_MODE (x) != VOIDmode))
if (!CONST_INT_P (x)
&& GET_CODE (x) != CONST_FIXED
&& !CONST_DOUBLE_AS_INT_P (x))
return x;
gcc_assert (mode != VOIDmode);
return gen_rtx_CONST (mode, x);

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@ -491,7 +491,7 @@ rtx_to_double_int (const_rtx cst)
if (CONST_INT_P (cst))
r = shwi_to_double_int (INTVAL (cst));
else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
else if (CONST_DOUBLE_AS_INT_P (cst))
{
r.low = CONST_DOUBLE_LOW (cst);
r.high = CONST_DOUBLE_HIGH (cst);
@ -1244,7 +1244,7 @@ gen_lowpart_common (enum machine_mode mode, rtx x)
}
else if (GET_CODE (x) == SUBREG || REG_P (x)
|| GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
|| GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
|| CONST_DOUBLE_P (x) || CONST_INT_P (x))
return simplify_gen_subreg (mode, x, innermode, offset);
/* Otherwise, we can't do this. */

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@ -3217,7 +3217,7 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
coeff = INTVAL (scalar_op1);
is_neg = coeff < 0;
}
else if (CONST_DOUBLE_P (scalar_op1))
else if (CONST_DOUBLE_AS_INT_P (scalar_op1))
{
/* If we are multiplying in DImode, it may still be a win
to try to work with shifts and adds. */
@ -3290,7 +3290,7 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
skip_synth:
/* Expand x*2.0 as x+x. */
if (GET_CODE (scalar_op1) == CONST_DOUBLE && FLOAT_MODE_P (mode))
if (CONST_DOUBLE_AS_FLOAT_P (scalar_op1))
{
REAL_VALUE_TYPE d;
REAL_VALUE_FROM_CONST_DOUBLE (d, scalar_op1);

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@ -745,7 +745,7 @@ convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int uns
&& GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
|| (GET_MODE_CLASS (mode) == MODE_INT
&& GET_MODE_CLASS (oldmode) == MODE_INT
&& (GET_CODE (x) == CONST_DOUBLE
&& (CONST_DOUBLE_AS_INT_P (x)
|| (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
&& ((MEM_P (x) && ! MEM_VOLATILE_P (x)
&& direct_load[(int) mode])

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@ -652,7 +652,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
case 'E':
case 'F':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
|| (GET_CODE (op) == CONST_VECTOR
&& (GET_MODE_CLASS (GET_MODE (op))
== MODE_VECTOR_FLOAT)))
@ -661,15 +661,13 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
case 'G':
case 'H':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, p))
win = 1;
break;
case 's':
if (CONST_INT_P (op)
|| (GET_CODE (op) == CONST_DOUBLE
&& GET_MODE (op) == VOIDmode))
if (CONST_INT_P (op) || CONST_DOUBLE_AS_INT_P (op))
break;
case 'i':
@ -679,9 +677,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
break;
case 'n':
if (CONST_INT_P (op)
|| (GET_CODE (op) == CONST_DOUBLE
&& GET_MODE (op) == VOIDmode))
if (CONST_INT_P (op) || CONST_DOUBLE_AS_INT_P (op))
win = 1;
break;

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@ -780,22 +780,21 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
case 'n':
if (CONST_INT_P (op)
|| (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode)
|| CONST_DOUBLE_AS_INT_P (op)
|| (equiv_const != NULL_RTX
&& (CONST_INT_P (equiv_const)
|| (GET_CODE (equiv_const) == CONST_DOUBLE
&& GET_MODE (equiv_const) == VOIDmode))))
|| CONST_DOUBLE_AS_INT_P (equiv_const))))
return NO_REGS;
break;
case 's':
if ((CONSTANT_P (op) && !CONST_INT_P (op)
&& (GET_CODE (op) != CONST_DOUBLE || GET_MODE (op) != VOIDmode))
if ((CONSTANT_P (op)
&& !CONST_INT_P (op)
&& !CONST_DOUBLE_AS_INT_P (op))
|| (equiv_const != NULL_RTX
&& CONSTANT_P (equiv_const)
&& !CONST_INT_P (equiv_const)
&& (GET_CODE (equiv_const) != CONST_DOUBLE
|| GET_MODE (equiv_const) != VOIDmode)))
&& !CONST_DOUBLE_AS_INT_P (equiv_const)))
return NO_REGS;
break;
@ -818,11 +817,11 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
case 'E':
case 'F':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
|| (GET_CODE (op) == CONST_VECTOR
&& GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT)
|| (equiv_const != NULL_RTX
&& (GET_CODE (equiv_const) == CONST_DOUBLE
&& (CONST_DOUBLE_AS_FLOAT_P (equiv_const)
|| (GET_CODE (equiv_const) == CONST_VECTOR
&& (GET_MODE_CLASS (GET_MODE (equiv_const))
== MODE_VECTOR_FLOAT)))))
@ -831,10 +830,10 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
case 'G':
case 'H':
if ((GET_CODE (op) == CONST_DOUBLE
if ((CONST_DOUBLE_AS_FLOAT_P (op)
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, constraints))
|| (equiv_const != NULL_RTX
&& GET_CODE (equiv_const) == CONST_DOUBLE
&& CONST_DOUBLE_AS_FLOAT_P (equiv_const)
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (equiv_const,
c, constraints)))
return NO_REGS;

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@ -3594,7 +3594,7 @@ expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
label = gen_label_rtx ();
emit_cmp_and_jump_insns (sign, const0_rtx, EQ, NULL_RTX, imode, 1, label);
if (GET_CODE (op0) == CONST_DOUBLE)
if (CONST_DOUBLE_AS_FLOAT_P (op0))
op0 = simplify_unary_operation (NEG, mode, op0, mode);
else
op0 = expand_unop (mode, neg_optab, op0, target, 0);
@ -3732,7 +3732,7 @@ expand_copysign (rtx op0, rtx op1, rtx target)
return NULL_RTX;
op0_is_abs = false;
if (GET_CODE (op0) == CONST_DOUBLE)
if (CONST_DOUBLE_AS_FLOAT_P (op0))
{
if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
op0 = simplify_unary_operation (ABS, mode, op0, mode);
@ -3740,7 +3740,7 @@ expand_copysign (rtx op0, rtx op1, rtx target)
}
if (fmt->signbit_ro >= 0
&& (GET_CODE (op0) == CONST_DOUBLE
&& (CONST_DOUBLE_AS_FLOAT_P (op0)
|| (optab_handler (neg_optab, mode) != CODE_FOR_nothing
&& optab_handler (abs_optab, mode) != CODE_FOR_nothing)))
{

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@ -195,7 +195,7 @@ print_rtx (const_rtx in_rtx)
}
#ifndef GENERATOR_FILE
if (GET_CODE (in_rtx) == CONST_DOUBLE && FLOAT_MODE_P (GET_MODE (in_rtx)))
if (CONST_DOUBLE_AS_FLOAT_P (in_rtx))
i = 5;
#endif

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@ -587,7 +587,7 @@ simplify_while_replacing (rtx *loc, rtx to, rtx object,
break;
case MINUS:
if (CONST_INT_P (XEXP (x, 1))
|| GET_CODE (XEXP (x, 1)) == CONST_DOUBLE)
|| CONST_DOUBLE_AS_INT_P (XEXP (x, 1)))
validate_change (object, loc,
simplify_gen_binary
(PLUS, GET_MODE (x), XEXP (x, 0),
@ -1158,7 +1158,7 @@ const_double_operand (rtx op, enum machine_mode mode)
&& GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
return 0;
return ((GET_CODE (op) == CONST_DOUBLE || CONST_INT_P (op))
return ((CONST_DOUBLE_P (op) || CONST_INT_P (op))
&& (mode == VOIDmode || GET_MODE (op) == mode
|| GET_MODE (op) == VOIDmode));
}
@ -1707,27 +1707,25 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints)
case 'E':
case 'F':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
|| (GET_CODE (op) == CONST_VECTOR
&& GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT))
result = 1;
break;
case 'G':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, 'G', constraint))
result = 1;
break;
case 'H':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, 'H', constraint))
result = 1;
break;
case 's':
if (CONST_INT_P (op)
|| (GET_CODE (op) == CONST_DOUBLE
&& GET_MODE (op) == VOIDmode))
if (CONST_INT_P (op) || CONST_DOUBLE_AS_INT_P (op))
break;
/* Fall through. */
@ -1737,9 +1735,7 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints)
break;
case 'n':
if (CONST_INT_P (op)
|| (GET_CODE (op) == CONST_DOUBLE
&& GET_MODE (op) == VOIDmode))
if (CONST_INT_P (op) || CONST_DOUBLE_AS_INT_P (op))
result = 1;
break;
@ -2578,7 +2574,7 @@ constrain_operands (int strict)
case 'E':
case 'F':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
|| (GET_CODE (op) == CONST_VECTOR
&& GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT))
win = 1;
@ -2586,15 +2582,13 @@ constrain_operands (int strict)
case 'G':
case 'H':
if (GET_CODE (op) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (op)
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, p))
win = 1;
break;
case 's':
if (CONST_INT_P (op)
|| (GET_CODE (op) == CONST_DOUBLE
&& GET_MODE (op) == VOIDmode))
if (CONST_INT_P (op) || CONST_DOUBLE_AS_INT_P (op))
break;
case 'i':
if (CONSTANT_P (op))
@ -2602,9 +2596,7 @@ constrain_operands (int strict)
break;
case 'n':
if (CONST_INT_P (op)
|| (GET_CODE (op) == CONST_DOUBLE
&& GET_MODE (op) == VOIDmode))
if (CONST_INT_P (op) || CONST_DOUBLE_AS_INT_P (op))
win = 1;
break;

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@ -1466,7 +1466,7 @@ subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
if (STACK_REG_P (*src)
|| (STACK_REG_P (*dest)
&& (REG_P (*src) || MEM_P (*src)
|| GET_CODE (*src) == CONST_DOUBLE)))
|| CONST_DOUBLE_P (*src))))
{
control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
break;

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@ -3363,7 +3363,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
case 'E':
case 'F':
if (GET_CODE (operand) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (operand)
|| (GET_CODE (operand) == CONST_VECTOR
&& (GET_MODE_CLASS (GET_MODE (operand))
== MODE_VECTOR_FLOAT)))
@ -3372,15 +3372,13 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
case 'G':
case 'H':
if (GET_CODE (operand) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (operand)
&& CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
win = 1;
break;
case 's':
if (CONST_INT_P (operand)
|| (GET_CODE (operand) == CONST_DOUBLE
&& GET_MODE (operand) == VOIDmode))
if (CONST_INT_P (operand) || CONST_DOUBLE_AS_INT_P (operand))
break;
case 'i':
if (CONSTANT_P (operand)
@ -3389,9 +3387,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
break;
case 'n':
if (CONST_INT_P (operand)
|| (GET_CODE (operand) == CONST_DOUBLE
&& GET_MODE (operand) == VOIDmode))
if (CONST_INT_P (operand) || CONST_DOUBLE_AS_INT_P (operand))
win = 1;
break;
@ -6810,7 +6806,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
&& (valueno
= true_regnum (valtry = SET_DEST (pat))) >= 0)
|| (REG_P (SET_DEST (pat))
&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
&& CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
&& SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
&& CONST_INT_P (goal)
&& 0 != (goaltry
@ -6824,7 +6820,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
|| (goal_const && (tem = find_reg_note (p, REG_EQUIV,
NULL_RTX))
&& REG_P (SET_DEST (pat))
&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
&& CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
&& SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
&& CONST_INT_P (goal)
&& 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,

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@ -322,9 +322,10 @@ DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
/* fixed-point constant */
DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ)
/* numeric floating point constant.
Operands hold the value. They are all 'w' and there may be from 2 to 6;
see real.h. */
/* numeric floating point or integer constant. If the mode is
VOIDmode it is an int otherwise it has a floating point mode and a
floating point value. Operands hold the value. They are all 'w'
and there may be from 2 to 6; see real.h. */
DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
/* Describes a vector constant. */

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@ -410,6 +410,14 @@ struct GTY((variable_size)) rtvec_def {
or floating point constant. */
#define CONST_DOUBLE_P(X) (GET_CODE (X) == CONST_DOUBLE)
/* Predicate yielding true iff X is an rtx for a double-int. */
#define CONST_DOUBLE_AS_INT_P(X) \
(GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == VOIDmode)
/* Predicate yielding true iff X is an rtx for a double-int. */
#define CONST_DOUBLE_AS_FLOAT_P(X) \
(GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode)
/* Predicate yielding nonzero iff X is a label insn. */
#define LABEL_P(X) (GET_CODE (X) == CODE_LABEL)

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@ -2571,11 +2571,6 @@ replace_rtx (rtx x, rtx from, rtx to)
int i, j;
const char *fmt;
/* The following prevents loops occurrence when we change MEM in
CONST_DOUBLE onto the same CONST_DOUBLE. */
if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
return x;
if (x == from)
return to;
@ -5277,7 +5272,7 @@ bool
constant_pool_constant_p (rtx x)
{
x = avoid_constant_pool_reference (x);
return GET_CODE (x) == CONST_DOUBLE;
return CONST_DOUBLE_P (x);
}
/* If M is a bitmask that selects a field of low-order bits within an item but
@ -5391,7 +5386,7 @@ split_double (rtx value, rtx *first, rtx *second)
}
}
}
else if (GET_CODE (value) != CONST_DOUBLE)
else if (!CONST_DOUBLE_P (value))
{
if (WORDS_BIG_ENDIAN)
{

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@ -89,7 +89,7 @@ mode_signbit_p (enum machine_mode mode, const_rtx x)
&& CONST_INT_P (x))
val = INTVAL (x);
else if (width <= HOST_BITS_PER_DOUBLE_INT
&& GET_CODE (x) == CONST_DOUBLE
&& CONST_DOUBLE_AS_INT_P (x)
&& CONST_DOUBLE_LOW (x) == 0)
{
val = CONST_DOUBLE_HIGH (x);
@ -200,7 +200,7 @@ avoid_constant_pool_reference (rtx x)
/* Handle float extensions of constant pool references. */
tmp = XEXP (x, 0);
c = avoid_constant_pool_reference (tmp);
if (c != tmp && GET_CODE (c) == CONST_DOUBLE)
if (c != tmp && CONST_DOUBLE_AS_FLOAT_P (c))
{
REAL_VALUE_TYPE d;
@ -730,7 +730,7 @@ simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op)
{
/* (neg (plus A C)) is simplified to (minus -C A). */
if (CONST_INT_P (XEXP (op, 1))
|| GET_CODE (XEXP (op, 1)) == CONST_DOUBLE)
|| CONST_DOUBLE_P (XEXP (op, 1)))
{
temp = simplify_unary_operation (NEG, mode, XEXP (op, 1), mode);
if (temp)
@ -1275,7 +1275,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
gcc_assert (GET_MODE_INNER (mode) == GET_MODE_INNER
(GET_MODE (op)));
}
if (CONST_INT_P (op) || GET_CODE (op) == CONST_DOUBLE
if (CONST_INT_P (op) || CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_VECTOR)
{
int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
@ -1328,8 +1328,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
check the wrong mode (input vs. output) for a conversion operation,
such as FIX. At some point, this should be simplified. */
if (code == FLOAT && GET_MODE (op) == VOIDmode
&& (GET_CODE (op) == CONST_DOUBLE || CONST_INT_P (op)))
if (code == FLOAT && (CONST_DOUBLE_AS_INT_P (op) || CONST_INT_P (op)))
{
HOST_WIDE_INT hv, lv;
REAL_VALUE_TYPE d;
@ -1343,9 +1342,8 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
d = real_value_truncate (mode, d);
return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
}
else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
&& (GET_CODE (op) == CONST_DOUBLE
|| CONST_INT_P (op)))
else if (code == UNSIGNED_FLOAT
&& (CONST_DOUBLE_AS_INT_P (op) || CONST_INT_P (op)))
{
HOST_WIDE_INT hv, lv;
REAL_VALUE_TYPE d;
@ -1516,15 +1514,13 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
/* We can do some operations on integer CONST_DOUBLEs. Also allow
for a DImode operation on a CONST_INT. */
else if (GET_MODE (op) == VOIDmode
&& width <= HOST_BITS_PER_DOUBLE_INT
&& (GET_CODE (op) == CONST_DOUBLE
|| CONST_INT_P (op)))
else if (width <= HOST_BITS_PER_DOUBLE_INT
&& (CONST_DOUBLE_AS_INT_P (op) || CONST_INT_P (op)))
{
unsigned HOST_WIDE_INT l1, lv;
HOST_WIDE_INT h1, hv;
if (GET_CODE (op) == CONST_DOUBLE)
if (CONST_DOUBLE_AS_INT_P (op))
l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
else
l1 = INTVAL (op), h1 = HWI_SIGN_EXTEND (l1);
@ -1660,7 +1656,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
return immed_double_const (lv, hv, mode);
}
else if (GET_CODE (op) == CONST_DOUBLE
else if (CONST_DOUBLE_AS_FLOAT_P (op)
&& SCALAR_FLOAT_MODE_P (mode)
&& SCALAR_FLOAT_MODE_P (GET_MODE (op)))
{
@ -1710,7 +1706,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
}
else if (GET_CODE (op) == CONST_DOUBLE
else if (CONST_DOUBLE_AS_FLOAT_P (op)
&& SCALAR_FLOAT_MODE_P (GET_MODE (op))
&& GET_MODE_CLASS (mode) == MODE_INT
&& width <= HOST_BITS_PER_DOUBLE_INT && width > 0)
@ -2033,11 +2029,10 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
}
/* (plus (xor X C1) C2) is (xor X (C1^C2)) if C2 is signbit. */
if ((CONST_INT_P (op1)
|| GET_CODE (op1) == CONST_DOUBLE)
if ((CONST_INT_P (op1) || CONST_DOUBLE_AS_INT_P (op1))
&& GET_CODE (op0) == XOR
&& (CONST_INT_P (XEXP (op0, 1))
|| GET_CODE (XEXP (op0, 1)) == CONST_DOUBLE)
|| CONST_DOUBLE_AS_INT_P (XEXP (op0, 1)))
&& mode_signbit_p (mode, op1))
return simplify_gen_binary (XOR, mode, XEXP (op0, 0),
simplify_gen_binary (XOR, mode, op1,
@ -2219,8 +2214,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
/* (-x - c) may be simplified as (-c - x). */
if (GET_CODE (op0) == NEG
&& (CONST_INT_P (op1)
|| GET_CODE (op1) == CONST_DOUBLE))
&& (CONST_INT_P (op1) || CONST_DOUBLE_P (op1)))
{
tem = simplify_unary_operation (NEG, mode, op1, mode);
if (tem)
@ -2370,9 +2364,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val));
/* Likewise for multipliers wider than a word. */
if (GET_CODE (trueop1) == CONST_DOUBLE
&& (GET_MODE (trueop1) == VOIDmode
|| GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_INT)
if (CONST_DOUBLE_AS_INT_P (trueop1)
&& GET_MODE (op0) == mode
&& CONST_DOUBLE_LOW (trueop1) == 0
&& (val = exact_log2 (CONST_DOUBLE_HIGH (trueop1))) >= 0
@ -2382,7 +2374,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
GEN_INT (val + HOST_BITS_PER_WIDE_INT));
/* x*2 is x+x and x*(-1) is -x */
if (GET_CODE (trueop1) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (trueop1)
&& SCALAR_FLOAT_MODE_P (GET_MODE (trueop1))
&& !DECIMAL_FLOAT_MODE_P (GET_MODE (trueop1))
&& GET_MODE (op0) == mode)
@ -2577,16 +2569,14 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
return CONST0_RTX (mode);
/* Canonicalize XOR of the most significant bit to PLUS. */
if ((CONST_INT_P (op1)
|| GET_CODE (op1) == CONST_DOUBLE)
if ((CONST_INT_P (op1) || CONST_DOUBLE_AS_INT_P (op1))
&& mode_signbit_p (mode, op1))
return simplify_gen_binary (PLUS, mode, op0, op1);
/* (xor (plus X C1) C2) is (xor X (C1^C2)) if C1 is signbit. */
if ((CONST_INT_P (op1)
|| GET_CODE (op1) == CONST_DOUBLE)
if ((CONST_INT_P (op1) || CONST_DOUBLE_AS_INT_P (op1))
&& GET_CODE (op0) == PLUS
&& (CONST_INT_P (XEXP (op0, 1))
|| GET_CODE (XEXP (op0, 1)) == CONST_DOUBLE)
|| CONST_DOUBLE_AS_INT_P (XEXP (op0, 1)))
&& mode_signbit_p (mode, XEXP (op0, 1)))
return simplify_gen_binary (XOR, mode, XEXP (op0, 0),
simplify_gen_binary (XOR, mode, op1,
@ -2929,7 +2919,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
&& !HONOR_SNANS (mode))
return op0;
if (GET_CODE (trueop1) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (trueop1)
&& trueop1 != CONST0_RTX (mode))
{
REAL_VALUE_TYPE d;
@ -3317,11 +3307,9 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
gcc_assert (GET_MODE_INNER (mode) == op1_mode);
if ((GET_CODE (trueop0) == CONST_VECTOR
|| CONST_INT_P (trueop0)
|| GET_CODE (trueop0) == CONST_DOUBLE)
|| CONST_INT_P (trueop0) || CONST_DOUBLE_P (trueop0))
&& (GET_CODE (trueop1) == CONST_VECTOR
|| CONST_INT_P (trueop1)
|| GET_CODE (trueop1) == CONST_DOUBLE))
|| CONST_INT_P (trueop1) || CONST_DOUBLE_P (trueop1)))
{
int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
@ -3401,10 +3389,10 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
if (VECTOR_MODE_P (mode)
&& code == VEC_CONCAT
&& (CONST_INT_P (op0)
|| GET_CODE (op0) == CONST_DOUBLE
|| GET_CODE (op0) == CONST_FIXED)
|| GET_CODE (op0) == CONST_FIXED
|| CONST_DOUBLE_P (op0))
&& (CONST_INT_P (op1)
|| GET_CODE (op1) == CONST_DOUBLE
|| CONST_DOUBLE_P (op1)
|| GET_CODE (op1) == CONST_FIXED))
{
unsigned n_elts = GET_MODE_NUNITS (mode);
@ -3439,8 +3427,8 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
}
if (SCALAR_FLOAT_MODE_P (mode)
&& GET_CODE (op0) == CONST_DOUBLE
&& GET_CODE (op1) == CONST_DOUBLE
&& CONST_DOUBLE_AS_FLOAT_P (op0)
&& CONST_DOUBLE_AS_FLOAT_P (op1)
&& mode == GET_MODE (op0) && mode == GET_MODE (op1))
{
if (code == AND
@ -3562,8 +3550,8 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
/* We can fold some multi-word operations. */
if (GET_MODE_CLASS (mode) == MODE_INT
&& width == HOST_BITS_PER_DOUBLE_INT
&& (CONST_DOUBLE_P (op0) || CONST_INT_P (op0))
&& (CONST_DOUBLE_P (op1) || CONST_INT_P (op1)))
&& (CONST_DOUBLE_AS_INT_P (op0) || CONST_INT_P (op0))
&& (CONST_DOUBLE_AS_INT_P (op1) || CONST_INT_P (op1)))
{
double_int o0, o1, res, tmp;
@ -4432,10 +4420,9 @@ simplify_relational_operation_1 (enum rtx_code code, enum machine_mode mode,
/* (eq/ne (xor x C1) C2) simplifies to (eq/ne x (C1^C2)). */
if ((code == EQ || code == NE)
&& op0code == XOR
&& (CONST_INT_P (op1)
|| GET_CODE (op1) == CONST_DOUBLE)
&& (CONST_INT_P (op1) || CONST_DOUBLE_AS_INT_P (op1))
&& (CONST_INT_P (XEXP (op0, 1))
|| GET_CODE (XEXP (op0, 1)) == CONST_DOUBLE))
|| CONST_DOUBLE_AS_INT_P (XEXP (op0, 1))))
return simplify_gen_relational (code, mode, cmp_mode, XEXP (op0, 0),
simplify_gen_binary (XOR, cmp_mode,
XEXP (op0, 1), op1));
@ -4612,8 +4599,8 @@ simplify_const_relational_operation (enum rtx_code code,
/* If the operands are floating-point constants, see if we can fold
the result. */
if (GET_CODE (trueop0) == CONST_DOUBLE
&& GET_CODE (trueop1) == CONST_DOUBLE
if (CONST_DOUBLE_AS_FLOAT_P (trueop0)
&& CONST_DOUBLE_AS_FLOAT_P (trueop1)
&& SCALAR_FLOAT_MODE_P (GET_MODE (trueop0)))
{
REAL_VALUE_TYPE d0, d1;
@ -4652,17 +4639,15 @@ simplify_const_relational_operation (enum rtx_code code,
/* Otherwise, see if the operands are both integers. */
if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
&& (GET_CODE (trueop0) == CONST_DOUBLE
|| CONST_INT_P (trueop0))
&& (GET_CODE (trueop1) == CONST_DOUBLE
|| CONST_INT_P (trueop1)))
&& (CONST_DOUBLE_AS_INT_P (trueop0) || CONST_INT_P (trueop0))
&& (CONST_DOUBLE_AS_INT_P (trueop1) || CONST_INT_P (trueop1)))
{
int width = GET_MODE_PRECISION (mode);
HOST_WIDE_INT l0s, h0s, l1s, h1s;
unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
/* Get the two words comprising each integer constant. */
if (GET_CODE (trueop0) == CONST_DOUBLE)
if (CONST_DOUBLE_AS_INT_P (trueop0))
{
l0u = l0s = CONST_DOUBLE_LOW (trueop0);
h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
@ -4673,7 +4658,7 @@ simplify_const_relational_operation (enum rtx_code code,
h0u = h0s = HWI_SIGN_EXTEND (l0s);
}
if (GET_CODE (trueop1) == CONST_DOUBLE)
if (CONST_DOUBLE_AS_INT_P (trueop1))
{
l1u = l1s = CONST_DOUBLE_LOW (trueop1);
h1u = h1s = CONST_DOUBLE_HIGH (trueop1);
@ -5455,7 +5440,7 @@ simplify_subreg (enum machine_mode outermode, rtx op,
return op;
if (CONST_INT_P (op)
|| GET_CODE (op) == CONST_DOUBLE
|| CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_FIXED
|| GET_CODE (op) == CONST_VECTOR)
return simplify_immed_subreg (outermode, op, innermode, byte);

View File

@ -3626,7 +3626,7 @@ output_constant_pool_2 (enum machine_mode mode, rtx x, unsigned int align)
{
REAL_VALUE_TYPE r;
gcc_assert (GET_CODE (x) == CONST_DOUBLE);
gcc_assert (CONST_DOUBLE_AS_FLOAT_P (x));
REAL_VALUE_FROM_CONST_DOUBLE (r, x);
assemble_real (r, mode, align);
break;