rs6000: Remove -m[no-]fold-gimple flag [PR103686]
The -m[no-]fold-gimple flag was really intended primarily for internal testing while implementing GIMPLE folding for rs6000 vector built-in functions. It ended up leaking into other places, causing problems such as PR103686 identifies. Let's remove it. There are a number of tests in the testsuite that require adjustment. Some specify -mfold-gimple directly, which is the default, so that is handled by removing the option. Others unnecessarily specify -mno-fold-gimple, as the tests work fine without this. Again that is handled by removing the option. There are a couple of extra variants of tests specifically for -mno-fold-gimple; for those, we can just remove the whole test. gcc.target/powerpc/builtins-1.c was more problematic. It was written in such a way as to be extremely fragile. For this one, I rewrote the whole test in a different style, using individual functions to test each built-in function. These same tests are also largely covered by builtins-1-be-folded.c and builtins-1-le-folded.c, so I chose to explicitly make this test -mbig for simplicity, and use -O2 for clean code generation. I made some slight modifications to the expected instruction counts as a result, and tested on both 32- and 64-bit. 2022-02-02 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ PR target/103686 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Remove test for !rs6000_fold_gimple. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise. * config/rs6000/rs6000.opt (mfold-gimple): Remove. gcc/testsuite/ PR target/103686 * gcc.target/powerpc/builtins-1-be-folded.c: Remove -mfold-gimple option. * gcc.target/powerpc/builtins-1-le-folded.c: Likewise. * gcc.target/powerpc/builtins-1.c: Rewrite to use small functions and restrict to -O2 -mbig for predictability. Adjust instruction counts. * gcc.target/powerpc/builtins-5.c: Remove -mno-fold-gimple option. * gcc.target/powerpc/p8-vec-xl-xst.c: Likewise. * gcc.target/powerpc/pr83926.c: Likewise. * gcc.target/powerpc/pr86731-nogimplefold-longlong.c: Delete. * gcc.target/powerpc/pr86731-nogimplefold.c: Delete. * gcc.target/powerpc/swaps-p8-17.c: Remove -mno-fold-gimple option.
This commit is contained in:
Bill Schmidt
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@ -1299,9 +1299,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
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fprintf (stderr, "rs6000_gimple_fold_builtin %d %s %s\n",
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fn_code, fn_name1, fn_name2);
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if (!rs6000_fold_gimple)
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return false;
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/* Prevent gimple folding for code that does not have a LHS, unless it is
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allowed per the rs6000_builtin_valid_without_lhs helper function. */
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if (!gimple_call_lhs (stmt)
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@ -3833,10 +3833,6 @@ rs6000_option_override_internal (bool global_init_p)
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& OPTION_MASK_DIRECT_MOVE))
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rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
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if (!rs6000_fold_gimple)
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fprintf (stderr,
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"gimple folding of rs6000 builtins has been disabled.\n");
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/* Add some warnings for VSX. */
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if (TARGET_VSX)
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{
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@ -155,10 +155,6 @@ maltivec
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Target Mask(ALTIVEC) Var(rs6000_isa_flags)
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Use AltiVec instructions.
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mfold-gimple
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Target Var(rs6000_fold_gimple) Init(1)
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Enable early gimple folding of builtins.
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mhard-dfp
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Target Mask(DFP) Var(rs6000_isa_flags)
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Use decimal floating point instructions.
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@ -1,5 +1,5 @@
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/* { dg-do compile { target { powerpc-*-* } } } */
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/* { dg-options "-mdejagnu-cpu=power8 -O2 -mfold-gimple" } */
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/* { dg-options "-mdejagnu-cpu=power8 -O2" } */
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/* Based on builtins-1-le.c ; ensure that the power8 builtins are accepted by
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the compiler, at O2 with gimple folding enabled. */
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@ -1,5 +1,5 @@
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/* { dg-do compile { target { powerpc64le-*-* } } } */
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/* { dg-options "-mdejagnu-cpu=power8 -O2 -mfold-gimple" } */
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/* { dg-options "-mdejagnu-cpu=power8 -O2" } */
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/* Based on builtins-1-le.c ; ensure that the power8 builtins are accepted by
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the compiler, at O2 with gimple folding enabled. */
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File diff suppressed because it is too large
Load Diff
@ -1,7 +1,6 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-options "-mdejagnu-cpu=power8 -O0 -mno-fold-gimple -dp" } */
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/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */
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/* { dg-options "-mdejagnu-cpu=power8 -O0 -dp" } */
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#include <altivec.h>
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@ -1,8 +1,7 @@
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/* { dg-do compile { target { le } } } */
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/* { dg-skip-if "" { powerpc*-*-darwin* } } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-options "-mdejagnu-cpu=power8 -O2 -mno-fold-gimple" } */
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/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */
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/* { dg-options "-mdejagnu-cpu=power8 -O2" } */
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/* Verify fix for problem where vec_xl and vec_xst are not recognized
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for the vector char and vector short cases on P8 only. */
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@ -1,6 +1,5 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-options "-O2 -mdejagnu-cpu=power8 -mno-fold-gimple" } */
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/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */
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/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
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__attribute__ ((altivec(vector__))) long long
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sdiv (__attribute__ ((altivec(vector__))) long long a,
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@ -1,32 +0,0 @@
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/* PR86731. Verify that the rs6000 gimple-folding code handles the
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left shift operation properly. This is a testcase variation that
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explicitly disables gimple folding. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-maltivec -O3 -fwrapv -mno-fold-gimple -mpower8-vector " } */
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/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */
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#include <altivec.h>
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vector unsigned long long splatu4(void)
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{
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vector unsigned long long mzero = {-1,-1};
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return (vector unsigned long long) vec_sl(mzero, mzero);
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}
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vector signed long long splats4(void)
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{
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vector unsigned long long mzero = {-1,-1};
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return (vector signed long long) vec_sl(mzero, mzero);
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}
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/* Codegen will consist of splat and shift instructions for most types.
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Noted variations: if gimple folding is disabled, or if -fwrapv is not specified, the
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long long tests will generate a vspltisw+vsld pair, versus generating a lvx. */
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/* { dg-final { scan-assembler-times {\mvspltis[bhw]\M|\mxxspltib\M} 2 } } */
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/* { dg-final { scan-assembler-times {\mvsl[bhwd]\M} 2 } } */
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/* { dg-final { scan-assembler-times {\mlvx\M} 0 } } */
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@ -1,63 +0,0 @@
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/* PR86731. Verify that the rs6000 gimple-folding code handles the
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left shift operation properly. This is a testcase variation that
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explicitly disables gimple folding. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_altivec_ok } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-maltivec -O3 -fwrapv -mno-fold-gimple" } */
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/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */
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#include <altivec.h>
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/* original test as reported. */
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vector unsigned int splat(void)
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{
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vector unsigned int mzero = vec_splat_u32(-1);
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return (vector unsigned int) vec_sl(mzero, mzero);
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}
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/* more testcase variations. */
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vector unsigned char splatu1(void)
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{
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vector unsigned char mzero = vec_splat_u8(-1);
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return (vector unsigned char) vec_sl(mzero, mzero);
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}
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vector unsigned short splatu2(void)
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{
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vector unsigned short mzero = vec_splat_u16(-1);
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return (vector unsigned short) vec_sl(mzero, mzero);
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}
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vector unsigned int splatu3(void)
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{
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vector unsigned int mzero = vec_splat_u32(-1);
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return (vector unsigned int) vec_sl(mzero, mzero);
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}
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vector signed char splats1(void)
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{
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vector unsigned char mzero = vec_splat_u8(-1);
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return (vector signed char) vec_sl(mzero, mzero);
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}
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vector signed short splats2(void)
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{
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vector unsigned short mzero = vec_splat_u16(-1);
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return (vector signed short) vec_sl(mzero, mzero);
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}
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vector signed int splats3(void)
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{
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vector unsigned int mzero = vec_splat_u32(-1);
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return (vector signed int) vec_sl(mzero, mzero);
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}
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/* Codegen will consist of splat and shift instructions for most types.
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Noted variations: if gimple folding is disabled, or if -fwrapv is not specified, the
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long long tests will generate a vspltisw+vsld pair, versus generating a lvx. */
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/* { dg-final { scan-assembler-times {\mvspltis[bhw]\M|\mxxspltib\M} 7 } } */
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/* { dg-final { scan-assembler-times {\mvsl[bhwd]\M} 7 } } */
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/* { dg-final { scan-assembler-times {\mlvx\M} 0 } } */
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@ -1,7 +1,6 @@
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/* { dg-do compile { target { le } } } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-options "-mdejagnu-cpu=power8 -O1 -mno-fold-gimple" } */
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/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */
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/* { dg-options "-mdejagnu-cpu=power8 -O1" } */
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/* { dg-final { scan-assembler "lxvd2x" } } */
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/* { dg-final { scan-assembler "xxpermdi" } } */
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