ARM/AArch64 Testsuite] Add float16 lane_f16_indices tests

PR target/63870
	* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c: New.

From-SVN: r227557
This commit is contained in:
Alan Lawrence 2015-09-08 19:43:39 +00:00 committed by Alan Lawrence
parent 48c44783ac
commit 4cb4640c2c
13 changed files with 202 additions and 0 deletions

View File

@ -1,3 +1,19 @@
2015-09-08 Alan Lawrence <alan.lawrence@arm.com>
PR target/63870
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c: New.
2015-09-08 Alan Lawrence <alan.lawrence@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vcvt_f16.c: New.

View File

@ -0,0 +1,16 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
float16x4x2_t
f_vld2_lane_f16 (float16_t * p, float16x4x2_t v)
{
float16x4x2_t res;
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
res = vld2_lane_f16 (p, v, 4);
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
res = vld2_lane_f16 (p, v, -1);
return res;
}

View File

@ -0,0 +1,16 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
float16x8x2_t
f_vld2q_lane_f16 (float16_t * p, float16x8x2_t v)
{
float16x8x2_t res;
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
res = vld2q_lane_f16 (p, v, 8);
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
res = vld2q_lane_f16 (p, v, -1);
return res;
}

View File

@ -0,0 +1,16 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
float16x4x3_t
f_vld3_lane_f16 (float16_t * p, float16x4x3_t v)
{
float16x4x3_t res;
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
res = vld3_lane_f16 (p, v, 4);
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
res = vld3_lane_f16 (p, v, -1);
return res;
}

View File

@ -0,0 +1,16 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
float16x8x3_t
f_vld3q_lane_f16 (float16_t * p, float16x8x3_t v)
{
float16x8x3_t res;
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
res = vld3q_lane_f16 (p, v, 8);
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
res = vld3q_lane_f16 (p, v, -1);
return res;
}

View File

@ -0,0 +1,16 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
float16x4x4_t
f_vld4_lane_f16 (float16_t * p, float16x4x4_t v)
{
float16x4x4_t res;
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
res = vld4_lane_f16 (p, v, 4);
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
res = vld4_lane_f16 (p, v, -1);
return res;
}

View File

@ -0,0 +1,16 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
float16x8x4_t
f_vld4q_lane_f16 (float16_t * p, float16x8x4_t v)
{
float16x8x4_t res;
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
res = vld4q_lane_f16 (p, v, 8);
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
res = vld4q_lane_f16 (p, v, -1);
return res;
}

View File

@ -0,0 +1,15 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
void
f_vst2_lane_f16 (float16_t * p, float16x4x2_t v)
{
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
vst2_lane_f16 (p, v, 4);
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
vst2_lane_f16 (p, v, -1);
return;
}

View File

@ -0,0 +1,15 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
void
f_vst2q_lane_f16 (float16_t * p, float16x8x2_t v)
{
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
vst2q_lane_f16 (p, v, 8);
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
vst2q_lane_f16 (p, v, -1);
return;
}

View File

@ -0,0 +1,15 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
void
f_vst3_lane_f16 (float16_t * p, float16x4x3_t v)
{
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
vst3_lane_f16 (p, v, 4);
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
vst3_lane_f16 (p, v, -1);
return;
}

View File

@ -0,0 +1,15 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
void
f_vst3q_lane_f16 (float16_t * p, float16x8x3_t v)
{
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
vst3q_lane_f16 (p, v, 8);
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
vst3q_lane_f16 (p, v, -1);
return;
}

View File

@ -0,0 +1,15 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
void
f_vst4_lane_f16 (float16_t * p, float16x4x4_t v)
{
/* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
vst4_lane_f16 (p, v, 4);
/* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
vst4_lane_f16 (p, v, -1);
return;
}

View File

@ -0,0 +1,15 @@
#include <arm_neon.h>
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
/* { dg-excess-errors "" { xfail arm*-*-* } } */
void
f_vst4q_lane_f16 (float16_t * p, float16x8x4_t v)
{
/* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
vst4q_lane_f16 (p, v, 8);
/* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
vst4q_lane_f16 (p, v, -1);
return;
}