pa.h (GENERAL_OR_FP_OR_SNAKE_FP_REGS): New register class.
* pa.h (GENERAL_OR_FP_OR_SNAKE_FP_REGS): New register class. (LEGITIMIZE_ADDRESS): No longer show DP relocation. Simplify. From-SVN: r3184
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@ -507,11 +507,15 @@ extern int leaf_function;
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fmpyadd and fmpysub are restricted.
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FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
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anywhere else.*/
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anywhere else.
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GENERAL_OR_FP_OR_SNAKE_FP_REGS is for reload_{in,out}si only and
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isn't used anywhereelse. */
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enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
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HI_SNAKE_FP_REGS, SNAKE_FP_REGS, GENERAL_OR_SNAKE_FP_REGS,
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FP_OR_SNAKE_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
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FP_OR_SNAKE_FP_REGS, GENERAL_OR_FP_OR_SNAKE_FP_REGS, SHIFT_REGS,
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ALL_REGS, LIM_REG_CLASSES};
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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@ -520,7 +524,8 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
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#define REG_CLASS_NAMES \
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{ "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
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"HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
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"FP_OR_SNAKE_FP_REGS","SHIFT_REGS", "ALL_REGS"}
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"FP_OR_SNAKE_FP_REGS", "GENERAL_OR_FP_OR_SNAKE_FP_REGS", "SHIFT_REGS",\
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"ALL_REGS"}
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/* Define which registers fit in which classes.
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This is an initializer for a vector of HARD_REG_SET
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@ -537,6 +542,7 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
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{0, 0xffff0000, ~0, 0xffff}, /* SNAKE_FP_REGS */ \
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{-2, 0xffff0000, ~0, 0xffff}, /* GENERAL_OR_SNAKE_FP_REGS */\
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{0, ~0, ~0, 0xffff}, /* FP_OR_SNAKE_FP_REGS */\
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{-2, ~0, ~0, 0xffff}, /* GENERAL_OR_FP_OR_SNAKE_FP_REGS */\
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{0, 0, 0, 0x10000}, /* SHIFT_REGS */ \
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{-2, ~0, ~0, 0x1ffff}} /* ALL_REGS */
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@ -566,7 +572,8 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
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((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
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((C) == 'q' ? SHIFT_REGS : \
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((C) == 'a' ? R1_REGS : \
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((C) == 'z' ? FP_OR_SNAKE_FP_REGS : NO_REGS))))))
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((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \
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((C) == 'Z' ? GENERAL_OR_FP_OR_SNAKE_FP_REGS : NO_REGS)))))))
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/* The letters I, J, K, L and M in a register constraint string
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can be used to stand for particular ranges of immediate operands.
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@ -1245,18 +1252,10 @@ extern union tree_node *current_function_decl;
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if (memory_address_p (MODE, X)) \
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goto WIN; \
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if (flag_pic) (X) = legitimize_pic_address (X, MODE, gen_reg_rtx (Pmode));\
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else if ((GET_CODE (X) == SYMBOL_REF && read_only_operand (X))\
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else if (GET_CODE (X) == SYMBOL_REF \
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|| GET_CODE (X) == LABEL_REF) \
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(X) = gen_rtx (LO_SUM, Pmode, \
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copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \
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else if (GET_CODE (X) == SYMBOL_REF) \
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{ \
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rtx temp2 = gen_reg_rtx (Pmode); \
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emit_insn (gen_rtx (SET, VOIDmode, temp2, \
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gen_rtx (PLUS, Pmode, gen_rtx (REG, Pmode, 27),\
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gen_rtx (HIGH, Pmode, X)))); \
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(X) = gen_rtx (LO_SUM, Pmode, temp2, X); \
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} \
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if (memory_address_p (MODE, X)) \
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goto WIN;}
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