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explow.c (convert_memory_address): Remove special handling when POINTERS_EXTEND_UNSIGNED < 0. 

* gcc/explow.c (convert_memory_address): Remove special handling
	when POINTERS_EXTEND_UNSIGNED < 0.
	* gcc/config/ia64.md (movsi_symbolic): New instruction for ILP32
	mode.
	(movedi_symbolic): Fix typo.
	(load_fptr): Remove mode restriction so it works for SI and DI.
	(load_fptr_internal1): Ditto.
	(load_gprel): Ditto.
	(load_symptr_internal1): Ditto.
	(call_pic): Ditto.
	* gcc/config/ia64.c (call_operand): Modify mode check.
	(ia64_expand_load_address): Handle DI and SI addresses and symbols.
	(ia64_expand_move): Ditto.
	(ia64_assemble_integer): Handle SImode function pointers.
	(ia64_expand_fetch_and_op): Handle SImode mem addresses.
	(ia64_expand_op_and_fetch): Ditto.
	(ia64_expand_compare_and_swap): Ditto.
	(ia64_expand_lock_test_and_set): Ditto.
	(ia64_expand_lock_release): Ditto.

From-SVN: r55488
This commit is contained in:
Steve Ellcey 2002-07-16 16:07:13 +00:00 committed by Steve Ellcey
parent 1575c31ee1
commit 5da4f54878
4 changed files with 104 additions and 43 deletions
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21
gcc/ChangeLog
View File

@ -1,3 +1,24 @@
2002-07-16 Steve Ellcey <sje@cup.hp.com>
* gcc/explow.c (convert_memory_address): Remove special handling
when POINTERS_EXTEND_UNSIGNED < 0.
* gcc/config/ia64.md (movsi_symbolic): New instruction for ILP32
mode.
(movedi_symbolic): Fix typo.
(load_fptr): Remove mode restriction so it works for SI and DI.
(load_fptr_internal1): Ditto.
(load_gprel): Ditto.
(load_symptr_internal1): Ditto.
(call_pic): Ditto.
* gcc/config/ia64.c (call_operand): Modify mode check.
(ia64_expand_load_address): Handle DI and SI addresses and symbols.
(ia64_expand_move): Ditto.
(ia64_assemble_integer): Handle SImode function pointers.
(ia64_expand_fetch_and_op): Handle SImode mem addresses.
(ia64_expand_op_and_fetch): Ditto.
(ia64_expand_compare_and_swap): Ditto.
(ia64_expand_lock_test_and_set): Ditto.
(ia64_expand_lock_release): Ditto.
2002-07-16 Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com> 2002-07-16 Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com>
* arm.c (emit_sfm): Don't set RTX_FRAME_RELATED_P on DWARF. * arm.c (emit_sfm): Don't set RTX_FRAME_RELATED_P on DWARF.

56
gcc/config/ia64/ia64.c
View File

@ -250,7 +250,7 @@ call_operand (op, mode)
rtx op; rtx op;
enum machine_mode mode; enum machine_mode mode;
{ {
if (mode != GET_MODE (op)) if (mode != GET_MODE (op) && mode != VOIDmode)
return 0; return 0;
return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG
@ -992,7 +992,10 @@ ia64_expand_load_address (dest, src, scratch)
/* The destination could be a MEM during initial rtl generation, /* The destination could be a MEM during initial rtl generation,
which isn't a valid destination for the PIC load address patterns. */ which isn't a valid destination for the PIC load address patterns. */
if (! register_operand (dest, DImode)) if (! register_operand (dest, DImode))
temp = gen_reg_rtx (DImode); if (! scratch || ! register_operand (scratch, DImode))
temp = gen_reg_rtx (DImode);
else
temp = scratch;
else else
temp = dest; temp = dest;
@ -1003,7 +1006,8 @@ ia64_expand_load_address (dest, src, scratch)
emit_insn (gen_load_gprel64 (temp, src)); emit_insn (gen_load_gprel64 (temp, src));
else if (GET_CODE (src) == SYMBOL_REF && SYMBOL_REF_FLAG (src)) else if (GET_CODE (src) == SYMBOL_REF && SYMBOL_REF_FLAG (src))
emit_insn (gen_load_fptr (temp, src)); emit_insn (gen_load_fptr (temp, src));
else if (sdata_symbolic_operand (src, DImode)) else if ((GET_MODE (src) == Pmode || GET_MODE (src) == ptr_mode)
&& sdata_symbolic_operand (src, VOIDmode))
emit_insn (gen_load_gprel (temp, src)); emit_insn (gen_load_gprel (temp, src));
else if (GET_CODE (src) == CONST else if (GET_CODE (src) == CONST
&& GET_CODE (XEXP (src, 0)) == PLUS && GET_CODE (XEXP (src, 0)) == PLUS
@ -1038,7 +1042,11 @@ ia64_expand_load_address (dest, src, scratch)
} }
if (temp != dest) if (temp != dest)
emit_move_insn (dest, temp); {
if (GET_MODE (dest) != GET_MODE (temp))
temp = convert_to_mode (GET_MODE (dest), temp, 0);
emit_move_insn (dest, temp);
}
} }
static GTY(()) rtx gen_tls_tga; static GTY(()) rtx gen_tls_tga;
@ -1073,7 +1081,7 @@ ia64_expand_move (op0, op1)
if (!reload_in_progress && !reload_completed && !ia64_move_ok (op0, op1)) if (!reload_in_progress && !reload_completed && !ia64_move_ok (op0, op1))
op1 = force_reg (mode, op1); op1 = force_reg (mode, op1);
if (mode == Pmode) if (mode == Pmode || mode == ptr_mode)
{ {
enum tls_model tls_kind; enum tls_model tls_kind;
if ((tls_kind = tls_symbolic_operand (op1, Pmode))) if ((tls_kind = tls_symbolic_operand (op1, Pmode)))
@ -1184,7 +1192,9 @@ ia64_expand_move (op0, op1)
abort (); abort ();
} }
} }
else if (!TARGET_NO_PIC && symbolic_operand (op1, DImode)) else if (!TARGET_NO_PIC &&
(symbolic_operand (op1, Pmode) ||
symbolic_operand (op1, ptr_mode)))
{ {
/* Before optimization starts, delay committing to any particular /* Before optimization starts, delay committing to any particular
type of PIC address load. If this function gets deferred, we type of PIC address load. If this function gets deferred, we
@ -1208,7 +1218,10 @@ ia64_expand_move (op0, op1)
&& (SYMBOL_REF_FLAG (op1) && (SYMBOL_REF_FLAG (op1)
|| CONSTANT_POOL_ADDRESS_P (op1) || CONSTANT_POOL_ADDRESS_P (op1)
|| STRING_POOL_ADDRESS_P (op1)))) || STRING_POOL_ADDRESS_P (op1))))
emit_insn (gen_movdi_symbolic (op0, op1)); if (GET_MODE (op1) == DImode)
emit_insn (gen_movdi_symbolic (op0, op1));
else
emit_insn (gen_movsi_symbolic (op0, op1));
else else
ia64_expand_load_address (op0, op1, NULL_RTX); ia64_expand_load_address (op0, op1, NULL_RTX);
return NULL_RTX; return NULL_RTX;
@ -2857,12 +2870,16 @@ ia64_assemble_integer (x, size, aligned_p)
unsigned int size; unsigned int size;
int aligned_p; int aligned_p;
{ {
if (size == UNITS_PER_WORD && aligned_p if (size == (TARGET_ILP32 ? 4 : 8)
&& aligned_p
&& !(TARGET_NO_PIC || TARGET_AUTO_PIC) && !(TARGET_NO_PIC || TARGET_AUTO_PIC)
&& GET_CODE (x) == SYMBOL_REF && GET_CODE (x) == SYMBOL_REF
&& SYMBOL_REF_FLAG (x)) && SYMBOL_REF_FLAG (x))
{ {
fputs ("\tdata8\t@fptr(", asm_out_file); if (TARGET_ILP32)
fputs ("\tdata4\t@fptr(", asm_out_file);
else
fputs ("\tdata8\t@fptr(", asm_out_file);
output_addr_const (asm_out_file, x); output_addr_const (asm_out_file, x);
fputs (")\n", asm_out_file); fputs (")\n", asm_out_file);
return true; return true;
@ -7631,6 +7648,10 @@ ia64_expand_fetch_and_op (binoptab, mode, arglist, target)
arg0 = TREE_VALUE (arglist); arg0 = TREE_VALUE (arglist);
arg1 = TREE_VALUE (TREE_CHAIN (arglist)); arg1 = TREE_VALUE (TREE_CHAIN (arglist));
mem = expand_expr (arg0, NULL_RTX, Pmode, 0); mem = expand_expr (arg0, NULL_RTX, Pmode, 0);
#ifdef POINTERS_EXTEND_UNSIGNED
if (GET_MODE(mem) != Pmode)
mem = convert_memory_address (Pmode, mem);
#endif
value = expand_expr (arg1, NULL_RTX, mode, 0); value = expand_expr (arg1, NULL_RTX, mode, 0);
mem = gen_rtx_MEM (mode, force_reg (Pmode, mem)); mem = gen_rtx_MEM (mode, force_reg (Pmode, mem));
@ -7708,6 +7729,11 @@ ia64_expand_op_and_fetch (binoptab, mode, arglist, target)
arg0 = TREE_VALUE (arglist); arg0 = TREE_VALUE (arglist);
arg1 = TREE_VALUE (TREE_CHAIN (arglist)); arg1 = TREE_VALUE (TREE_CHAIN (arglist));
mem = expand_expr (arg0, NULL_RTX, Pmode, 0); mem = expand_expr (arg0, NULL_RTX, Pmode, 0);
#ifdef POINTERS_EXTEND_UNSIGNED
if (GET_MODE(mem) != Pmode)
mem = convert_memory_address (Pmode, mem);
#endif
value = expand_expr (arg1, NULL_RTX, mode, 0); value = expand_expr (arg1, NULL_RTX, mode, 0);
mem = gen_rtx_MEM (mode, force_reg (Pmode, mem)); mem = gen_rtx_MEM (mode, force_reg (Pmode, mem));
@ -7771,11 +7797,11 @@ ia64_expand_compare_and_swap (mode, boolp, arglist, target)
arg0 = TREE_VALUE (arglist); arg0 = TREE_VALUE (arglist);
arg1 = TREE_VALUE (TREE_CHAIN (arglist)); arg1 = TREE_VALUE (TREE_CHAIN (arglist));
arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist))); arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
mem = expand_expr (arg0, NULL_RTX, Pmode, 0); mem = expand_expr (arg0, NULL_RTX, ptr_mode, 0);
old = expand_expr (arg1, NULL_RTX, mode, 0); old = expand_expr (arg1, NULL_RTX, mode, 0);
new = expand_expr (arg2, NULL_RTX, mode, 0); new = expand_expr (arg2, NULL_RTX, mode, 0);
mem = gen_rtx_MEM (mode, force_reg (Pmode, mem)); mem = gen_rtx_MEM (mode, force_reg (ptr_mode, mem));
MEM_VOLATILE_P (mem) = 1; MEM_VOLATILE_P (mem) = 1;
if (! register_operand (old, mode)) if (! register_operand (old, mode))
@ -7820,10 +7846,10 @@ ia64_expand_lock_test_and_set (mode, arglist, target)
arg0 = TREE_VALUE (arglist); arg0 = TREE_VALUE (arglist);
arg1 = TREE_VALUE (TREE_CHAIN (arglist)); arg1 = TREE_VALUE (TREE_CHAIN (arglist));
mem = expand_expr (arg0, NULL_RTX, Pmode, 0); mem = expand_expr (arg0, NULL_RTX, ptr_mode, 0);
new = expand_expr (arg1, NULL_RTX, mode, 0); new = expand_expr (arg1, NULL_RTX, mode, 0);
mem = gen_rtx_MEM (mode, force_reg (Pmode, mem)); mem = gen_rtx_MEM (mode, force_reg (ptr_mode, mem));
MEM_VOLATILE_P (mem) = 1; MEM_VOLATILE_P (mem) = 1;
if (! register_operand (new, mode)) if (! register_operand (new, mode))
new = copy_to_mode_reg (mode, new); new = copy_to_mode_reg (mode, new);
@ -7854,9 +7880,9 @@ ia64_expand_lock_release (mode, arglist, target)
rtx mem; rtx mem;
arg0 = TREE_VALUE (arglist); arg0 = TREE_VALUE (arglist);
mem = expand_expr (arg0, NULL_RTX, Pmode, 0); mem = expand_expr (arg0, NULL_RTX, ptr_mode, 0);
mem = gen_rtx_MEM (mode, force_reg (Pmode, mem)); mem = gen_rtx_MEM (mode, force_reg (ptr_mode, mem));
MEM_VOLATILE_P (mem) = 1; MEM_VOLATILE_P (mem) = 1;
emit_move_insn (mem, const0_rtx); emit_move_insn (mem, const0_rtx);

37
gcc/config/ia64/ia64.md
View File

@ -1,5 +1,5 @@
;; IA-64 Machine description template ;; IA-64 Machine description template
;; Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc. ;; Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
;; Contributed by James E. Wilson <wilson@cygnus.com> and ;; Contributed by James E. Wilson <wilson@cygnus.com> and
;; David Mosberger <davidm@hpl.hp.com>. ;; David Mosberger <davidm@hpl.hp.com>.
@ -340,6 +340,29 @@
operands[1] = op1; operands[1] = op1;
}) })
;; This is used during early compilation to delay the decision on
;; how to refer to a variable as long as possible. This is especially
;; important between initial rtl generation and optimization for
;; deferred functions, since we may acquire additional information
;; on the variables used in the meantime.
(define_insn_and_split "movsi_symbolic"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "symbolic_operand" "s"))
(clobber (match_scratch:DI 2 "=r"))
(use (reg:DI 1))]
""
"* abort ();"
"!no_new_pseudos || reload_completed"
[(const_int 0)]
{
rtx scratch = operands[2];
if (!reload_completed)
scratch = gen_reg_rtx (Pmode);
ia64_expand_load_address (operands[0], operands[1], scratch);
DONE;
})
(define_insn "*movsi_internal" (define_insn "*movsi_internal"
[(set (match_operand:SI 0 "destination_operand" "=r,r,r,r, m, r,*f,*f, r,*d") [(set (match_operand:SI 0 "destination_operand" "=r,r,r,r, m, r,*f,*f, r,*d")
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rK"))] (match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rK"))]
@ -387,7 +410,7 @@
{ {
rtx scratch = operands[2]; rtx scratch = operands[2];
if (!reload_completed) if (!reload_completed)
gen_reg_rtx (Pmode); scratch = gen_reg_rtx (Pmode);
ia64_expand_load_address (operands[0], operands[1], scratch); ia64_expand_load_address (operands[0], operands[1], scratch);
DONE; DONE;
}) })
@ -440,7 +463,7 @@
(define_expand "load_fptr" (define_expand "load_fptr"
[(set (match_dup 2) [(set (match_dup 2)
(plus:DI (reg:DI 1) (match_operand:DI 1 "function_operand" ""))) (plus:DI (reg:DI 1) (match_operand 1 "function_operand" "")))
(set (match_operand:DI 0 "register_operand" "") (match_dup 3))] (set (match_operand:DI 0 "register_operand" "") (match_dup 3))]
"" ""
{ {
@ -451,14 +474,14 @@
(define_insn "*load_fptr_internal1" (define_insn "*load_fptr_internal1"
[(set (match_operand:DI 0 "register_operand" "=r") [(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI (reg:DI 1) (match_operand:DI 1 "function_operand" "s")))] (plus:DI (reg:DI 1) (match_operand 1 "function_operand" "s")))]
"" ""
"addl %0 = @ltoff(@fptr(%1)), gp" "addl %0 = @ltoff(@fptr(%1)), gp"
[(set_attr "itanium_class" "ialu")]) [(set_attr "itanium_class" "ialu")])
(define_insn "load_gprel" (define_insn "load_gprel"
[(set (match_operand:DI 0 "register_operand" "=r") [(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI (reg:DI 1) (match_operand:DI 1 "sdata_symbolic_operand" "s")))] (plus:DI (reg:DI 1) (match_operand 1 "sdata_symbolic_operand" "s")))]
"" ""
"addl %0 = @gprel(%1), gp" "addl %0 = @gprel(%1), gp"
[(set_attr "itanium_class" "ialu")]) [(set_attr "itanium_class" "ialu")])
@ -494,7 +517,7 @@
(define_insn "*load_symptr_internal1" (define_insn "*load_symptr_internal1"
[(set (match_operand:DI 0 "register_operand" "=r") [(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI (reg:DI 1) (match_operand:DI 1 "got_symbolic_operand" "s")))] (plus:DI (reg:DI 1) (match_operand 1 "got_symbolic_operand" "s")))]
"" ""
"addl %0 = @ltoff(%1), gp" "addl %0 = @ltoff(%1), gp"
[(set_attr "itanium_class" "ialu")]) [(set_attr "itanium_class" "ialu")])
@ -4749,7 +4772,7 @@
[(set_attr "itanium_class" "br,scall")]) [(set_attr "itanium_class" "br,scall")])
(define_insn "call_pic" (define_insn "call_pic"
[(call (mem:DI (match_operand:DI 0 "call_operand" "b,i")) [(call (mem (match_operand 0 "call_operand" "b,i"))
(match_operand 1 "" "")) (match_operand 1 "" ""))
(use (unspec [(reg:DI 1)] UNSPEC_PIC_CALL)) (use (unspec [(reg:DI 1)] UNSPEC_PIC_CALL))
(clobber (match_operand:DI 2 "register_operand" "=b,b"))] (clobber (match_operand:DI 2 "register_operand" "=b,b"))]

33
gcc/explow.c
View File

@ -363,36 +363,28 @@ convert_memory_address (to_mode, x)
return x; return x;
case SUBREG: case SUBREG:
if (POINTERS_EXTEND_UNSIGNED >= 0 if ((SUBREG_PROMOTED_VAR_P (x) || REG_POINTER (SUBREG_REG (x)))
&& (SUBREG_PROMOTED_VAR_P (x) || REG_POINTER (SUBREG_REG (x)))
&& GET_MODE (SUBREG_REG (x)) == to_mode) && GET_MODE (SUBREG_REG (x)) == to_mode)
return SUBREG_REG (x); return SUBREG_REG (x);
break; break;
case LABEL_REF: case LABEL_REF:
if (POINTERS_EXTEND_UNSIGNED >= 0) temp = gen_rtx_LABEL_REF (to_mode, XEXP (x, 0));
{ LABEL_REF_NONLOCAL_P (temp) = LABEL_REF_NONLOCAL_P (x);
temp = gen_rtx_LABEL_REF (to_mode, XEXP (x, 0)); return temp;
LABEL_REF_NONLOCAL_P (temp) = LABEL_REF_NONLOCAL_P (x);
return temp;
}
break; break;
case SYMBOL_REF: case SYMBOL_REF:
if (POINTERS_EXTEND_UNSIGNED >= 0) temp = gen_rtx_SYMBOL_REF (to_mode, XSTR (x, 0));
{ SYMBOL_REF_FLAG (temp) = SYMBOL_REF_FLAG (x);
temp = gen_rtx_SYMBOL_REF (to_mode, XSTR (x, 0)); CONSTANT_POOL_ADDRESS_P (temp) = CONSTANT_POOL_ADDRESS_P (x);
SYMBOL_REF_FLAG (temp) = SYMBOL_REF_FLAG (x); STRING_POOL_ADDRESS_P (temp) = STRING_POOL_ADDRESS_P (x);
CONSTANT_POOL_ADDRESS_P (temp) = CONSTANT_POOL_ADDRESS_P (x); return temp;
STRING_POOL_ADDRESS_P (temp) = STRING_POOL_ADDRESS_P (x);
return temp;
}
break; break;
case CONST: case CONST:
if (POINTERS_EXTEND_UNSIGNED >= 0) return gen_rtx_CONST (to_mode,
return gen_rtx_CONST (to_mode, convert_memory_address (to_mode, XEXP (x, 0)));
convert_memory_address (to_mode, XEXP (x, 0)));
break; break;
case PLUS: case PLUS:
@ -401,8 +393,7 @@ convert_memory_address (to_mode, x)
permute the conversion and addition operation. We can always safely permute the conversion and addition operation. We can always safely
permute them if we are making the address narrower. In addition, permute them if we are making the address narrower. In addition,
always permute the operations if this is a constant. */ always permute the operations if this is a constant. */
if (POINTERS_EXTEND_UNSIGNED >= 0 if ((GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (from_mode)
&& (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (from_mode)
|| (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT || (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT
&& (INTVAL (XEXP (x, 1)) + 20000 < 40000 && (INTVAL (XEXP (x, 1)) + 20000 < 40000
|| CONSTANT_P (XEXP (x, 0)))))) || CONSTANT_P (XEXP (x, 0))))))