[AArch64] Pass number of units to aarch64_expand_vec_perm(_const)
This patch passes the number of units to aarch64_expand_vec_perm and aarch64_expand_vec_perm_const, which avoids a to_constant () once GET_MODE_NUNITS is variable. 2017-11-06 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm) (aarch64_expand_vec_perm_const): Take the number of units too. * config/aarch64/aarch64.c (aarch64_expand_vec_perm) (aarch64_expand_vec_perm_const): Likewise. * config/aarch64/aarch64-simd.md (vec_perm_const<mode>) (vec_perm<mode>): Update accordingly. Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com> Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r254469
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@ -1,3 +1,14 @@
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2017-11-06 Richard Sandiford <richard.sandiford@linaro.org>
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Alan Hayward <alan.hayward@arm.com>
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David Sherwood <david.sherwood@arm.com>
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* config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm)
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(aarch64_expand_vec_perm_const): Take the number of units too.
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* config/aarch64/aarch64.c (aarch64_expand_vec_perm)
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(aarch64_expand_vec_perm_const): Likewise.
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* config/aarch64/aarch64-simd.md (vec_perm_const<mode>)
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(vec_perm<mode>): Update accordingly.
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2017-11-06 Richard Sandiford <richard.sandiford@linaro.org>
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Alan Hayward <alan.hayward@arm.com>
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David Sherwood <david.sherwood@arm.com>
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@ -471,11 +471,11 @@ tree aarch64_builtin_rsqrt (unsigned int);
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tree aarch64_builtin_vectorized_function (unsigned int, tree, tree);
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extern void aarch64_split_combinev16qi (rtx operands[3]);
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extern void aarch64_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
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extern void aarch64_expand_vec_perm (rtx, rtx, rtx, rtx, unsigned int);
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extern bool aarch64_madd_needs_nop (rtx_insn *);
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extern void aarch64_final_prescan_insn (rtx_insn *);
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extern bool
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aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel);
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aarch64_expand_vec_perm_const (rtx, rtx, rtx, rtx, unsigned int);
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void aarch64_atomic_assign_expand_fenv (tree *, tree *, tree *);
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int aarch64_ccmp_mode_to_code (machine_mode mode);
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@ -5239,7 +5239,7 @@
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"TARGET_SIMD"
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{
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if (aarch64_expand_vec_perm_const (operands[0], operands[1],
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operands[2], operands[3]))
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operands[2], operands[3], <nunits>))
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DONE;
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else
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FAIL;
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@ -5253,7 +5253,7 @@
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"TARGET_SIMD"
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{
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aarch64_expand_vec_perm (operands[0], operands[1],
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operands[2], operands[3]);
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operands[2], operands[3], <nunits>);
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DONE;
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})
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@ -13242,11 +13242,14 @@ aarch64_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel)
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}
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}
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/* Expand a vec_perm with the operands given by TARGET, OP0, OP1 and SEL.
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NELT is the number of elements in the vector. */
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void
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aarch64_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel)
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aarch64_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel,
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unsigned int nelt)
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{
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machine_mode vmode = GET_MODE (target);
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unsigned int nelt = GET_MODE_NUNITS (vmode);
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bool one_vector_p = rtx_equal_p (op0, op1);
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rtx mask;
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@ -13602,13 +13605,15 @@ aarch64_expand_vec_perm_const_1 (struct expand_vec_perm_d *d)
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return false;
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}
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/* Expand a vec_perm_const pattern. */
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/* Expand a vec_perm_const pattern with the operands given by TARGET,
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OP0, OP1 and SEL. NELT is the number of elements in the vector. */
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bool
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aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel)
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aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel,
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unsigned int nelt)
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{
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struct expand_vec_perm_d d;
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int i, nelt, which;
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unsigned int i, which;
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d.target = target;
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d.op0 = op0;
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@ -13618,12 +13623,11 @@ aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel)
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gcc_assert (VECTOR_MODE_P (d.vmode));
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d.testing_p = false;
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nelt = GET_MODE_NUNITS (d.vmode);
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d.perm.reserve (nelt);
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for (i = which = 0; i < nelt; ++i)
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{
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rtx e = XVECEXP (sel, 0, i);
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int ei = INTVAL (e) & (2 * nelt - 1);
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unsigned int ei = INTVAL (e) & (2 * nelt - 1);
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which |= (ei < nelt ? 1 : 2);
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d.perm.quick_push (ei);
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}
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