sparc.c (print_operand): Add 's' to sign-extend.
* config/sparc/sparc.c (print_operand): Add 's' to sign-extend. * config/sparc/sparc.md (const_mulsidi3_v8plus): Fix mode of integral constant mult operand. (const_mulsidi3_sp32, const_mulsidi3_sp64): Likewise. (const_smulsi3_highpart_v8plus): Likewise. (const_smulsi3_highpart): Likewise. (const_umulsidi3_sp32): Likewise; sign-extend it in the output. (const_umulsidi3_sp64, const_umulsidi3_v8plus): Likewise. (const_umulsi3_highpart_v8plus): Likewise. (const_umulsi3_highpart): Likewise. From-SVN: r66179
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@ -1,3 +1,16 @@
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2003-04-28 Richard Henderson <rth@redhat.com>
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* config/sparc/sparc.c (print_operand): Add 's' to sign-extend.
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* config/sparc/sparc.md (const_mulsidi3_v8plus): Fix mode of
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integral constant mult operand.
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(const_mulsidi3_sp32, const_mulsidi3_sp64): Likewise.
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(const_smulsi3_highpart_v8plus): Likewise.
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(const_smulsi3_highpart): Likewise.
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(const_umulsidi3_sp32): Likewise; sign-extend it in the output.
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(const_umulsidi3_sp64, const_umulsidi3_v8plus): Likewise.
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(const_umulsi3_highpart_v8plus): Likewise.
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(const_umulsi3_highpart): Likewise.
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2003-04-28 David O'Brien <obrien@FreeBSD.org>
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* config/i386/x86-64.h (NO_PROFILE_COUNTERS, HAVE_AS_DWARF2_DEBUG_LINE):
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@ -6472,6 +6472,21 @@ print_operand (file, x, code)
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output_address (XEXP (x, 0));
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return;
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case 's':
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{
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/* Print a sign-extended 32-bit value. */
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HOST_WIDE_INT i;
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if (GET_CODE(x) == CONST_INT)
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i = INTVAL (x);
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else if (GET_CODE(x) == CONST_DOUBLE)
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i = CONST_DOUBLE_LOW (x);
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else
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output_operand_lossage ("invalid %%s operand");
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i = trunc_int_for_mode (i, SImode);
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fprintf (file, HOST_WIDE_INT_PRINT_DEC, i);
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return;
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}
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case 0:
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/* Do nothing special. */
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break;
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@ -5323,7 +5323,7 @@
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(define_insn "const_mulsidi3_v8plus"
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[(set (match_operand:DI 0 "register_operand" "=h,r")
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(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r,r"))
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(match_operand:SI 2 "small_int" "I,I")))
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(match_operand:DI 2 "small_int" "I,I")))
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(clobber (match_scratch:SI 3 "=X,&h"))]
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"TARGET_V8PLUS"
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"@
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@ -5364,7 +5364,7 @@
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(define_insn "const_mulsidi3_sp32"
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[(set (match_operand:DI 0 "register_operand" "=r")
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(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
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(match_operand:SI 2 "small_int" "I")))]
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(match_operand:DI 2 "small_int" "I")))]
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"TARGET_HARD_MUL32"
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{
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return TARGET_SPARCLET
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@ -5381,7 +5381,7 @@
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(define_insn "const_mulsidi3_sp64"
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[(set (match_operand:DI 0 "register_operand" "=r")
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(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
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(match_operand:SI 2 "small_int" "I")))]
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(match_operand:DI 2 "small_int" "I")))]
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"TARGET_DEPRECATED_V8_INSNS && TARGET_ARCH64"
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"smul\t%1, %2, %0"
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[(set_attr "type" "imul")])
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@ -5453,7 +5453,7 @@
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[(set (match_operand:SI 0 "register_operand" "=h,r")
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(truncate:SI
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(lshiftrt:DI (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r,r"))
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(match_operand 2 "small_int" "i,i"))
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(match_operand:DI 2 "small_int" "i,i"))
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(match_operand:SI 3 "const_int_operand" "i,i"))))
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(clobber (match_scratch:SI 4 "=X,&h"))]
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"TARGET_V8PLUS"
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@ -5480,7 +5480,7 @@
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[(set (match_operand:SI 0 "register_operand" "=r")
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(truncate:SI
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(lshiftrt:DI (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
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(match_operand:SI 2 "register_operand" "r"))
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(match_operand:DI 2 "small_int" "i"))
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(const_int 32))))]
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"TARGET_HARD_MUL32"
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"smul\t%1, %2, %%g0\n\trd\t%%y, %0"
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@ -5558,12 +5558,12 @@
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(define_insn "const_umulsidi3_sp32"
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[(set (match_operand:DI 0 "register_operand" "=r")
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(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
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(match_operand:SI 2 "uns_small_int" "")))]
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(match_operand:DI 2 "uns_small_int" "")))]
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"TARGET_HARD_MUL32"
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{
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return TARGET_SPARCLET
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? "umuld\t%1, %2, %L0"
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: "umul\t%1, %2, %L0\n\trd\t%%y, %H0";
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? "umuld\t%1, %s2, %L0"
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: "umul\t%1, %s2, %L0\n\trd\t%%y, %H0";
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}
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[(set (attr "type")
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(if_then_else (eq_attr "isa" "sparclet")
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@ -5575,21 +5575,21 @@
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(define_insn "const_umulsidi3_sp64"
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[(set (match_operand:DI 0 "register_operand" "=r")
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(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
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(match_operand:SI 2 "uns_small_int" "")))]
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(match_operand:DI 2 "uns_small_int" "")))]
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"TARGET_DEPRECATED_V8_INSNS && TARGET_ARCH64"
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"umul\t%1, %2, %0"
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"umul\t%1, %s2, %0"
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[(set_attr "type" "imul")])
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;; XXX
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(define_insn "const_umulsidi3_v8plus"
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[(set (match_operand:DI 0 "register_operand" "=h,r")
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(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r,r"))
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(match_operand:SI 2 "uns_small_int" "")))
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(match_operand:DI 2 "uns_small_int" "")))
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(clobber (match_scratch:SI 3 "=X,h"))]
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"TARGET_V8PLUS"
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"@
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umul\t%1, %2, %L0\n\tsrlx\t%L0, 32, %H0
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umul\t%1, %2, %3\n\tsrlx\t%3, 32, %H0\n\tmov\t%3, %L0"
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umul\t%1, %s2, %L0\n\tsrlx\t%L0, 32, %H0
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umul\t%1, %s2, %3\n\tsrlx\t%3, 32, %H0\n\tmov\t%3, %L0"
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[(set_attr "type" "multi")
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(set_attr "length" "2,3")])
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@ -5642,13 +5642,13 @@
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[(set (match_operand:SI 0 "register_operand" "=h,r")
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(truncate:SI
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(lshiftrt:DI (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r,r"))
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(match_operand:SI 2 "uns_small_int" ""))
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(match_operand:DI 2 "uns_small_int" ""))
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(match_operand:SI 3 "const_int_operand" "i,i"))))
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(clobber (match_scratch:SI 4 "=X,h"))]
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"TARGET_V8PLUS"
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"@
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umul\t%1, %2, %0\n\tsrlx\t%0, %3, %0
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umul\t%1, %2, %4\n\tsrlx\t%4, %3, %0"
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umul\t%1, %s2, %0\n\tsrlx\t%0, %3, %0
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umul\t%1, %s2, %4\n\tsrlx\t%4, %3, %0"
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[(set_attr "type" "multi")
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(set_attr "length" "2")])
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@ -5669,10 +5669,10 @@
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[(set (match_operand:SI 0 "register_operand" "=r")
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(truncate:SI
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(lshiftrt:DI (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
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(match_operand:SI 2 "uns_small_int" ""))
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(match_operand:DI 2 "uns_small_int" ""))
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(const_int 32))))]
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"TARGET_HARD_MUL32"
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"umul\t%1, %2, %%g0\n\trd\t%%y, %0"
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"umul\t%1, %s2, %%g0\n\trd\t%%y, %0"
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[(set_attr "type" "multi")
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(set_attr "length" "2")])
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