re PR target/79495 (ICE in extract_constrain_insn, at recog.c:2213)
PR target/79495 * config/i386/i386.md (*movxf_internal): Add (o,rC) alternative. testsuite/ChangeLog: 2017-02-14 Uros Bizjak <ubizjak@gmail.com> PR target/79495 * gcc.target/i386/pr79495.c: New test. From-SVN: r245441
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@ -1,3 +1,8 @@
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2017-02-14 Uros Bizjak <ubizjak@gmail.com>
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PR target/79495
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* config/i386/i386.md (*movxf_internal): Add (o,rC) alternative.
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2017-02-14 H.J. Lu <hongjiu.lu@intel.com>
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2017-02-14 H.J. Lu <hongjiu.lu@intel.com>
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PR target/79498
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PR target/79498
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@ -3248,9 +3248,9 @@
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;; in alternatives 4, 6, 7 and 8.
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;; in alternatives 4, 6, 7 and 8.
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(define_insn "*movxf_internal"
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(define_insn "*movxf_internal"
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[(set (match_operand:XF 0 "nonimmediate_operand"
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[(set (match_operand:XF 0 "nonimmediate_operand"
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"=f,m,f,?r ,!o,?*r ,!o,!o,!o,r ,o")
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"=f,m,f,?r ,!o,?*r ,!o,!o,!o,r ,o ,o")
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(match_operand:XF 1 "general_operand"
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(match_operand:XF 1 "general_operand"
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"fm,f,G,roF,r , *roF,*r,F ,C,roF,rF"))]
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"fm,f,G,roF,r ,*roF,*r,F ,C ,roF,rF,rC"))]
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"!(MEM_P (operands[0]) && MEM_P (operands[1]))
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"!(MEM_P (operands[0]) && MEM_P (operands[1]))
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&& (lra_in_progress || reload_completed
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&& (lra_in_progress || reload_completed
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|| !CONST_DOUBLE_P (operands[1])
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|| !CONST_DOUBLE_P (operands[1])
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@ -3277,19 +3277,19 @@
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}
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}
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}
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}
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[(set (attr "isa")
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[(set (attr "isa")
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(cond [(eq_attr "alternative" "7")
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(cond [(eq_attr "alternative" "7,10")
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(const_string "nox64")
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(const_string "nox64")
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(eq_attr "alternative" "8")
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(eq_attr "alternative" "8,11")
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(const_string "x64")
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(const_string "x64")
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]
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]
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(const_string "*")))
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(const_string "*")))
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(set (attr "type")
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(set (attr "type")
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(cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10")
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(cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10,11")
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(const_string "multi")
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(const_string "multi")
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]
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]
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(const_string "fmov")))
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(const_string "fmov")))
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(set (attr "mode")
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(set (attr "mode")
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(cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10")
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(cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10,11")
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(if_then_else (match_test "TARGET_64BIT")
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(if_then_else (match_test "TARGET_64BIT")
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(const_string "DI")
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(const_string "DI")
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(const_string "SI"))
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(const_string "SI"))
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@ -3300,7 +3300,7 @@
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(symbol_ref "false")]
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(symbol_ref "false")]
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(symbol_ref "true")))
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(symbol_ref "true")))
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(set (attr "enabled")
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(set (attr "enabled")
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(cond [(eq_attr "alternative" "9,10")
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(cond [(eq_attr "alternative" "9,10,11")
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(if_then_else
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(if_then_else
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(match_test "TARGET_HARD_XF_REGS")
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(match_test "TARGET_HARD_XF_REGS")
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(symbol_ref "false")
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(symbol_ref "false")
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@ -1,3 +1,8 @@
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2017-02-14 Uros Bizjak <ubizjak@gmail.com>
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PR target/79495
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* gcc.target/i386/pr79495.c: New test.
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2017-02-14 Marek Polacek <polacek@redhat.com>
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2017-02-14 Marek Polacek <polacek@redhat.com>
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PR c++/79420
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PR c++/79420
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11
gcc/testsuite/gcc.target/i386/pr79495.c
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11
gcc/testsuite/gcc.target/i386/pr79495.c
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@ -0,0 +1,11 @@
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/* PR target/79495 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -msoft-float" } */
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long double dnan = 1.0l/0.0l - 1.0l/0.0l;
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long double x = 1.0l;
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void fn1 (void)
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{
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if (dnan != x)
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x = 1.0;
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}
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