arm: Fix the failing mve scalar shift execution tests.

In GCC testsuite the MVE scalar shift execution tests (mve_scalar_shifts[1-4].c) are failings
because of executing them on target hardware which doesn't support MVE instructions. This patch
restricts those tests to execute only on target hardware that support MVE instructions.

2020-06-22  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

gcc/
	* doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
	(arm_mve_hw): Likewise.

gcc/testsuite/
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts1.c: Modify.
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c: Likewise.
	* lib/target-supports.exp (check_effective_target_arm_mve_hw): Define.
This commit is contained in:
Srinath Parvathaneni 2020-06-22 17:11:19 +01:00
parent 647340c92a
commit 99abb146fd
6 changed files with 31 additions and 4 deletions

View File

@ -1925,6 +1925,15 @@ ARM target supports options to generate instructions from ARMv8.1-M with
the M-Profile Vector Extension (MVE). Some multilibs may be incompatible
with these options.
@item arm_v8_1m_mve_fp_ok
ARM target supports options to generate instructions from ARMv8.1-M with
the Half-precision floating-point instructions (HP), Floating-point Extension
(FP) along with M-Profile Vector Extension (MVE). Some multilibs may be
incompatible with these options.
@item arm_mve_hw
Test system supports executing MVE instructions.
@item arm_v8m_main_cde
ARM target supports options to generate instructions from ARMv8-M with
the Custom Datapath Extension (CDE). Some multilibs may be incompatible

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@ -1,5 +1,5 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-require-effective-target arm_mve_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_v8_1m_mve } */

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@ -1,5 +1,5 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-require-effective-target arm_mve_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_v8_1m_mve } */

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@ -1,5 +1,5 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-require-effective-target arm_mve_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_v8_1m_mve } */

View File

@ -1,5 +1,5 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-require-effective-target arm_mve_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_v8_1m_mve } */

View File

@ -4671,6 +4671,24 @@ proc check_effective_target_arm_cmse_ok {} {
} "-mcmse"];
}
# Return 1 if the target supports executing MVE instructions, 0
# otherwise.
proc check_effective_target_arm_mve_hw {} {
return [check_runtime arm_mve_hw_available {
int
main (void)
{
long long a = 16;
int b = 3;
asm ("sqrshrl %Q1, %R1, #64, %2"
: "=l" (a)
: "0" (a), "r" (b));
return (a != 2);
}
} ""]
}
# Return 1 if this is an ARM target where ARMv8-M Security Extensions with
# clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.