optabs.c (expand_copysign_absneg): Make static.
* optabs.c (expand_copysign_absneg): Make static. * optabs.h (expand_copysign_absneg): Delete prototype. * config/rs6000/rs6000.md (copysigntf3): Delete pattern. From-SVN: r96572
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@ -1,3 +1,9 @@
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2005-03-16 Roger Sayle <roger@eyesopen.com>
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* optabs.c (expand_copysign_absneg): Make static.
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* optabs.h (expand_copysign_absneg): Delete prototype.
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* config/rs6000/rs6000.md (copysigntf3): Delete pattern.
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2005-03-16 Richard Henderson <rth@redhat.com>
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2005-03-16 Richard Henderson <rth@redhat.com>
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PR middle-end/15700
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PR middle-end/15700
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@ -8492,33 +8492,6 @@
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operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word);
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operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word);
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operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);
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operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);
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}")
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}")
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(define_expand "copysigntf3"
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[(match_operand:TF 0 "general_operand" "")
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(match_operand:TF 1 "general_operand" "")
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(match_operand:TF 2 "general_operand" "")]
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"(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
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&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
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{
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rtx target, op0, op1, temp;
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bool op0_is_abs = false;
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target = operands[0];
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op0 = operands[1];
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op1 = operands[2];
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if (GET_CODE (op0) == CONST_DOUBLE)
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{
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if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
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op0 = simplify_unary_operation (ABS, TFmode, op0, TFmode);
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op0_is_abs = true;
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}
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temp = expand_copysign_absneg (TFmode, op0, op1, target, 127, op0_is_abs);
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if (temp != target)
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emit_move_insn (target, temp);
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DONE;
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})
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;; Next come the multi-word integer load and store and the load and store
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;; Next come the multi-word integer load and store and the load and store
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;; multiple insns.
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;; multiple insns.
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@ -2678,7 +2678,7 @@ expand_abs (enum machine_mode mode, rtx op0, rtx target,
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is that we have a split register file, and leaving op0 in fp registers,
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is that we have a split register file, and leaving op0 in fp registers,
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and not playing with subregs so much, will help the register allocator. */
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and not playing with subregs so much, will help the register allocator. */
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rtx
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static rtx
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expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
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expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
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int bitpos, bool op0_is_abs)
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int bitpos, bool op0_is_abs)
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{
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{
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@ -463,7 +463,6 @@ extern rtx expand_abs (enum machine_mode, rtx, rtx, int, int);
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/* Expand the copysign operation. */
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/* Expand the copysign operation. */
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extern rtx expand_copysign (rtx, rtx, rtx);
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extern rtx expand_copysign (rtx, rtx, rtx);
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extern rtx expand_copysign_absneg (enum machine_mode, rtx, rtx, rtx, int, bool);
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/* Generate an instruction with a given INSN_CODE with an output and
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/* Generate an instruction with a given INSN_CODE with an output and
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an input. */
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an input. */
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