(extendsidi2,zero_extendsidi2): New patterns.
(adddi3,subdi3): Don't emit code for low part if known to be zero. From-SVN: r3187
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43940f6bb9
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9c530261cb
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@ -1025,17 +1025,36 @@
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return AS2 (movz%B0%L0,%1,%0);
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#endif
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}")
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(define_insn "zero_extendsidi2"
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[(set (match_operand:DI 0 "register_operand" "=r")
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(zero_extend:DI
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(match_operand:SI 1 "register_operand" "0")))]
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""
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"*
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{
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operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
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return AS2 (xor%L0,%0,%0);
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}")
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;;- sign extension instructions
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/*
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(define_insn "extendsidi2"
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[(set (match_operand:DI 0 "general_operand" "=a")
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[(set (match_operand:DI 0 "register_operand" "=r")
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(sign_extend:DI
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(match_operand:SI 1 "nonimmediate_operand" "a")))]
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(match_operand:SI 1 "register_operand" "0")))]
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""
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"clq")
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*/
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"*
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{
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if (REGNO (operands[0]) == 0)
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return \"clq\";
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operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]));
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output_asm_insn (AS2 (mov%L0,%0,%1), operands);
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operands[0] = GEN_INT (31);
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return AS2 (sar%L1,%0,%1);
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}")
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;; Note that the i386 programmers' manual says that the opcodes
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;; are named movsx..., but the assembler on Unix does not accept that.
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@ -1395,8 +1414,13 @@
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split_di (operands, 3, low, high);
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output_asm_insn (AS2 (add%L0,%2,%0), low);
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output_asm_insn (AS2 (adc%L0,%2,%0), high);
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if (GET_CODE (low[2]) != CONST_INT || INTVAL (low[2]) != 0)
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{
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output_asm_insn (AS2 (add%L0,%2,%0), low);
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output_asm_insn (AS2 (adc%L0,%2,%0), high);
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}
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else
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output_asm_insn (AS2 (add%L0,%2,%0), high);
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RET;
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}")
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@ -1566,8 +1590,14 @@
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split_di (operands, 3, low, high);
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output_asm_insn (AS2 (sub%L0,%2,%0), low);
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output_asm_insn (AS2 (sbb%L0,%2,%0), high);
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if (GET_CODE (low[2]) != CONST_INT || INTVAL (low[2]) != 0)
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{
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output_asm_insn (AS2 (sub%L0,%2,%0), low);
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output_asm_insn (AS2 (sbb%L0,%2,%0), high);
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}
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else
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output_asm_insn (AS2 (sub%L0,%2,%0), high);
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RET;
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}")
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