[AArch64 costs 11/18] Improve costs for rotate and shift operations.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for rotates and shifts. Co-Authored-By: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> From-SVN: r210503
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@ -1,3 +1,9 @@
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2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
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Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
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rotates and shifts.
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2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
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Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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@ -5339,21 +5339,59 @@ cost_minus:
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*cost += extra_cost->alu.extend;
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return false;
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case ASHIFT:
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op0 = XEXP (x, 0);
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op1 = XEXP (x, 1);
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if (CONST_INT_P (op1))
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{
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/* LSL (immediate), UBMF, UBFIZ and friends. These are all
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aliases. */
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if (speed)
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*cost += extra_cost->alu.shift;
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/* We can incorporate zero/sign extend for free. */
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if (GET_CODE (op0) == ZERO_EXTEND
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|| GET_CODE (op0) == SIGN_EXTEND)
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op0 = XEXP (op0, 0);
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*cost += rtx_cost (op0, ASHIFT, 0, speed);
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return true;
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}
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else
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{
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/* LSLV. */
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if (speed)
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*cost += extra_cost->alu.shift_reg;
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return false; /* All arguments need to be in registers. */
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}
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case ROTATE:
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if (!CONST_INT_P (XEXP (x, 1)))
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*cost += COSTS_N_INSNS (2);
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/* Fall through. */
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case ROTATERT:
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case LSHIFTRT:
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case ASHIFT:
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case ASHIFTRT:
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op0 = XEXP (x, 0);
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op1 = XEXP (x, 1);
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/* Shifting by a register often takes an extra cycle. */
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if (speed && !CONST_INT_P (XEXP (x, 1)))
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*cost += extra_cost->alu.arith_shift_reg;
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if (CONST_INT_P (op1))
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{
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/* ASR (immediate) and friends. */
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if (speed)
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*cost += extra_cost->alu.shift;
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*cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed);
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return true;
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*cost += rtx_cost (op0, (enum rtx_code) code, 0, speed);
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return true;
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}
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else
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{
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/* ASR (register) and friends. */
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if (speed)
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*cost += extra_cost->alu.shift_reg;
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return false; /* All arguments need to be in registers. */
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}
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case HIGH:
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if (!CONSTANT_P (XEXP (x, 0)))
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