re PR target/51274 (Starting with GCC 4.5, powerpc generated different code for x != 0.)
gcc/ PR target/51274 PR target/53087 * config/rs6000/rs6000.md (ne0si): Remove unnecessary earlyclobber. Merge with... (ne0di): ... to... (ne0_<mode>): New. (plus_ne0si): Merge with... (plus_ne0di): ... to... (plus_ne0_<mode>): New. (compare_plus_ne0si): Merge with... (compare_plus_ne0di)... to... (compare_plus_ne0_<mode>): New. (compare_plus_ne0_<mode>_1): New. (plus_ne0si_compare): Merge with... (plus_ne0di_compare)... to... (plus_ne0_<mode>_compare): New. gcc/testsuite/ PR target/51274 PR target/53087 * gcc.target/powerpc/ppc-ne0-1.c: New. From-SVN: r191752
This commit is contained in:
Segher Boessenkool
Segher Boessenkool
parent
eecd08500a
commit
ba45a61315
@ -1,3 +1,22 @@
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2012-09-25 Segher Boessenkool <segher@kernel.crashing.org>
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PR target/51274
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PR target/53087
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* config/rs6000/rs6000.md (ne0si): Remove unnecessary
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earlyclobber. Merge with...
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(ne0di): ... to...
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(ne0_<mode>): New.
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(plus_ne0si): Merge with...
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(plus_ne0di): ... to...
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(plus_ne0_<mode>): New.
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(compare_plus_ne0si): Merge with...
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(compare_plus_ne0di)... to...
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(compare_plus_ne0_<mode>): New.
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(compare_plus_ne0_<mode>_1): New.
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(plus_ne0si_compare): Merge with...
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(plus_ne0di_compare)... to...
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(plus_ne0_<mode>_compare): New.
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2012-09-25 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/54089
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@ -11970,101 +11970,36 @@
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operands[3] = operands[1];
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})
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;; Simplify (ne X (const_int 0)) on the PowerPC. No need to on the Power,
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;; since it nabs/sr is just as fast.
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(define_insn "*ne0si"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=&r")
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(lshiftrt:SI (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))
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(const_int 31)))
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(clobber (match_scratch:SI 2 "=&r"))]
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"TARGET_32BIT && !TARGET_ISEL"
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(define_insn "*ne0_<mode>"
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[(set (match_operand:P 0 "gpc_reg_operand" "=r")
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(ne:P (match_operand:P 1 "gpc_reg_operand" "r")
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(const_int 0)))
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(clobber (match_scratch:P 2 "=&r"))]
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"!(TARGET_32BIT && TARGET_ISEL)"
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"addic %2,%1,-1\;subfe %0,%2,%1"
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[(set_attr "type" "two")
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(set_attr "length" "8")])
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(define_insn "*ne0di"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(lshiftrt:DI (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r")))
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(const_int 63)))
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(clobber (match_scratch:DI 2 "=&r"))]
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"TARGET_64BIT"
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"addic %2,%1,-1\;subfe %0,%2,%1"
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[(set_attr "type" "two")
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(set_attr "length" "8")])
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;; This is what (plus (ne X (const_int 0)) Y) looks like.
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(define_insn "*plus_ne0si"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(plus:SI (lshiftrt:SI
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(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))
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(const_int 31))
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(match_operand:SI 2 "gpc_reg_operand" "r")))
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(clobber (match_scratch:SI 3 "=&r"))]
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"TARGET_32BIT"
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(define_insn "*plus_ne0_<mode>"
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[(set (match_operand:P 0 "gpc_reg_operand" "=r")
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(plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r")
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(const_int 0))
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(match_operand:P 2 "gpc_reg_operand" "r")))
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(clobber (match_scratch:P 3 "=&r"))]
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""
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"addic %3,%1,-1\;addze %0,%2"
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[(set_attr "type" "two")
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(set_attr "length" "8")])
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(define_insn "*plus_ne0di"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(plus:DI (lshiftrt:DI
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r")))
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(const_int 63))
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(match_operand:DI 2 "gpc_reg_operand" "r")))
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(clobber (match_scratch:DI 3 "=&r"))]
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"TARGET_64BIT"
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"addic %3,%1,-1\;addze %0,%2"
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[(set_attr "type" "two")
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(set_attr "length" "8")])
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(define_insn "*compare_plus_ne0si"
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(define_insn "*compare_plus_ne0_<mode>"
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[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
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(compare:CC
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(plus:SI (lshiftrt:SI
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(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")))
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(const_int 31))
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(match_operand:SI 2 "gpc_reg_operand" "r,r"))
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(const_int 0)))
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(clobber (match_scratch:SI 3 "=&r,&r"))
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(clobber (match_scratch:SI 4 "=X,&r"))]
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"TARGET_32BIT"
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"@
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addic %3,%1,-1\;addze. %3,%2
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#"
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[(set_attr "type" "compare")
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(set_attr "length" "8,12")])
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
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(compare:CC
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(plus:SI (lshiftrt:SI
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(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "")))
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(const_int 31))
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(match_operand:SI 2 "gpc_reg_operand" ""))
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(const_int 0)))
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(clobber (match_scratch:SI 3 ""))
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(clobber (match_scratch:SI 4 ""))]
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"TARGET_32BIT && reload_completed"
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[(parallel [(set (match_dup 3)
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(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1)))
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(const_int 31))
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(match_dup 2)))
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(clobber (match_dup 4))])
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(set (match_dup 0)
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(compare:CC (match_dup 3)
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(const_int 0)))]
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"")
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(define_insn "*compare_plus_ne0di"
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[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
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(compare:CC
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(plus:DI (lshiftrt:DI
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")))
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(const_int 63))
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(match_operand:DI 2 "gpc_reg_operand" "r,r"))
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(const_int 0)))
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(clobber (match_scratch:DI 3 "=&r,&r"))]
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"TARGET_64BIT"
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(compare:CC (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r")
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(const_int 0))
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(match_operand:P 2 "gpc_reg_operand" "r,r"))
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(const_int 0)))
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(clobber (match_scratch:P 3 "=&r,&r"))
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(clobber (match_scratch:P 4 "=X,&r"))]
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""
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"@
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addic %3,%1,-1\;addze. %3,%2
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#"
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@ -12073,77 +12008,68 @@
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")
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(compare:CC
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(plus:DI (lshiftrt:DI
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))
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(const_int 63))
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(match_operand:DI 2 "gpc_reg_operand" ""))
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(const_int 0)))
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(clobber (match_scratch:DI 3 ""))]
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"TARGET_64BIT && reload_completed"
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[(set (match_dup 3)
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(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1)))
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(const_int 63))
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(match_dup 2)))
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(compare:CC (ne:P (match_operand:SI 1 "gpc_reg_operand" "r,r")
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(const_int 0))
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(neg:P (match_operand:P 2 "gpc_reg_operand" "r,r"))))
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(clobber (match_scratch:P 3 ""))
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(clobber (match_scratch:P 4 ""))]
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"reload_completed"
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[(parallel [(set (match_dup 3)
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(plus:P (ne:P (match_dup 1)
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(const_int 0))
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(match_dup 2)))
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(clobber (match_dup 4))])
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(set (match_dup 0)
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(compare:CC (match_dup 3)
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(const_int 0)))]
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"")
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(define_insn "*plus_ne0si_compare"
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[(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
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(compare:CC
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(plus:SI (lshiftrt:SI
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(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")))
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(const_int 31))
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(match_operand:SI 2 "gpc_reg_operand" "r,r"))
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(const_int 0)))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31))
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(match_dup 2)))
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(clobber (match_scratch:SI 3 "=&r,&r"))]
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"TARGET_32BIT"
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; For combine.
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(define_insn "*compare_plus_ne0_<mode>_1"
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[(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
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(compare:CCEQ (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r")
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(const_int 0))
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(neg:P (match_operand:P 2 "gpc_reg_operand" "r,r"))))
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(clobber (match_scratch:P 3 "=&r,&r"))
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(clobber (match_scratch:P 4 "=X,&r"))]
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""
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"@
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addic %3,%1,-1\;addze. %0,%2
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addic %3,%1,-1\;addze. %3,%2
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#"
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[(set_attr "type" "compare")
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(set_attr "length" "8,12")])
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(define_split
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[(set (match_operand:CC 4 "cc_reg_not_cr0_operand" "")
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(compare:CC
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(plus:SI (lshiftrt:SI
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(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "")))
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(const_int 31))
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(match_operand:SI 2 "gpc_reg_operand" ""))
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(const_int 0)))
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(set (match_operand:SI 0 "gpc_reg_operand" "")
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(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31))
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(match_dup 2)))
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(clobber (match_scratch:SI 3 ""))]
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"TARGET_32BIT && reload_completed"
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[(parallel [(set (match_dup 0)
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(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31))
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(match_dup 2)))
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(clobber (match_dup 3))])
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(set (match_dup 4)
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(compare:CC (match_dup 0)
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[(set (match_operand:CCEQ 0 "cc_reg_not_micro_cr0_operand" "")
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(compare:CCEQ (ne:P (match_operand:SI 1 "gpc_reg_operand" "r,r")
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(const_int 0))
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(neg:P (match_operand:P 2 "gpc_reg_operand" "r,r"))))
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(clobber (match_scratch:P 3 ""))
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(clobber (match_scratch:P 4 ""))]
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"reload_completed"
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[(parallel [(set (match_dup 3)
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(plus:P (ne:P (match_dup 1)
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(const_int 0))
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(match_dup 2)))
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(clobber (match_dup 4))])
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(set (match_dup 0)
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(compare:CC (match_dup 3)
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(const_int 0)))]
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"")
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(define_insn "*plus_ne0di_compare"
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(define_insn "*plus_ne0_<mode>_compare"
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[(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
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(compare:CC
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(plus:DI (lshiftrt:DI
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")))
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(const_int 63))
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(match_operand:DI 2 "gpc_reg_operand" "r,r"))
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(plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r")
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(const_int 0))
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(match_operand:P 2 "gpc_reg_operand" "r,r"))
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(const_int 0)))
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(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
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(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63))
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(match_dup 2)))
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(clobber (match_scratch:DI 3 "=&r,&r"))]
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"TARGET_64BIT"
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(set (match_operand:P 0 "gpc_reg_operand" "=r,r")
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(plus:P (ne:P (match_dup 1)
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(const_int 0))
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(match_dup 2)))
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(clobber (match_scratch:P 3 "=&r,&r"))]
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""
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"@
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addic %3,%1,-1\;addze. %0,%2
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#"
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@ -12153,20 +12079,21 @@
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(define_split
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[(set (match_operand:CC 4 "cc_reg_not_micro_cr0_operand" "")
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(compare:CC
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(plus:DI (lshiftrt:DI
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))
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(const_int 63))
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(match_operand:DI 2 "gpc_reg_operand" ""))
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(plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "")
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(const_int 0))
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(match_operand:P 2 "gpc_reg_operand" ""))
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(const_int 0)))
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(set (match_operand:DI 0 "gpc_reg_operand" "")
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(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63))
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(match_dup 2)))
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(clobber (match_scratch:DI 3 ""))]
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"TARGET_64BIT && reload_completed"
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(set (match_operand:P 0 "gpc_reg_operand" "")
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(plus:P (ne:P (match_dup 1)
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(const_int 0))
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(match_dup 2)))
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(clobber (match_scratch:P 3 ""))]
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"reload_completed"
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[(parallel [(set (match_dup 0)
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(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63))
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(match_dup 2)))
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(clobber (match_dup 3))])
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(plus:P (ne:P (match_dup 1)
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(const_int 0))
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(match_dup 2)))
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(clobber (match_dup 3))])
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(set (match_dup 4)
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(compare:CC (match_dup 0)
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(const_int 0)))]
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@ -1,3 +1,9 @@
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2012-09-25 Segher Boessenkool <segher@kernel.crashing.org>
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PR target/51274
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PR target/53087
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* gcc.target/powerpc/ppc-ne0-1.c: New.
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2012-09-25 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/54089
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33
gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c
Normal file
33
gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c
Normal file
@ -0,0 +1,33 @@
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/* PR target/51274 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mno-isel" } */
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/* { dg-final { scan-assembler-times "addic" 4 } } */
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/* { dg-final { scan-assembler-times "subfe" 1 } } */
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/* { dg-final { scan-assembler-times "addze" 3 } } */
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long ne0(long a)
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{
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return a != 0;
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}
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long plus_ne0(long a, long b)
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{
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return (a != 0) + b;
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}
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void dummy(void);
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void cmp_plus_ne0(long a, long b)
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{
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if ((a != 0) + b)
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dummy();
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}
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long plus_ne0_cmp(long a, long b)
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{
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a = (a != 0) + b;
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if (a)
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dummy();
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return a;
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}
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