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re PR target/78577 (Fix define_insn operand types for vexturhlx, vexturhrx, vextuwlx, and vextuwrx patterns)

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gcc/ChangeLog:

2016-12-01  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR target/78577
	* config/rs6000/vsx.md (vextuhlx): Revise mode of operand 2.
	(vextuhrx): Likewise.
	(vextuwlx): Likewise.
	(vextuwrx): Likewise.

From-SVN: r243141
This commit is contained in:
Kelvin Nilsen 2016-12-01 22:52:07 +00:00
parent c3a2f7405c
commit f13d510e36
2 changed files with 12 additions and 4 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2016-12-01 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/78577
* config/rs6000/vsx.md (vextuhlx): Revise mode of operand 2.
(vextuhrx): Likewise.
(vextuwlx): Likewise.
(vextuwrx): Likewise.
2016-12-01 David Malcolm <dmalcolm@redhat.com>
* dwarf2out.c (dwarf2out_c_finalize): Reset early_dwarf and

8
gcc/config/rs6000/vsx.md
View File

@ -3648,7 +3648,7 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI
[(match_operand:SI 1 "register_operand" "r")
(match_operand:V16QI 2 "altivec_register_operand" "v")]
(match_operand:V8HI 2 "altivec_register_operand" "v")]
UNSPEC_VEXTUHLX))]
"TARGET_P9_VECTOR"
"vextuhlx %0,%1,%2"
@ -3659,7 +3659,7 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI
[(match_operand:SI 1 "register_operand" "r")
(match_operand:V16QI 2 "altivec_register_operand" "v")]
(match_operand:V8HI 2 "altivec_register_operand" "v")]
UNSPEC_VEXTUHRX))]
"TARGET_P9_VECTOR"
"vextuhrx %0,%1,%2"
@ -3670,7 +3670,7 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI
[(match_operand:SI 1 "register_operand" "r")
(match_operand:V16QI 2 "altivec_register_operand" "v")]
(match_operand:V4SI 2 "altivec_register_operand" "v")]
UNSPEC_VEXTUWLX))]
"TARGET_P9_VECTOR"
"vextuwlx %0,%1,%2"
@ -3681,7 +3681,7 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI
[(match_operand:SI 1 "register_operand" "r")
(match_operand:V16QI 2 "altivec_register_operand" "v")]
(match_operand:V4SI 2 "altivec_register_operand" "v")]
UNSPEC_VEXTUWRX))]
"TARGET_P9_VECTOR"
"vextuwrx %0,%1,%2"