Commit Graph

187541 Commits

Author SHA1 Message Date
GCC Administrator 05ace2946b Daily bump. 2021-08-25 00:16:57 +00:00
David Edelsohn 9cf3f026e2 aix: SYSTEM_IMPLICIT_EXTERN_C
AIX 7.3 system headers are C++ safe and GCC no longer needs to define
SYSTEM_IMPLICIT_EXTERN_C for AIX 7.3.  This patch moves the definition
from aix.h to the individual OS-level configuration files and does not
define the macro for AIX 7.3.

The patch also corrects the definition of TARGET_AIX_VERSION to 73.

gcc/ChangeLog:
	* config/rs6000/aix.h (SYSTEM_IMPLICIT_EXTERN_C): Delete.
	* config/rs6000/aix71.h (SYSTEM_IMPLICIT_EXTERN_C): Define.
	* config/rs6000/aix72.h (SYSTEM_IMPLICIT_EXTERN_C): Define.
	* config/rs6000/aix73.h (TARGET_AIX_VERSION): Increase to 73.
2021-08-24 18:33:21 -04:00
Roger Sayle 81e1894456 [Committed] PR middle-end/102031: Fix typo/mistake in simplify_truncation patch.
My apologies again.  My patch to simplify truncations of SUBREGs in
simplify-rtx.c contained an error where I'd accidentally compared
against a mode instead of the precision of that mode.  Grr!  It even
survived regression testing on two platforms.  Fixed below, and
committed as obvious, after a full "make bootstrap" and "make -k check"
on x86_64-pc-linux-gnu with no new regressions.

2021-08-24  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	PR middle-end/102031
	* simplify-rtx.c (simplify_truncation): When comparing precisions
	use "subreg_prec" variable, not "subreg_mode".
2021-08-24 22:07:41 +01:00
Harald Anlauf f95946afd1 Fortran: fix pointless warning for static variables
gcc/fortran/ChangeLog:

	PR fortran/98411
	* trans-decl.c (gfc_finish_var_decl): Adjust check to handle
	implicit SAVE as well as variables in the main program.  Improve
	warning message text.

gcc/testsuite/ChangeLog:

	PR fortran/98411
	* gfortran.dg/pr98411.f90: Adjust testcase options to restrict to
	F2008, and verify case of implicit SAVE.
2021-08-24 21:07:50 +02:00
Bill Schmidt 50cb8300d3 rs6000: Add Power10 builtins
2021-07-28  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtin-new.def: Add power10 and power10-64
	stanzas.
2021-08-24 13:46:07 -05:00
Bill Schmidt 19b7bf620c rs6000: Add more type nodes to support builtin processing
2021-08-24  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
	various pointer type nodes.
	* config/rs6000/rs6000.h (rs6000_builtin_type_index): Add enum
	values for various pointer types.
	(ptr_V16QI_type_node): New macro.
	(ptr_V1TI_type_node): New macro.
	(ptr_V2DI_type_node): New macro.
	(ptr_V2DF_type_node): New macro.
	(ptr_V4SI_type_node): New macro.
	(ptr_V4SF_type_node): New macro.
	(ptr_V8HI_type_node): New macro.
	(ptr_unsigned_V16QI_type_node): New macro.
	(ptr_unsigned_V1TI_type_node): New macro.
	(ptr_unsigned_V8HI_type_node): New macro.
	(ptr_unsigned_V4SI_type_node): New macro.
	(ptr_unsigned_V2DI_type_node): New macro.
	(ptr_bool_V16QI_type_node): New macro.
	(ptr_bool_V8HI_type_node): New macro.
	(ptr_bool_V4SI_type_node): New macro.
	(ptr_bool_V2DI_type_node): New macro.
	(ptr_bool_V1TI_type_node): New macro.
	(ptr_pixel_type_node): New macro.
	(ptr_intQI_type_node): New macro.
	(ptr_uintQI_type_node): New macro.
	(ptr_intHI_type_node): New macro.
	(ptr_uintHI_type_node): New macro.
	(ptr_intSI_type_node): New macro.
	(ptr_uintSI_type_node): New macro.
	(ptr_intDI_type_node): New macro.
	(ptr_uintDI_type_node): New macro.
	(ptr_intTI_type_node): New macro.
	(ptr_uintTI_type_node): New macro.
	(ptr_long_integer_type_node): New macro.
	(ptr_long_unsigned_type_node): New macro.
	(ptr_float_type_node): New macro.
	(ptr_double_type_node): New macro.
	(ptr_long_double_type_node): New macro.
	(ptr_dfloat64_type_node): New macro.
	(ptr_dfloat128_type_node): New macro.
	(ptr_ieee128_type_node): New macro.
	(ptr_ibm128_type_node): New macro.
	(ptr_vector_pair_type_node): New macro.
	(ptr_vector_quad_type_node): New macro.
	(ptr_long_long_integer_type_node): New macro.
	(ptr_long_long_unsigned_type_node): New macro.
2021-08-24 13:46:05 -05:00
Bill Schmidt 2ed356a4c9 rs6000: Add Power9 builtins
2021-08-24  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9,
	and power9-64 stanzas.
2021-08-24 13:46:02 -05:00
Roger Sayle 3c496e92d7 nvptx: Add a __PTX_SM__ predefined macro based on target ISA.
This patch adds a __PTX_SM__ predefined macro to the nvptx backend that
allows code to check the compute model being targeted by the compiler.
This is equivalent to the __CUDA_ARCH__ macro defined by CUDA's nvcc
compiler, but to avoid causing problems for source code that checks
for that compiler, this macro uses GCC's nomenclature; it's easy
enough for users to "#define __CUDA_ARCH__ __PTX_SM__".

What might have been a four line patch is actually a little more
complicated, as this patch takes the opportunity to upgrade the
nvptx backend to use the now preferred nvptx-c.c idiom.

2021-08-24  Roger Sayle  <roger@nextmovesoftware.com>
	    Tom de Vries  <tdevries@suse.de>

gcc/ChangeLog
	* config.gcc (nvptx-*-*): Define {c,c++}_target_objs.
	* config/nvptx/nvptx-protos.h (nvptx_cpu_cpp_builtins): Prototype.
	* config/nvptx/nvptx.h (TARGET_CPU_CPP_BUILTINS): Implement with
	a call to the new nvptx_cpu_cpp_builtins function in nvptx-c.c.
	* config/nvptx/t-nvptx (nvptx-c.o): New rule.
	* config/nvptx/nvptx-c.c: New source file.
	(nvptx_cpu_cpp_builtins): Move implementation here.
2021-08-24 18:02:18 +01:00
Martin Sebor 820f0940d7 Reset PHI base0 flag if it's clear in any argument [PR101977, ...]
Resolves:
PR middle-end/101600 - Spurious -Warray-bounds downcasting a polymorphic pointer
PR middle-end/101977 - bogus -Warray-bounds on a negative index into a parameter in conditional with null

gcc/ChangeLog:

	PR middle-end/101600
	PR middle-end/101977
	* gimple-ssa-warn-access.cc (maybe_warn_for_bound): Tighten up
	the phrasing of a warning.
	(check_access): Use the remaining size after subtracting any offset
	rather than the whole object size.
	* pointer-query.cc (access_ref::get_ref): Clear BASE0 flag if it's
	clear for any nonnull PHI argument.
	(compute_objsize): Clear argument.

gcc/testsuite/ChangeLog:

	PR middle-end/101600
	PR middle-end/101977
	* g++.dg/pr100574.C: Prune out valid warning.
	* gcc.dg/pr20126.c: Same.
	* gcc.dg/Wstringop-overread.c: Adjust text of expected warnings.
	Add new instances.
	* gcc.dg/warn-strnlen-no-nul.c: Same.
	* g++.dg/warn/Warray-bounds-26.C: New test.
	* gcc.dg/Warray-bounds-88.c: New test.
2021-08-24 10:49:11 -06:00
Jonathan Wakely 6d692ef43b libstdc++: Update C++20 status table for layout-compatibility traits
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>

libstdc++-v3/ChangeLog:

	* doc/xml/manual/status_cxx2020.xml: Update table.
	* doc/html/manual/status.html: Regenerate.
2021-08-24 16:15:48 +01:00
Jonathan Wakely 037ef219b2 libstdc++: Add std::is_layout_compatible trait for C++20
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>

libstdc++-v3/ChangeLog:

	* include/std/type_traits (is_layout_compatible): Define.
	(is_corresponding_member): Define.
	* include/std/version (__cpp_lib_is_layout_compatible): Define.
	* testsuite/20_util/is_layout_compatible/is_corresponding_member.cc:
	New test.
	* testsuite/20_util/is_layout_compatible/value.cc: New test.
	* testsuite/20_util/is_layout_compatible/version.cc: New test.
	* testsuite/20_util/is_pointer_interconvertible/with_class.cc:
	New test.
	* testsuite/23_containers/span/layout_compat.cc: Do not use real
	std::is_layout_compatible trait if available.
2021-08-24 16:12:44 +01:00
Bill Schmidt 8ce18a29ef rs6000: Add power8-vector builtins
2021-04-01  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtin-new.def: Add power8-vector stanza.
2021-08-24 09:14:44 -05:00
Bill Schmidt fce8a52d0a rs6000: Add power7 and power7-64 builtins
2021-04-02  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-builtin-new.def: Add power7 and power7-64
	stanzas.
2021-08-24 09:14:34 -05:00
Andrew MacLeod 675a3e4056 Add transitive operations to the relation oracle.
When registering relations in the oracle, search for other relations which
imply new transitive relations.

	gcc/
	* value-relation.cc (rr_transitive_table): New.
	(relation_transitive): New.
	(value_relation::swap): Remove.
	(value_relation::apply_transitive): New.
	(relation_oracle::relation_oracle): Allocate a new tmp bitmap.
	(relation_oracle::register_relation): Call register_transitives.
	(relation_oracle::register_transitives): New.
	* value-relation.h (relation_oracle): Add new temporary bitmap and
	methods.

	gcc/testsuite/
	* gcc.dg/predict-1.c: Disable evrp.
	* gcc.dg/tree-ssa/evrp-trans.c: New.
2021-08-24 09:44:31 -04:00
Jonathan Wakely d8b7282ea2 libstdc++: Fix mismatched class-key tags
Clang warns about this, but GCC doesn't (see PR c++/102036).

Signed-off-by: Jonathan Wakely <jwakely@redhat.com>

libstdc++-v3/ChangeLog:

	* src/c++11/cxx11-shim_facets.cc: Fix mismatched class-key in
	explicit instantiation definitions.
2021-08-24 14:42:24 +01:00
H.J. Lu 6e5401e87d x86: Broadcast from integer to a pseudo vector register
Broadcast from integer to a pseudo vector register instead of a hard
vector register to allow LRA to remove redundant move instruction after
broadcast.

gcc/

	PR target/102021
	* config/i386/i386-expand.c (ix86_expand_vector_move): Broadcast
	from integer to a pseudo vector register.

gcc/testsuite/

	PR target/102021
	* gcc.target/i386/pr100865-10b.c: Expect vzeroupper.
	* gcc.target/i386/pr100865-4b.c: Likewise.
	* gcc.target/i386/pr100865-6b.c: Expect vmovdqu and vzeroupper.
	* gcc.target/i386/pr100865-7b.c: Likewise.
	* gcc.target/i386/pr102021.c: New test.
2021-08-24 05:46:17 -07:00
Richard Biener 9216ee6d11 tree-optimization/100089 - avoid leaving scalar if-converted code around
This avoids leaving scalar if-converted code around for the case
of BB vectorizing an if-converted loop body when using the very-cheap
cost model.  In this case we scan not vectorized scalar stmts in
the basic-block vectorized for COND_EXPRs and force the vectorization
to be marked as not profitable.

The patch also makes sure to always consider all BB vectorization
subgraphs together for costing purposes when vectorizing an
if-converted loop body.

2021-08-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100089
	* tree-vectorizer.h (vect_slp_bb): Rename to ...
	(vect_slp_if_converted_bb): ... this and get the original
	loop as new argument.
	* tree-vectorizer.c (try_vectorize_loop_1): Revert previous fix,
	pass original loop to vect_slp_if_converted_bb.
	* tree-vect-slp.c (vect_bb_vectorization_profitable_p):
	If orig_loop was passed scan the not vectorized stmts
	for COND_EXPRs and force not profitable if found.
	(vect_slp_region): Pass down all SLP instances to costing
	if orig_loop was specified.
	(vect_slp_bbs): Pass through orig_loop.
	(vect_slp_bb): Rename to ...
	(vect_slp_if_converted_bb): ... this and get the original
	loop as new argument.
	(vect_slp_function): Adjust.
2021-08-24 14:23:00 +02:00
Richard Earnshaw 809330ab84 arm: Add tests for VLLDM mitigation [PR102035]
New tests for the erratum mitigation.

gcc/testsuite:
	PR target/102035
	* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13a.c: New test.
	* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7a.c: Likewise.
	* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8a.c: Likewise.
	* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7a.c: Likewise.
	* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8a.c: Likewise.
	* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13a.c: Likewise.
	* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7a.c: Likewise.
	* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8a.c: Likewise.
2021-08-24 11:45:13 +01:00
Richard Earnshaw 30461cf8db arm: fix vlldm erratum for Armv8.1-m [PR102035]
For Armv8.1-m we generate code that emits VLLDM directly and do not
rely on support code in the library, so emit the mitigation directly
as well, when required.  In this case, we can use the compiler options
to determine when to apply the fix and when it is safe to omit it.

gcc:
	PR target/102035
	* config/arm/arm.md (attribute arch): Add fix_vlldm.
	(arch_enabled): Use it.
	* config/arm/vfp.md (lazy_store_multiple_insn): Add alternative to
	use when erratum mitigation is needed.
2021-08-24 11:45:13 +01:00
Richard Earnshaw 574e7950bd arm: add erratum mitigation to __gnu_cmse_nonsecure_call [PR102035]
Add the recommended erratum mitigation sequence to
__gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this
is in the library code we cannot know in advance whether the core we
are running on will be affected by this, so always enable it.

libgcc:
	PR target/102035
	* config/arm/cmse_nonsecure_call.S (__gnu_cmse_nonsecure_call):
	Add vlldm erratum work-around.
2021-08-24 11:45:13 +01:00
Richard Earnshaw 3929bca9ca arm: Add command-line option for enabling CVE-2021-35465 mitigation [PR102035]
Add a new option, -mfix-cmse-cve-2021-35465 and document it.  Enable it
automatically for cortex-m33, cortex-m35p and cortex-m55.

gcc:
	PR target/102035
	* config/arm/arm.opt (mfix-cmse-cve-2021-35465): New option.
	* doc/invoke.texi (Arm Options): Document it.
	* config/arm/arm-cpus.in (quirk_vlldm): New feature bit.
	(ALL_QUIRKS): Add quirk_vlldm.
	(cortex-m33): Add quirk_vlldm.
	(cortex-m35p, cortex-m55): Likewise.
	* config/arm/arm.c (arm_option_override): Enable fix_vlldm if
	targetting an affected CPU and not explicitly controlled on
	the command line.
2021-08-24 11:45:13 +01:00
Richard Earnshaw 79fb2700bd arm: testsuite: improve detection of CMSE hardware.
The test for CMSE support being available in hardware currently
relies on the compiler not optimizing away a secure gateway operation.
But even that is suspect, because the SG instruction is just a NOP
on armv8-m implementations that do not support the security extension.

Replace the existing test with a new one that reads and checks
the appropriate hardware feature register (memory mapped).  This has
to be run from secure mode, but that shouldn't matter, because if we
can't do that we can't really test the CMSE extensions anyway.  We
retain the SG instruction to ensure the test can't pass accidentally
if run on pre-armv8-m devices.

gcc/testsuite:
	* lib/target-supports.exp (check_effective_target_arm_cmse_hw):
	Check the CMSE feature register, rather than relying on the
	SG operation causing an execution fault.
2021-08-24 11:45:12 +01:00
Richard Earnshaw 4702d3cf04 arm: Fix general issues with patterns for VLLDM and VLSTM
Both lazy_store_multiple_insn and lazy_load_multiple_insn contain
invalid RTL (eg they contain a post_inc statement outside of a mem).
What's more, the instructions concerned do not modify their input
address register.  We probably got away with this because they are
generated so late in the compilation that no subsequent pass needed to
understand them.  Nevertheless, this could cause problems someday, so
fixed to use a simple legal unspec.

gcc:
	* config/arm/vfp.md (lazy_store_multiple_insn): Rewrite as valid RTL.
	(lazy_load_multiple_insn): Likewise.
2021-08-24 11:45:12 +01:00
liuhongt 8da9b4f73c Enable avx512 embedde broadcast for vpternlog.
gcc/ChangeLog:

	PR target/101989
	* config/i386/sse.md (<avx512>_vternlog<mode><sd_maskz_name>):
	Enable avx512 embedded broadcast.
	(*<avx512>_vternlog<mode>_all): Ditto.
	(<avx512>_vternlog<mode>_mask): Ditto.

gcc/testsuite/ChangeLog:

	PR target/101989
	* gcc.target/i386/pr101989-broadcast-1.c: New test.
2021-08-24 18:33:02 +08:00
liuhongt 6ddb30f941 Optimize (a & b) | (c & ~b) to vpternlog instruction.
Also optimize below 3 forms to vpternlog, op1, op2, op3 are
register_operand or unary_p as (not reg)

A: (any_logic (any_logic op1 op2) op3)
B: (any_logic (any_logic op1 op2) (any_logic op3 op4)) op3/op4 should
be equal to op1/op2
C: (any_logic (any_logic (any_logic:op1 op2) op3) op4) op3/op4 should
be equal to op1/op2

gcc/ChangeLog:

	PR target/101989
	* config/i386/i386.c (ix86_rtx_costs): Define cost for
	UNSPEC_VTERNLOG.
	* config/i386/i386.h (STRIP_UNARY): New macro.
	* config/i386/predicates.md (reg_or_notreg_operand): New
	predicate.
	* config/i386/sse.md (*<avx512>_vternlog<mode>_all): New define_insn.
	(*<avx512>_vternlog<mode>_1): New pre_reload
	define_insn_and_split.
	(*<avx512>_vternlog<mode>_2): Ditto.
	(*<avx512>_vternlog<mode>_3): Ditto.
	(any_logic1,any_logic2): New code iterator.
	(logic_op): New code attribute.
	(ternlogsuffix): Extend to VNxDF and VNxSF.

gcc/testsuite/ChangeLog:

	PR target/101989
	* gcc.target/i386/pr101989-1.c: New test.
	* gcc.target/i386/pr101989-2.c: New test.
	* gcc.target/i386/avx512bw-shiftqihi-constant-1.c: Adjust testcase.
2021-08-24 17:45:33 +08:00
Richard Biener 8571ff0ae0 Adjust inner loop cost scaling
This makes use of the estimated number of iterations of the inner loop
to limit --param vect-inner-loop-cost-factor scaling.  It also reduces
the maximum value of vect-inner-loop-cost-factor to 10000 making it
less likely to cause overflow of costs.

2021-08-23  Richard Biener  <rguenther@suse.de>

	* doc/invoke.texi (vect-inner-loop-cost-factor): Adjust.
	* params.opt (--param vect-inner-loop-cost-factor): Adjust
	maximum value.
	* tree-vect-loop.c (vect_analyze_loop_form): Initialize
	inner_loop_cost_factor to the minimum of the estimated number
	of iterations of the inner loop and vect-inner-loop-cost-factor.
2021-08-24 10:43:10 +02:00
Andrew Pinski 0deabebedd Fix a few problems with download_prerequisites.
There are a few problems with download_prerequisites are
described in PR 82704.  The first is on busy-box version of
shasum and md5sum the extended option --check don't exist
so just use -c.  The second issue is the code for which
shasum program to use is included twice and is different.
So move which program to use for the checksum after argument
parsing.  The last issue is --md5 option has been broken for
sometime now as the program is named md5sum and not just md5.
Nobody updated switch table to be correct.

contrib/ChangeLog:

	PR other/82704
	* download_prerequisites: Fix issues with --md5 and
	--sha512 options.
2021-08-24 08:09:53 +00:00
Roger Sayle f897716613 Tweak -Os costs for scalar-to-vector pass.
Back in June I briefly mentioned in one of my gcc-patches posts that
a change that should have always reduced code size, would mysteriously
occasionally result in slightly larger code (according to CSiBE):
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573233.html

Investigating further, the cause turns out to be that x86_64's
scalar-to-vector (stv) pass is relying on poor estimates of the size
costs/benefits.  This patch tweaks the backend's compute_convert_gain
method to provide slightly more accurate values when compiling with
-Os. Compilation without -Os is (should be) unaffected.  And for
completeness, I'll mention that the stv pass is a net win for code
size so it's much better to improve its heuristics than simply gate
the pass on !optimize_for_size.

The net effect of this change is to save 1399 bytes on the CSiBE
code size benchmark when compiling with -Os.

2021-08-24  Roger Sayle  <roger@nextmovesoftware.com>
	    Richard Biener  <rguenther@suse.de>

gcc/ChangeLog
	* config/i386/i386-features.c (compute_convert_gain): Provide
	more accurate values for CONST_INT, when optimizing for size.
	* config/i386/i386.c (COSTS_N_BYTES): Move definition from here...
	* config/i386/i386.h (COSTS_N_BYTES): to here.
2021-08-24 03:04:48 +01:00
Roger Sayle 78fa5112b4 [Committed] PR middle-end/102029: Stricter typing in LSHIFT_EXPR sign folding.
My sincere apologies to everyone (again).  As diagnosed by
Jakub Jelinek, my recent patch to fold the signedness of LSHIFT_EXPR
needs to be careful not to attempt transforming a left shift in an
integer type into an invalid left shift of a pointer type.

2021-08-24  Roger Sayle  <roger@nextmovesoftware.com>
	    Jakub Jelinek  <jakub@redhat.com>

gcc/ChangeLog
	PR middle-end/102029
	* match.pd (shift transformations): Add an additional check for
	!POINTER_TYPE_P in the recently added left shift transformation.

gcc/testsuite/ChangeLog
	PR middle-end/102029
	* gcc.dg/fold-convlshift-3.c: New test case.
2021-08-24 02:59:02 +01:00
liuhongt 819b7c3a33 Disable slp in loop vectorizer when cost model is very-cheap.
Performance impact for the commit with option:
-march=x86-64 -O2 -ftree-vectorize -fvect-cost-model=very-cheap

SPEC2017 fprate
503.bwaves_r        BuildSame
507.cactuBSSN_r         -0.04
508.namd_r               0.14
510.parest_r            -0.54
511.povray_r             0.10
519.lbm_r           BuildSame
521.wrf_r                0.64
526.blender_r           -0.32
527.cam4_r               0.17
538.imagick_r            0.09
544.nab_r           BuildSame
549.fotonik3d_r     BuildSame
554.roms_r          BuildSame
997.specrand_fr         -0.09
Geometric mean:  0.02

SPEC2017 intrate
500.perlbench_r          0.26
502.gcc_r                0.21
505.mcf_r               -0.09
520.omnetpp_r       BuildSame
523.xalancbmk_r     BuildSame
525.x264_r              -0.41
531.deepsjeng_r     BuildSame
541.leela_r              0.13
548.exchange2_r     BuildSame
557.xz_r            BuildSame
999.specrand_ir     BuildSame
Geometric mean:  0.02

EEMBC: no regression, only improvement or build the same, the below is
improved benchmarks.

mp2decoddata1       7.59
mp2decoddata2       31.80
mp2decoddata3       12.15
mp2decoddata4       11.16
mp2decoddata5       11.19
mp2decoddata1       7.06
mp2decoddata2       24.12
mp2decoddata3       10.83
mp2decoddata4       10.04
mp2decoddata5       10.07

gcc/ChangeLog:

	PR tree-optimization/100089
	* tree-vectorizer.c (try_vectorize_loop_1): Disable slp in
	loop vectorizer when cost model is very-cheap.
2021-08-24 09:27:53 +08:00
GCC Administrator 38b19c5b08 Daily bump. 2021-08-24 00:17:00 +00:00
David Malcolm 8ca7fa84a3 analyzer: rewrite of switch handling
When investigating false positives on the Linux kernel from
-Wanalyzer-use-of-uninitialized-value, I noticed that the existing
implementation of switch statements in the analyzer is broken.

Specifically, the existing implementation assumes a 1:1 association
between CFG out-edges from the basic block and case labels in the
gimple switch statement.  This happened to be the case in the
examples I had tested, but there is no such association in general.
In particular, in the motivating example:
  arch/x86/kernel/cpu/mtrr/if.c: mtrr_ioctl
the switch statement has 3 blocks, each covering multiple ranges of
ioctl command IDs for which different local variables are initialized,
which the existing implementation gets badly wrong. [1]

This patch reimplements switch handling in the analyzer to eliminate
this false assumption - instead, for each out-edge we gather the set
of case labels for that out-edge, and use that to determine the
set of value ranges for the edge.  Avoiding false positives for the
above example requires that we accurately track value ranges for
symbolic values, so the patch extends constraint_manager with a new
bounded_ranges_constraint, adding just enough information to capture the
ranges for switch statements whilst retaining combatility with the
existing constraint-handling (ultimately I'd prefer to simply throw
all of this into a SAT solver and let it track things).

Doing so fixes the false positives seen on the Linux kernel and an
existing xfail in the test suite.

The patch also fixes a long-standing bug in
constraint_manager::add_unknown_constraint when updating constraints
due to combining equivalence classes, spotted when debugging the
same logic for the new kind of constraints.

[1] a reduced version of this code is captured in this patch, in
gcc.dg/analyzer/torture/switch-3.c

gcc/analyzer/ChangeLog:
	* analyzer.h (struct rejected_constraint): Convert to...
	(class rejected_constraint): ...this.
	(class bounded_ranges): New forward decl.
	(class bounded_ranges_manager): New forward decl.
	* constraint-manager.cc: Include "analyzer/analyzer-logging.h" and
	"tree-pretty-print.h".
	(can_plus_one_p): New.
	(plus_one): New.
	(can_minus_one_p): New.
	(minus_one): New.
	(bounded_range::bounded_range): New.
	(dump_cst): New.
	(bounded_range::dump_to_pp): New.
	(bounded_range::dump): New.
	(bounded_range::to_json): New.
	(bounded_range::set_json_attr): New.
	(bounded_range::contains_p): New.
	(bounded_range::intersects_p): New.
	(bounded_range::operator==): New.
	(bounded_range::cmp): New.
	(bounded_ranges::bounded_ranges): New.
	(bounded_ranges::bounded_ranges): New.
	(bounded_ranges::bounded_ranges): New.
	(bounded_ranges::canonicalize): New.
	(bounded_ranges::validate): New.
	(bounded_ranges::operator==): New.
	(bounded_ranges::dump_to_pp): New.
	(bounded_ranges::dump): New.
	(bounded_ranges::to_json): New.
	(bounded_ranges::eval_condition): New.
	(bounded_ranges::contain_p): New.
	(bounded_ranges::cmp): New.
	(bounded_ranges_manager::~bounded_ranges_manager): New.
	(bounded_ranges_manager::get_or_create_empty): New.
	(bounded_ranges_manager::get_or_create_point): New.
	(bounded_ranges_manager::get_or_create_range): New.
	(bounded_ranges_manager::get_or_create_union): New.
	(bounded_ranges_manager::get_or_create_intersection): New.
	(bounded_ranges_manager::get_or_create_inverse): New.
	(bounded_ranges_manager::consolidate): New.
	(bounded_ranges_manager::get_or_create_ranges_for_switch): New.
	(bounded_ranges_manager::create_ranges_for_switch): New.
	(bounded_ranges_manager::make_case_label_ranges): New.
	(bounded_ranges_manager::log_stats): New.
	(bounded_ranges_constraint::print): New.
	(bounded_ranges_constraint::to_json): New.
	(bounded_ranges_constraint::operator==): New.
	(bounded_ranges_constraint::add_to_hash): New.
	(constraint_manager::constraint_manager): Update for new field
	m_bounded_ranges_constraints.
	(constraint_manager::operator=): Likewise.
	(constraint_manager::hash): Likewise.
	(constraint_manager::operator==): Likewise.
	(constraint_manager::print): Likewise.
	(constraint_manager::dump_to_pp): Likewise.
	(constraint_manager::to_json): Likewise.
	(constraint_manager::add_unknown_constraint): Update the lhs_ec_id
	if necessary in existing constraints when combining equivalence
	classes.  Add similar code for handling
	m_bounded_ranges_constraints.
	(constraint_manager::add_constraint_internal): Add comment.
	(constraint_manager::add_bounded_ranges): New.
	(constraint_manager::eval_condition): Use new field
	m_bounded_ranges_constraints.
	(constraint_manager::purge): Update bounded_ranges_constraint
	instances.
	(constraint_manager::canonicalize): Update for new field.
	(merger_fact_visitor::on_ranges): New.
	(constraint_manager::for_each_fact): Use new field
	m_bounded_ranges_constraints.
	(constraint_manager::validate):  Fix off-by-one error needed due
	to bug fixed above in add_unknown_constraint.  Validate the EC IDs
	in m_bounded_ranges_constraints.
	(constraint_manager::get_range_manager): New.
	(selftest::assert_dump_bounded_range_eq): New.
	(ASSERT_DUMP_BOUNDED_RANGE_EQ): New.
	(selftest::test_bounded_range): New.
	(selftest::assert_dump_bounded_ranges_eq): New.
	(ASSERT_DUMP_BOUNDED_RANGES_EQ): New.
	(selftest::test_bounded_ranges): New.
	(selftest::run_constraint_manager_tests): Call the new selftests.
	* constraint-manager.h (struct bounded_range): New.
	(struct bounded_ranges): New.
	(template <> struct default_hash_traits<bounded_ranges::key_t>): New.
	(class bounded_ranges_manager): New.
	(fact_visitor::on_ranges): New pure virtual function.
	(class bounded_ranges_constraint): New.
	(constraint_manager::add_bounded_ranges): New decl.
	(constraint_manager::get_range_manager): New decl.
	(constraint_manager::m_bounded_ranges_constraints): New field.
	* diagnostic-manager.cc (epath_finder::process_worklist_item):
	Transfer ownership of rc to add_feasibility_problem.
	* engine.cc (feasibility_problem::dump_to_pp): Use get_model.
	* feasible-graph.cc (infeasible_node::dump_dot): Update for
	conversion of m_rc to a pointer.
	(feasible_graph::add_feasibility_problem): Pass RC by pointer and
	take ownership.
	* feasible-graph.h (infeasible_node::infeasible_node): Pass RC by
	pointer and take ownership.
	(infeasible_node::~infeasible_node): New.
	(infeasible_node::m_rc): Convert to a pointer.
	(feasible_graph::add_feasibility_problem): Pass RC by pointer and
	take ownership.
	* region-model-manager.cc: Include
	"analyzer/constraint-manager.h".
	(region_model_manager::region_model_manager): Initializer new
	field m_range_mgr.
	(region_model_manager::~region_model_manager): Delete it.
	(region_model_manager::log_stats): Call log_stats on it.
	* region-model.cc (region_model::add_constraint): Use new subclass
	rejected_op_constraint.
	(region_model::apply_constraints_for_gswitch): Reimplement using
	bounded_ranges_manager.
	(rejected_constraint::dump_to_pp): Convert to...
	(rejected_op_constraint::dump_to_pp): ...this.
	(rejected_ranges_constraint::dump_to_pp): New.
	* region-model.h (struct purge_stats): Add field
	m_num_bounded_ranges_constraints.
	(region_model_manager::get_range_manager): New.
	(region_model_manager::m_range_mgr): New.
	(region_model::get_range_manager): New.
	(struct rejected_constraint): Split into...
	(class rejected_constraint):...this new abstract base class,
	and...
	(class rejected_op_constraint): ...this new concrete subclass.
	(class rejected_ranges_constraint): New.
	* supergraph.cc: Include "tree-cfg.h".
	(supergraph::supergraph): Drop idx param from add_cfg_edge.
	(supergraph::add_cfg_edge): Drop idx param.
	(switch_cfg_superedge::switch_cfg_superedge): Move here from
	header.  Populate m_case_labels with all cases which go to DST.
	(switch_cfg_superedge::dump_label_to_pp): Reimplement to use
	m_case_labels.
	(switch_cfg_superedge::get_case_label): Delete.
	* supergraph.h (supergraphadd_cfg_edge): Drop "idx" param.
	(switch_cfg_superedge::switch_cfg_superedge): Drop idx param and
	move implementation to supergraph.cc.
	(switch_cfg_superedge::get_case_label): Delete.
	(switch_cfg_superedge::get_case_labels): New.
	(switch_cfg_superedge::m_idx): Delete.
	(switch_cfg_superedge::m_case_labels): New field.

gcc/testsuite/ChangeLog:
	* gcc.dg/analyzer/switch.c: Remove xfail.  Add various tests.
	* gcc.dg/analyzer/torture/switch-2.c: New test.
	* gcc.dg/analyzer/torture/switch-3.c: New test.
	* gcc.dg/analyzer/torture/switch-4.c: New test.
	* gcc.dg/analyzer/torture/switch-5.c: New test.
2021-08-23 19:27:21 -04:00
Bill Schmidt 192d4edd15 rs6000: Fix AIX bootstrap (don't call asprintf)
2021-08-23  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-gen-builtins.c (parse_bif_entry): Don't call
	asprintf, which is not available on AIX.
2021-08-23 17:28:37 -05:00
Bill Schmidt 596f964f32 rs6000: Add gengtype handling to the build machinery
2021-06-07  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config.gcc (target_gtfiles): Add ./rs6000-builtins.h.
	* config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Set.
2021-08-23 16:00:35 -05:00
Bill Schmidt 34ad198138 rs6000: Incorporate new builtins code into the build machinery
2021-07-27  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config.gcc (powerpc*-*-*): Add rs6000-builtins.o to extra_objs.
	* config/rs6000/rs6000-gen-builtins.c (main): Close init_file
	last.
	* config/rs6000/t-rs6000 (rs6000-gen-builtins.o): New target.
	(rbtree.o): Likewise.
	(rs6000-gen-builtins): Likewise.
	(rs6000-builtins.c): Likewise.
	(rs6000-builtins.h): Likewise.
	(rs6000.o): Add dependency.
	(EXTRA_HEADERS): Add rs6000-vecdefines.h.
	(rs6000-vecdefines.h): New target.
	(rs6000-builtins.o): Likewise.
	(rs6000-call.o): Add rs6000-builtins.h as a dependency.
	(rs6000-c.o): Likewise.
2021-08-23 16:00:32 -05:00
Bill Schmidt 30c335ac44 rs6000: Avoid buffer overruns
2021-08-19  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	PR target/101830
	* config/rs6000/rs6000-gen-builtins.c (consume_whitespace):
	Diagnose buffer overrun.
	(safe_inc_pos): Fix overrun detection.
	(match_identifier): Diagnose buffer overrun.
	(match_integer): Likewise.
	(match_to_right_bracket): Likewise.
2021-08-23 16:00:26 -05:00
David Malcolm 3d654ca3f4 analyzer: fix ICE with NULL change.m_expr [PR101875]
gcc/analyzer/ChangeLog:
	PR analyzer/101875
	* sm-file.cc (file_diagnostic::describe_state_change): Handle
	change.m_expr being NULL.

gcc/testsuite/ChangeLog:
	PR analyzer/101875
	* gcc.dg/analyzer/pr101875.c: New test.
2021-08-23 14:11:58 -04:00
David Malcolm 4b821c7efb analyzer: fix ICE when failing to reconstruct a fn ptr [PR101837]
gcc/analyzer/ChangeLog:
	PR analyzer/101837
	* analyzer.cc (maybe_reconstruct_from_def_stmt): Bail if fn is
	NULL, and assert that it's non-NULL before passing it to
	build_call_array_loc.

gcc/testsuite/ChangeLog:
	PR analyzer/101837
	* gcc.dg/analyzer/pr101837.c: New test.
2021-08-23 14:09:44 -04:00
David Malcolm e82e0f149b analyzer: assume that POINTER_PLUS_EXPR of non-NULL is non-NULL [PR101962]
gcc/analyzer/ChangeLog:
	PR analyzer/101962
	* region-model.cc (region_model::eval_condition_without_cm):
	Refactor comparison against zero, adding a check for
	POINTER_PLUS_EXPR of non-NULL.

gcc/testsuite/ChangeLog:
	PR analyzer/101962
	* gcc.dg/analyzer/data-model-23.c: New test.
	* gcc.dg/analyzer/pr101962.c: New test.
2021-08-23 14:07:39 -04:00
David Malcolm 4892b30874 analyzer: fix uninit false positive on overlapping bindings
gcc/analyzer/ChangeLog:
	* store.cc (bit_range::intersects_p): New overload.
	(bit_range::operator-): New.
	(binding_cluster::maybe_get_compound_binding): Handle the partial
	overlap case.
	(selftest::test_bit_range_intersects_p): Add test coverage for
	new overload of bit_range::intersects_p.
	* store.h (bit_range::intersects_p): New overload.
	(bit_range::operator-): New.

gcc/testsuite/ChangeLog:
	* gcc.dg/analyzer/data-model-22.c: New test.
	* gcc.dg/analyzer/uninit-6.c: New test.
	* gcc.dg/analyzer/uninit-6b.c: New test.
2021-08-23 14:01:01 -04:00
Iain Sandoe 38757aa887 libiberty, Darwin: Fix a build warning.
r12-3005-g220c410162ebece4f missed a cast for the set_32 call.
Fixed thus.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>

libiberty/ChangeLog:

	* simple-object-mach-o.c (simple_object_mach_o_write_segment):
	Cast the first argument to set_32 as needed.
2021-08-23 17:37:41 +01:00
Jan Hubicka 6a64964212 Avoid redundant entries in modref access lists.
In PR101296 Richard noticed that modref is giving up on analysis in milc by
hitting --param=modref-max-accesses limit.  While cleaning up original modref
patch I removed code that tried to do smart things while merging accesses
because it had bugs and wanted to reimplement it later which I later forgot.

This patch adds logic that avoids adding access and its subaccess to the list
which is just waste of memory and compile time.  Incrementally I will add logic
merging the ranges.

gcc/ChangeLog:

2021-08-23  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-modref-tree.h (modref_access_node::range_info_useful_p):
	Improve range compare.
	(modref_access_node::contains): New member function.
	(modref_access_node::search): Remove.
	(modref_access_node::insert): Be smarter about subaccesses.

gcc/testsuite/ChangeLog:

2021-08-23  Jan Hubicka  <hubicka@ucw.cz>

	* gcc.dg/tree-ssa/modref-7.c: New test.
2021-08-23 17:56:51 +02:00
Thomas Schwinge 29c355f76c Add 'libgomp.c/address-space-1.c'
Intel MIC (emulated) offloading execution failure remains to be analyzed.

	libgomp/
	* testsuite/libgomp.c/address-space-1.c: New file.

Co-authored-by: Jakub Jelinek <jakub@redhat.com>
2021-08-23 17:46:08 +02:00
Thomas Schwinge bb75b22aba Allow matching Intel MIC in OpenMP 'declare variant'
..., and use that to improve XFAILing for Intel MIC offloading execution
instead of compilation in 'libgomp.c-c++-common/target-45.c',
'libgomp.fortran/target10.f90'.

	gcc/
	* config/i386/i386-options.c (ix86_omp_device_kind_arch_isa)
	<omp_device_arch> [ACCEL_COMPILER]: Match "intel_mic".
	* config/i386/t-omp-device (omp-device-properties-i386) <arch>:
	Add "intel_mic".
	libgomp/
	* testsuite/lib/libgomp.exp
	(check_effective_target_offload_target_intelmic): Remove 'proc'.
	(check_effective_target_offload_device_intel_mic): New 'proc'.
	* testsuite/libgomp.c-c++-common/on_device_arch.h
	(device_arch_intel_mic, on_device_arch_intel_mic): New.
	* testsuite/libgomp.c-c++-common/target-45.c: Use that for
	'dg-xfail-run-if'.
	* testsuite/libgomp.fortran/target10.f90: Likewise.
2021-08-23 17:45:40 +02:00
Jonathan Wakely 1a129376bb libstdc++: Add default template argument to basic_istream_view
The standard shows this default template argument in the <ranges>
synopsis, but it was missing in libstdc++.

libstdc++-v3/ChangeLog:

	* include/std/ranges (basic_istream_view): Add default template
	argument.
	* testsuite/std/ranges/istream_view.cc: Check it.
2021-08-23 16:17:10 +01:00
Jeff Law fedadb60b6 Add tailcall/sibcall support to the H8
gcc/

	* config/h8300/h8300-protos.h (h8300_expand_epilogue): Add new
	argument.
	* config/h8300/jumpcall.md (call, call_value): Restrict to
	!SIBLING_CALL_P cases.
	(subcall, sibcall_value): New patterns & expanders.
	* config/h8300/proepi.md (epilogue): Pass new argument to
	h8300_expand_epilogue.
	(sibcall_epilogue): New expander.
	* config/h8300/h8300.c (h8300_expand_epilogue): Handle sibcall
	epilogues too.
	(h8300_ok_for_sibcall_p): New function.
	(TARGET_FUNCTION_OK_FOR_SIBCALL): define.
2021-08-23 10:37:20 -04:00
Roger Sayle 89ff4f027b [Committed] Restore build on !TARGET_TRULY_NOOP_TRUNCATION targets
My sincere apologies to everyone, but especially Andrew Pinski
who warned me in advance that TRULY_NOOP_TRUNCATION results in
different code paths/optimizations on some targets. This restores
the build on nvptx-none (and presumably others) where mysteriously
(truncate:QI (reg:QI)) fails to be simplified to (reg:QI), which
is expected (everywhere) in my recently added self-tests.

2021-08-23  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	* simplify-rtx.c (simplify_unary_operation_1): [TRUNCATE]:
	Handle case where the operand is already the desired mode.
2021-08-23 15:35:05 +01:00
Richard Biener 0230e69a3f ipa/97565 - fix IPA PTA body availability check
Looks like the existing check using has_gimple_body_p isn't enough
at LTRANS time but I need to check in_other_partition as well.

2021-08-23  Richard Biener  <rguenther@suse.de>

	PR ipa/97565
	* tree-ssa-structalias.c (ipa_pta_execute): Check in_other_partition
	in addition to has_gimple_body.

	* g++.dg/lto/pr97565_0.C: New testcase.
	* g++.dg/lto/pr97565_1.C: Likewise.
2021-08-23 16:30:16 +02:00
Jan Hubicka 39baa886bc Fix template in g++.dg/tree-ssa/modref-1.C
gcc/testsuite/ChangeLog:

	* g++.dg/tree-ssa/modref-1.C: Fix template.
2021-08-23 16:20:09 +02:00
Jan Hubicka 5bd4ab9166 Fix previous ipa-modref patch
gcc/ChangeLog:

	PR middle-end/101949
	* ipa-modref.c (analyze_ssa_name_flags): Fix merging of
	EAF_NOCLOBBER
2021-08-23 16:16:25 +02:00