PR rtl-optimization/57763
* bb-reorder.c (fix_crossing_unconditional_branches): Set JUMP_LABEL
on the new indirect jump_insn and increment LABEL_NUSES (label).
From-SVN: r206773
fortran/
PR fortran/58007
* module.c (MOD_VERSION): Bump.
(fp2, find_pointer2): Remove.
(mio_component_ref): Don't forcedfully set the containing derived type
symbol for loading. Remove unused argument.
(mio_ref): Update caller
(mio_symbol): Dump component list earlier.
(skip_list): New argument nest_level. Initialize level with the new
argument.
(read_module): Add forced pointer components association for derived
type symbols.
testsuite/
PR fortran/58007
* gfortran.dg/unresolved_fixup_1.f90: New test.
* gfortran.dg/unresolved_fixup_2.f90: New test.
From-SVN: r206759
PR middle-end/59706
* gimplify.c (gimplify_expr): Use create_tmp_var
instead of create_tmp_var_raw. If cond doesn't have
integral type, don't add the IFN_ANNOTATE builtin at all.
* gfortran.dg/pr59706.f90: New test.
* g++.dg/ext/pr59706.C: New test.
From-SVN: r206732
ix86_split_lea_for_addr transforms a single LEA instruction into a
series of MOV and ADD instructions. For
lea 0x400(%edx, %ecx, 8), %edx
we get
mov %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add %ecx, %edx
add $0x400, %edx
For -mtune=intel, we want to turn on X86_TUNE_OPT_AGU, but avoid
ix86_split_lea_for_addr to optimize for both Haswell and Silvermont.
This patch adds X86_TUNE_AVOID_LEA_FOR_ADDR and PROCESSOR_INTEL.
We keep PROCESSOR_INTEL the same as PROCESSOR_SILVERMONT, except that
X86_TUNE_AVOID_LEA_FOR_ADDR isn't turned on for PROCESSOR_INTEL.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_INTEL. Treat like PROCESSOR_GENERIC.
* config/i386/i386.c (intel_memcpy): New. Duplicate slm_memcpy.
(intel_memset): New. Duplicate slm_memset.
(intel_cost): New. Duplicate slm_cost.
(m_INTEL): New macro.
(processor_target_table): Add "intel".
(ix86_option_override_internal): Replace PROCESSOR_SILVERMONT
with PROCESSOR_INTEL for "intel".
(ix86_lea_outperforms): Support PROCESSOR_INTEL. Duplicate
PROCESSOR_SILVERMONT.
(ix86_avoid_lea_for_addr): Check TARGET_AVOID_LEA_FOR_ADDR
instead of TARGET_OPT_AGU.
(ix86_issue_rate): Likewise.
(ix86_adjust_cost): Likewise.
(ia32_multipass_dfa_lookahead): Likewise.
(swap_top_of_ready_list): Likewise.
(ix86_sched_reorder): Likewise.
* config/i386/i386.h (TARGET_INTEL): New.
(TARGET_AVOID_LEA_FOR_ADDR): Likewise.
(processor_type): Add PROCESSOR_INTEL.
* config/i386/x86-tune.def: Support m_INTEL. Duplicate
m_SILVERMONT. Add X86_TUNE_AVOID_LEA_FOR_ADDR.
From-SVN: r206717
2014-01-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/46590
* opts.c (default_options_table): Add entries for
OPT_fbranch_count_reg, OPT_fmove_loop_invariants and OPT_ftree_pta,
all enabled at -O1 but not for -Og.
* common.opt (fbranch-count-reg): Remove Init(1).
(fmove-loop-invariants): Likewise.
(ftree-pta): Likewise.
From-SVN: r206714
* config/i386/i386.c (ix86_data_alignment): For compatibility with
(incorrect) GCC 4.8 and earlier alignment assumptions ensure we align
decls to at least the GCC 4.8 used alignments.
From-SVN: r206713
PR testsuite/58776
* gcc.dg/tree-ssa-gen-vect-32.c: Add -fno-vect-cost-model to
dg-options, use dg-additional-options for i?86/x86_64 to avoid
option duplication.
From-SVN: r206712
PR fortran/59440
* tree-nested.c (convert_nonlocal_reference_stmt,
convert_local_reference_stmt): For NAMELIST_DECLs in gimple_bind_vars
of GIMPLE_BIND stmts, adjust associated decls.
* gfortran.dg/pr59440-1.f90: New test.
* gfortran.dg/pr59440-2.f90: New test.
* gfortran.dg/pr59440-3.f90: New test.
From-SVN: r206711
2014-01-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/46590
* vec.h (vec<>::bseach): New member function implementing
binary search according to C89 bsearch.
(vec<>::qsort): Avoid calling ::qsort for vectors with sizes 0 or 1.
* tree-ssa-loop-im.c (struct mem_ref): Make stored member a
bitmap pointer again. Make accesses_in_loop a flat array.
(mem_ref_obstack): New global.
(outermost_indep_loop): Adjust for mem_ref->stored changes.
(mark_ref_stored): Likewise.
(ref_indep_loop_p_2): Likewise.
(set_ref_stored_in_loop): New helper function.
(mem_ref_alloc): Allocate mem_refs on the mem_ref_obstack obstack.
(memref_free): Adjust.
(record_mem_ref_loc): Simplify.
(gather_mem_refs_stmt): Adjust.
(sort_locs_in_loop_postorder_cmp): New function.
(analyze_memory_references): Sort accesses_in_loop after
loop postorder number.
(find_ref_loc_in_loop_cmp): New function.
(for_all_locs_in_loop): Find relevant cluster of locs in
accesses_in_loop and iterate without recursion.
(execute_sm): Avoid uninit warning.
(struct ref_always_accessed): Simplify.
(ref_always_accessed::operator ()): Likewise.
(ref_always_accessed_p): Likewise.
(tree_ssa_lim_initialize): Initialize mem_ref_obstack, compute
loop postorder numbers here.
(tree_ssa_lim_finalize): Free mem_ref_obstack and loop postorder
numbers.
From-SVN: r206709
PR c++/57945
* passes.c (rest_of_decl_compilation): Don't call varpool_finalize_decl
on decls for which assemble_alias has been called.
* c-c++-common/torture/pr57945.c: New test.
From-SVN: r206708
* config/msp430/msp430.opt: (mcpu): New option.
* config/msp430/msp430.c (msp430_mcu_name): Use target_mcu.
(msp430_option_override): Parse target_cpu. If the MCU name
matches a generic string, clear target_mcu.
(msp430_attr): Allow numeric interrupt values up to 63.
(msp430_expand_epilogue): No longer invert operand 1 of gen_popm.
* config/msp430/msp430.h (ASM_SPEC): Convert -mcpu into a -mmcu
option.
* config/msp430/t-msp430: (MULTILIB_MATCHES): Remove mcu matches.
Add mcpu matches.
* config/msp430/msp430.md (popm): Use %J rather than %I.
(addsi3): Use msp430_nonimmediate_operand for operand 2.
(addhi_cy_i): Use immediate_operand for operand 2.
* doc/invoke.texi: Document -mcpu option.
From-SVN: r206705
2014-01-17 Richard Biener <rguenther@suse.de>
PR rtl-optimization/38518
* df.h (df_analyze_loop): Declare.
* df-core.c: Include cfgloop.h.
(df_analyze_1): Split out main part of df_analyze.
(df_analyze): Adjust.
(loop_inverted_post_order_compute): New function.
(loop_post_order_compute): Likewise.
(df_analyze_loop): New function avoiding whole-function
postorder computes.
* loop-invariant.c (find_defs): Use df_analyze_loop.
(find_invariants): Adjust.
* loop-iv.c (iv_analysis_loop_init): Use df_analyze_loop.
From-SVN: r206702
ChangeLog:
2014-01-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
* config/arm/arm.c (arm_v7m_tune): Set max_insns_skipped to 2.
(thumb2_final_prescan_insn): Set max to MAX_INSN_PER_IT_BLOCK.
testsuite/ChangeLog:
2014-01-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
* gcc.target/arm/its.c: New test.
From-SVN: r206698
