2014-04-22 Marc Glisse <marc.glisse@inria.fr>
PR libstdc++/43622
gcc/c-family/
* c-common.c (registered_builtin_types): Make non-static.
* c-common.h (registered_builtin_types): Declare.
gcc/cp/
* rtti.c (emit_support_tinfo_1): New function, extracted from
emit_support_tinfos.
(emit_support_tinfos): Call it and iterate on registered_builtin_types.
libstdc++-v3/
* config/abi/pre/gnu.ver (CXXABI_1.3.9): New version, new symbols.
* config/abi/pre/gnu-versioned-namespace.ver: New symbols.
* config/abi/post/x86_64-linux-gnu/baseline_symbols.txt: Likewise.
From-SVN: r209652
2014-04-22 Martin Jambor <mjambor@suse.cz>
* cgraphclones.c (cgraph_function_versioning): Copy
ipa_transforms_to_apply instead of asserting it is empty.
From-SVN: r209650
PR c/59073
c/
* c-parser.c (c_parser_omp_parallel): If c_parser_omp_for
fails, don't set OM_PARALLEL_COMBINED and return NULL.
cp/
* parser.c (cp_parser_omp_parallel): If cp_parser_omp_for
fails, don't set OM_PARALLEL_COMBINED and return NULL.
testsuite/
* c-c++-common/gomp/pr59073.c: New test.
From-SVN: r209646
Ramana noted:
This defines TARGET_FLAGS_REGNUM for AArch64 to be CC_REGNUM. Noticed
this turns on the cmpelim pass after reload and in a few examples and
a couple of benchmarks I noticed a number of comparisons getting
deleted.
From-SVN: r209643
This patch re-implements vreinterpret intrinsics to directly call a
cast. The aim is to forward as much information to front-end as
possible.
From-SVN: r209641
This patch fixes the elimination offset calculation. This is a latent
bug hidden by the frame alignment calculation.
Co-Authored-By: Jiong Wang <jiong.wang@arm.com>
From-SVN: r209636
PR tree-optimization/60823
* omp-low.c (ipa_simd_modify_function_body): Go through
all SSA_NAMEs and for those refering to vector arguments
which are going to be replaced adjust SSA_NAME_VAR and,
if it is a default definition, change it into a non-default
definition assigned at the beginning of function from new_decl.
(ipa_simd_modify_stmt_ops): Rewritten.
* tree-dfa.c (set_ssa_default_def): When removing default def,
check for NULL loc instead of NULL *loc.
* c-c++-common/gomp/pr60823-1.c: New test.
* c-c++-common/gomp/pr60823-2.c: New test.
* c-c++-common/gomp/pr60823-3.c: New test.
From-SVN: r209616
Ramana commented in the submission email:
I noticed that for T32 we don't allow any old register for DImode
values. The restriction of an even register is true only for ARM state
because the ISA doesn't allow any old register in this place. In a few
large .i files that I had knocking about, noticed a nice drop in stack
usage and a generally improved register allocation strategy.
From-SVN: r209615
[gcc]
* config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
* config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
[gcc/testsuite]
* gcc.target/arm/anddi_notdi-1.c: New test.
* gcc.target/arm/iordi_notdi-1.c: New test case.
From-SVN: r209614
* config/arm/arm-protos.h (tune_params): New struct members.
* config/arm/arm.c: Initialise tune_params per processor.
(thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
for speed, based on new tune_params.
From-SVN: r209561
This patch adds vrnd<*>_f64 aarch64 intrinsics. A testcase for those
intrinsics is added. Run a complete LE and BE regression run with no
regressions.
From-SVN: r209559
PR target/60910
* config/sparc/sparc.c (sparc_init_modes): Pass enum machine_mode
value instead of int to GET_MODE_CLASS and GET_MODE_SIZE macros.
From-SVN: r209555
PR middle-end/60281
* asan.c (asan_emit_stack_protection): Force the base to align to
appropriate bits if STRICT_ALIGNMENT. Set shadow_mem align to
appropriate bits if STRICT_ALIGNMENT.
* cfgexpand.c (expand_stack_vars): Set base_align appropriately
when asan is on.
(expand_used_vars): Leave a space in the stack frame for alignment
if STRICT_ALIGNMENT.
From-SVN: r209554
gcc/
* gimple.h (gimple_assign_single_p): Accept a const_gimple rather
than a gimple.
(gimple_store_p): Likewise.
(gimple_assign_load_p): Likewise.
(gimple_assign_cast_p): Likewise.
(gimple_clobber_p): Likewise.
* doc/gimple.texi (gimple_assign_cast_p): Accept a const_gimple
rather than a gimple.
(gimple_assign_cast_p): Likewise.
From-SVN: r209548
[gcc]
2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):
If mode is DDmode and TARGET_E500_DOUBLE allow move.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some
more debug information for E500 if -mdebug=reg.
[gcc/testsuite]
2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* gcc.target/powerpc/pr60735.c: New test. Insure _Decimal64 does
not cause errors if -mspe.
From-SVN: r209546
2014-04-18 Cong Hou <congh@google.com>
* tree-vect-patterns.c (vect_recog_widen_mult_pattern): Enhance
the widen-mult pattern by handling two operands with different
sizes, and operands whose size is smaller than half of the result
type.
From-SVN: r209525
2014-04-18 Cong Hou <congh@google.com>
* tree-vect-patterns.c (vect_recog_widen_mult_pattern): Enhance
the widen-mult pattern by handling two operands with different
sizes.
* tree-vect-stmts.c (vectorizable_conversion): Allow multi-steps
conversions after widening mult operation.
(supportable_widening_operation): Likewise.
2014-04-18 Cong Hou <congh@google.com>
* gcc.dg/vect/vect-widen-mult-u8-s16-s32.c: New test.
* gcc.dg/vect/vect-widen-mult-u8-u32.c: New test.
From-SVN: r209524
* ipa-inline.h (INLINE_HINT_known_hot): New hint.
* ipa-inline-analysis.c (dump_inline_hints): Dump it.
(do_estimate_edge_time): Compute it.
* ipa-inline.c (want_inline_small_function_p): Bypass
INLINE_INSNS_AUTO/SINGLE limits for calls that are known
to be hot.
From-SVN: r209523