* jump.c (reset_insn_reg_label_operand_notes): New function,
split out from ...
(init_label_info): ... here. Reset LABEL_NUSES in cfglayout mode.
* cfgcleanup.c (delete_dead_jump_tables_between): New function,
split out from ...
(delete_dead_jumptables): ... here. Handle cfglayout mode.
(cleanup_cfg): Delete dead jump tables in cfglayout mode if an
expensive CFG cleanup is called for.
* cfgrtl.c (fixup_reorder_chain): Remove BARRIERs from fallthru paths.
(cfg_layout_finalize): Delete dead jump tables before re-building
the insns chain.
* ira.c (ira): Rebuild jump labels *after* deleting unreachable
basic blocks, not before.
* loop-init.c (rtl_loop_done): Call for an expensive CFG cleanup.
* modulo-sched.c (sms_schedule): Do not look for BARRIERs in the
insns chain of a scheduling extended basic block, they cannot appear
there in cfglayout mode.
From-SVN: r205337
2013-11-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Correct
for little endian.
From-SVN: r205333
PR c++/59031
* call.c (build_new_method_call_1): Comnpare function context
with BASELINK_BINFO type rather than instance type before
marking the call with LOOKUP_NONVIRTUAL.
From-SVN: r205317
Also unify all identical result parameter sets into a single
struct type, and fix the use of backend function pointers.
* go-gcc.cc (Gcc_backend::function_type): Add result_struct
parameter.
From-SVN: r205316
PR c++/58868
* init.c (build_aggr_init): Don't clobber the type of init
if we got an INIT_EXPR back from build_vec_init.
(build_vec_init): Do digest_init on trivial initialization.
From-SVN: r205311
* config/rs6000/rs6000.c (IN_NAMED_SECTION): New macro.
(rs6000_xcoff_select_section): Place decls with stricter alignment
into named sections.
(rs6000_xcoff_unique_section): Allow unique sections for
uninitialized data with strict alignment.
From-SVN: r205308
PR tree-optimization/59154
* tree-ssa-reassoc.c (maybe_optimize_range_tests): When changing
rhs1 of a cast and new_op is invariant, fold_convert it.
* tree-ssa-forwprop.c (ssa_forward_propagate_and_combine): Only call
simplify_conversion_from_bitmask if rhs1 is a SSA_NAME.
From-SVN: r205307
PR target/56788
* config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>:
Declare as MULTI_ARG_1_SF instruction.
<IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction.
* config/i386/sse.md (*xop_vmfrcz<mode>2): Rename
from *xop_vmfrcz_<mode>.
* config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss
to merge scalar result with __A.
(_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar
result with __A.
From-SVN: r205306
* gimplify.h (recalculate_side_effects): Delete.
* gimplify.c (recalculate_side_effects): Make static and add comment.
ada/
* gcc-interface/trans.c (Loop_Statement_to_gnu): Set TREE_SIDE_EFFECTS
on the conditional expression directly.
From-SVN: r205305
gcc/
* config/sh/sh.md: Use nonimmediate_operand rather than general_operand
for the destination of a define_peephole2. Likewise register_operand
rather than arith_reg_operand. Remove constraints from
define_peephole2s.
From-SVN: r205303
libiberty/
PR other/59195
* cp-demangle.c (struct d_info_checkpoint): New struct.
(struct d_print_info): Add current_template field.
(d_operator_name): Set flag when processing a conversion
operator.
(cplus_demangle_type): When processing <template-args> for
a conversion operator, backtrack if necessary.
(d_expression_1): Renamed from d_expression.
(d_expression): New wrapper around d_expression_1.
(d_checkpoint): New function.
(d_backtrack): New function.
(d_print_init): Initialize current_template.
(d_print_comp): Set current_template.
(d_print_cast): Put current_template in scope for
printing conversion operator name.
(cplus_demangle_init_info): Initialize is_expression and
is_conversion.
* cp-demangle.h (struct d_info): Add is_expression and
is_conversion fields.
* testsuite/demangle-expected: New test cases.
From-SVN: r205292
* testsuite/Makefile.am (check_DEJAGNU_normal_targets): Add 10.
(check-DEJAGNU): Add normal10, run 28_regex/[ab]*
tests as another separate job.
* testsuite/Makefile.in: Regenerated.
From-SVN: r205286
* ipa.c (symtab_remove_unreachable_nodes): Fix up comment typos.
* ipa-prop.c (get_vector_of_formal_parm_types): Renamed to ...
(ipa_get_vector_of_formal_parm_types): ... this. No longer static.
(ipa_modify_formal_parameters): Adjust caller. Remove
synth_parm_prefix argument. Use operator enum instead of bit fields.
Add assert for properly handling vector of references. Handle
creating brand new parameters.
(ipa_modify_call_arguments): Use operator enum instead of bit
fields.
(ipa_combine_adjustments): Same. Assert that IPA_PARM_OP_NEW is not
used.
(ipa_modify_expr, get_ssa_base_param, ipa_get_adjustment_candidate):
New functions.
(ipa_dump_param_adjustments): Rename reduction to new_decl.
Use operator enum instead of bit fields.
* ipa-prop.h (enum ipa_parm_op): New.
(struct ipa_parm_adjustment): New field op. Rename reduction
to new_decl, new_arg_prefix to arg_prefix and remove remove_param
and copy_param.
(ipa_modify_formal_parameters): Remove last argument.
(ipa_get_vector_of_formal_parm_types, ipa_modify_expr,
ipa_get_adjustment_candidate): New prototypes.
* tree-sra.c (turn_representatives_into_adjustments): Use operator
enum. Set arg_prefix.
(get_adjustment_for_base): Use operator enum.
(sra_ipa_modify_expr): Rename to ipa_modify_expr and move to
ipa-prop.c.
(sra_ipa_modify_assign): Rename sra_ipa_modify_expr to
ipa_modify_expr.
(ipa_sra_modify_function_body): Same. No longer static.
(sra_ipa_reset_debug_stmts): Use operator enum.
(modify_function): Do not pass prefix argument.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r205284
* ubsan.c (ubsan_source_location): Don't crash on
unknown locations.
(ubsan_pass): Ignore clobber stmts.
* sanitizer.def (BUILT_IN_UBSAN_HANDLE_MISSING_RETURN): New built-in.
* opts.c (common_handle_option): Add -fsanitize=return.
* flag-types.h (enum sanitize_code): Add SANITIZE_RETURN and
or it into SANITIZE_UNDEFINED.
c-family/
* c-ubsan.h (ubsan_instrument_return): New prototype.
* c-ubsan.c (ubsan_instrument_return): New function.
cp/
* cp-gimplify.c: Include target.h and c-family/c-ubsan.h.
(cp_ubsan_maybe_instrument_return): New function.
(cp_genericize): Call it if -fsanitize=return.
testsuite/
* g++.dg/ubsan/return-1.C: New test.
* g++.dg/ubsan/return-2.C: New test.
From-SVN: r205283
* sanitizer.def (BUILT_IN_ASAN_BEFORE_DYNAMIC_INIT,
BUILT_IN_ASAN_AFTER_DYNAMIC_INIT): New.
* asan.c (instrument_derefs): Handle also VAR_DECL loads/stores.
Don't instrument accesses to VAR_DECLs which are known to fit
into their bounds and the vars are known to have shadow bytes
indicating allowed access.
(asan_dynamic_init_call): New function.
(asan_add_global): If vnode->dynamically_initialized,
set __has_dynamic_init to 1 instead of 0.
(initialize_sanitizer_builtins): Add BT_FN_VOID_CONST_PTR var.
* asan.h (asan_dynamic_init_call): New prototype.
* cgraph.h (varpool_node): Add dynamically_initialized bitfield.
cp/
* decl2.c: Include asan.h.
(one_static_initialization_or_destruction): If -fsanitize=address,
init is non-NULL and guard is NULL, set
vnode->dynamically_initialized.
(do_static_initialization_or_destruction): Call
__asan_{before,after}_dynamic_init around the static initialization.
testsuite/
* c-c++-common/asan/no-redundant-instrumentation-1.c: Tweak to avoid
optimizing away some __asan_report* calls.
From-SVN: r205282
PR rtl-optimization/10474
* ira.c (interesting_dest_for_shprep_1): New function.
(interesting_dest_for_shprep): Use interesting_dest_for_shprep_1,
also check parallels.
testsuite/
* gcc.dg/pr10474.c: Also test ppc64.
* gcc.dg/ira-shrinkwrap-prep-1.c: Also tes ppc64, changed all ints
to longs.
* gcc.dg/ira-shrinkwrap-prep-2.c: Likewise.
From-SVN: r205281
* tree-ssa-threadedge.c (record_temporary_equivalence): Handle
NULL for RHS, which we used to invalidate equivalences.
(record_temporary_equivalences_from_phis): New bitmap arguments
and a boolean indicating if we have passed a backedge. If we
have passed a backedge, then set the appropriate bit in the
bitmaps for the SRC & DEST of PHIs creating equivalences.
(invalidate_equivalences, dummy_simplify): New functions.
(cond_arg_set_in_b): Remove.
(record_temporary_equivalences_from_stmts_at_dest): New bitmap
arguments and a boolean indicating if we have passed a backedge.
If we have passed a backedge, then perform invalidations as
needed.
(thread_around_empty_blocks): If we have seen a backedge, then
use the dummy simplify routine.
(thread_through_normal_block): Likewise. Pass bitmaps and
backedge status to children. Do not pessimize so much when
traversing backedges in the CFG.
(thread_across_edge): Manage the SRC_MAP/DST_MAP bitmaps.
If we have seen a backedge, then use the dummy simplify routine.
Do not pessimize so much when traversing backedges.
From-SVN: r205279
2013-11-22 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/59054
* gcc.target/powerpc/direct-move.h (VSX_REG_ATTR): Allow test to
specify an appropriate register class for VSX operations.
(load_vsx): Use it.
(load_gpr_to_vsx): Likewise.
(load_vsx_to_gpr): Likewise.
* gcc.target/powerpc/direct-move-vint1.c: Use an appropriate
register class for VSX registers that the type can handle. Remove
checks for explicit number of instructions generated, just check
if the instruction is generated.
* gcc.target/powerpc/direct-move-vint2.c: Likewise.
* gcc.target/powerpc/direct-move-float1.c: Likewise.
* gcc.target/powerpc/direct-move-float2.c: Likewise.
* gcc.target/powerpc/direct-move-double1.c: Likewise.
* gcc.target/powerpc/direct-move-double2.c: Likewise.
* gcc.target/powerpc/direct-move-long1.c: Likewise.
* gcc.target/powerpc/direct-move-long2.c: Likewise.
* gcc.target/powerpc/pr59054.c: Remove duplicate code.
* gcc.target/powerpc/bool3-av.c: Limit to 64-bit mode for now.
* gcc.target/powerpc/bool3-p7.c: Likewise.
* gcc.target/powerpc/bool3-p8.c: Likewise.
* gcc.target/powerpc/p8vector-ldst.c: Just check that the
appropriate instructions are generated, don't check the count.
From-SVN: r205278
2013-11-22 Tejas Belagod <tejas.belagod@arm.com>
gcc/
* config/aarch64/aarch64-simd.md (vec_pack_trunc_<mode>,
vec_pack_trunc_v2df, vec_pack_trunc_df): Swap for big-endian.
(reduc_<sur>plus_<mode>): Factorize V2DI into this.
(reduc_<sur>plus_<mode>): Change this to reduc_splus_<mode> for floats
and also change to float UNSPEC.
(reduc_maxmin_uns>_<mode>): Remove V2DI.
* config/aarch64/arm_neon.h (vaddv<q>_<suf><8,16,32,64>,
vmaxv<q>_<suf><8,16,32,64>, vminv<q>_<suf><8,16,32,64>): Fix up scalar
result access for big-endian.
(__LANE0): New macro used to fix up lane access of 'across-lanes'
intrinsics for big-endian.
* config/aarch64/iterators.md (VDQV): Add V2DI.
(VDQV_S): New.
(vp): New mode attribute.
From-SVN: r205269
