PR tree-optimization/59014
* tree-vrp.c (register_edge_assert_for_1): Don't look
through conversions from non-integral types or through
narrowing conversions.
* gcc.c-torture/execute/pr59014.c: New test.
From-SVN: r205417
PR sanitizer/59258
* ubsan.c (ubsan_source_location): Don't add any location
to ADDR_EXPR in the ctor. Revert 2013-11-22 change.
(ubsan_create_data): Strip block info from LOC.
From-SVN: r205415
PR middle-end/59273
* tree-vect-generic.c (optimize_vector_constructor): Don't optimize
if there isn't optab handler for the corresponding vector PLUS_EXPR.
From-SVN: r205414
PR middle-end/59150
* omp-low.c (lower_rec_input_clause): For reduction with placeholder
of references to constant size types in simd loops, defer emitting
initializer for the new_var, emit it later on only if not using
SIMD arrays for it.
* g++.dg/gomp/pr59150.C: New test.
From-SVN: r205411
PR middle-end/59152
* omp-low.c (expand_omp_for_static_chunk): Don't set loop->latch
for the inner loop if collapse_bb is non-NULL.
(expand_omp_simd): Use cont_bb rather than e->dest as latch.
* c-c++-common/gomp/pr59152.c: New test.
From-SVN: r205410
gcc/
* config/arm/arm.c (arm_legitimize_address): Check xop1 is not
a constant immediate before force_reg.
gcc/testsuite/
* gcc.target/arm/20131120.c: New test.
From-SVN: r205397
2013-11-26 Richard Biener <rguenther@suse.de>
PR tree-optimization/59245
* tree-vrp.c (set_value_range): Assert that we don't have
overflowed constants (but our infinities).
(set_value_range_to_value): Drop all overflow flags.
(vrp_visit_phi_node): Likewise.
(vrp_visit_assignment_or_call): Use set_value_range_to_value
to set a constant range.
* gcc.dg/torture/pr59245.c: New testcase.
From-SVN: r205395
PR bootstrap/55552
* configure.ac (install_gold_as_default): New. Set to yes for
--disable-ld or --enable-gold=default.
(gcc_cv_ld_gold_srcdir): New.
(gcc_cv_ld): Also check in-tree gold if install_gold_as_default
is yes.
(ORIGINAL_LD_BFD_FOR_TARGET): New AC_SUBST.
(ORIGINAL_LD_GOLD_FOR_TARGET): Likewise.
* configure: Regenerated.
* exec-tool.in (ORIGINAL_LD_BFD_FOR_TARGET): New variable.
(ORIGINAL_LD_GOLD_FOR_TARGET): Likewise.
(original) [collect-ld && -fuse-ld=bfd]: Set to
$ORIGINAL_LD_BFD_FOR_TARGET.
(original) [collect-ld && -fuse-ld=gold]: Set to
$ORIGINAL_LD_GOLD_FOR_TARGET.
(dir) [collect-ld && ../gold/ld-new]: Set to gold.
(fast_install) [collect-ld && ../gold/ld-new]: Set to yes.
From-SVN: r205392
gcc/ChangeLog
2013-11-26 Terry Guo <terry.guo@arm.com>
* config/arm/arm.c (require_pic_register): Handle high pic base
register for thumb-1.
(arm_load_pic_register): Also initialize high pic base register.
* doc/invoke.texi: Update documentation for option -mpic-register.
gcc/testsuite/ChangeLog
2013-11-26 Terry Guo <terry.guo@arm.com>
* gcc.target/arm/thumb1-pic-high-reg.c: New case.
* gcc.target/arm/thumb1-pic-single-base.c: New case.
From-SVN: r205391
PR target/58314
PR target/50751
* config/sh/sh.c (max_mov_insn_displacement, disp_addr_displacement):
Prefix function names with 'sh_'. Make them non-static.
* config/sh/sh-protos.h (sh_disp_addr_displacement,
sh_max_mov_insn_displacement): Add declarations.
* config/sh/constraints.md (Q): Reject QImode.
(Sdd): Use match_code "mem".
(Snd): Fix erroneous matching of non-memory operands.
* config/sh/predicates.md (short_displacement_mem_operand): New
predicate.
(general_movsrc_operand): Disallow PC relative QImode loads.
* config/sh/sh.md (*mov<mode>_reg_reg): Remove it.
(*movqi, *movhi): Merge both insns into...
(*mov<mode>): ... this new insn. Replace generic 'm' constraints with
'Snd' and 'Sdd' constraints. Calculate insn length dynamically based
on the operand types.
From-SVN: r205390
other intrinsics
gcc/
* config/aarch64/arm_neon.h (vtbx1_<psu>8): Emulate behaviour
using other intrinsics.
(vtbx3_<psu>8): Likewise.
From-SVN: r205386
to coexist.
gcc/
* config/aarch64/aarch64-builtins.c
(VAR1): Use new naming scheme for aarch64_builtins.
(aarch64_builtin_vectorized_function): Use new
aarch64_builtins names.
From-SVN: r205383
2013-11-26 Richard Biener <rguenther@suse.de>
PR tree-optimization/59287
* tree-ssa-structalias.c (get_constraint_for_component_ref):
Remove no longer necessary special-casing of union accesses.
* gcc.dg/tree-ssa/alias-29.c: New testcase.
From-SVN: r205380
In particular this means that the names Getsockname returns are not
truncated to 26 characters.
Fixes issue 6829
https://codereview.appspot.com/31840043/
From-SVN: r205368
gcc/ChangeLog
2013-11-25 Terry Guo <terry.guo@arm.com>
* doc/invoke.texi (-mslow-flash-data): Document new option.
* config/arm/arm.opt (mslow-flash-data): New option.
* config/arm/arm-protos.h (arm_max_const_double_inline_cost): Declare
it.
* config/arm/arm.h (TARGET_USE_MOVT): Always true when literal pools
are disabled.
(arm_disable_literal_pool): Declare it.
* config/arm/arm.c (arm_disable_literal_pool): New variable.
(arm_option_override): Handle new option.
(thumb2_legitimate_address_p): Don't allow symbol references when
literal pools are disabled.
(arm_max_const_double_inline_cost): New function.
* config/arm/arm.md (types.md): Include it before ...
(use_literal_pool): New attribute.
(enabled): Use new attribute.
(split pattern): Replace symbol+offset with MOVW/MOVT.
gcc/testsuite/ChangeLog
2013-11-25 Terry Guo <terry.guo@arm.com>
* gcc.target/arm/thumb2-slow-flash-data.c: New.
From-SVN: r205342
