Commit Graph

170263 Commits

Author SHA1 Message Date
Jonathan Wakely
27e6c1f406 Add Doxygen comments to <bit> header
* include/std/bit: Add Doxygen comments.

From-SVN: r273938
2019-07-31 15:38:50 +01:00
Jonathan Wakely
949fdadb9d PR libstdc++/91308 fix constraints on unique_ptr assignment
PR libstdc++/91308
	* include/bits/unique_ptr.h (unique_ptr::__safe_conversion_up): Remove
	constraints on deleter that should only apply to the constructor.
	(unique_ptr<T[], D>::__safe_conversion_up): Likewise.
	(unique_ptr<T[], D>::unique_ptr(unique_ptr<U, D>&&)): Restore
	constraints on deleter here.
	* testsuite/20_util/unique_ptr/assign/91308.cc: New test.

From-SVN: r273937
2019-07-31 15:38:26 +01:00
Richard Biener
208149b720 re PR tree-optimization/91280 (ICE in get_constraint_for_component_ref, at tree-ssa-structalias.c:3259 since r260354)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91280
	* tree-ssa-structalias.c (get_constraint_for_component_ref):
	Decompose MEM_REF manually for offset handling.

	* g++.dg/torture/pr91280.C: New testcase.

From-SVN: r273936
2019-07-31 14:38:21 +00:00
Jakub Jelinek
a28351e7f5 re PR c/91192 (non-deterministic ICE on invalid)
PR c/91192
	* c-parser.c (c_parser_sizeof_expression): Call set_c_expr_source_range
	even if finish is UNKNOWN_LOCATION, just use start as finish in that
	case.

From-SVN: r273935
2019-07-31 16:32:24 +02:00
Richard Biener
2153fa7b60 re PR tree-optimization/91293 (Wrong code with -O3 -mavx2)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91293
	* tree-vect-slp.c (vect_build_slp_tree_2): Do not swap operands
	of reduction stmts.

	* gcc.dg/vect/pr91293-1.c: New testcase.
	* gcc.dg/vect/pr91293-2.c: Likewise.
	* gcc.dg/vect/pr91293-3.c: Likewise.

From-SVN: r273934
2019-07-31 14:15:37 +00:00
Matt Thomas
428642b132 config.gcc (hppa*-*-netbsd*): New target.
gcc/ChangeLog:
	* config.gcc (hppa*-*-netbsd*): New target.
	* config/pa/pa-netbsd.h: New file.
	* config/pa/pa32-netbsd.h: New file.

libgcc/ChangeLog:
	* config.host (hppa*-*-netbsd*): New case.
	* config/pa/t-netbsd: New file.


Co-Authored-By: Matthew Green <mrg@eterna.com.au>
Co-Authored-By: Maya Rashish <coypu@sdf.org>
Co-Authored-By: Nick Hudson <nick@nthcliff.demon.co.uk>

From-SVN: r273933
2019-07-31 14:11:16 +00:00
Jakub Jelinek
538e4cdc15 re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)
PR tree-optimization/91201
	* config/i386/mmx.md (reduc_plus_scal_v8qi): New expander.

	* gcc.target/i386/sse2-pr91201-2.c: New test.

From-SVN: r273932
2019-07-31 15:49:26 +02:00
Andrew Stubbs
930c55993f Remove amdgcn expcnt waits.
2019-07-31  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md
	(scatter<mode>_insn_1offset<exec_scatter>): Remove s_waitcnt.
	(scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
	(scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Add delayeduse and reads to
	struct ilist. Add nops for delayeduse insns.
	* config/gcn/gcn.md (delayeduse): New attribute.
	(*movbi): Remove s_waitcnt from stores.
	(*mov<mode>_insn): Likewise.
	(*movti_insn): Likewise. Add delayeduse attribute.
	(sync_compare_and_swap<mode>_insn): Add delayeduse attribute.
	(atomic_store<mode>): Remove or adjust s_waitcnt.

From-SVN: r273931
2019-07-31 11:51:21 +00:00
Richard Biener
f86c2e7196 vr-values.h (vr_values::swap_vr_value): New.
2019-07-31  Richard Biener  <rguenther@suse.de>

	* vr-values.h (vr_values::swap_vr_value): New.
	(vr_values::free_value_range): likewise.
	* vr-values.c (vr_values::swap_vr_value): Implement.
	* gimple-ssa-evrp-analyze.h (evrp_range_analyzer::pop_value_range):
	Do not return a range or take a var.
	(evrp_range_analyzer::stack): Change back to recording a non-const
	value_range *.
	* gimple-ssa-evrp-analyze.c
	(evrp_range_analyzer::record_ranges_from_stmt): Free unused
	value-range.
	(evrp_range_analyzer::pop_to_marker): Adjust.
	(evrp_range_analyzer::push_value_range): Use new swap_vr_value.
	(evrp_range_analyzer::pop_value_range): Likewise.  Free the
	no longer needed value-range.

From-SVN: r273930
2019-07-31 10:55:27 +00:00
Martin Liska
f39b06395e Mark necessary 2nd and later args for delete op.
2019-07-31  Martin Liska  <mliska@suse.cz>

	* tree-ssa-dce.c (propagate_necessity): Delete operator can
	have size and (or) alignment as 2nd and later arguments.
	Mark all of them as necessary.

From-SVN: r273929
2019-07-31 10:02:30 +00:00
Richard Biener
0fbdb0c088 re PR tree-optimization/91178 (Infinite recursion in split_constant_offset in slp after r260289)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91178
	* tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address):
	Use tail-recursion.

	* gcc.dg/torture/pr91178-2.c: New testcase.

From-SVN: r273928
2019-07-31 09:46:18 +00:00
Jakub Jelinek
1104467f39 re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)
PR tree-optimization/91201
	* config/i386/sse.md (reduc_plus_scal_v16qi): New expander.
	(REDUC_PLUS_MODE): Add V32QImode for TARGET_AVX and V64QImode for
	TARGET_AVX512F.
	(reduc_plus_scal_<mode>): Improve formatting by introducing
	a temporary.

	* gcc.target/i386/sse2-pr91201.c: New test.
	* gcc.target/i386/avx2-pr91201.c: New test.
	* gcc.target/i386/avx512bw-pr91201.c: New test.

From-SVN: r273927
2019-07-31 11:22:48 +02:00
Sudakshina Das
89626179b6 [GCC, AArch64] Enable Transactional Memory Extension
This patch enables the new Transactional Memory Extension announced recently
as part of Arm's new architecture technologies.
We introduce a new optional extension "tme" to enable this. The following
instructions are part of the extension:
   * tstart <Xt>
   * ttest <Xt>
   * tcommit
   * tcancel #<imm>
We have also added ACLE intrinsics for the instructions.

*** gcc/ChangeLog ***

2019-07-31  Sudakshina Das  <sudi.das@arm.com>

	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add
	AARCH64_TME_BUILTIN_TSTART, AARCH64_TME_BUILTIN_TCOMMIT,
	AARCH64_TME_BUILTIN_TTEST and AARCH64_TME_BUILTIN_TCANCEL.
	(aarch64_init_tme_builtins): New.
	(aarch64_init_builtins): Call aarch64_init_tme_builtins.
	(aarch64_expand_builtin_tme): New.
	(aarch64_expand_builtin): Handle TME builtins.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_TME when enabled.
	* config/aarch64/aarch64-option-extensions.def: Add "tme".
	* config/aarch64/aarch64.h (AARCH64_FL_TME, AARCH64_ISA_TME): New.
	(TARGET_TME): New.
	* config/aarch64/aarch64.md (define_c_enum "unspec"): Add UNSPEC_TTEST.
	(define_c_enum "unspecv"): Add UNSPECV_TSTART, UNSPECV_TCOMMIT and
	UNSPECV_TCANCEL.
	(tstart, ttest, tcommit, tcancel): New instructions.
	* config/aarch64/arm_acle.h (__tstart, __tcommit): New.
	(__tcancel, __ttest): New.
	(_TMFAILURE_REASON, _TMFAILURE_RTRY, _TMFAILURE_CNCL): New macro.
	(_TMFAILURE_MEM, _TMFAILURE_IMP, _TMFAILURE_ERR): Likewise.
	(_TMFAILURE_SIZE, _TMFAILURE_NEST, _TMFAILURE_DBG): Likewise.
	(_TMFAILURE_INT, _TMFAILURE_TRIVIAL): Likewise.
	* config/arm/types.md: Add new tme type attr.
	* doc/invoke.texi: Document "tme".

*** gcc/testsuite/ChangeLog ***

2019-07-31  Sudakshina Das  <sudi.das@arm.com>

	* gcc.target/aarch64/acle/tme.c: New test.
	* gcc.target/aarch64/pragma_cpp_predefs_2.c: New test.

From-SVN: r273926
2019-07-31 09:19:53 +00:00
Joel Hutton
f0efd92502 [Arm][CMSE]Add warn_unused_return attribute to cmse functions
At present it is possible to call the CMSE functions for checking
addresses (such as cmse_check_address_range) and  forget to check/use
the return value. This patch makes the interfaces more robust against
programmer error by marking these functions with the warn_unused_result
attribute. With this set, any use of these functions that does not use
the result will produce a warning.

This produces a warning on default warn levels when the result of the
cmse functions is not used.

For the following function:
void foo()
{
     int *data;
     cmse_check_address_range((int*)data, 0, 0);
}
The following warning is emitted:
warning: ignoring return value of 'cmse_check_address_range' declared
with attribute 'warn_unused_result' [-Wunused-result]
     6 |  cmse_check_address_range((int*)data, 0, 0);
        |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

gcc/ChangeLog:

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * config/arm/arm_cmse.h (cmse_nonsecure_caller): Add
warn_unused_result attribute.
         (cmse_check_address_range): Add warn_unused_result attribute.

libgcc/ChangeLog:

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * config/arm/cmse.c (cmse_check_address_range): Add
warn_unused_result attribute.

2019-07-31  Joel Hutton  <Joel.Hutton@arm.com>

         * gcc.target/arm/cmse/cmse-17.c: New test.

From-SVN: r273924
2019-07-31 08:56:35 +00:00
Richard Biener
ce52e0ffb4 re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* tree-vrp.c (union_ranges): Unify equality and less tests
	by using compare_values.  Re-order cheap tests first.

From-SVN: r273923
2019-07-31 07:53:11 +00:00
Jakub Jelinek
c3ac76aa40 re PR middle-end/91301 (ICE in omp_add_variable on random access iterator distribute parallel for private (iterator))
PR middle-end/91301
	* gimplify.c (gimplify_omp_for): If for class iterator on
	distribute parallel for there is no data sharing clause
	on inner_for_stmt, look for private clause on combined
	parallel too and if found, move it to inner_for_stmt.

	* testsuite/libgomp.c++/for-27.C: New test.

From-SVN: r273922
2019-07-31 09:49:56 +02:00
Richard Sandiford
a25f3e8efb Make lra use per-alternative earlyclobber info
lra_insn_reg and lra_operand_data have both a bitmask of earlyclobber
alternatives and an overall boolean.  The danger is that we then test
the overall boolean when really we should be testing for a particular
alternative.  This patch gets rid of the boolean and tests the mask
against zero when we really do need to test "any alternative might
be earlyclobber".  (I think the only instance of that is the
LRA_UNKNOWN_ALT handling in lra-lives.c:reg_early_clobber_p.)

This is needed (and tested) by an upcoming SVE patch.

2019-07-31  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* lra-int.h (lra_operand_data): Remove early_clobber field.
	(lra_insn_reg): Likewise.
	* lra.c (debug_operand_data): Update accordingly.
	(setup_operand_alternative): Likewise.
	(new_insn_reg): Likewise.  Remove early_clobber parameter.
	(collect_non_operand_hard_regs): Update call accordingly.
	Don't assign to lra_insn_reg::early_clobber.
	(add_regs_to_insn_regno_info): Remove early_clobber parameter
	and update calls to new_insn_reg.
	(lra_update_insn_regno_info): Update calls accordingly.
	* lra-constraints.c (update_and_check_small_class_inputs): Take the
	alternative number as a parameter and test whether the operand
	is earlyclobbered in that particular alternative.
	(process_alt_operands): Update call accordingly.  Use per-alternative
	checks for earyclobber here too.
	* lra-lives.c (reg_early_clobber_p): Check early_clobber_alts
	against zero for IRA_UNKNOWN_ALT.

From-SVN: r273921
2019-07-31 07:33:11 +00:00
GCC Administrator
68c86af248 Daily bump.
From-SVN: r273920
2019-07-31 00:16:23 +00:00
Martin Sebor
5df20b9095 PR testsuite/91258 - g++.dg/ubsan/vla-1.C and gcc.dg/strlenopt-70.c fail starting with r273783
gcc/testsuite/ChangeLog:
	* g++.dg/ubsan/vla-1.C: Suppress a valid warning.

From-SVN: r273915
2019-07-30 14:42:36 -06:00
Steven G. Kargl
f16be16d2d re PR fortran/91296 (ICE when passing complex number %re/%im as a procedure argument with -Waliasing.)
2019-07-30  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91296
	* interface.c (compare_actual_expr): When checking for aliasing, add
	a case to handle REF_INQUIRY (e.g., foo(x%re, x%im) do not alias).

2019-07-30  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91296
	* gfortran.dg/pr91296.f90: New test.

From-SVN: r273914
2019-07-30 20:02:27 +00:00
Uros Bizjak
5ec4a44296 alpha.c (alpha_option_override): Quote a C type.
* config/alpha/alpha.c (alpha_option_override): Quote a C type.

From-SVN: r273912
2019-07-30 18:24:59 +02:00
Wilco Dijkstra
cefbac6ec7 Adjust literal pool offset in Thumb-2 movsi patterns
My previous change to the Thumb-2 movsi patterns caused a codesize regression
with -Os in large functions.  Fix this by using the literal pool offset of the
16-bit literal load so that the literal pool is dumped earlier, reducing the
number of 32-bit literal loads.

Bootstrap & regress OK on arm-none-linux-gnueabihf --with-cpu=cortex-a57

    gcc/
	* config/arm/thumb2.md (thumb2_movsi_insn): Adjust literal offset.
	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.

From-SVN: r273911
2019-07-30 15:27:04 +00:00
Martin Liska
d9c425fb65 Use edge->indirect_unknown_callee in cgraph_edge::make_direct (PR ipa/89330).
2019-07-30  Martin Liska  <mliska@suse.cz>

	PR ipa/89330
	* cgraph.c (cgraph_edge::make_direct): Use
	edge->indirect_unknown_callee as edge->resolve_speculation can
	deallocate edge which is this pointer.

From-SVN: r273910
2019-07-30 14:52:29 +00:00
Richard Biener
0e5b369ef1 re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* bitmap.c (bitmap_ior_and_compl_into): Open-code.

From-SVN: r273909
2019-07-30 14:16:24 +00:00
Martin Liska
200b0e7e82 Deduce automatically number of cores for -flto option.
2019-07-30  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Document new behavior.
	* lto-wrapper.c (cpuset_popcount): New function
	is a copy of libgomp/config/linux/proc.c.
	(init_num_threads): Likewise.
	(run_gcc): Automatically detect core count for -flto.
	(jobserver_active_p): New function.

From-SVN: r273908
2019-07-30 13:45:11 +00:00
Richard Biener
029ca38849 re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* bitmap.h (bitmap_ior_into_and_free): Declare.
	* bitmap.c (bitmap_list_unlink_element): Add defaulted param
	whether to add the unliked element to the freelist.
	(bitmap_list_insert_element_after): Add defaulted param for
	an already allocated element.
	(bitmap_ior_into_and_free): New function.
	* tree-ssa-structalias.c (condense_visit): Reduce the
	ponts-to and edge bitmaps of the SCC members in a
	logarithmic fashion rather than all to one.

From-SVN: r273907
2019-07-30 12:13:01 +00:00
Martin Liska
1da8ab97a1 Mark 2nd argument of delete operator as needed (PR tree-optimization/91270).
2019-07-30  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/91270
	* tree-ssa-dce.c (propagate_necessity): Mark 2nd argument
	of delete operator as needed.
2019-07-30  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/91270
	* g++.dg/torture/pr91270.C: New test.

From-SVN: r273906
2019-07-30 11:00:35 +00:00
Richard Sandiford
c1b3d82783 Handle IFN_COND_MUL in tree-ssa-math-opts.c
This patch extends the FMA handling in tree-ssa-math-opts.c so
that it can cope with conditional multiplications as well as
unconditional multiplications.  The addition or subtraction must then
have the same condition as the multiplication (at least for now).

E.g. we can currently fold:

  (IFN_COND_ADD cond (mul x y) z fallback)
    -> (IFN_COND_FMA cond x y z fallback)

This patch also allows:

  (IFN_COND_ADD cond (IFN_COND_MUL cond x y <whatever>) z fallback)
    -> (IFN_COND_FMA cond x y z fallback)

2019-07-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-ssa-math-opts.c (convert_mult_to_fma): Add a mul_cond
	parameter.  When nonnull, make sure that the addition or subtraction
	has the same condition.
	(math_opts_dom_walker::after_dom_children): Try convert_mult_to_fma
	for CFN_COND_MUL too.

gcc/testsuite/
	* gcc.dg/vect/vect-cond-arith-7.c: New test.

From-SVN: r273905
2019-07-30 10:59:29 +00:00
Richard Biener
8c955a4b9c re PR tree-optimization/91291 (gcc.dg/20020312-2.c FAILs)
2019-07-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91291
	* tree-ssa-sccvn.c (rpo_elim::eliminate_push_avail): Ignore
	constant values.

From-SVN: r273903
2019-07-30 08:57:35 +00:00
Jakub Jelinek
230e2efd78 re PR middle-end/91282 (gcc.dg/type-convert-var.c FAILs)
PR middle-end/91282
	* gcc.dg/type-convert-var.c: Add -fexcess-precision=fast to
	dg-additional-options.

From-SVN: r273899
2019-07-30 09:35:13 +02:00
Jakub Jelinek
03be2d2bb3 re PR middle-end/91216 (OpenMP ICE starting with r265930)
PR middle-end/91216
	* omp-low.c (global_nonaddressable_vars): New variable.
	(use_pointer_for_field): For global decls, if they are non-addressable,
	remember it in the global_nonaddressable_vars bitmap, if they are
	addressable and in the global_nonaddressable_vars bitmap, ignore their
	TREE_ADDRESSABLE bit.
	(omp_copy_decl_2): Clear TREE_ADDRESSABLE also on private copies of
	vars in global_nonaddressable_vars bitmap.
	(execute_lower_omp): Free global_nonaddressable_vars bitmap.

	* gcc.dg/gomp/pr91216.c: New test.

From-SVN: r273898
2019-07-30 09:28:22 +02:00
Jakub Jelinek
fa2987ed8d re PR target/91150 (wrong code with -O -mavx512vbmi due to wrong writemask)
PR target/91150
	* config/i386/i386-expand.c (expand_vec_perm_blend): Change mask type
	from unsigned to unsigned HOST_WIDE_INT.  For E_V64QImode cast
	comparison to unsigned HOST_WIDE_INT before shifting it left.

	* gcc.target/i386/avx512bw-pr91150.c: New test.

From-SVN: r273897
2019-07-30 09:13:04 +02:00
GCC Administrator
b867820937 Daily bump.
From-SVN: r273896
2019-07-30 00:16:16 +00:00
Uros Bizjak
82534f65d8 i386.md (movstrict<mode>): Use register_operand predicate for operand 0.
* config/i386/i386.md (movstrict<mode>): Use register_operand
	predicate for operand 0.  Add expander condition.  Assert that
	operand 0 is a SUBREG RTX.
	(*movstrict<mode>_1): Use register_operand predicate for operand 0.
	Update operand constraints and insn condition.
	(zero_extend<mode>si2_and): Do not call gen_movstrict<mode>.
	(zero_extendqihi2_and): Do not call gen_movstrictqi.
	(*setcc_qi_slp): Use register_operand predicate for operand 0.
	Update operand 0 constraints.
	(setcc_qi_slp splitters): Use register_operand predicate for operand 0.

From-SVN: r273891
2019-07-30 00:47:36 +02:00
Jozef Lawrynowicz
49c432df66 MSP430: Disallow use of code/data regions in the small memory model
gcc/ChangeLog:

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430.h (DRIVER_SELF_SPECS): Define and emit errors
	when -m{code,data}-region are used without -mlarge.
	* config/msp430/msp430.c (msp430_option_override): Error when a
	non-default code or data region is used without -mlarge.
	(msp430_section_attr): Emit a warning and do not add upper/lower/either
	attributes when they are used without -mlarge.

gcc/testsuite/ChangeLog:

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.target/msp430/pr78818-data-region.c: Add -mlarge to dg-options.
	* gcc.target/msp430/region-misuse-code.c: New test.
	* gcc.target/msp430/region-misuse-data.c: Likewise.
	* gcc.target/msp430/region-misuse-code-data.c: Likewise.
	* gcc.target/msp430/region-attribute-misuse.c: Likewise.

From-SVN: r273884
2019-07-29 20:23:44 +00:00
Jozef Lawrynowicz
3781698890 Allow both upper and lower case 'r' in register names
2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR target/70320
	* config/msp430/msp430.h: Define ADDITIONAL_REGISTER_NAMES.

2019-07-29  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR target/70320
	* gcc.target/msp430/asm-register-names-lower-case.c: New test.
	* gcc.target/msp430/asm-register-names-upper-case.c: Likewise.

From-SVN: r273883
2019-07-29 19:21:18 +00:00
Richard Sandiford
2c393dabda Add PR number
From-SVN: r273882
2019-07-29 18:52:37 +00:00
Richard Sandiford
5d5bb9bc26 Fix inchash handling of wide_ints (PR91242)
inchash:#️⃣:add_wide_int operated directly on the raw encoding
of the wide_int, including any redundant upper bits.  The problem
with that is that the upper bits are only defined for some wide-int
storage types (including wide_int itself).  wi::to_wide(tree) instead
returns a value that is extended according to the signedness of the
type (so that wi::to_widest can use the same encoding) while rtxes
have the awkward special case of BI, which can be zero-extended
rather than sign-extended.

In the PR, we computed a hash for a "normal" sign-extended wide_int
while the existing entries hashed wi::to_wide(tree).  This gives
different results for unsigned types that have the top bit set.

The patch fixes that by hashing the canonical sign-extended form even
if the raw encoding happens to be different.

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* wide-int.h (generic_wide_int::sext_elt): New function.
	* inchash.h (hash::add_wide_int): Use it instead of elt.

From-SVN: r273881
2019-07-29 18:50:25 +00:00
Thomas Koenig
5c6aa9a891 re PR fortran/90813 (gfortran.dg/proc_ptr_51.f90 fails (SIGSEGV) after 272084)
2019-07-29  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/90813
	* dump-parse-tree.c (show_global_symbol): New function.
	(gfc_dump_global_symbols): New function.
	* gfortran.h (gfc_traverse_gsymbol): Add prototype.
	(gfc_dump_global_symbols): Likewise.
	* invoke.texi: Document -fdump-fortran-global.
	* lang.opt: Add -fdump-fortran-global.
	* parse.c (gfc_parse_file): Handle flag_dump_fortran_global.
	* symbol.c (gfc_traverse_gsymbol): New function.
	* trans-decl.c (sym_identifier): New function.
	(mangled_identifier): New function, doing most of the work
	of gfc_sym_mangled_identifier.
	(gfc_sym_mangled_identifier): Use mangled_identifier.  Add mangled
	identifier to global symbol table.
	(get_proc_pointer_decl): Use backend decl from global identifier
	if present.

From-SVN: r273880
2019-07-29 17:45:24 +00:00
Kyrylo Tkachov
9373378901 [arm] Make ACLE builtins use arm_* namespace for expanders
The builtins from <arm_acle.h> use fairly general expander names such as
"crc", "mcr" etc.
These run the risk of being reserved by the midend in the future.
Let's namespace them to arm_* as is convention.

	* config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to
	CODE_FOR_arm_##.
	* config/arm/arm.md (<crc_variant>): Rename to...
	(arm_<crc_variant>): ... This.
	(<cdp>): Rename to...
	(arm_<cdp>): ... This.
	(<ldc>): Rename to...
	(arm_<ldc>): ... This.
	(<stc>): Rename to...
	(arm_<stc>): ... This.
	(<mcr>): Rename to...
	(arm_<mcr>): ... This.
	(<mrc>): Rename to...
	(arm_<mrc>): ... This.
	(<mcrr>): Rename to...
	(arm_<mcrr>): ... This.
	(<mrrc>): Rename to...
	(arm_<mrrc>): ... This.

From-SVN: r273879
2019-07-29 15:31:53 +00:00
Jonathan Wakely
50c2df93a6 PR libstdc++/51333 Define recursive_init_error constructor non-inline
The recursive_init_error class is defined in a header, with an inline
constructor, but the definition of the vtable and destructor are not
exported from the shared library. With -fkeep-inline-functions the
constructor gets emitted in user code, and requires the (non-exported)
vtable. This fails to link.

As far as I can tell, the recursive_init_error class definition was
moved into <cxxabi.h> so it could be documented with Doxygen, not for
any technical reason. But now it's there (and documented), somebody
could be relying on it, by catching that type and possibly performing
derived-to-base conversions to the std::exception base class. So the
conservative fix is to leave the class definition in the header but make
the constructor non-inline. This still allows the type to be caught and
still defines its base class. User code can no longer construct objects
of that type, but that's not something we need to support.

	PR libstdc++/51333
	* libsupc++/cxxabi.h (__gnu_cxx::recursive_init_error): Do not define
	constructor inline.
	* libsupc++/guard_error.cc (__gnu_cxx::recursive_init_error): Define
	constructor.
	* testsuite/18_support/51333.cc: New test.

From-SVN: r273878
2019-07-29 15:27:19 +01:00
Richard Biener
390c0dd61d re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* tree-ssa-sccvn.h (struct vn_avail): New.
	(struct vn_ssa_aux): Add avail member.
	* tree-ssa-sccvn.c (class rpo_elim): Remove m_rpo_avail
	member, add m_avail_freelist one.
	(rpo_elim::~rpo_elim): Remove.
	(rpo_elim::eliminate_avail): Adjust to new avail tracking
	data structure.
	(rpo_elim::eliminate_push_avail): Likewise.
	(do_unwind): Likewise.
	(do_rpo_vn): Likewise.

From-SVN: r273877
2019-07-29 14:19:07 +00:00
Richard Biener
a55d609123 re PR tree-optimization/91257 (Compile-time and memory-hog hog)
2019-07-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91257
	* tree-vrp.c (operand_less_p): Avoid dispatching to fold for
	most cases, instead call compare_values which handles the
	symbolic ranges we handle specially.
	(compare_values_warnv): Do not call operand_less_p but open-code
	the effective fold calls.  Avoid converting so much.

From-SVN: r273876
2019-07-29 11:38:46 +00:00
Martin Liska
fc5e7d2ac4 Fix ICE seen in tree-ssa-dce.c for new/delete pair.
2019-07-29  Martin Liska  <mliska@suse.cz>

	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Do not
	remove LHS of operator new call.  It's handled latter.
2019-07-29  Martin Liska  <mliska@suse.cz>

	* g++.dg/cpp1y/new1.C (test_unused): Add new case that causes
	ICE.

From-SVN: r273875
2019-07-29 10:39:46 +00:00
Richard Biener
3c2f6fae59 re PR middle-end/91267 (SEGV in value_range_base::equal_p)
2019-07-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91267
	* vr-values.c (vr_values::update_value_range): Add early return
	for effectively VARYING lattice entry.

	* gcc.dg/torture/pr91267.c: New testcase.

From-SVN: r273874
2019-07-29 10:10:15 +00:00
Richard Sandiford
f33b9c40b9 Prevent tree-ssa-dce.c from deleting stores at -Og
DCE tries to delete dead stores to local data and also tries to insert
debug binds for simple cases:

  /* If this is a store into a variable that is being optimized away,
     add a debug bind stmt if possible.  */
  if (MAY_HAVE_DEBUG_BIND_STMTS
      && gimple_assign_single_p (stmt)
      && is_gimple_val (gimple_assign_rhs1 (stmt)))
    {
      tree lhs = gimple_assign_lhs (stmt);
      if ((VAR_P (lhs) || TREE_CODE (lhs) == PARM_DECL)
	  && !DECL_IGNORED_P (lhs)
	  && is_gimple_reg_type (TREE_TYPE (lhs))
	  && !is_global_var (lhs)
	  && !DECL_HAS_VALUE_EXPR_P (lhs))
	{
	  tree rhs = gimple_assign_rhs1 (stmt);
	  gdebug *note
	    = gimple_build_debug_bind (lhs, unshare_expr (rhs), stmt);
	  gsi_insert_after (i, note, GSI_SAME_STMT);
	}
    }

But this doesn't help for things like "print *ptr" when ptr points
to the local variable (tests Og-dce-1.c and Og-dce-2.c).  It can
also introduce wrong debug info for earlier references (second test
in Og-dce-3.c) or make earlier references unavailable (first test
in Og-dce-3.c).

So for -Og I think it'd be better not to delete any stmts with
vdefs for now.  This also means that we can avoid the potentially
expensive vop walks (which already have a cut-off, but still).

The patch also fixes the Og failures in gcc.dg/guality/pr54970.c
(PR 86638).

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR debug/86638
	* tree-ssa-dce.c (keep_all_vdefs_p): New function.
	(mark_stmt_if_obviously_necessary): Mark all stmts with vdefs as
	necessary if keep_all_vdefs_p is true.
	(mark_aliased_reaching_defs_necessary): Add a gcc_checking_assert
	that keep_all_vdefs_p is false.
	(mark_all_reaching_defs_necessary): Likewise.
	(propagate_necessity): Skip the vuse scan if keep_all_vdefs_p is true.

gcc/testsuite/
	* c-c++-common/guality/Og-dce-1.c: New test.
	* c-c++-common/guality/Og-dce-2.c: Likewise.
	* c-c++-common/guality/Og-dce-3.c: Likewise.

From-SVN: r273872
2019-07-29 08:52:56 +00:00
Richard Sandiford
c0fe6bce2a Don't run DSE at -Og
This patch stops gimple and rtl DSE from running by default at -Og.
The idea is both to improve compile time and to stop us from deleting
stores that we can't track in debug info.

We could rein this back in future for stores to local variables
with is_gimple_reg_type, but at the moment we don't have any
infrastructure for switching between binds to specific values
and binds to evolving memory locations.  Even then, location
tracking only works for direct references to the variables, and doesn't
for example help with printing dereferenced pointers (see the next patch
in the series for an example).

I'm also not sure that DSE is important enough for -Og to justify the
compile time cost --  especially in the case of RTL DSE, which is pretty
expensive.

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* common.opt (Og): Change the initial value of flag_dse to 0.
	* opts.c (default_options_table): Move OPT_ftree_dse from
	OPT_LEVELS_1_PLUS to OPT_LEVELS_1_PLUS_NOT_DEBUG.  Also add
	OPT_fdse to OPT_LEVELS_1_PLUS_NOT_DEBUG.  Put the OPT_ftree_pta
	entry before the OPT_ftree_sra entry.
	* doc/invoke.texi (Og): Add -fdse and -ftree-dse to the list
	of flags disabled by Og.

gcc/testsuite/
	* c-c++-common/guality/Og-global-dse-1.c: New test.

From-SVN: r273871
2019-07-29 08:47:20 +00:00
Richard Sandiford
ec8ac265ff Prevent -Og from deleting stores to write-only variables
This patch prevents -Og from deleting stores to write-only variables,
so that the values are still available when debugging.  This seems
more convenient than forcing users to use __attribute__((used))
(probably conditionally, if it's not something they want in release
builds).

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-cfg.c (execute_fixup_cfg): Don't delete stores to write-only
	variables for -Og.

gcc/testsuite/
	* c-c++-common/guality/Og-static-wo-1.c: New test.
	* g++.dg/guality/guality.exp: Separate the c-c++-common tests into
	"Og" and "general" tests.  Run the latter at -O0 and -Og only.
	* gcc.dg/guality/guality.exp: Likewise.

From-SVN: r273870
2019-07-29 08:46:54 +00:00
Richard Sandiford
4d706ff86e Add dg test for matching function bodies
There isn't a 1:1 mapping from SVE intrinsics to SVE instructions,
but the intrinsics are still close enough to the instructions for
there to be a specific preferred sequence (or sometimes choice of
preferred sequences) for a given combination of operands.  Sometimes
these sequences will be one instruction, sometimes they'll be several.

I therefore wanted a convenient way of matching the exact assembly
implementation of a given function.  It's possible to do that using
single scan-assembler lines, but:

(a) they become hard to read for multiline matches
(b) the PASS/FAIL lines tend to be overly long
(c) it's useful to have a single place that skips over uninteresting
    lines, such as entry block labels and .cfi_* directives, without
    being overly broad

This patch therefore adds a new check-function-bodies dg-final test
that looks for specially-formatted comments.  As a demo, the patch
converts the SVE vec_init tests to use the new harness instead of
scan-assembler.

The regexps in parse_function_bodies are fairly general, but might
still need to be extended in future for targets like Darwin or AIX.

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* doc/sourcebuild.texi (check-function-bodies): Document.

gcc/testsuite/
	* lib/scanasm.exp (parse_function_bodies, check_function_body)
	(check-function-bodies): New procedures.
	* gcc.target/aarch64/sve/init_1.c: Use check-function-bodies
	instead of scan-assembler.
	* gcc.target/aarch64/sve/init_2.c: Likewise.
	* gcc.target/aarch64/sve/init_3.c: Likewise.
	* gcc.target/aarch64/sve/init_4.c: Likewise.
	* gcc.target/aarch64/sve/init_5.c: Likewise.
	* gcc.target/aarch64/sve/init_6.c: Likewise.
	* gcc.target/aarch64/sve/init_7.c: Likewise.
	* gcc.target/aarch64/sve/init_8.c: Likewise.
	* gcc.target/aarch64/sve/init_9.c: Likewise.
	* gcc.target/aarch64/sve/init_10.c: Likewise.
	* gcc.target/aarch64/sve/init_11.c: Likewise.
	* gcc.target/aarch64/sve/init_12.c: Likewise.

From-SVN: r273869
2019-07-29 08:46:46 +00:00
Richard Sandiford
708cc6132b Generalise VEC_DUPLICATE folding for variable-length vectors
This patch uses the constant vector encoding scheme to handle
more cases of a VEC_DUPLICATE of another vector.  Duplicating
any fixed-length vector is fine, and duplicating a variable-length
vector is OK as long as that vector is also a duplicate of a
fixed-length sequence.

Other cases fell through to:

  if (VECTOR_MODE_P (mode) && GET_CODE (op) == CONST_VECTOR)

which was only expecting to deal with elementwise operations.

2019-07-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* simplify-rtx.c (simplify_const_unary_operation): Fold a
	VEC_DUPLICATE of a fixed-length vector even if the result
	is variable-length.  Likewise fold a duplicate of a
	variable-length vector if the variable-length vector is
	itself a duplicate of a fixed-length sequence.
	(test_vector_ops_duplicate): Test more cases.

From-SVN: r273868
2019-07-29 08:42:19 +00:00