This patch fixes the regression caused by the changes to add square root
estimation when compiling for xgene-1 or exynos-m1 targets.
The issue is that the expand path for the reciprocal estimate square
root pattern assumes that pattern cannot fail once it has been decided
that this expansion path is available, but because the logic deep inside
aarch64_emit_approx_sqrt() differs from use_rsqrt_p() the two disagree
as to what is safe.
This patch refactors the logic to ensure that we cannot unknowingly make
different choices here.
PR target/80530
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Ensure
that the logic for permitting reciprocal estimates matches that
in use_rsqrt_p.
From-SVN: r247341
PR c++/80534
* tree.c (type_cache_hasher::equal): Only compare
TYPE_TYPELESS_STORAGE flag on non-aggregate element types.
(build_array_type_1): Only hash TYPE_TYPELESS_STORAGE flag on
non-aggregate element types.
* tree.h (TYPE_TYPELESS_STORAGE): Fix comment typo, add more details
about the flag on ARRAY_TYPEs in the comment, formatting fix.
c-family/
* c-common.c (complete_array_type): Only hash TYPE_TYPELESS_STORAGE
flag on non-aggregate element types.
testsuite/
* g++.dg/other/pr80534-1.C: New test.
* g++.dg/other/pr80534-2.C: New test.
From-SVN: r247337
PR target/77728
* config/arm/arm.c: Include gimple.h.
(aapcs_layout_arg): Emit -Wpsabi note if arm_needs_doubleword_align
returns negative, increment ncrn only if it returned positive.
(arm_needs_doubleword_align): Return int instead of bool,
ignore DECL_ALIGN of non-FIELD_DECL TYPE_FIELDS chain
members, but if there is any such non-FIELD_DECL
> PARM_BOUNDARY aligned decl, return -1 instead of false.
(arm_function_arg): Emit -Wpsabi note if arm_needs_doubleword_align
returns negative, increment nregs only if it returned positive.
(arm_setup_incoming_varargs): Likewise.
(arm_function_arg_boundary): Emit -Wpsabi note if
arm_needs_doubleword_align returns negative, return
DOUBLEWORD_ALIGNMENT only if it returned positive.
testsuite/
* g++.dg/abi/pr77728-1.C: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r247259
PR target/80482
Backport from mainline
This patch changes the parameter testing for powerpc vector builtins to relax
the existing requirement that the parameters be identical to instead that they
be compatible. This allows for mixing parameters with differing qualified
(const, volatile, etc.) types.
See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80482 for more information.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu and
powerpc64be-unknown-linux-gnu with no regressions. Is this ok for trunk?
[gcc]
2017-04-25 Bill Seurer <seurer@linux.vnet.ibm.com>
Backport from mainline
PR target/80482
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Change
type checks to test for compatibility instead of equality.
[gcc/testsuite]
2017-04-25 Bill Seurer <seurer@linux.vnet.ibm.com>
Backport from mainline
PR target/80482
* gcc.target/powerpc/vec-constvolatile.c: New test.
From-SVN: r247256
PR target/77728
* config/aarch64/aarch64.c (struct aarch64_fn_arg_alignment): New
type.
(aarch64_function_arg_alignment): Return aarch64_fn_arg_alignment
struct. Ignore DECL_ALIGN of decls other than FIELD_DECL for
the alignment computation, but return their maximum in warn_alignment.
(aarch64_layout_arg): Adjust aarch64_function_arg_alignment caller.
Emit a -Wpsabi note if warn_alignment is 16 bytes, but alignment
is smaller.
(aarch64_function_arg_boundary): Likewise. Simplify using MIN/MAX.
(aarch64_gimplify_va_arg_expr): Adjust aarch64_function_arg_alignment
caller.
testsuite/
* g++.dg/abi/pr77728-2.C: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r247241
We do this already for TImode values but it was missing for vector
modes.
gcc/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/80464
* config/s390/vector.md: Split MEM->GPR vector moves for
non-s_operand addresses.
gcc/testsuite/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/80464
* gfortran.fortran-torture/compile/pr80464.f90: New test.
From-SVN: r247191
The P constraint letter is supposed to match every constant which is
acceptable during reload. However, constraints do not appear to be
able to handle const_wide_int yet. It works with predicates so the
alternative is modelled with a new predicate now.
gcc/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79895
* config/s390/predicates.md (reload_const_wide_int_operand): New
predicate.
* config/s390/s390.md ("movti"): Remove d/P alternative.
("movti_bigconst"): New pattern definition.
gcc/testsuite/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79895
* gcc.target/s390/pr79895.c: New test.
From-SVN: r247190
The attached patch optimizes the atomic_exchange and atomic_compare
patterns on s390 and s390x (mostly limited to SImode and DImode).
Among general optimizaation, the changes fix most of the problems
reported in PR 80080:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80080
gcc/ChangeLog:
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/80080
* s390-protos.h (s390_expand_cs_hqi): Removed.
(s390_expand_cs, s390_expand_atomic_exchange_tdsi): New prototypes.
* config/s390/s390.c (s390_emit_compare_and_swap): Handle all integer
modes as well as CCZ1mode and CCZmode.
(s390_expand_atomic_exchange_tdsi, s390_expand_atomic): Adapt to new
signature of s390_emit_compare_and_swap.
(s390_expand_cs_hqi): Likewise, make static.
(s390_expand_cs_tdsi): Generate an explicit compare before trying
compare-and-swap, in some cases.
(s390_expand_cs): Wrapper function.
(s390_expand_atomic_exchange_tdsi): New backend specific expander for
atomic_exchange.
(s390_match_ccmode_set): Allow CCZmode <-> CCZ1 mode.
* config/s390/s390.md ("atomic_compare_and_swap<mode>"): Merge the
patterns for small and large integers. Forbid symref memory operands.
Move expander to s390.c. Require cc register.
("atomic_compare_and_swap<DGPR:mode><CCZZ1:mode>_internal")
("*atomic_compare_and_swap<TDI:mode><CCZZ1:mode>_1")
("*atomic_compare_and_swapdi<CCZZ1:mode>_2")
("*atomic_compare_and_swapsi<CCZZ1:mode>_3"): Use s_operand to forbid
symref memory operands. Remove CC mode and call s390_match_ccmode
instead.
("atomic_exchange<mode>"): Allow and implement all integer modes.
gcc/testsuite/ChangeLog:
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/80080
* gcc.target/s390/md/atomic_compare_exchange-1.c: New test.
* gcc.target/s390/md/atomic_compare_exchange-1.inc: New test.
* gcc.target/s390/md/atomic_exchange-1.inc: New test.
From-SVN: r247189
gcc/ChangeLog:
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
* config/s390/s390.md (define_peephole2): New peephole to help
combining the load-and-test pattern with volatile memory.
From-SVN: r247188
gcc/ChangeLog:
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
* config/s390/s390.md (define_peephole2): New peephole to help
combining the load-and-test pattern with volatile memory.
From-SVN: r247187
PR rtl-optimization/80501
* combine.c (make_compound_operation_int): Set subreg_code to SET
even for AND with mask of the sign bit of mode.
* gcc.c-torture/execute/pr80501.c: New test.
From-SVN: r247129
Backport from mainline r247029
gcc/
* omp-low.c (lower_lastprivate_clauses): Correct handling of linear and
lastprivate clauses in SIMT case.
libgomp/
* testsuite/libgomp.c/target-36.c: New testcase.
From-SVN: r247032
PR middle-end/80423
* tree.h (build_array_type): Add typeless_storage default argument.
* tree.c (type_cache_hasher::equal): Also compare
TYPE_TYPELESS_STORAGE flag for ARRAY_TYPEs.
(build_array_type): Add typeless_storage argument, set
TYPE_TYPELESS_STORAGE to it, if shared also hash it, and pass to
recursive call.
(build_nonshared_array_type): Adjust build_array_type_1 caller.
(build_array_type): Likewise. Add typeless_storage argument.
c-family/
* c-common.c (complete_array_type): Preserve TYPE_TYPELESS_STORAGE.
cp/
* tree.c (build_cplus_array_type): Call build_array_type
with the intended TYPE_TYPELESS_STORAGE flag value, instead
of calling build_array_type and modifying later TYPE_TYPELESS_STORAGE
on the shared type.
testsuite/
* g++.dg/other/pr80423.C: New test.
From-SVN: r247014
PR tree-optimization/80426
* tree-vrp.c (extract_range_from_binary_expr_1): For an additive
operation on symbolic operands, also compute the overflow for the
invariant part when the operation degenerates into a negation.
PR tree-optimization/80426
* gcc.c-torture/execute/20170419-1.c: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r247007
PR debug/80461
* dwarf2out.c (modified_type_die, gen_type_die_with_usage):
Check for t with zero TYPE_QUALS_NO_ADDR_SPACE.
* g++.dg/debug/pr80461.C: New test.
From-SVN: r247002
PR target/80462
* config/avr/avr.c (tree.h): Include it.
(cgraph.h): Include it.
(avr_encode_section_info): Don't warn for uninitialized progmem
variable if it's just an alias.
From-SVN: r246997
In split_live_ranges_for_shrink_wrap IRA also splits regs that are
only used in debug insns, leading to -fcompare-debug failures.
PR rtl-optimization/80429
* ira.c (split_live_ranges_for_shrink_wrap): Don't split regs that
are only used in debug insns.
From-SVN: r246991
* config/sparc/predicates.md (input_operand): Add comment. Return
true for any memory operand when LRA is in progress.
* config/sparc/sparc.c (sparc_expand_move): Minor formatting fix.
Co-Authored-By: Jeff Law <law@redhat.com>
Co-Authored-By: Vladimir Makarov <vmakarov@redhat.com>
From-SVN: r246989
PR tree-optimization/80443
* tree-vrp.c (intersect_ranges): For signed 1-bit precision type,
instead of adding 1, subtract -1 and similarly instead of subtracting
1 add -1.
* gcc.c-torture/compile/pr80443.c: New test.
From-SVN: r246981
PR middle-end/80422
* cfgcleanup.c (try_crossjump_to_edge): Verify SRC1 and SRC2 have
predecessors after walking up the insn chain.
PR middle-end/80422
* gcc.c-torture/compile/pr80422.c: New test.
From-SVN: r246975
PR debug/80263
* dwarf2out.c (modified_type_die): Try harder not to emit internal
sizetype type into debug info.
* gcc.dg/debug/dwarf2/pr80263.c: New test.
From-SVN: r246973
* regcprop.c (maybe_mode_change): Avoid creating copies of the
stack pointer.
Revert:
2017-04-13 Jeff Law <law@redhat.com>
* config/mips.mips.md (zero_extendsidi2): Do not allow SP to appear
in operands[1] if it is a MEM and TARGET_MIPS16 is active.
From-SVN: r246970
2017-04-18 Martin Liska <mliska@suse.cz>
PR gcov-profile/78783
* libgcov-driver.c (gcov_get_filename): New function.
2017-04-18 Martin Liska <mliska@suse.cz>
PR gcov-profile/78783
* gcov-tool.c (gcov_output_files): Validate that destination
file is either removed by the tool or by a user.
From-SVN: r246961
We use a negative ID number to link together the doloop_begin and
doloop_end instructions. This negative ID number is setup within
doloop_begin, at this point the ID is stored into the loop end
instruction (doloop_end_i) and placed into the doloop_begin_i
instruction.
In arc.c (arc_reorg) we extract the ID from the doloop_end_i
instruction in order to find the matching doloop_begin_i instruction,
though the ID is only used in some cases.
Currently in arc_reorg when we extract the ID we negate it. This
negation is invalid. The ID stored in both doloop_end_i and
doloop_begin_i is already negative, the negation in arc_reorg means
that if we need to use the ID to find the doloop_begin_i then we will
never find it (as the IDs will never match).
This commit removes the unneeded negation, moves the extraction of the
ID into a more appropriately scoped block and adds a new test for this
issue.
gcc/ChangeLog:
* config/arc/arc.c (arc_reorg): Move loop_end_id into a more local
block, and do not negate it, the stored id is already negative.
gcc/testsuite/ChangeLog:
* gcc.target/arc/loop-1.c: New file.
Co-Authored-By: Guy Benyei <guybe@mellanox.com>
From-SVN: r246933
The old ARC assembler would accept expressions like 'LABEL-(.&-4)'
which would calculate the offset from the PCL to LABEL. The new ARC
assembler does not accept these expressions, instead there's an @pcl
synax, used like LABEL@pcl which gives the offset from PCL to LABEL.
Most of the use of the old expression syntax have been removed,
however, this one got missed.
gcc/ChangeLog:
* config/arc/arc.md (doloop_begin_i): Use @pcl assembler syntax.
From-SVN: r246932
[gcc]
2017-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80098
* config/rs6000/rs6000-cpus.def (OTHER_P9_VECTOR_MASKS): Define
masks of options that should be turned off if the VSX vector
options are turned off.
(OTHER_P8_VECTOR_MASKS): Likewise.
(OTHER_VSX_VECTOR_MASKS): Likewise.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Call
rs6000_disable_incompatible_switches to validate no type switches
like -mvsx.
(rs6000_incompatible_switch): New function to disallow turning on
other vector options if -mno-vsx, -mno-power8-vector, or
-mno-power9-vector are specified.
[gcc/testsuite]
2017-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80098
* gcc.target/powerpc/pr80098-1.c: New test.
* gcc.target/powerpc/pr80098-2.c: Likewise.
* gcc.target/powerpc/pr80098-3.c: Likewise.
* gcc.target/powerpc/pr80098-4.c: Likewise.
From-SVN: r246930
GCC Administrator
Richard Biener
Jakub Jelinek
Richard Earnshaw
Martin Sebor
Marek Polacek
Ramana Radhakrishnan
Bill Seurer
Andreas Krebbel
Dominik Vogt
Martin Liska
Alexander Monakov
Matthew Fortune
Thomas Preud'homme
Eric Botcazou
Georg-Johann Lay
Paulo Matos
Segher Boessenkool
Jeff Law
Richard Sandiford
Bernd Edlinger
Michael Meissner
Georg-Johann Lay
Andrew Burgess
Claudiu Zissulescu