* profile-count.h (slow_safe_scale_64bit): New function.
(safe_scale_64bit): New inline.
(profile_count::max_safe_multiplier): Remove; use safe_scale_64bit.
* profile-count.c: Include wide-int.h
(slow_safe_scale_64bit): New.
From-SVN: r253652
* config.gcc (i386, x86_64): Add extra objects.
* i386/i386-protos.h (ix86_rip_relative_addr_p): Declare.
(ix86_min_insn_size): Declare.
(ix86_issue_rate): Declare.
(ix86_adjust_cost): Declare.
(ia32_multipass_dfa_lookahead): Declare.
(ix86_macro_fusion_p): Declare.
(ix86_macro_fusion_pair_p): Declare.
(ix86_bd_has_dispatch): Declare.
(ix86_bd_do_dispatch): Declare.
(ix86_core2i7_init_hooks): Declare.
(ix86_atom_sched_reorder): Declare.
* i386/i386.c Move all CPU cost tables to x86-tune-costs.h.
(COSTS_N_BYTES): Move to x86-tune-costs.h.
(DUMMY_STRINGOP_ALGS):x86-tune-costs.h.
(rip_relative_addr_p): Rename to ...
(ix86_rip_relative_addr_p): ... this one; export.
(memory_address_length): Update.
(ix86_issue_rate): Move to x86-tune-sched.c.
(ix86_flags_dependent): Move to x86-tune-sched.c.
(ix86_agi_dependent): Move to x86-tune-sched.c.
(exact_dependency_1): Move to x86-tune-sched.c.
(exact_store_load_dependency): Move to x86-tune-sched.c.
(ix86_adjust_cost): Move to x86-tune-sched.c.
(ia32_multipass_dfa_lookahead): Move to x86-tune-sched.c.
(ix86_macro_fusion_p): Move to x86-tune-sched.c.
(ix86_macro_fusion_pair_p): Move to x86-tune-sched.c.
(do_reorder_for_imul): Move to x86-tune-sched-atom.c.
(swap_top_of_ready_list): Move to x86-tune-sched-atom.c.
(ix86_sched_reorder): Move to x86-tune-sched-atom.c.
(core2i7_first_cycle_multipass_init): Move to x86-tune-sched-core.c.
(core2i7_dfa_post_advance_cycle): Move to x86-tune-sched-core.c.
(min_insn_size): Rename to ...
(ix86_min_insn_size): ... this one; export.
(core2i7_first_cycle_multipass_begin): Move to x86-tune-sched-core.c.
(core2i7_first_cycle_multipass_issue): Move to x86-tune-sched-core.c.
(core2i7_first_cycle_multipass_backtrack): Move to x86-tune-sched-core.c.
(core2i7_first_cycle_multipass_end): Move to x86-tune-sched-core.c.
(core2i7_first_cycle_multipass_fini): Move to x86-tune-sched-core.c.
(ix86_sched_init_global): Break up logic to ix86_core2i7_init_hooks.
(ix86_avoid_jump_mispredicts): Update.
(TARGET_SCHED_DISPATCH): Move to ix86-tune-sched-bd.c.
(TARGET_SCHED_DISPATCH_DO): Move to ix86-tune-sched-bd.c.
(TARGET_SCHED_REORDER): Move to ix86-tune-sched-bd.c.
(DISPATCH_WINDOW_SIZE): Move to ix86-tune-sched-bd.c.
(MAX_DISPATCH_WINDOWS): Move to ix86-tune-sched-bd.c.
(MAX_INSN): Move to ix86-tune-sched-bd.c.
(MAX_IMM): Move to ix86-tune-sched-bd.c.
(MAX_IMM_SIZE): Move to ix86-tune-sched-bd.c.
(MAX_IMM_32): Move to ix86-tune-sched-bd.c.
(MAX_IMM_64): Move to ix86-tune-sched-bd.c.
(MAX_LOAD): Move to ix86-tune-sched-bd.c.
(MAX_STORE): Move to ix86-tune-sched-bd.c.
(BIG): Move to ix86-tune-sched-bd.c.
(enum dispatch_group): Move to ix86-tune-sched-bd.c.
(enum insn_path): Move to ix86-tune-sched-bd.c.
(get_mem_group): Move to ix86-tune-sched-bd.c.
(is_cmp): Move to ix86-tune-sched-bd.c.
(dispatch_violation): Move to ix86-tune-sched-bd.c.
(is_branch): Move to ix86-tune-sched-bd.c.
(is_prefetch): Move to ix86-tune-sched-bd.c.
(init_window): Move to ix86-tune-sched-bd.c.
(allocate_window): Move to ix86-tune-sched-bd.c.
(init_dispatch_sched): Move to ix86-tune-sched-bd.c.
(is_end_basic_block): Move to ix86-tune-sched-bd.c.
(process_end_window): Move to ix86-tune-sched-bd.c.
(allocate_next_window): Move to ix86-tune-sched-bd.c.
(find_constant): Move to ix86-tune-sched-bd.c.
(get_num_immediates): Move to ix86-tune-sched-bd.c.
(has_immediate): Move to ix86-tune-sched-bd.c.
(get_insn_path): Move to ix86-tune-sched-bd.c.
(get_insn_group): Move to ix86-tune-sched-bd.c.
(count_num_restricted): Move to ix86-tune-sched-bd.c.
(fits_dispatch_window): Move to ix86-tune-sched-bd.c.
(add_insn_window): Move to ix86-tune-sched-bd.c.
(add_to_dispatch_window): Move to ix86-tune-sched-bd.c.
(debug_dispatch_window_file): Move to ix86-tune-sched-bd.c.
(debug_dispatch_window): Move to ix86-tune-sched-bd.c.
(debug_insn_dispatch_info_file): Move to ix86-tune-sched-bd.c.
(debug_ready_dispatch): Move to ix86-tune-sched-bd.c.
(do_dispatch): Move to ix86-tune-sched-bd.c.
(has_dispatch): Move to ix86-tune-sched-bd.c.
* i386/t-i386: Add new object files.
* i386/x86-tune-costs.h: New file.
* i386/x86-tune-sched-atom.c: New file.
* i386/x86-tune-sched-bd.c: New file.
* i386/x86-tune-sched-core.c: New file.
* i386/x86-tune-sched.c: New file.
From-SVN: r253646
2017-10-11 Liu Hao <lh_mouse@126.com>
* pretty-print.c [_WIN32] (colorize_init): Remove. Use
the generic version below instead.
(should_colorize): Recognize Windows consoles as terminals
for MinGW targets.
* pretty-print.c [__MINGW32__] (write_all): New function.
[__MINGW32__] (find_esc_head): Likewise.
[__MINGW32__] (find_esc_terminator): Likewise.
[__MINGW32__] (eat_esc_sequence): Likewise.
[__MINGW32__] (mingw_ansi_fputs): New function that handles
ANSI escape codes.
(pp_write_text_to_stream): Use mingw_ansi_fputs instead of fputs
for MinGW targets.
From-SVN: r253645
2017-10-11 Richard Biener <rguenther@suse.de>
* tree-ssa-loop-niter.c (infer_loop_bounds_from_pointer_arith):
Properly call analyze_scalar_evolution with the loop of the stmt.
From-SVN: r253644
2017-10-11 Martin Liska <mliska@suse.cz>
* c-c++-common/ubsan/ptr-overflow-sanitization-1.c: Scan
optimized dump rather than assembly.
From-SVN: r253636
Similar to other architectures with IFUNC binutils/glibc support, this
patch enables the ifunc attribute for ARM GNU/Linux. Although not
required for build master GLIBC, the intention is to allow refactor
its assembly implementation to C.
Tested compilation of glibc (in conjunction with a glibc patch to
support using the attribute on ARM) with build-many-glibcs.py (with
a patch to add a armv7 variant which enables multiarch). I have
not run the GCC tests for ARM.
* config.gcc (default_gnu_indirect_function): Default to yes for
arm*-*-linux* with glibc.
From-SVN: r253635
2017-10-11 Richard Biener <rguenther@suse.de>
* tree-scalar-evolution.c (get_scalar_evolution): Handle
default-defs and types we do not want to analyze.
(interpret_loop_phi): Replace unreachable code with an assert.
(compute_scalar_evolution_in_loop): Remove and inline ...
(analyze_scalar_evolution_1): ... here, replacing condition with
what makes the intent clearer. Remove handling of cases
get_scalar_evolution now handles.
From-SVN: r253629
gcc/
PR rtl-optimization/81434
* haifa-sched.c (prune_ready_list): Init min_cost_group to 0. Update
comment for main loop. In sched_group_found if, also add checks for
pass and min_cost_group.
From-SVN: r253628
This adds an implementation of the insn_cost hook to rs6000.
This implementations is very minimal (so far). It is mostly based on
how many machine instructions are generated by an RTL insn, and it also
looks at the instruction type. Floating point insns are costed as if
all machine instructions it generates are floating point; the other
insns are treated as if all but one are integer insns (and one is the
specified type). Load instructions are treated as costing twice as
much, and load locked and sync insns as three times as much (just like
the original costs), and integer div and mul are handled as well.
Each define_insn (etc.) can set a "cost" attribute to override this
general cost. With optimization for size, the cost is set equal to the
value of the "length" attribute.
With this, the majority of cost differences between old and new are
where the old was wrong. Also, benchmarks show a slight win (if
anything). Some refinements are obviously needed.
* config/rs6000/rs6000.c (TARGET_INSN_COST): New.
(rs6000_insn_cost): New function.
* config/rs6000/rs6000.md (cost): New attribute.
From-SVN: r253624
PR target/79565
PR target/82483
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Add
OPTION_MASK_ISA_MMX for __builtin_ia32_maskmovq,
__builtin_ia32_vec_ext_v4hi and __builtin_ia32_vec_set_v4hi.
(ix86_expand_builtin): Treat OPTION_MASK_ISA_MMX similarly
to OPTION_MASK_ISA_AVX512VL - builtins that have both
OPTION_MASK_ISA_MMX and some other bit set require both
mmx and the ISAs without the mmx bit.
* config/i386/i386-builtin.def (__builtin_ia32_cvtps2pi,
__builtin_ia32_cvttps2pi, __builtin_ia32_cvtpi2ps,
__builtin_ia32_pavgb, __builtin_ia32_pavgw, __builtin_ia32_pmulhuw,
__builtin_ia32_pmaxub, __builtin_ia32_pmaxsw, __builtin_ia32_pminub,
__builtin_ia32_pminsw, __builtin_ia32_psadbw, __builtin_ia32_pmovmskb,
__builtin_ia32_pshufw, __builtin_ia32_cvtpd2pi,
__builtin_ia32_cvttpd2pi, __builtin_ia32_cvtpi2pd,
__builtin_ia32_pmuludq, __builtin_ia32_pabsb, __builtin_ia32_pabsw,
__builtin_ia32_pabsd, __builtin_ia32_phaddw, __builtin_ia32_phaddd,
__builtin_ia32_phaddsw, __builtin_ia32_phsubw, __builtin_ia32_phsubd,
__builtin_ia32_phsubsw, __builtin_ia32_pmaddubsw,
__builtin_ia32_pmulhrsw, __builtin_ia32_pshufb, __builtin_ia32_psignb,
__builtin_ia32_psignw, __builtin_ia32_psignd, __builtin_ia32_movntq,
__builtin_ia32_paddq, __builtin_ia32_psubq, __builtin_ia32_palignr):
Add OPTION_MASK_ISA_MMX.
* gcc.target/i386/pr82483-1.c: New test.
* gcc.target/i386/pr82483-2.c: New test.
Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>
From-SVN: r253609
