Commit Graph

176002 Commits

Author SHA1 Message Date
Jonathan Wakely
40541efe1c libstdc++: Change __cpp_lib_array_constexpr for C++17 again
This partially reverts my previous change related to this macro. The
C++20 constexpr iterator requirements are always met by array:iterator,
because it's just a pointer. So the macro can be set to 201803 even in
C++17 mode.

	* include/bits/stl_iterator.h (__cpp_lib_array_constexpr): Revert
	value for C++17 to 201803L because P0858R0 is supported for C++17.
	* include/std/version (__cpp_lib_array_constexpr): Likewise.
	* testsuite/23_containers/array/element_access/constexpr_c++17.cc:
	Check for value corresponding to P0031R0 features being tested.
	* testsuite/23_containers/array/requirements/constexpr_iter.cc:
	Check for value corresponding to P0858R0 features being tested.
2020-04-23 21:39:33 +01:00
Jonathan Wakely
a2dcb56c94 libstdc++: Define __cpp_lib_three_way_comparison for freestanding
The <compare> header is always supported, not only for hosted configs.

	* include/std/version (__cpp_lib_three_way_comparison): Define for
	freestanding builds.
2020-04-23 21:39:33 +01:00
Eric Botcazou
cb76fcd7fb Fix segfault with -O2 -fnon-call-exceptions -ftracer
The GIMPLE SSA store merging pass blows up when it is rewriting the
stores because it didn't realize that they don't belong to the same
EH region.  Fixed by refusing to merge them.

	PR tree-optimization/94717
	* gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if
	one of the stores doesn't have the same landing pad number as the
	first.
	(coalesce_immediate_stores): Do not try to coalesce the store using
	bswap if it doesn't have the same landing pad number as the first.
2020-04-23 22:28:02 +02:00
Bill Schmidt
431ee35815 rs6000: Replace outdated link to ELFv2 ABI
A user reported that we are still referring to a public review
draft of the ELFv2 ABI specification.  Replace that by a permalink.

2020-04-24  Bill Schmidt  <wschmidt@linux.ibm.com>

	* gcc/doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Replace outdated link to ELFv2 ABI.
2020-04-23 15:03:34 -05:00
Jakub Jelinek
f51be2fb86 Shortcut identity VEC_PERM expansion [PR94710]
This PR is about the rs6000 backend emitting wrong assembly
for whole vector shift by 0, and while I think it is desirable
to fix the backend, I don't see a point why the expander should
try to emit that, whole vector shift by 0 is identity, we can just
return the operand.

2020-04-23  Jakub Jelinek  <jakub@redhat.com>

	PR target/94710
	* optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
	just return v2.
2020-04-23 21:59:01 +02:00
Iain Sandoe
3dbc772128 coroutines: Fix handling of conditional statements [PR94288]
Normally, when we find a statement containing an await expression
this will be expanded to a statement list implementing the control
flow implied.  The expansion process successively replaces each
await expression in a statement with the result of its await_resume().

In the case of conditional statements (if, while, do, switch) the
expansion of the condition (or expression in the case of do-while)
cannot take place 'inline', leading to the PR.

The solution is to evaluate the expression separately, and to
transform while and do-while loops into endless loops with a break
on the required condition.

In fixing this, I realised that I'd also made a thinko in the case
of expanding truth-and/or-if expressions, where one arm of the
expression might need to be short-circuited.  The mechanism for
expanding via the tree walk will not work correctly in this case and
we need to pre-expand any truth-and/or-if with an await expression
on its conditionally-taken arm.  This applies to any statement with
truth-and/or-if expressions, so can be handled generically.

gcc/cp/ChangeLog:

2020-04-23  Iain Sandoe  <iain@sandoe.co.uk>

	PR c++/94288
	* coroutines.cc (await_statement_expander): Simplify cases.
	(struct susp_frame_data): Add fields for truth and/or if
	cases, rename one field.
	(analyze_expression_awaits): New.
	(expand_one_truth_if): New.
	(add_var_to_bind): New helper.
	(coro_build_add_if_not_cond_break): New helper.
	(await_statement_walker): Handle conditional expressions,
	handle expansion of truth-and/or-if cases.
	(bind_expr_find_in_subtree): New, checking-only.
	(coro_body_contains_bind_expr_p): New, checking-only.
	(morph_fn_to_coro): Ensure that we have a top level bind
	expression.

gcc/testsuite/ChangeLog:

2020-04-23  Iain Sandoe  <iain@sandoe.co.uk>

	PR c++/94288
	* g++.dg/coroutines/torture/co-await-18-if-cond.C: New test.
	* g++.dg/coroutines/torture/co-await-19-while-cond.C: New test.
	* g++.dg/coroutines/torture/co-await-20-do-while-cond.C: New test.
	* g++.dg/coroutines/torture/co-await-21-switch-value.C: New test.
	* g++.dg/coroutines/torture/co-await-22-truth-and-of-if.C: New test.
	* g++.dg/coroutines/torture/co-ret-16-simple-control-flow.C: New test.
2020-04-23 20:34:57 +01:00
Marek Polacek
7291b2edf6 c-family: Fix ICE on attribute with -fgnu-tm [PR94733]
find_tm_attribute was using TREE_PURPOSE to get the attribute name,
which is breaking now that we preserve the C++11-style attribute
format past decl_attributes.  So use get_attribute_name which can
handle both formats of attributes.

	PR c++/94733
	* c-attribs.c (find_tm_attribute): Use get_attribute_name instead of
	TREE_PURPOSE.

	* g++.dg/tm/attrib-5.C: New test.
2020-04-23 15:13:55 -04:00
Jakub Jelinek
bca558de2a tree: Fix up get_narrower [PR94724]
In the recent get_narrower change, I wanted it to be efficient and avoid
recursion if there are many nested COMPOUND_EXPRs.  That builds the
COMPOUND_EXPR nest with the right arguments, but as build2_loc computes some
flags like TREE_SIDE_EFFECTS, TREE_CONSTANT and TREE_READONLY, when it
is called with something that will not be the argument in the end, those
flags are computed incorrectly.
So, this patch instead uses an auto_vec and builds them in the reverse order
so when they are built, they are built with the correct operands.

2020-04-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/94724
	* tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
	temporarily with non-final second operand and updating it later,
	push COMPOUND_EXPRs into a vector and process it in reverse,
	creating COMPOUND_EXPRs with the final operands.

	* gcc.c-torture/execute/pr94724.c: New test.
2020-04-23 21:11:36 +02:00
Thomas König
06eca1acaf Fix PR 93956, wrong pointer when returned via function.
This one took a bit of detective work.  When array pointers point
to components of derived types, we currently set the span field
and then create an array temporary when we pass the array
pointer to a procedure as a non-pointer or non-target argument.
(This is inefficient, but that's for another release).

Now, the compiler detected this case when there was a direct assignment
like p => a%b, but not when p was returned either as a function result
or via an argument.  This patch fixes that.

2020-04-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/93956
	* expr.c (gfc_check_pointer_assign): Also set subref_array_pointer
	when a function returns a pointer.
	* interface.c (gfc_set_subref_array_pointer_arg): New function.
	(gfc_procedure_use): Call it.

2020-04-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/93956
	* gfortran.dg/pointer_assign_13.f90: New test.
2020-04-23 20:30:01 +02:00
Iain Sandoe
dcf69ac544 coroutines, libstdc++-v3: Update to n4861 C++20 DIS.
Update the inline namespace to __n4861.
Add '__cpp_lib_coroutine' defined to 201902L per n4861.

libstdc++-v3/ChangeLog:

2020-04-23  Iain Sandoe  <iain@sandoe.co.uk>

	* include/std/coroutine: Update the inline namespace to __n4861.
	Add the __cpp_lib_coroutine define, set to 201902L.
	* include/std/version: Add __cpp_lib_coroutine, set to 201902L.

gcc/testsuite/ChangeLog:

2020-04-23  Iain Sandoe  <iain@sandoe.co.uk>

	* g++.dg/coroutines/coro-bad-alloc-00-bad-op-new.C: Adjust for
	changed inline namespace.
	* g++.dg/coroutines/coro-bad-alloc-01-bad-op-del.C: Likewise.
	* g++.dg/coroutines/coro-bad-alloc-02-no-op-new-nt.C: Likewise
	* g++.dg/coroutines/coro.h: Likewise
2020-04-23 16:27:29 +01:00
Szabolcs Nagy
f7e4641afb aarch64: ensure bti c is emitted at function start [PR94697]
The bti pass currently first emits bti c at function start
if there is no paciasp (which also acts as indirect call
landing pad), then bti j is emitted at jump labels, however
if there is a label right before paciasp then the function
start can end up like

  foo:
  label:
    bti j
    paciasp
    ...

This patch is a minimal fix that just moves the bti c handling
after the bti j handling so we end up with

  foo:
    bti c
  label:
    bti j
    paciasp
    ...

This could be improved by emitting bti jc in this case, or by
detecting that the label is not in fact an indirect jump target
and then this situation would be much less common.

Needs to be backported to gcc-9 branch.

gcc/ChangeLog:

	PR target/94697
	* config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
	bti c and bti j handling.

gcc/testsuite/ChangeLog:

	PR target/94697
	* gcc.target/aarch64/pr94697.c: New test.
2020-04-23 16:14:28 +01:00
Fei Yang
857d1fa3f0 testsuite: Add extra aarch64 predefine tests
Add extra testing in the following two tests to make sure CPP predefines
redefinitions on #pragma works as expected when -mgeneral-regs-only
option is specified (See PR94678):
gcc.target/aarch64/pragma_cpp_predefs_2.c
gcc.target/aarch64/pragma_cpp_predefs_3.c

2020-04-23  Felix Yang  <felix.yang@huawei.com>

gcc/testsuite/
	PR target/94678
	* gcc.target/aarch64/pragma_cpp_predefs_2.c: Fix typos, pop_pragma ->
	pop_options. Add tests for general-regs-only.
	* gcc.target/aarch64/pragma_cpp_predefs_3.c: Add tests for
	general-regs-only.
2020-04-23 16:08:03 +01:00
Andrew Stubbs
ee9fcee3ec OpenACC: Avoid ICE in type-cast 'async', 'wait' clauses
2020-04-23  Andrew Stubbs  <ams@codesourcery.com>
	    Thomas Schwinge  <thomas@codesourcery.com>

	PR middle-end/93488

	gcc/
	* omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
	t_async and the wait arguments.

	gcc/testsuite/
	* c-c++-common/goacc/pr93488.c: New file.

Reviewed-by: Thomas Schwinge <thomas@codesourcery.com>
2020-04-23 15:58:09 +01:00
Richard Sandiford
901f5289d9 vect: Fix comparisons between invariant booleans [PR94727]
This PR was caused by mismatched expectations between
vectorizable_comparison and SLP.  We had a "<" comparison
between two booleans that were leaves of the SLP tree, so
vectorizable_comparison fell back on:

  /* Invariant comparison.  */
  if (!vectype)
    {
      vectype = get_vectype_for_scalar_type (vinfo, TREE_TYPE (rhs1),
                                             slp_node);
      if (maybe_ne (TYPE_VECTOR_SUBPARTS (vectype), nunits))
        return false;
    }

rhs1 and rhs2 were *unsigned* boolean types, so we got back a vector
of unsigned integers.  This in itself was OK, and meant that "<"
worked as expected without the need for the boolean fix-ups:

  /* Boolean values may have another representation in vectors
     and therefore we prefer bit operations over comparison for
     them (which also works for scalar masks).  We store opcodes
     to use in bitop1 and bitop2.  Statement is vectorized as
       BITOP2 (rhs1 BITOP1 rhs2) or
       rhs1 BITOP2 (BITOP1 rhs2)
     depending on bitop1 and bitop2 arity.  */
  bool swap_p = false;
  if (VECTOR_BOOLEAN_TYPE_P (vectype))
    {

However, vectorizable_comparison then used vect_get_slp_defs to get
the actual operands.  The request went to vect_get_constant_vectors,
which also has logic to calculate the vector type.  The problem was
that this type was different from the one chosen above:

  if (VECT_SCALAR_BOOLEAN_TYPE_P (TREE_TYPE (op))
      && vect_mask_constant_operand_p (stmt_vinfo))
    vector_type = truth_type_for (stmt_vectype);
  else
    vector_type = get_vectype_for_scalar_type (vinfo, TREE_TYPE (op), op_node);

So the function gave back a vector of mask types, which here are vectors
of *signed* booleans.  This meant that "<" gave:

  true (-1) < false (0)

and so the boolean fixup above was needed after all.

Fixed by making vectorizable_comparison also pick a mask type in
this case.

2020-04-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR tree-optimization/94727
	* tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
	comparing invariant scalar booleans.

gcc/testsuite/
	PR tree-optimization/94727
	* gcc.dg/vect/pr94727.c: New test.
2020-04-23 15:45:43 +01:00
Matthew Malcomson
e73a32d6d4 [AArch64] (PR94383) Avoid C++17 empty base field checking for HVA/HFA
In C++17, an empty class deriving from an empty base is not an
aggregate, while in C++14 it is.  In order to implement this, GCC adds
an artificial field to such classes.

This artificial field has no mapping to Fundamental Data Types in the
AArch64 PCS ABI and hence should not count towards determining whether an
object can be passed using the vector registers as per section
"6.4.2 Parameter Passing Rules" in the AArch64 PCS.
https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#the-base-procedure-call-standard

This patch avoids counting this artificial field in
aapcs_vfp_sub_candidate, and hence calculates whether such objects
should be passed in vector registers in the same manner as C++14 (where
the artificial field does not exist).

Before this change, the test below would pass the arguments to `f` in
general registers.  After this change, the test passes the arguments to
`f` using the vector registers.

The new behaviour matches the behaviour of `armclang`, and also matches
the behaviour when run with `-std=gnu++14`.

> gcc -std=gnu++17 test.cpp

``` test.cpp
struct base {};

struct pair : base
{
  float first;
  float second;
  pair (float f, float s) : first(f), second(s) {}
};

void f (pair);
int main()
{
  f({3.14, 666});
  return 1;
}
```

We add a `-Wpsabi` warning to catch cases where this fix has changed the ABI for
some functions.  Unfortunately this warning is not emitted twice for multiple
calls to the same function, but I feel this is not much of a problem and can be
fixed later if needs be.

(i.e. if `main` called `f` twice in a row we only emit a diagnostic for the
first).

Testing:
    Bootstrap and regression test on aarch64-linux.
    All struct-layout-1 tests now pass.

gcc/ChangeLog:

2020-04-23  Matthew Malcomson  <matthew.malcomson@arm.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR target/94383
	* config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
	empty base class artificial fields.
	(aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
	different after this fix.
2020-04-23 15:33:55 +01:00
Fritz Reese
e8eecc2a91 Protect the trigd functions in libgfortran from unavailable math functions.
libgfortran/ChangeLog:

2020-04-22  Fritz Reese  <foreese@gcc.gnu.org>

	PR libfortran/94694
	PR libfortran/94586
	* intrinsics/trigd.c, intrinsics/trigd_lib.inc, intrinsics/trigd.inc:
	Guard against unavailable math functions.
	Use suffixes from kinds.h based on the REAL kind.

gcc/fortran/ChangeLog:

2020-04-22  Fritz Reese  <foreese@gcc.gnu.org>

	* trigd_fe.inc: Use mpfr to compute cosd(30) rather than a host-
	precision floating point literal based on an invalid macro.
2020-04-23 10:11:01 -04:00
Andrew Stubbs
966de09be9 amdgcn: Check HSA return codes [PR94629]
Ensure that the returned status values are not ignored.  The old code was
not broken, but this is both safer and satisfies static analysis.

2020-04-23  Andrew Stubbs  <ams@codesourcery.com>

	PR other/94629

	libgomp/
	* plugin/plugin-gcn.c (init_hsa_context): Check return value from
	hsa_iterate_agents.
	(GOMP_OFFLOAD_init_device): Check return values from both calls to
	hsa_agent_iterate_regions.
2020-04-23 15:05:23 +01:00
Szabolcs Nagy
744b3e4478 aarch64: disable tests on ilp32 [PR94514]
branch-protection=pac-ret is only supported with lp64 abi.

gcc/testsuite/ChangeLog:

	PR target/94514
	* g++.target/aarch64/pr94514.C: Require lp64.
	* gcc.target/aarch64/pr94514.c: Likewise.
2020-04-23 14:12:44 +01:00
Jakub Jelinek
239cfd92e9 rs6000: Small improvement to the C++17 ABI fix [PR94707]
Anyway, based on IRC discussion with Richard Sandiford on IRC, we should
probably test type uids instead of type pointers because type uids aren't
reused, but type pointers in a very bad luck case could be, and having the
static var at filescope and GTY((deletable)) is an overkill (and with costs
during GC time).

2020-04-23  Jakub Jelinek  <jakub@redhat.com>

	PR target/94707
	* config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
	Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
	if the same type has been diagnosed most recently already.
2020-04-23 14:43:18 +02:00
Srinath Parvathaneni
c6ffc89f6e Modify the MVE polymorphic variant arguments to match the MVE intrinsic definition.
When MVE intrinsic's are called, few implicit typecasting are done on the formal arguments to match the intrinsic parameters.
But when same intrinsics are called through MVE polymorphic variants, _Generic feature used here does strict type checking and fails to match the exact intrinsic.
This patch corrects the behaviour of polymorphic variants and match the expected intrinsic by explicitly typecasting the polymorphic variant's arguments.

Please refer to M-profile Vector Extension (MVE) intrinsics [1]  for more details.
[1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics

Regression tested on arm-none-eabi and found no regressions.

Ok for trunk?

Thanks,
Srinath.

gcc/ChangeLog:

2020-04-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
	datatype.
	(__arm_vbicq_n_s16): Likewise.
	(__arm_vbicq_n_u32): Likewise.
	(__arm_vbicq_n_s32): Likewise.
	(__arm_vbicq): Likewise.
	(__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
	(__arm_vbicq_n_s32): Likewise.
	(__arm_vbicq_n_u16): Likewise.
	(__arm_vbicq_n_u32): Likewise.
	(__arm_vdupq_m_n_s8): Likewise.
	(__arm_vdupq_m_n_s16): Likewise.
	(__arm_vdupq_m_n_s32): Likewise.
	(__arm_vdupq_m_n_u8): Likewise.
	(__arm_vdupq_m_n_u16): Likewise.
	(__arm_vdupq_m_n_u32): Likewise.
	(__arm_vdupq_m_n_f16): Likewise.
	(__arm_vdupq_m_n_f32): Likewise.
	(__arm_vldrhq_gather_offset_s16): Likewise.
	(__arm_vldrhq_gather_offset_s32): Likewise.
	(__arm_vldrhq_gather_offset_u16): Likewise.
	(__arm_vldrhq_gather_offset_u32): Likewise.
	(__arm_vldrhq_gather_offset_f16): Likewise.
	(__arm_vldrhq_gather_offset_z_s16): Likewise.
	(__arm_vldrhq_gather_offset_z_s32): Likewise.
	(__arm_vldrhq_gather_offset_z_u16): Likewise.
	(__arm_vldrhq_gather_offset_z_u32): Likewise.
	(__arm_vldrhq_gather_offset_z_f16): Likewise.
	(__arm_vldrhq_gather_shifted_offset_s16): Likewise.
	(__arm_vldrhq_gather_shifted_offset_s32): Likewise.
	(__arm_vldrhq_gather_shifted_offset_u16): Likewise.
	(__arm_vldrhq_gather_shifted_offset_u32): Likewise.
	(__arm_vldrhq_gather_shifted_offset_f16): Likewise.
	(__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
	(__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
	(__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
	(__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
	(__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
	(__arm_vldrwq_gather_offset_s32): Likewise.
	(__arm_vldrwq_gather_offset_u32): Likewise.
	(__arm_vldrwq_gather_offset_f32): Likewise.
	(__arm_vldrwq_gather_offset_z_s32): Likewise.
	(__arm_vldrwq_gather_offset_z_u32): Likewise.
	(__arm_vldrwq_gather_offset_z_f32): Likewise.
	(__arm_vldrwq_gather_shifted_offset_s32): Likewise.
	(__arm_vldrwq_gather_shifted_offset_u32): Likewise.
	(__arm_vldrwq_gather_shifted_offset_f32): Likewise.
	(__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
	(__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
	(__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
	(__arm_vdwdupq_x_n_u8): Likewise.
	(__arm_vdwdupq_x_n_u16): Likewise.
	(__arm_vdwdupq_x_n_u32): Likewise.
	(__arm_viwdupq_x_n_u8): Likewise.
	(__arm_viwdupq_x_n_u16): Likewise.
	(__arm_viwdupq_x_n_u32): Likewise.
	(__arm_vidupq_x_n_u8): Likewise.
	(__arm_vddupq_x_n_u8): Likewise.
	(__arm_vidupq_x_n_u16): Likewise.
	(__arm_vddupq_x_n_u16): Likewise.
	(__arm_vidupq_x_n_u32): Likewise.
	(__arm_vddupq_x_n_u32): Likewise.
	(__arm_vldrdq_gather_offset_s64): Likewise.
	(__arm_vldrdq_gather_offset_u64): Likewise.
	(__arm_vldrdq_gather_offset_z_s64): Likewise.
	(__arm_vldrdq_gather_offset_z_u64): Likewise.
	(__arm_vldrdq_gather_shifted_offset_s64): Likewise.
	(__arm_vldrdq_gather_shifted_offset_u64): Likewise.
	(__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
	(__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
	(__arm_vidupq_m_n_u8): Likewise.
	(__arm_vidupq_m_n_u16): Likewise.
	(__arm_vidupq_m_n_u32): Likewise.
	(__arm_vddupq_m_n_u8): Likewise.
	(__arm_vddupq_m_n_u16): Likewise.
	(__arm_vddupq_m_n_u32): Likewise.
	(__arm_vidupq_n_u16): Likewise.
	(__arm_vidupq_n_u32): Likewise.
	(__arm_vidupq_n_u8): Likewise.
	(__arm_vddupq_n_u16): Likewise.
	(__arm_vddupq_n_u32): Likewise.
	(__arm_vddupq_n_u8): Likewise.

gcc/testsuite/ChangeLog:

2020-04-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c: New test.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c
	: Likewise.
	* gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c
	: Likewise.
2020-04-23 11:00:32 +01:00
Iain Buclaw
66c2273714 doc: Document all D-specific configuration options.
gcc/ChangeLog:

	* doc/install.texi (D-Specific Options): Document
	--enable-libphobos-checking and --with-libphobos-druntime-only.
2020-04-23 10:03:28 +02:00
Jakub Jelinek
a39ed81b8a rs6000: Fix C++14 vs. C++17 ABI bug on powerpc64le [PR94707]
As mentioned in the PR and on IRC, the recently added struct-layout-1.exp
new tests FAIL on powerpc64le-linux (among other targets).
FAIL: tmpdir-g++.dg-struct-layout-1/t032 cp_compat_x_tst.o-cp_compat_y_tst.o execute
FAIL: tmpdir-g++.dg-struct-layout-1/t058 cp_compat_x_tst.o-cp_compat_y_tst.o execute
FAIL: tmpdir-g++.dg-struct-layout-1/t059 cp_compat_x_tst.o-cp_compat_y_tst.o execute
in particular.  The problem is that the presence or absence of the C++17
artificial empty base fields, which have non-zero TYPE_SIZE, but zero
DECL_SIZE, change the ABI decisions, if it is present (-std=c++17), the type
might not be considered homogeneous, while if it is absent (-std=c++14), it
can be.

The following patch fixes that and emits a -Wpsabi inform; perhaps more
often than it could, because the fact that rs6000_discover_homogeneous_aggregate
returns true when it didn't in in GCC 7/8/9 with -std=c++17 doesn't still
mean it will make a different ABI decision, but the warning triggered only
on the test I've changed (the struct-layout-1.exp tests use -w -Wno-psabi
already).

2020-04-23  Jakub Jelinek  <jakub@redhat.com>

	PR target/94707
	* config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
	cxx17_empty_base_seen argument.  Pass it to recursive calls.
	Ignore cxx17_empty_base_field_p fields after setting
	*cxx17_empty_base_seen to true.
	(rs6000_discover_homogeneous_aggregate): Adjust
	rs6000_aggregate_candidate caller.  With -Wpsabi, diagnose homogeneous
	aggregates with C++17 empty base fields.

	* g++.dg/tree-ssa/pr27830.C: Use -Wpsabi -w for -std=c++17 and higher.
2020-04-23 09:59:57 +02:00
Jakub Jelinek
e2a71816b4 attribs: Don't diagnose attribute exclusions during error recovery [PR94705]
On the following testcase GCC ICEs, because last_decl is error_mark_node,
and diag_attr_exclusions assumes that if it is not NULL, it must be a decl.

The following patch just doesn't diagnose attribute exclusions if the
other decl is erroneous (and thus we've already reported errors for it).

2020-04-23  Jakub Jelinek  <jakub@redhat.com>

	PR c/94705
	* attribs.c (decl_attribute): Don't diagnose attribute exclusions
	if last_decl is error_mark_node or has such a TREE_TYPE.

	* gcc.dg/pr94705.c: New test.
2020-04-23 09:54:14 +02:00
GCC Administrator
49fc9f36a3 Daily bump. 2020-04-23 00:16:19 +00:00
Jonathan Wakely
cf88e25a22 c++: Change -Weffc++ diagnostic to use "declare" (PR 94698)
Change the wording again, for the reasons given by Jason in
https://gcc.gnu.org/pipermail/gcc-patches/2020-April/544362.html

	PR translation/94698
	* class.c (check_field_decls): Change "define" to "declare" in
	-Weffc++ diagnostics.
2020-04-22 23:19:08 +01:00
Jonathan Wakely
aac39307e8 libstdc++: Define __cpp_lib_execution feature test macro
This macro has never been defined by libstdc++, despite supporting the
parallel algorithms. It should have a different value for C++17 and
C++20, because P1001R2 should not be supported in C++17, but
unsequenced_policy is defined for C++17 (see PR p4702).

	* include/std/execution (__cpp_lib_execution): Define to indicate
	support for P0024R2 and P1001R2.
	* include/std/version (__cpp_lib_execution): Define.
	* testsuite/25_algorithms/pstl/feature_test.cc: Only test macro
	defined by <algorithm>, move other tests to new tests ...
	* testsuite/25_algorithms/pstl/feature_test-2.cc: New test.
	* testsuite/25_algorithms/pstl/feature_test-3.cc: New test.
	* testsuite/25_algorithms/pstl/feature_test-4.cc: New test.
	* testsuite/25_algorithms/pstl/feature_test-5.cc: New test.
2020-04-22 22:54:35 +01:00
Jonathan Wakely
e851aa1703 libstdc++: Update (and revert) value of __cpp_lib_array_constexpr
This macro should have been updated to 201811 when the last C++20
changes were implemented. However those changes are not enabled for
C++17 mode, so the macro should only have the new value in C++20 mode.

This change ensures that the macro is defined to 201603 for C++17 and
201811 for C++20.

	* include/bits/stl_iterator.h (__cpp_lib_array_constexpr): Define
	different values for C++17 and C++20, to indicate different feature
	sets. Update value for C++20 to indicate P1032R1 support.
	* include/std/version (__cpp_lib_array_constexpr): Likewise.
	* testsuite/23_containers/array/comparison_operators/constexpr.cc:
	Check feature test macro.
	* testsuite/23_containers/array/element_access/constexpr_c++17.cc:
	New test.
	* testsuite/23_containers/array/requirements/constexpr_fill.cc: Check
	feature test macro.
	* testsuite/23_containers/array/requirements/constexpr_iter.cc: Test
	in C++17 mode and check feature test macro.
2020-04-22 22:54:35 +01:00
Jonathan Wakely
2025db692e libstdc++: Do not define __cpp_lib_constexpr_algorithms in <utility>
The C++20 draft and SD-6 both say this should only be in <version> and
<algorithm>, not in <utility>.

	* include/std/utility (__cpp_lib_constexpr_algorithms): Do not define
	here.
	* testsuite/20_util/exchange/constexpr.cc: Do not expect macro to be
	defined by <utility>.
2020-04-22 22:54:35 +01:00
Jonathan Wakely
c9313582d8 libstdc++: Update __cpp_lib_concepts value
* include/std/functional (__cpp_lib_concepts): Update macro value to
	indicate P1964R2 support.
	* include/std/version (__cpp_lib_concepts): Likewise.
	* testsuite/std/concepts/1.cc: Adjust expected value.
	* testsuite/std/concepts/2.cc: Likewise.
2020-04-22 22:54:34 +01:00
Jonathan Wakely
eca477d16c libstdc++: Rename __cpp_lib_constexpr_invoke macro
This macro was renamed after it was added to the working draft, but we
never renamed it  in libstdc++. We haven't made a release with the old
macro name, so I see no need to keep it around.

	* include/std/functional (__cpp_lib_constexpr_invoke): Rename to
	__cpp_lib_constexpr_functional.
	* include/std/version (__cpp_lib_constexpr_invoke): Likewise.
	* testsuite/20_util/function_objects/invoke/constexpr.cc: Adjust.
2020-04-22 22:54:34 +01:00
Jonathan Wakely
56772f623e libstdc++: Add missing feature test macros
These macros all correspond to features that are already supported, but
the macro was not defined when the feature was implemented.

	* include/bits/ptr_traits.h (__cpp_lib_constexpr_memory): Define to
	indicate P1006R1 support.
	(__cpp_lib_to_address): Define to indicate P0653R2 support.
	* include/bits/range_access.h (__cpp_lib_ssize): Define to indicate
	P1227R2 support.
	* include/bits/ranges_algo.h (__cpp_lib_shift): Define to indicate
	P0769R2 support.
	* include/std/atomic (__cpp_lib_atomic_float): Define to indicate
	P0020R6 support.
	* include/std/memory (__cpp_lib_assume_aligned): Define to indicate
	P1007R3 support.
	* include/std/memory_resource (__cpp_lib_polymorphic_allocator):
	Define to indicate P0339R6 support.
	* include/std/string_view (__cpp_lib_starts_ends_with): Define to
	indicate P0457R2 support.
	* include/std/type_traits (__cpp_lib_is_nothrow_convertible): Define
	to indicate P0758R1 support.
	(__cpp_lib_remove_cvref): Define to indicate P0550R2 support.
	(__cpp_lib_type_identity): Define to indicate P0887R1 support.
	* include/std/version (__cpp_lib_atomic_float)
	(__cpp_lib_is_nothrow_convertible, __cpp_lib_remove_cvref)
	(__cpp_lib_type_identity, __cpp_lib_assume_aligned)
	(__cpp_lib_constexpr_memory, __cpp_lib_polymorphic_allocator)
	(__cpp_lib_shift, __cpp_lib_ssize, __cpp_lib_starts_ends_with)
	(__cpp_lib_to_address): Define.
	* testsuite/20_util/to_address/1_neg.cc: Adjust dg-error line number.
2020-04-22 22:54:34 +01:00
Jonathan Wakely
0d2dbae406 libstdc++: Remove non-standard feature test macros
These macros were replaced by __cpp_lib_map_try_emplace and
__cpp_lib_unordered_map_try_emplace, because those names are more
descriptive. We've kept both old and new names so far, but I think we
can remove the old ones now.

	* include/bits/stl_map.h (__cpp_lib_map_insertion): Remove old
	macro.
	* include/bits/unordered_map.h (__cpp_lib_unordered_map_insertion):
	Likewise.
	* include/std/version (__cpp_lib_map_insertion)
	(__cpp_lib_unordered_map_insertion): Remove.
2020-04-22 22:54:34 +01:00
Jonathan Wakely
aa12ab2e93 libstdc++: Update value of __cpp_lib_jthread macro
* include/std/condition_variable (__cpp_lib_jthread): Remove
	redundant definition.
	* include/std/stop_token (__cpp_lib_jthread): Update macro value to
	indicate P1869R1 support.
	* include/std/version (__cpp_lib_jthread): Update value.
	* testsuite/30_threads/condition_variable_any/stop_token/1.cc: Check
	for updated macro value.
	* testsuite/30_threads/condition_variable_any/stop_token/2.cc:
	Likewise.
	* testsuite/30_threads/jthread/1.cc: Likewise.
	* testsuite/30_threads/jthread/2.cc: Likewise.
	* testsuite/30_threads/stop_token/1.cc: Likewise.
	* testsuite/30_threads/stop_token/2.cc: Likewise.
2020-04-22 22:54:34 +01:00
Patrick Palka
72d0ef73d2 c++: Inherited constructor template arguments [PR94719]
My fix for PR94549 broke constraints_satisfied_p in the case where the inherited
constructor decl points to an instantiation of a constructor template coming
from an instantiation of a class template.

This is because the DECL_TI_ARGS of the inherited constructor decl in this case
contains only the innermost level of template arguments (those for the
constructor template), but constraint satisfaction expects to have the full set
of template arguments.  This causes template argument substitution during
constraint satisfaction to fail in various ways.

On the other hand, the DECL_TI_ARGS of the DECL_INHERITED_CTOR is a full set of
template arguments but with the innermost level still in its dependent form,
which is the source of PR94549.  So if we could combine these two sets of
template arguments then we'd be golden.

This patch does just that, by effectively reverting the fix for PR94549 and
instead using add_outermost_template_args to combine the template arguments of
the inherited constructor decl with those of its DECL_INHERITED_CTOR.

gcc/cp/ChangeLog:

	PR c++/94719
	PR c++/94549
	* constraint.cc (satisfy_declaration_constraints): If the inherited
	constructor points to an instantiation of a constructor template,
	remember and use its attached template arguments.

gcc/testsuite/ChangeLog:

	PR c++/94719
	PR c++/94549
	* g++.dg/cpp2a/concepts-inherit-ctor9.C: New test.
2020-04-22 15:57:39 -04:00
Marek Polacek
edfa7c684d c++: Add test for c++/93807
This PR was initially accepts-invalid, but I think it's actually valid
C++20 code.  My reasoning is that in C++20 we no longer require the
declaration of operator== (#if-defed in the test), because C++20's
[temp.names]/2 says "A name is also considered to refer to a template
if it is an unqualified-id followed by a < and name lookup either finds
one or more functions or finds nothing." so when we're parsing

  constexpr friend bool operator==<T>(T lhs, const Foo& rhs);

we treat "operator==" as a template name, because name lookup of
"operator==" found nothing and we have an operator-function-id, which is
an unqualified-id, and it's followed by a <.  So the declaration isn't
needed to treat "operator==<T>" as a template-id.

	PR c++/93807
	* g++.dg/cpp2a/fn-template20.C: New test.
2020-04-22 15:53:34 -04:00
Jakub Jelinek
1868599f8d libgfortran: Provide some further math library fallbacks [PR94694]
The following patch provides some further math library fallbacks.
fmaf can be implemented using fma if available, fma and fmal can use
x * y + z as fallback, it is not perfect, but e.g. glibc on various arches
has been using that as fallback for many years,
and copysign/copysignl/fabs/fabsl can be implemented using corresponding
__builtin_* if we make sure that gcc expands it inline instead of using
a library call (these days it is expanded inline on most targets).

2020-04-22  Jakub Jelinek  <jakub@redhat.com>

	PR libfortran/94694
	PR libfortran/94586
	* configure.ac: Add math func checks for fmaf, fma and fmal.  Add
	HAVE_INLINE_BUILTIN_COPYSIGN check.
	* c99_protos.h (copysign, fmaf, fma, fmal): Provide fallback
	prototypes.
	(HAVE_COPYSIGN, HAVE_FMAF, HAVE_FMA, HAVE_FMAL): Define if not
	defined and fallback version is provided.
	* intrinsics/c99_functions.c (copysign, fmaf, fma, fmal): Provide
	fallback implementations if possible
	* configure: Regenerated.
	* config.h.in: Regenerated.

	* math.m4 (GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK1,
	GCC_CHECK_MATH_INLINE_BUILTIN_FALLBACK2): New.
2020-04-22 21:34:19 +02:00
Duan bo
545f1addf7 aarch64: Adjust some testcases for ilp32 option conflict [PR94712]
Since -mabi=ilp32 option is not compatible with large code model, Require
lp64 target for the following tests:
gcc.target/aarch64/pr63304_1.c
gcc.target/aarch64/pr70120-2.c
gcc.target/aarch64/pr94530.c
gcc.target/aarch64/reload-valid-spoff.c

2020-04-22  Duan bo  <duanbo3@huawei.com>

gcc/testsuite/
	PR testsuite/94712
	* gcc.target/aarch64/pr63304_1.c: Require lp64 target.
	* gcc.target/aarch64/pr70120-2.c: Likewise.
	* gcc.target/aarch64/pr94530.c: Likewise.
	* gcc.target/aarch64/reload-valid-spoff.c: Likewise.
2020-04-22 18:29:30 +01:00
Fei Yang
154ae7d4e9 aarch64: unexpected result with -mgeneral-regs-only and sve [PR94678]
As the two testcases for PR94678 show, -mgeneral-regs-only is handled
properly with SVE.  We should issue an error message instead of expanding
SVE builtin funtions when -mgeneral-regs-only option is specified.

The middle end should never try to use vector patterns when the vector
modes have been disabled by !have_regs_of_mode.  But it's still wrong
for the target to provide patterns that would inevitably lead to spill
failure due to lack of registers.  So we should also add check for
!TARGET_GENERAL_REGS_ONLY in TARGET_SVE and other SVE related macros.

2020-04-22  Felix Yang  <felix.yang@huawei.com>

gcc/
	PR target/94678
	* config/aarch64/aarch64.h (TARGET_SVE):
	Add && !TARGET_GENERAL_REGS_ONLY.
	(TARGET_SVE2): Add && TARGET_SVE.
	(TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
	TARGET_SVE2_SM4): Add && TARGET_SVE2.
	* config/aarch64/aarch64-sve-builtins.h
	(sve_switcher::m_old_general_regs_only): New member.
	* config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
	New function.
	(reported_missing_registers_p): New variable.
	(check_required_extensions): Call check_required_registers before
	return if all required extenstions are present.
	(sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
	m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
	global_options.x_target_flags.
	(sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
	global_options.x_target_flags if m_old_general_regs_only is true.

gcc/testsuite/
	PR target/94678
	* gcc.target/aarch64/sve/acle/general/nosve_6.c: New test.
2020-04-22 18:24:59 +01:00
Jeff Law
4c33513986 Update builtin function documentation.
* doc/extend.exi: Add "free" to list of other builtin functions
	supported by GCC.
2020-04-22 11:22:59 -06:00
Aaron Sawdey
3bcdb5dec7 Use plq/pstq for atomic_{load,store}<mode>
For future architecture with prefix instructions, always use plq/pstq
rather than lq/stq for atomic load of quadword. Then we never have to
do the doubleword swap on little endian. Before this fix, -mno-pcrel
would generate lq with the doubleword swap (which was ok) and -mpcrel
would generate plq, also with the doubleword swap, which was wrong.

2020-04-20  Aaron Sawdey  <acsawdey@linux.ibm.com>

	PR target/94622
	* config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
	if TARGET_PREFIXED.
	(store_quadpti): Ditto.
	(atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
	plq will be used and doesn't need it.
	(atomic_store<mode>): Ditto, for pstq.
2020-04-22 12:19:33 -05:00
Erick Ochoa
464092e0f1 Update flags turned by -O3.
* doc/invoke.texi: Update flags turned on by -O3.
2020-04-22 11:16:24 -06:00
Jonathan Wakely
c95d1dd7f5 c++: Fix misuse of "override" in -Weffc++ warnings (PR 94698)
These warnings have nothing to do with virtual functions, so "override"
is inappropriate. The warnings are just talking about defining special
members, so let's say that.

	PR translation/94698
	* class.c (check_field_decls): Change "override" to "define" in
	-Weffc++ diagnostics.
2020-04-22 18:02:38 +01:00
Jose Rui Faustino de Sousa
808a6eadda For assumed-size arrays check if the reference is to a full array.
2020-04-22  José Rui Faustino de Sousa  <jrfsousa@gmail.com>

	PR fortran/90350
	* simplify.c (simplify_bound): In the case of assumed-size arrays
	check if the reference is to a full array.

2020-04-22  José Rui Faustino de Sousa  <jrfsousa@gmail.com>

	PR fortran/90350
	* gfortran.dg/PR90350.f90: New test.
2020-04-22 18:20:26 +02:00
Paolo Carlini
183e9006cc Add testcase of PR c++/90448, already fixed in trunk.
PR c++/90448
	* g++.dg/cpp1y/lambda-generic-variadic20.C: New.
2020-04-22 18:05:18 +02:00
Martin Sebor
203f2b73e2 Fix an ILP32 failure.
gcc/testsuite/ChangeLog:

	PR middle-end/94647
	* c-c++-common/Warray-bounds-2.c: Replace a large value harcoded
	in an expected warning with a pattern.
2020-04-22 09:34:43 -06:00
Stefan Schulze Frielinghaus
803596fe95 S/390: Fix several test cases
gcc/ChangeLog:

2020-04-21  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/s390.md ("*<risbg_n>_ior_and_sr_ze<mode>"): Lift from SI
	mode to DSI. ("*trunc_sidi_and_subreg_ze<clobbercc_or_nocc>"): New
	insn pattern.

gcc/testsuite/ChangeLog:

2020-04-21  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* gcc.target/s390/addsub-signed-overflow-1.c: Fix options.
	* gcc.target/s390/addsub-signed-overflow-2.c: Fix options.
	* gcc.target/s390/bswap-1.c: Fix scan assembler regex.
	* gcc.target/s390/global-array-element-pic2.c: Fix scan assembler regex.
	* gcc.target/s390/load-relative-check.c: Fix options.
	* gcc.target/s390/morestack.c: Fix options.
	* gcc.target/s390/nobp-return-mem-z900.c: Temporarily silence this case.
	* gcc.target/s390/risbg-ll-1.c: Fix scan assembler regex.
	* gcc.target/s390/risbg-ll-2.c: Fix scan assembler regex.
	* gcc.target/s390/risbg-ll-3.c: Fix scan assembler regex.
	* gcc.target/s390/target-attribute/pr82012.c: Fix error message.
2020-04-22 16:57:37 +02:00
Jakub Jelinek
1be6252807 ia64: Fix C++14 vs. C++17 ABI issue on ia64 [PR94706]
ia64 seems to be affected too, but the backend doesn't have any
-Wpsabi warnings and I'm not sure if we really need them for an (almost?)
dead target.

2020-04-22  Jakub Jelinek  <jakub@redhat.com>

	PR target/94706
	* config/ia64/ia64.c (hfa_element_mode): Ignore
	cxx17_empty_base_field_p fields.
2020-04-22 16:47:58 +02:00
Jakub Jelinek
c3a3465903 calls: Introduce cxx17_empty_base_field_p [PR94383]
As multiple targets are affected apparently, I believe at least
aarch64, arm, powerpc64le, s390{,x} and ia64,
I think we should have a middle-end predicate for this, so that if we need
to tweak it, we can do it in one spot.

2020-04-22  Jakub Jelinek  <jakub@redhat.com>

	PR target/94383
	* calls.h (cxx17_empty_base_field_p): Declare.
	* calls.c (cxx17_empty_base_field_p): Define.
2020-04-22 16:44:42 +02:00
Christophe Lyon
4e16452e29 testsuite: [arm] Include arm_acle.h in related effective targets
Since arm_acle.h includes stdint.h, its use requires the presence of
the right gnu/stub-*.h, so make sure to include arm_acle.h when
checking the effective targets that generally imply that the testcase
will include it: arm_dsp, arm_crc, arm_coproc[1-4]

This makes several tests unsupported rather than fail.

2020-04-22  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_arm_dsp)
	(check_effective_target_arm_crc_ok_nocache)
	(check_effective_target_arm_coproc1_ok_nocache)
	(check_effective_target_arm_coproc2_ok_nocache)
	(check_effective_target_arm_coproc3_ok_nocache)
	(check_effective_target_arm_coproc4_ok_nocache): Include
	arm_acle.h.
2020-04-22 13:56:51 +00:00
Christophe Lyon
e6474e22b2 testsuite: [arm/cde] Include arm_cde.h and arm_mve.h in arm_v8*m_main_cde*
Since arm_cde.h includes stdint.h, its use requires the presence of
the right gnu/stub-*.h, so make sure to include it when checking the
arm_v8*m_main_cde* effective targets, otherwise we can decide CDE is
supported while it's not really (all tests that use arm_v8m_main_cde*
also include arm_cde.h aynway).

Similarly for the effective targets that also require MVE.

This makes several tests unsupported rather than fail.

2020-04-22  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* lib/target-supports.exp (arm_v8m_main_cde, arm_v8m_main_cde_fp)
	(arm_v8_1m_main_cde_mve, arm_v8_1m_main_cde_mve_fp): Include
	arm_cde.h and arm_mve.h as ineeded.
2020-04-22 13:56:51 +00:00