2007-02-23 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (bdesc_1arg): Initialize
IX86_BUILTIN_MOVSHDUP and IX86_BUILTIN_MOVSLDUP with
"__builtin_ia32_movshdup" and "__builtin_ia32_movsldup".
(ix86_init_mmx_sse_builtins): Remove IX86_BUILTIN_MOVSHDUP
and IX86_BUILTIN_MOVSLDUP.
From-SVN: r122254
* gcc.c (getenv_spec_function): New function.
(static_spec_functions): Add it.
* config/vxworks.h (VXWORKS_TARGET_DIR): Remove.
(VXWORKS_ADDITIONAL_CPP_SPEC): Use getenv to find the VxWorks
header files.
From-SVN: r122240
PR tree-optimization/30843
* tree-vect-transform.c (vect_transform_loop): Remove strided scalar
stores only after all the group is vectorized.
From-SVN: r122225
PR tree-optimization/30858
* tree-vectorizer.c (vect_is_simple_reduction): Check that the stmts
in the reduction cycle have a single use in the loop.
* tree-vectorizer.h (relevant): Add documentation.
From-SVN: r122220
2007-02-21 Trevor Smigiel <trevor_smigiel@playstation.sony.com>
Change the defaults of some parameters and options.
* config/spu/spu-protos.h (spu_optimization_options): Declare.
* config/spu/spu.c (spu_optimization_options): Add.
(spu_override_options): Change params in spu_optimization_options.
* config/spu/spu.h (OPTIMIZATION_OPTIONS): Define.
Register 127 is only 16 byte aligned when used as a frame pointer.
* config/spu/spu-protos.h (spu_init_expanders): Declare.
* config/spu/spu.c (spu_expand_prologue): Set REGNO_POINTER_ALIGN for
HARD_FRAME_POINTER_REGNUM.
(spu_legitimate_address): Use regno_aligned_for_reload.
(regno_aligned_for_load): HARD_FRAME_POINTER_REGNUM is only 16 byte
aligned when frame_pointer_needed is true.
(spu_init_expanders): New. Set alignment of HARD_FRAME_POINTER_REGNUM
to 8 bits.
* config/spu/spu.h (INIT_EXPANDERS): Define.
Make sure shift and rotate instructions have valid immediate operands.
* config/spu/predicates.md (spu_shift_operand): Remove.
* config/spu/spu.c (print_operand): Add [efghEFGH] modifiers.
* config/spu/constraints.md (W, O): Extend range.
* config/spu/spu.md (umask, nmask): Define.
(ashl<mode>3, ashldi3, ashlti3_imm, shlqbybi_ti, shlqbi_ti, shlqby_ti,
lshr<mode>3, rotm_<mode>, lshr<mode>3_imm, rotqmbybi_<mode>,
rotqmbi_<mode>, rotqmby_<mode>, ashr<mode>3, rotma_<mode>,
rotl<mode>3, rotlti3, rotqbybi_ti, rotqby_ti, rotqbi_ti): Use
spu_nonmem_operand instead of spu_shift_operands. Use new modifiers.
(lshr<mode>3_reg): Fix rtl description.
Make sure mulhisi immediate operands are valid.
* config/spu/predicates.md (imm_K_operand): Add.
* config/spu/spu.md (mulhisi3_imm, umulhisi3_imm): Use imm_K_operand.
Generate constants using fsmbi and andi.
* config/spu/spu.c (enum immediate_class): Add IC_FSMBI2.
(print_operand, spu_split_immediate, classify_immediate,
fsmbi_const_p): Handle IC_FSMBI2.
Correctly handle a CONST_VECTOR containing symbols.
* config/spu/spu.c (print_operand): Handle HIGH correctly.
(spu_split_immediate): Split CONST_VECTORs with -mlarge-mem.
(immediate_load_p): Allow symbols that use 2 instructions to create.
(classify_immediate, spu_builtin_splats): Don't accept a CONST_VECTOR
with symbols when flag_pic is set.
(const_vector_immediate_p): New.
(logical_immediate_p, iohl_immediate_p, arith_immediate_p): Don't
accept a CONST_VECTOR with symbols.
(spu_legitimate_constant_p): Use const_vector_immediate_p. Don't
accept a CONST_VECTOR with symbols when flag_pic is set. Handle HIGH
correctly.
* config/spu/spu.md (high, low): Delete.
(low_<mode>): Define.
Remove INTRmode and INTR_REGNUM, which didn't work.
* config/spu/spu.c (spu_conditional_register_usage): Remove reference
of INTR_REGNUM.
* config/spu/spu-builtins.md (spu_idisable, spu_ienable, set_intr,
set_intr_pic, set_intr_cc, set_intr_cc_pic, set_intr_return, unnamed
peephole2 pattern): Don't use INTR or 131.
(movintrcc): Delete.
* config/spu/spu.h (FIRST_PSEUDO_REGISTER, FIXED_REGISTERS,
CALL_USED_REGISTERS, REGISTER_NAMES, INTR_REGNUM): Remove INTR_REGNUM.
* config/spu/spu.md (UNSPEC_IDISABLE, UNSPEC_IENABLE): Remove.
(UNSPEC_SET_INTR): Add.
* config/spu/spu-modes.def (INTR): Remove.
More accurate warnings about run-time relocations.
* config/spu/spu.c (reloc_diagnostic): Test in_section.
Correctly warn about immediate arguments to specific intrinsics.
* config/spu/spu.c (spu_check_builtin_parm): Handle CONST_VECTORs.
(spu_expand_builtin_1): Call spu_check_builtin_parm before checking
the instruction predicate.
Fix tree check errors with latest update.
* config/spu/spu.c (expand_builtin_args, spu_expand_builtin_1): Use
CALL_EXPR_ARG.
(spu_expand_builtin): Use CALL_EXPR_FN.
Add missing specific intrinsics.
* config/spu/spu-builtins.def: Add si_bisled, si_bisledd and
si_bislede.
* config/spu/spu_internals.h: Ditto.
Fix incorrect operand modifiers.
* config/spu/spu-builtins.md (spu_mpy, spu_mpyu): Remove use of %H.
* config/spu/spu.md (xor<mode>3): Change %S to %J.
Optimize one case of zero_extend of a vec_select.
* config/spu/spu.md (_vec_extractv8hi_ze): Add.
Accept any immediate for hbr.
* config/spu/spu.md (hbr): Change s constraints to i.
From-SVN: r122210
2007-02-21 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (thumb2_final_prescan_insn): Don't incrememnt
condexec_count when skipping USE and CLOBBER.
From-SVN: r122205
PR middle-end/30761
* reload1.c (eliminate_regs_in_insn): In the single_set special
case, attempt to re-recognize the insn before falling back to
having reload fix it up.
From-SVN: r122199
* doc/invoke.texi (RS/6000 and PowerPC Options): Add -mcmpb and -mdfp.
* configure.ac (HAVE_GAS_CMPB): Check for assembler support of the
cmpb instruction.
(HAVE_GAS_DFP): Check for assembler support of decimal floating
point instructions.
* configure: Regenerate.
* config.in: Regenerate.
* config/rs6000/rs6000.opt (mcmpb, mdfp): New.
* config/rs6000/rs6000.c (rs6000_override_options): Add CMPB and DFP
masks to power6 and power6x and to POWERPC_MASKS.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
_ARCH_PWR6.
* config/rs6000/rs6000.h: Check assembler support for CMPB and DFP.
* config/rs6000/sysv4.opt (mprototype): Use variable, not mask.
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS):
Access PROTOTYPE as variable, not mask.
From-SVN: r122179
* rtlanal.c (find_reg_equal_equiv_note): Do not find REG_EQ*
notes on an insn with multiple sets, even if single_set returns
non-NULL for that insn.
From-SVN: r122177
2007-02-20 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
DJ Delorie <dj@redhat.com>
PR other/30824
* diagnostic.c (diagnostic_count_diagnostic): Move -Werror
logic to...
(diagnostic_report_diagnostic): ... here, and turn them into
real errors. If warnings are inhibited, no need to do
anything.
testsuite/
* gcc.dg/Wfatal.c: New.
* gcc.dg/Wfatal-2.c: New.
* gcc.dg/Werror-1.c: Adjust expectations.
* gcc.dg/Werror-5.c: Likewise.
* gcc.dg/Werror-7.c: Likewise.
* gcc.dg/Werror-10.c: Likewise.
* gcc.dg/Werror-11.c: Likewise.
Co-Authored-By: DJ Delorie <dj@redhat.com>
From-SVN: r122159
* config/ia64/ia64.c (ia64_expand_builtin): Use the
new CALL_EXPR_FN macro for retrieving the function
declaration of the input expression.
From-SVN: r122139
2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.c (s390_call_saved_register_used,
s390_function_ok_for_sibcall): Adjust the way CALL_EXPR arguments are
accessed to the new scheme.
From-SVN: r122129
2007-02-18 Eric Christopher <echristo@gmail.com>
* mips.c (mips_prepare_builtin_arg): Add argnum parameter.
Remove use of arglist.
(mips_expand_builtin): Remove use of arglist, pass in expr.
(mips_expand_builtin_direct): Rewrite handling for arglist removal.
(mips_expand_builtin_movtf): Ditto.
(mips_expand_builtin_compare): Ditto.
From-SVN: r122126
Mike Stump
Steve Ellcey
DJ Delorie
Uros Bizjak
Bernd Schmidt
Kaveh R. Ghazi
H.J. Lu
Paolo Bonzini
Mark Mitchell
Michael Matz
Ian Lance Taylor
Ira Rosen
Dorit Nuzman
Mike Stump
Trevor Smigiel
Paul Brook
Nick Clifton
Ulrich Weigand
Eric Christopher
Janis Johnson
Steven Bosscher
Geoffrey Keating
Manuel López-Ibáñez
Uros Bizjak
Ben Elliston
Kazu Hirata
Alan Modra
Diego Novillo
Lee Millward
Eric Botcazou
Richard Henderson
Andreas Krebbel
Jan-Benedict Glaw
Alexandre Oliva
Sandra Loosemore
Roger Sayle