Commit Graph

180382 Commits

Author SHA1 Message Date
Patrick Palka
46fdced6a9 c++: constexpr evaluation and bare EMPTY_CLASS_EXPR [PR96575]
In the testcase below, folding of the initializer for 'ret' inside the
instantiated f<lambda>::lambda ends up yielding an initializer for which
potential_constant_expression returns false.  This causes finish_function
to mark the lambda as non-constexpr, which ultimately causes us to reject
'f(g)' as a call to a non-constexpr function.

The initializer for 'ret' inside f<lambda>::lambda, prior to folding, is
the CALL_EXPR

  <lambda(S)>::operator() (&cb, ({}, <<< Unknown tree: empty_class_expr >>>;))

where the second argument is a COMPOUND_EXPR whose second operand is an
EMPTY_CLASS_EXPR that was formed by build_class_a.  cp_fully_fold_init
is able to only partially fold this initializer: it gets rid of the
side-effectless COMPOUND_EXPR to obtain

  <lambda(S)>::operator() (&cb, <<< Unknown tree: empty_class_expr >>>)

as the final initializer for 'ret'.  This initializer no longer satifies
potential_constant_expression due to the bare EMPTY_CLASS_EXPR which is
not wrapped in a COMPOUND_EXPR.

(cp_fully_fold_init first tries maybe_constant_value on the original
CALL_EXPR, but constexpr evaluation punts upon seeing
__builtin_is_constant_evaluated, since manifestly_const_eval is false.)

To fix this, it seems we could either make cp_fold preserve the
COMPOUND_EXPR trees produced by build_call_a, or we could improve
the constexpr machinery to treat EMPTY_CLASS_EXPR trees as first-class
citizens.  Assuming it's safe to continue folding away these
COMPOUND_EXPRs, the second approach seems cleaner, so this patch
implements the second approach.

gcc/cp/ChangeLog:

	PR c++/96575
	* constexpr.c (cxx_eval_constant_expression)
	<case EMPTY_CLASS_EXPR>: Lower it to a CONSTRUCTOR.
	(potential_constant_expression_1) <case COMPOUND_EXPR>: Remove
	now-redundant handling of COMPOUND_EXPR with EMPTY_CLASS_EXPR
	second operand.
	<case EMPTY_CLASS_EXPR>: Return true instead of false.

gcc/testsuite/ChangeLog:

	PR c++/96575
	* g++.dg/cpp1z/constexpr-96575.C: New test.
2020-10-22 07:33:58 -04:00
Patrick Palka
b083a14dfe c++: Check DECL_TEMPLATE_PARM_P in duplicate_decls [PR97511]
This makes duplicate_decls differentiate a TYPE_DECL for an alias
template from a TYPE_DECL for one of its template parameters.  The
recently added assert in template_parm_to_arg revealed this latent issue
because merging of the two TYPE_DECLs cleared the DECL_TEMPLATE_PARM_P
flag.

With this patch, we now also correctly diagnose the name shadowing in
the below testcase (as required by [temp.local]/6).

gcc/cp/ChangeLog:

	PR c++/97511
	* decl.c (duplicate_decls): Return NULL_TREE if
	DECL_TEMPLATE_PARM_P differ.

gcc/testsuite/ChangeLog:

	PR c++/97511
	* g++.dg/template/shadow3.C: New test.
2020-10-22 07:27:55 -04:00
Alan Modra
03e93e1efe [RS6000] VSX_MM_SUFFIX
gcc.target/powerpc/vsx_mask-count-runnable.c and others
Assembler messages:
Error: unrecognized opcode: `vcntmb<VSX_MM_SUFFIX>'

	* config/rs6000/vsx.md (vec_cntmb_<mode>, vec_extract_<mode>),
	(vec_expand_<mode>): Replace <VSX_MM_SUFFIX> with <wd>.
2020-10-22 21:33:09 +10:30
Richard Biener
655f7f0fb7 Refactor vect_analyze_slp_instance a bit
In preparation for a larger change this refactors vect_analyze_slp_instance
so it doesn't need to know a vector type early.

2020-10-22  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (vect_analyze_slp_instance): Refactor so
	computing a vector type early is not needed, for store group
	splitting compute a new vector type based on the desired
	group size.
2020-10-22 12:59:33 +02:00
Richard Biener
b960a9c83a middle-end/97521 - fix VECTOR_CST expansion
This fixes expansion of VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs which
when using an integer mode are not always "mask-mode" but may
be using an integer mode when there's no supported vector mode.

The patch makes sure to only go the mask-mode expansion if
the elements do not line up to cover the full integer mode
(when they do and the mode was an actual mask-mode there's
no actual difference in both expansions).

2020-10-22  Richard Biener  <rguenther@suse.de>

	PR middle-end/97521
	* expr.c (expand_expr_real_1): Be more careful when
	expanding a VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs.

	* gcc.target/i386/pr97521.c: New testcase.
2020-10-22 12:59:33 +02:00
David Malcolm
e14c2bdce0 ipa-modref-tree.c: fix selftest leaks
"make selftest-valgrind" was reporting:

40 bytes in 1 blocks are definitely lost in loss record 25 of 735
   at 0x483AE7D: operator new(unsigned long) (vg_replace_malloc.c:344)
   by 0xFA0CEA: selftest::test_insert_search_collapse() (ipa-modref-tree.c:40)
   by 0xFA2F9B: selftest::ipa_modref_tree_c_tests() (ipa-modref-tree.c:164)
   by 0x256E3AB: selftest::run_tests() (selftest-run-tests.c:93)
   by 0x1366A8B: toplev::run_self_tests() (toplev.c:2385)
   by 0x1366C47: toplev::main(int, char**) (toplev.c:2467)
   by 0x263203F: main (main.c:39)

40 bytes in 1 blocks are definitely lost in loss record 26 of 735
   at 0x483AE7D: operator new(unsigned long) (vg_replace_malloc.c:344)
   by 0xFA264A: selftest::test_merge() (ipa-modref-tree.c:123)
   by 0xFA2FA0: selftest::ipa_modref_tree_c_tests() (ipa-modref-tree.c:165)
   by 0x256E3AB: selftest::run_tests() (selftest-run-tests.c:93)
   by 0x1366A8B: toplev::run_self_tests() (toplev.c:2385)
   by 0x1366C47: toplev::main(int, char**) (toplev.c:2467)
   by 0x263203F: main (main.c:39)

40 bytes in 1 blocks are definitely lost in loss record 27 of 735
   at 0x483AE7D: operator new(unsigned long) (vg_replace_malloc.c:344)
   by 0xFA279E: selftest::test_merge() (ipa-modref-tree.c:130)
   by 0xFA2FA0: selftest::ipa_modref_tree_c_tests() (ipa-modref-tree.c:165)
   by 0x256E3AB: selftest::run_tests() (selftest-run-tests.c:93)
   by 0x1366A8B: toplev::run_self_tests() (toplev.c:2385)
   by 0x1366C47: toplev::main(int, char**) (toplev.c:2467)
   by 0x263203F: main (main.c:39)

With this patch, the output is clean.

gcc/ChangeLog:
	* ipa-modref-tree.c (selftest::test_insert_search_collapse): Fix
	leak.
	(selftest::test_merge): Fix leaks.
2020-10-22 06:44:27 -04:00
Andreas Krebbel
f3cf5174b1 Fix PR97502
The S/390 backend does not define vec_cmp expanders so far. We relied
solely on expanding vcond.  With commit 502d63b6d various testcases
started to ICE now.

This patch just adds the missing expanders to prevent the ICE.
However, there are still a couple of performance-related testcase
regressions with the vcond lowering which have to be fixed
independently.

gcc/ChangeLog:

	PR target/97502
	* config/s390/vector.md ("vec_cmp<VI_HW:mode><VI_HW:mode>")
	("vec_cmpu<VI_HW:mode><VI_HW:mode>"): New expanders.

gcc/testsuite/ChangeLog:

	* gcc.dg/pr97502.c: New test.
2020-10-22 12:38:48 +02:00
Andreas Krebbel
e3f25eac67 Fix PR97439
decimal_real_maxval misses to set the sign flag in the REAL_VALUE_TYPE.

gcc/ChangeLog:

	PR rtl-optimization/97439
	* dfp.c (decimal_real_maxval): Set the sign flag in the
	generated number.

gcc/testsuite/ChangeLog:

	* gcc.dg/dfp/pr97439.c: New test.
2020-10-22 12:38:01 +02:00
David Malcolm
f7decfaebb analyzer: fix ICE when handling callback exceeds enode limit [PR97514]
gcc/analyzer/ChangeLog:
	PR analyzer/97514
	* engine.cc (exploded_graph::add_function_entry): Handle failure
	to create an enode, rather than asserting.

gcc/testsuite/ChangeLog:
	PR analyzer/97514
	* gcc.dg/analyzer/pr97514.c: New test.
2020-10-22 06:16:28 -04:00
David Malcolm
9ed7b339c9 analyzer: add some C++ test coverage
gcc/testsuite/ChangeLog:
	* g++.dg/analyzer/ctor-dtor-1.C: New test.
	* g++.dg/analyzer/dyncast-1.C: New test.
	* g++.dg/analyzer/vfunc-1.C: New test.
2020-10-22 06:15:08 -04:00
David Malcolm
b7f2cfbf0f analyzer: fix ICE on dtor [PR97489]
gcc/analyzer/ChangeLog:
	PR analyzer/97489
	* engine.cc (exploded_graph::add_function_entry): Assert that we
	have a function body.
	(exploded_graph::on_escaped_function): Reject fndecls that don't
	have a function body.

gcc/testsuite/ChangeLog:
	PR analyzer/97489
	* g++.dg/analyzer/pr97489.C: New test.
2020-10-22 06:12:31 -04:00
GCC Administrator
56ddd5e23a Daily bump. 2020-10-22 08:28:22 +00:00
Martin Liska
346b302d09 Implement no_stack_protector attribute.
gcc/ChangeLog:

2020-05-18  Martin Liska  <mliska@suse.cz>

	PR c/94722
	* cfgexpand.c (stack_protect_decl_phase):
	Guard with lookup_attribute("no_stack_protector") at
	various places.
	(expand_used_vars): Likewise here.
	* doc/extend.texi: Document no_stack_protector attribute.

gcc/ada/ChangeLog:

2020-05-18  Martin Liska  <mliska@suse.cz>

	PR c/94722
	* gcc-interface/utils.c (handle_no_stack_protect_attribute):
	New.
	(handle_stack_protect_attribute): Add error message for a
	no_stack_protector function.

gcc/c-family/ChangeLog:

2020-05-18  Martin Liska  <mliska@suse.cz>

	PR c/94722
	* c-attribs.c (handle_no_stack_protect_function_attribute): New.
	(handle_stack_protect_attribute): Add error message for a
	no_stack_protector function.

gcc/testsuite/ChangeLog:

2020-05-18  Martin Liska  <mliska@suse.cz>

	PR c/94722
	* g++.dg/no-stack-protector-attr-2.C: New test.
	* g++.dg/no-stack-protector-attr-3.C: New test.
	* g++.dg/no-stack-protector-attr.C: New test.
2020-10-22 10:10:50 +02:00
Martin Liska
5a99796b85 Come up with stack_protector enum.
gcc/ChangeLog:

2020-05-15  Martin Liska  <mliska@suse.cz>

	* cfgexpand.c: Move the enum to ...
	* coretypes.h (enum stack_protector): ... here.
	* function.c (assign_parm_adjust_stack_rtl): Use the stack_protector
	enum.

gcc/c-family/ChangeLog:

2020-05-15  Martin Liska  <mliska@suse.cz>

	* c-cppbuiltin.c (c_cpp_builtins): Use the stack_protector enum.
2020-10-22 10:06:06 +02:00
Kito Cheng
df7f0a3a21 RISC-V: Extend syntax for the multilib-generator
- Support expansion operator (*) in the multilib config string.

 - Motivation of this patch is reduce the complexity when we deal multilib with
   sub-extension, expand the combinations by hand would be very painful and
   error prone, no one deserve to experience this[1] again!

[1] f4d7facafb/Makefile (L348)

gcc/ChangeLog:

	* config/riscv/multilib-generator: Add TODO, import itertools
	and functools.reduce.
	Handle expantion operator.
	(LONG_EXT_PREFIXES): New.
	(arch_canonicalize): Update comment and improve python3
	debuggability/compatibility.
	(add_underline_prefix): New.
	(_expand_combination): Ditto.
	(unique): Ditto.
	(expand_combination): Ditto.
2020-10-22 16:02:44 +08:00
Jakub Jelinek
ef2d3ec325 phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE fallout [PR97503]
> this broke sparc-sun-solaris2.11 bootstrap
>
> /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c: In function 'bool cond_removal_in_popcount_clz_ctz_pattern(basic_block, basic_block, edge, edge, gimple*, tree, tree)':
> /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c:1858:27: error: variable 'mode' set but not used [-Werror=unused-but-set-variable]
>  1858 |           scalar_int_mode mode = SCALAR_INT_TYPE_MODE (TREE_TYPE (arg));
>       |                           ^~~~
>
>
> and doubtlessly several other targets that use the defaults.h definition of
>
> #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  0

Ugh, seems many of those macros do not evaluate the first argument.
This got broken by the change to direct_internal_fn_supported_p, previously
it used mode also in the optab test.

2020-10-22  Jakub Jelinek  <jakub@redhat.com>

	* tree-ssa-phiopt.c (cond_removal_in_popcount_clz_ctz_pattern):
	For CLZ and CTZ tests, use type temporary instead of mode.
2020-10-22 09:36:25 +02:00
Jakub Jelinek
17c5b7e1dc openmp: Add test for OMP_TARGET_OFFLOAD=mandatory for cases where it must not fail
2020-10-22  Jakub Jelinek  <jakub@redhat.com>

	* testsuite/libgomp.c/target-41.c: New test.
2020-10-22 09:36:18 +02:00
Jakub Jelinek
552ed3ea76 x86: Allow configuring with --with-arch_64=x86-64-v[234]
> +  {"x86-64", PROCESSOR_K8, CPU_K8, PTA_X86_64_BASELINE, 0, P_NONE},
> +  {"x86-64-v2", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V2 | PTA_NO_TUNE,
> +   0, P_NONE},
> +  {"x86-64-v3", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V3 | PTA_NO_TUNE,
> +   0, P_NONE},
> +  {"x86-64-v4", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V4 | PTA_NO_TUNE,
> +   0, P_NONE},
>    {"eden-x2", PROCESSOR_K8, CPU_K8,
>      PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR,
>      0, P_NONE},

I have noticed that one can't configure gcc to default to these.

I've also found various other 32-bit or 64-bit -march= arguments for which
it wasn't possible to configure gcc to default to those.

The x86-64-v* the patch only allows in --with-arch_64=, because otherwise
it fails build miserably - as
./xgcc -B ./ -S -march=x86-64-v2 -m32 test.c
cc1: error: ‘x86-64-v2’ architecture level is only defined for the x86-64 psABI
when building 32-bit multilibs.  Even if multilibs are disallowed, I think
the compiler still supports -m32 and so --with-arch_64= seems to be the only
option in which we can support that.

2020-10-22  Jakub Jelinek  <jakub@redhat.com>

	* config.gcc (x86_archs): Add samuel-2, nehemiah, c7 and esther.
	(x86_64_archs): Add eden-x2, nano, nano-1000, nano-2000, nano-3000,
	nano-x2, eden-x4, nano-x4, x86-64-v2, x86-64-v3 and x86-64-v4.
	(i[34567]86-*-* | x86_64-*-*): Only allow x86-64-v* as argument
	to --with-arch_64=.
2020-10-22 09:32:08 +02:00
Jakub Jelinek
74c9882b80 openmp: Change omp_get_initial_device () to match OpenMP 5.1 requirements
> Therefore, I think until omp_get_initial_device () value is changed, we

The following so far untested patch implements that change.

OpenMP 4.5 said for omp_get_initial_device:
The value of the device number is implementation defined. If it is between 0 and one less than
omp_get_num_devices() then it is valid for use with all device constructs and routines; if it is
outside that range, then it is only valid for use with the device memory routines and not in the
device clause.
and OpenMP 5.0 similarly, but OpenMP 5.1 says:
The value of the device number is the value returned by the omp_get_num_devices routine.

As the new value is compatible with what has been required earlier, I think
we can change it already now.

2020-10-22  Jakub Jelinek  <jakub@redhat.com>

	* icv.c (omp_get_initial_device): Remove including corresponding
	ialias.
	* icv-device.c (omp_get_initial_device): New function.  Return
	gomp_get_num_devices ().  Add ialias.
	* target.c (resolve_device): Don't fail with
	OMP_TARGET_OFFLOAD=mandatory if device_id is equal to
	gomp_get_num_devices ().
	(omp_target_alloc, omp_target_free, omp_target_is_present,
	omp_target_memcpy, omp_target_memcpy_rect, omp_target_associate_ptr,
	omp_target_disassociate_ptr, omp_pause_resource): Use
	gomp_get_num_devices () instead of GOMP_DEVICE_HOST_FALLBACK on the
	first use in the functions, in uses dominated by the
	gomp_get_num_devices call use num_devices_openmp instead.
	* libgomp.texi (omp_get_initial_device): Document.
	* config/gcn/icv-device.c (omp_get_initial_device): New function.
	Add ialias.
	* config/nvptx/icv-device.c (omp_get_initial_device): Likewise.
	* testsuite/libgomp.c/target-40.c: New test.
2020-10-22 09:31:01 +02:00
Alexandre Oliva
d3acf7a026 Use Aux_Long_Float for all real types on LynxOS
Its libc does not offer *f or *l elementary functions, so rely on the
C double ones only.

for  gcc/ada/ChangeLog

	* Makefile.rtl (LIBGNAT_TARGET_PAIRS) <lynxos178>: Rely on
	Aux_Long_Float for all real types.
2020-10-22 02:32:13 -03:00
Alexandre Oliva
c0baff9be3 vxworks float EFs not precise enough -> use long float
Some acats-4 tests that check the precision of Float elementary
functions fail with vxworks 7.2's implementations of single-precision
math functions.

This patch arranges for us to bypass the single-precision functions,
and use the Aux_Long_Float implementation, based on the double-typed
calls from the C library, for Float and Short_Float.


for  gcc/ada/ChangeLog

	* Makefile.rtl (LIBGNAT_TARGET_PAIRS): Use Long Float-based
	variant of Aux_Short_Float and Aux_Float on vxworks targets.
	* libgnat/a-nashfl__wraplf.ads: New.
	* libgnat/a-nuaufl__wraplf.ads: New.
2020-10-22 02:32:10 -03:00
Rainer Orth
9f4e1d10eb Use Aux_Long_Long_Float wraplf for sparc*-sun-solaris too
Like aarch64-* and ppc*-linux-gnu, sparc*-sun-solaris has
Long_Long_Float mapped to double rather than long double, so the
intrinsics in the default version of a-nallfl.ads have mismatching
types.  Adopt the wraplf workaround for it as well.


for  gcc/ada/ChangeLog

	* Makefile.rtl (LIBGNAT_TARGET_PAIRS) <sparc*-sun-solaris>:
	Use wraplf version of a-nallfl.
2020-10-22 02:32:06 -03:00
Alexandre Oliva
f72d7f7c2c aarch64-* and ppc*-linux-gnu long long float/long double mismatch
Some platforms have failed to build because long long float is mapped
to double rather than long double, and then the attempts to import
intrinsics for long double in Aux_Long_Long_Float raise warnings
turned into errors.

This patch is a work around for the mismatch, arranging for
Aux_Long_Long_Float to map to Aux_Long_Float.

for  gcc/ada/ChangeLog

	* Makefile.rtl (LIBGNAT_TARGET_PAIRS): Use
	a-nallfl__wraplf.ads on aarch64-* and ppc*-linux-gnu targets.
	* libgnat/a-nallfl__wraplf.ads: New.
2020-10-22 02:32:04 -03:00
Nikhil Benesch
439407aa2c syscall: only compile ptrace varargs shim on Linux
Only compile the __go_ptrace varargs shim on Linux to avoid compilation
failures on some other platforms. The C ptrace function is not entirely
portable (e.g., NetBSD has `int data` instead of `void* data`), and so
far Linux is the only platform that needs the varargs shim.

Additionally, make the types in the ptrace and raw_ptrace function
declarations match. This makes it more clear that the only difference
between the two is that calls via the former are allowed to block while
calls via the latter are not.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/263517
2020-10-21 22:29:04 -07:00
Jan Hubicka
d5d9706f95 Free stale summaries in ipa-pure-const
* ipa-pure-const.c (funct_state_summary_t::insert): Free stale
	summaries.
2020-10-22 06:34:48 +02:00
Jan Hubicka
89576d863a Move nested function info out of cgraph_node
this patch moves nested function information out of symbol table (to a summary).
This saves memory (especially at WPA time) and also makes nested function
support more contained.

gcc/ChangeLog:

2020-10-22  Jan Hubicka  <hubicka@ucw.cz>

	* cgraph.c: Include tree-nested.h
	(cgraph_node::create): Call maybe_record_nested_function.
	(cgraph_node::remove): Do not remove function from nested function
	infos.
	(cgraph_node::dump): Update.
	(cgraph_node::unnest): Move to tree-nested.c
	(cgraph_node::verify_node): Update.
	(cgraph_c_finalize): Call nested_function_info::release.
	* cgraph.h (struct symtab_node): Remove nested function info.
	* cgraphclones.c (cgraph_node::create_clone): Do not clone nested
	function info.
	* cgraphunit.c (cgraph_node::analyze): Update.
	(cgraph_node::expand): Do not worry about nested functions; they are
	lowered.
	(symbol_table::finalize_compilation_unit): Call
	nested_function_info::release.
	* gimplify.c: Include tree-nested.h
	(unshare_body): Update.
	(unvisit_body): Update.
	* omp-offload.c (omp_discover_implicit_declare_target): Update.
	* tree-nested.c: Include alloc-pool.h, tree-nested.h, symbol-summary.h
	(nested_function_sum): New static variable.
	(nested_function_info::get): New member function.
	(nested_function_info::get_create): New member function.
	(unnest_function): New function.
	(nested_function_info::~nested_function_info): New member function.
	(nested_function_info::release): New function.
	(maybe_record_nested_function): New function.
	(lookup_element_for_decl): Update.
	(check_for_nested_with_variably_modified): Update.
	(create_nesting_tree): Update.
	(unnest_nesting_tree_1): Update.
	(gimplify_all_functions): Update.
	(lower_nested_functions): Update.
	* tree-nested.h (class nested_function_info): New class.
	(maybe_record_nested_function): Declare.
	(unnest_function): Declare.
	(first_nested_function): New inline function.
	(next_nested_function): New inline function.
	(nested_function_origin): New inline function.

gcc/ada/ChangeLog:

2020-10-22  Jan Hubicka  <hubicka@ucw.cz>

	* gcc-interface/trans.c: Include tree-nested.h
	(walk_nesting_tree): Update for new nested function info.

gcc/c-family/ChangeLog:

2020-10-22  Jan Hubicka  <hubicka@ucw.cz>

	* c-gimplify.c: Include tree-nested.h
	(c_genericize): Update for new nested function info.

gcc/d/ChangeLog:

2020-10-22  Jan Hubicka  <hubicka@ucw.cz>

	* decl.cc: Include tree-nested.h
	(get_symbol_decl): Update for new nested function info.
2020-10-22 06:33:34 +02:00
liuhongt
52e7f09698 Simplify vec_select of a subreg of X to just a vec_select of X.
gcc/ChangeLog
	PR rtl-optimization/97249
	* simplify-rtx.c (simplify_binary_operation_1): Simplify
	vec_select of a subreg of X to a vec_select of X.

gcc/testsuite/ChangeLog

	* gcc.target/i386/pr97249-1.c: New test.
2020-10-22 11:37:11 +08:00
liuhongt
7026bb9504 Refactor implementation of *_bcst{_1,_2,_3} patterns.
Add new predicate bcst_mem_operand and corresponding constraint "Br"
to merge "$(pattern)_bcst{_1,_2,_3}" into "$(pattern)", also delete
those separate "*_bcst{_1,_2,_3}" patterns.

gcc/ChangeLog:

	PR target/87767
	* config/i386/constraints.md ("Br"): New special memory
	constraint.
	* config/i386/i386-expand.c (ix86_binary_operator_ok): Both
	source operand cannot be in memory or bcst_memory_operand.
	* config/i386/i386.c (ix86_print_operand): Print bcst_mem_operand.
	* config/i386/i386.h (VALID_BCST_MODE_P): New.
	* config/i386/predicates.md (bcst_mem_operand): New predicate
	for AVX512 embedding broadcast memory operand.
	(bcst_vector_operand): New predicate, vector_operand or
	bcst_mem_operand.
	* config/i386/sse.md
	(*<plusminus_insn><mode>3<mask_name><round_name>): Extend
	predicate and constraints to handle bcst_mem_operand.
	(*mul<mode>3<mask_name><round_name>): Ditto.
	(<sse>_div<mode>3<mask_name><round_name>): Ditto.
	(<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
	Ditto.
	(<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
	Ditto.
	(<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
	Ditto.
	(<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
	Ditto.
	(*<plusminus_insn><mode>3): Ditto.
	(avx512dq_mul<mode>3<mask_name>): Ditto.
	(*<sse4_1_avx2>_mul<mode>3<mask_name>): Ditto.
	(*andnot<mode>3): Ditto.
	(<mask_codefor><code><mode>3<mask_name>): Ditto.
	(*sub<mode>3<mask_name>_bcst): Removed.
	(*add<mode>3<mask_name>_bcst): Ditto.
	(*mul<mode>3<mask_name>_bcst): Ditto.
	(*<avx512>_div<mode>3<mask_name>_bcst): Ditto.
	(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1):
	Ditto.
	(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2):
	Ditto.
	(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3):
	Ditto.
	(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1):
	Ditto.
	(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_2):
	Ditto.
	(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_3):
	Ditto.
	(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1):
	Ditto.
	(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_2):
	Ditto.
	(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_3):
	Ditto.
	(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1):
	Ditto.
	(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_2):
	Ditto.
	(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_3):
	Ditto.
	(*sub<mode>3_bcst): Ditto.
	(*add<mode>3_bcst): Ditto.
	(*avx512dq_mul<mode>3<mask_name>_bcst): Ditto.
	(*avx512f_mul<mode>3<mask_name>_bcst): Ditto.
	(*andnot<mode>3_bcst): Ditto.
	(*<code><mode>3_bcst): Ditto.
	* config/i386/subst.md (bcst_round_constraint): New subst
	attribute.
	(bcst_round_nimm_predicate): Ditto.
	(bcst_mask_prefix3): Ditto.
	(bcst_mask_prefix4): Ditto.
2020-10-22 10:29:04 +08:00
liuhongt
4de7b01003 Extend special_memory_constraint.
For operand with special_memory_constraint, there could be a wrapper
for memory_operand. Extract mem for operand for conditional judgement
like MEM_P, also for record_address_regs.

gcc/ChangeLog:

	PR target/87767
	* ira-costs.c (record_operand_costs): Extract memory operand
	from recog_data.operand[i] for record_address_regs.
	(record_reg_classes): Extract memory operand from OP for
	conditional judgement MEM_P.
	* ira.c (ira_setup_alts): Ditto.
	* lra-constraints.c (extract_mem_from_operand): New function.
	(satisfies_memory_constraint_p): Extract memory operand from
	OP for decompose_mem_address, return false when there's no
	memory operand inside OP.
	(process_alt_operands): Remove MEM_P (op) since it would be
	judged in satisfies_memory_constraint_p.
	* recog.c (asm_operand_ok): Extract memory operand from OP for
	judgement of memory_operand (OP, VOIDmode).
	(constrain_operands): Don't unwrapper unary operator when
	there's memory operand inside.
	* rtl.h (extract_mem_from_operand): New decl.
2020-10-22 10:28:56 +08:00
Dennis Zhang
76835dca95 arm: Auto-vectorization for MVE: vmin/vmax
This patch enables MVE vmin/vmax instructions for auto-vectorization.
MVE target is included in expander smin<mode>3, umin<mode>3, smax<mode>3
and umax<mode>3 for vectorization. Related insns for vmin/vmax in mve.md
are modified to use smin, umin, smax and umax expressions instead of
unspec to support the expanders.

gcc/ChangeLog:

2020-10-22  Dennis Zhang  <dennis.zhang@arm.com>

	* config/arm/mve.md (mve_vmaxq_<supf><mode>): Replace with ...
	(mve_vmaxq_s<mode>, mve_vmaxq_u<mode>): ... these new insns to
	use smax/umax instead of VMAXQ.
	(mve_vminq_<supf><mode>): Replace with ...
	(mve_vminq_s<mode>, mve_vminq_u<mode>): ... these new insns to
	use smin/umin instead of VMINQ.
	(mve_vmaxnmq_f<mode>): Use smax instead of VMAXNMQ_F.
	(mve_vminnmq_f<mode>): Use smin instead of VMINNMQ_F.
	* config/arm/vec-common.md (smin<mode>3): Use the new mode macros
	ARM_HAVE_<MODE>_ARITH.
	(umin<mode>3, smax<mode>3, umax<mode>3): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/simd/mve-vminmax_1.c: New test.
2020-10-22 01:27:31 +01:00
Andrew MacLeod
966fdb2e12 Handle a_2= &b properly in range calculations.
when processing assignments, we were using the type of b instead of type
of &b when computing a range.  This was usually filtered out by FRE.
turning it off exposed it.

	gcc/
	PR tree-optimization/97520
	* gimple-range.cc (range_of_non_trivial_assignment): Handle x = &a
	by returning a non-zero range.
	gcc/testsuite/
	* gcc.dg/pr97520.c: New.
2020-10-21 20:15:28 -04:00
Dennis Zhang
0f41b5e02f arm: Auto-vectorization for MVE: vmul
This patch enables MVE vmul instructions for auto-vectorization.
It includes MVE in expander mul<mode>3 to enable vectorization for MVE.
Related MVE vmul insns are modified to support the expander by using
expression 'mult' instead of unspec.
The mul<mode>3 for vectorization in vec-common.md uses mode iterator
VDQWH instead of VALLW to cover all supported modes.
The macros ARM_HAVE_NEON_<MODE>_ARITH are used to select supported
modes for different targets.
The redundant mul<mode>3 in neon.md is removed.

gcc/ChangeLog:

2020-10-22  Dennis Zhang  <dennis.zhang@arm.com>

	* config/arm/mve.md (mve_vmulq<mode>): New entry for vmul instruction
	using expression 'mult'.
	(mve_vmulq_f<mode>): Use mult instead of VMULQ_F.
	* config/arm/neon.md (mul<mode>3): Removed.
	* config/arm/vec-common.md (mul<mode>3): Use the new mode macros
	ARM_HAVE_<MODE>_ARITH. Use mode iterator VDQWH instead of VALLW.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/simd/mve-vmul_1.c: New test.
2020-10-22 01:09:33 +01:00
Andrew MacLeod
ca5f4666f7 Check for undefined before not returning a constant value
Don't return UNDEFINED for a range in an unreachable block if the global
value evaluates to a constant.  Return that constant instead.

	PR tree-optimization/97515
	* value-query.cc (range_query::value_of_expr): If the result is
	UNDEFINED, check to see if the global value is a constant.
	(range_query::value_on_edge): Ditto.
2020-10-21 20:02:22 -04:00
Nikhil Benesch
2ab1fc7a32 syscall: import upstream code for BSD sockets and sysctls
Import some missing upstream code for BSD sockets and sysctls and
adapt it for gccgo.

Updates golang/go#38538.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/261137
2020-10-21 16:57:59 -07:00
Jan Hubicka
3fd5876793 Strenghten bound for bulitin_constant_p hint.
this patch makes builtin_constant_p hint to combine with other loop hints
we already support.

gcc/ChangeLog:

2020-10-22  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/97445
	* ipa-inline.c (inline_insns_single): Add hint2 parameter.
	(inline_insns_auto): Add hint2 parameter.
	(can_inline_edge_by_limits_p): Update.
	(want_inline_small_function_p): Update.
	(wrapper_heuristics_may_apply): Update.
2020-10-22 01:42:11 +02:00
David Edelsohn
083c17f86d testsuite: Enable p9-lxvx-stxvx testcases and fold-vec-extract
This patch enables the p9-lxvx-stxvx testcases with appropriate
requirements.  It also adjusts the expected matching instructions
in the fold-vec-extract testcases for BE.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/fold-vec-extract-float.p9.c: rldicl and
	subfic only for target LE.
	* gcc.target/powerpc/fold-vec-extract-longlong.p9.c: xori only
	for target LE.  Adjust mfvsrd and add mfvsrld for BE.
	* gcc.target/powerpc/fold-vec-extract-short.p9.c: vextuhrx for LE.
	vextuhlx for BE.
	* gcc.target/powerpc/p9-lxvx-stxvx-1.c: Remove target.
	* gcc.target/powerpc/p9-lxvx-stxvx-2.c: Remove target.
	* gcc.target/powerpc/p9-lxvx-stxvx-3.c: Remove target. Require
	float128
2020-10-21 16:17:43 -04:00
Jonathan Wakely
945151b7f1 libstdc++: Simplify std::shared_ptr construction from std::weak_ptr
The _M_add_ref_lock() and _M_add_ref_lock_nothrow() members of
_Sp_counted_base are very similar, except that the former throws an
exception when the use count is zero and the latter returns false. The
former (and its callers) can be implemented in terms of the latter.
This results in a small reduction in code size, because throwing an
exception now only happens in one place.

libstdc++-v3/ChangeLog:

	* include/bits/shared_ptr.h (shared_ptr(const weak_ptr&, nothrow_t)):
	Add noexcept.
	* include/bits/shared_ptr_base.h (_Sp_counted_base::_M_add_ref_lock):
	Remove specializations and just call _M_add_ref_lock_nothrow.
	(__shared_count, __shared_ptr): Use nullptr for null pointer
	constants.
	(__shared_count(const __weak_count&)): Use _M_add_ref_lock_nothrow
	instead of _M_add_ref_lock.
	(__shared_count(const __weak_count&, nothrow_t)): Add noexcept.
	(__shared_ptr::operator bool()): Add noexcept.
	(__shared_ptr(const __weak_ptr&, nothrow_t)): Add noexcept.
2020-10-21 21:13:41 +01:00
Richard Biener
84cc3370d6 rs6000: MMA type causes an ICE in ranger pass due to incompatible types
PR97360 shows a problem in how we create our PXI and POI modes that cause
an ICE in the ranger pass.  The problem seems to be that the extra call
to build_distinct_type_copy() also creates new TYPE_{MIN,MAX}_VALUEs that
are not compatible/the same as the base type itself.  The simple "fix" is
to actually remove the unneeded build_distinct_type_copy(), since according
to richi, the types returned from make_unsigned_type() are already distinct.

gcc/

2020-10-21  Richard Biener  <rguenther@suse.de>

	PR target/97360
	* config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove call to
	build_distinct_type_copy().

gcc/testsuite/

2020-10-21  Martin Liska  <mliska@suse.cz>

	PR target/97360
	* gcc.target/powerpc/pr97360.c: New test.

Co-authored-by: Andrew MacLeod <amacleod@redhat.com>
Co-authored-by: Martin Liska <mliska@suse.cz>
2020-10-21 14:29:43 -05:00
Jan Hubicka
caaa218f91 Inline functions with builtin_constant_p more agressively.
This patch implements heuristics that increases inline limits (by the hints
mechanism) for inline functions that use builtin_constant_p on parameter. Those
are very likely intended to be always inlined and simplify after inlining.

The PR is about a function that we used to inline with
 --param inline-insns-single=200 but with new default of 70 for -O2 we no longer
do so.  Hints are currently configured to bump the bound up twice, so we
get limit of 140 that is still not enough to inline the particular testcase
but it should help in general.  I can implement a stronger bump if that seems
useful (maybe it is). The example is bit operation written as a decision chain
with 64 conditions.
This blows up the limit on number of conditions we track per funtion (which is
30) and thus the size/time estimates are not working that well.

gcc/ChangeLog:

	PR ipa/97445
	* ipa-fnsummary.c (ipa_dump_hints): Add INLINE_HINT_builtin_constant_p.
	(ipa_fn_summary::~ipa_fn_summary): Free builtin_constant_p_parms.
	(ipa_fn_summary_t::duplicate): Duplicate builtin_constant_p_parms.
	(ipa_dump_fn_summary): Dump builtin_constant_p_parms.
	(add_builtin_constant_p_parm): New function
	(set_cond_stmt_execution_predicate): Update builtin_constant_p_parms.
	(ipa_call_context::estimate_size_and_time): Set
	INLINE_HINT_builtin_constant_p..
	(ipa_merge_fn_summary_after_inlining): Merge builtin_constant_p_parms.
	(inline_read_section): Read builtin_constant_p_parms.
	(ipa_fn_summary_write): Write builtin_constant_p_parms.
	* ipa-fnsummary.h (enum ipa_hints_vals): Add
	INLINE_HINT_builtin_constant_p.
	* ipa-inline.c (want_inline_small_function_p): Use
	INLINE_HINT_builtin_constant_p.
	(edge_badness): Use INLINE_HINT_builtin_constant_p.

gcc/testsuite/ChangeLog:

	PR ipa/97445
	* gcc.dg/ipa/inlinehint-5.c: New test.
2020-10-21 20:00:22 +02:00
Douglas Rupp
6bd2f2d080 Remove interfering default #undefs from vx-common.h
undef'ing LIB_SPEC and especially LINK_SPEC here is unneccesary and
inteferes with the definition of LINK_SPEC for the bi-arch'd ppc*-vx7r2
target which uses the linux64 LINK_SPEC

2020-10-21  Douglas Rupp  <rupp@adacore.com>

gcc/
	* config/vx-common.h (LINK_SPEC, LIB_SPEC): Remove #undef.
2020-10-21 16:26:38 +00:00
Douglas Rupp
1786798090 Introduce vxworks7r2 support for ppc and ppc64
This change introduces support for the most recent versions
of VxWorks on PowerPC targets, for both 32 and 64 bit thanks
to a bi-arch setup.

The system compilers are essentially configured as Linux
toolchains with only a few specificities and we replicate
that model here.

The most visible specificities are the use of secureplt by
default, the pre-definition of some macros that the system
headers still rely on (_VX_CPU and _VX_CPU_FAMILY, for example),
and of course some variations related to the so VxWorks typical
kernel vs RTP mode distinction.

In addition to the introduction of config.gcc and libgcc
configuration chunks, much inspired by the linux ones, the
change

- Reworks rs6000/vxworks.h file to feature bits common to the
  Vx6 and Vx7 port then a separate section for each, where the
  Vx7 part is very short as we rely on the Linux definitions
  for most things.

- Adjusts the CPU macro predefinitions in CPP_SPEC to resort
  to "_VX_CPU" instead of "CPU" for Vx7, to better match the
  more recent system headers expectations,

- Adds a cpu definition case for e6500.

- Changes to the use SUB3TARGET_OVERRIDE_OPTIONS instead of
  SUBSUBTARGET_OVERRIDE_OPTIONS for specifics, so we don't
  override the Linux's version of the latter for vx7.

2020-10-20  Douglas Rupp  <rupp@adacore.com>

gcc/
	* config.gcc (powerpc*-wrs-vxworks7r*): New case.
	* config/rs6000/vxworks.h: Rework to handle VxWorks7.
	Refactor as common bits + vx6 vs vx7 ones. For the
	latter, rely essentially on the Linux configuration
	and adjust CPU to _VX_CPU in CPP_SPEC. Add a case
	for e6500. Use SUB3TARGET_OVERRIDE_OPTIONS for specifics
	to preserve the Linux SUBSUBTARGET_OVERRIDE_OPTIONS
	for vx7.

libgcc/
	* config.host (powerpc*-wrs-vxworks7*): New case.
	* configure.ac: Handle powerpc*-*-vxworks7* as
	powerpc*-*-linux* for ppc-fp_type.
	* configure: Regenerate.

Co-authored-by: Olivier Hainque <hainque@adacore.com>
2020-10-21 16:26:37 +00:00
David Edelsohn
c8f795cac6 testsuite: enable and fix swaps-p8 testcases
This patch enables swaps-p8 and a few other testcases on non-powerpc64le
systems.  It also cleans up the target requirements for various testcases.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/p9-extract-1.c: Require lp64.
	* gcc.target/powerpc/p9-extract-2.c: Require lp64.
	* gcc.target/powerpc/p9-extract-3.c: Require lp64.
	* gcc.target/powerpc/p9-permute.c: Remove target.
	* gcc.target/powerpc/pr63335.c: Remove target.
	* gcc.target/powerpc/pr87507.c: Remove target.
	* gcc.target/powerpc/swaps-p8-1.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-10.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-11.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-12.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-13.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-14.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-15.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-16.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-17.c: Require P8.
	* gcc.target/powerpc/swaps-p8-18.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-19.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-2.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-20.c: Remove target.
	* gcc.target/powerpc/swaps-p8-21.c: Remove target. Require Altivec.
	* gcc.target/powerpc/swaps-p8-22.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-23.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-24.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-25.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-26.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-27.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-28.c: Remove target.
	* gcc.target/powerpc/swaps-p8-29.c: Remove target.
	* gcc.target/powerpc/swaps-p8-3.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-30.c: Remove target.
	* gcc.target/powerpc/swaps-p8-31.c: Remove target.
	* gcc.target/powerpc/swaps-p8-32.c: Remove target.
	* gcc.target/powerpc/swaps-p8-33.c: Remove target.
	* gcc.target/powerpc/swaps-p8-34.c: Remove target.
	* gcc.target/powerpc/swaps-p8-35.c: Remove target.
	* gcc.target/powerpc/swaps-p8-36.c: Remove target.
	* gcc.target/powerpc/swaps-p8-37.c: Remove target.
	* gcc.target/powerpc/swaps-p8-38.c: Remove target.
	* gcc.target/powerpc/swaps-p8-39.c: Remove target.
	* gcc.target/powerpc/swaps-p8-4.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-40.c: Remove target.
	* gcc.target/powerpc/swaps-p8-41.c: Remove target.
	* gcc.target/powerpc/swaps-p8-42.c: Remove target.
	* gcc.target/powerpc/swaps-p8-43.c: Remove target.
	* gcc.target/powerpc/swaps-p8-44.c: Remove target.
	* gcc.target/powerpc/swaps-p8-45.c: Remove target.
	* gcc.target/powerpc/swaps-p8-46.c: Require LE.
	* gcc.target/powerpc/swaps-p8-5.c: Require LE and P8.
	* gcc.target/powerpc/swaps-p8-6.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-7.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-8.c: Remove target. Require P8.
	* gcc.target/powerpc/swaps-p8-9.c: Remove target. Require P8.
	* gcc.target/powerpc/vec-cmp.c: Require LP64.
	* gcc.target/powerpc/vec-cmpne.c: Remove target.
	* gcc.target/powerpc/vec-mul.c: Remove target.
	* gcc.target/powerpc/vec-set-char.c: Require LP64.
	* gcc.target/powerpc/vec-set-int.c: Require LP64.
	* gcc.target/powerpc/vec-set-short.c: Require LP64.
	* gcc.target/powerpc/vec-xxpermdi.c: Remove target. Require VSX.
	* gcc.target/powerpc/vsxcopy.c: Remove target. Require VSX.
2020-10-21 11:23:44 -04:00
Jonathan Wakely
a186ab670e libstdc++: Make structured bindings always work for subranges [PR 97512]
The definition of ranges::subrange was moved to the new
<bits/ranges_util.h> header so that it could be used in <algorithm>
without including the whole of <ranges>. However, the tuple-like support
that enables subrange to be used with structured bindings was left in
<ranges>. This is arguably conforming (to use a subrange you should
include <ranges>) but it's inconvenient and probably confusing.

This change makes the tuple-like support available whenever subrange
itself is available.

libstdc++-v3/ChangeLog:

	PR libstdc++/97512
	* include/bits/ranges_util.h (tuple_size<subrange>)
	(tuple_element<I, cv subrange>): Move here from ...
	* include/std/ranges: ... here.
	* testsuite/std/ranges/subrange/97512.cc: New test.
2020-10-21 14:40:54 +01:00
Thomas Rodgers
e957b86ca2 libstdc++: Rebase include/pstl to current upstream
From llvm-project/pstl @ 0b2e0e80d96

libstdc++-v3/ChangeLog:

	* include/pstl/algorithm_impl.h: Update file.
	* include/pstl/execution_impl.h: Likewise.
	* include/pstl/glue_algorithm_impl.h: Likewise.
	* include/pstl/glue_memory_impl.h: Likewise.
	* include/pstl/glue_numeric_impl.h: Likewise.
	* include/pstl/memory_impl.h: Likewise.
	* include/pstl/numeric_impl.h: Likewise.
	* include/pstl/parallel_backend.h: Likewise.
	* include/pstl/parallel_backend_serial.h: Likewise.
	* include/pstl/parallel_backend_tbb.h: Likewise.
	* include/pstl/parallel_backend_utils.h: Likewise.
	* include/pstl/pstl_config.h: Likewise.
	* include/pstl/unseq_backend_simd.h: Likewise.
2020-10-21 06:11:28 -07:00
Tobias Burnus
310fe80bab Fortran: class.c - update vtable comment
gcc/fortran/
	PR fortran/45516
	* class.c: Add _deallocate to the vtable documentation
	comment.
2020-10-21 14:38:44 +02:00
Richard Biener
d940930138 tree-optimization/97500 - avoid SLP backedges for inductions
Inductions are not vectorized as cycle but materialized from SCEV data.
Filling in backedge SLP nodes confuses this process.

2020-10-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/97500
	* tree-vect-slp.c (vect_analyze_slp_backedges): Do not
	fill backedges for inductions.

	* gfortran.dg/pr97500.f90: New testcase.
2020-10-21 11:43:06 +02:00
liuhongt
9b5d50b7c6 Simplify trivial VEC_COND_EXPR in expander.
gcc/ChangeLog:

	PR target/97506
	* config/i386/i386-expand.c (ix86_expand_sse_movcc): Move
	op_true to dest directly when op_true equals op_false.

gcc/testsuite/ChangeLog:

	PR target/97506
	* gcc.target/i386/pr97506.c: New test.
2020-10-21 17:33:53 +08:00
Jakub Jelinek
5244b4af5e phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]
While we have at the RTL level noce_try_ifelse_collapse combined with
simplify_cond_clz_ctz, that optimization doesn't always trigger because
e.g. on powerpc there is an define_insn to compare a reg against zero and
copy that register to another one and so we end up with a different pseudo
in the simplify_cond_clz_ctz test and punt.

For targets that define C?Z_DEFINED_VALUE_AT_ZERO to 2 for certain modes,
we can optimize it already in phiopt though, just need to ensure that
we transform the __builtin_c?z* calls into .C?Z ifns because my recent
VRP changes codified that the builtin calls are always undefined at zero,
while ifns honor C?Z_DEFINED_VALUE_AT_ZERO equal to 2.
And, in phiopt we already have popcount handling that does pretty much the
same thing, except for always using a zero value rather than the one set
by C?Z_DEFINED_VALUE_AT_ZERO.

So, this patch extends that function to handle not just popcount, but also
clz and ctz.

2020-10-21  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/97503
	* tree-ssa-phiopt.c: Include internal-fn.h.
	(cond_removal_in_popcount_pattern): Rename to ...
	(cond_removal_in_popcount_clz_ctz_pattern): ... this.  Handle not just
	popcount, but also clz and ctz if it has C?Z_DEFINED_VALUE_AT_ZERO 2.

	* gcc.dg/tree-ssa/pr97503.c: New test.
2020-10-21 10:54:47 +02:00
Richard Biener
028a407463 Simplify CFG copying tables
This simplifies the maps between original and new basic blocks and
loops as used for CFG copying.  Instead of using a pointer hash
table to allocated mapping entries use a hash_map with int_hash,
removing the indirection and code duplication.  We can use -1 and
-2 as empty/deleted values as those are not valid basic-block
indices or loop numbers.

2020-10-21  Richard Biener  <rguenther@suse.de>

	* cfg.c (htab_bb_copy_original_entry): Remove.
	(bb_copy_hasher): Likewise.
	(bb_original, bb_copy, loop_copy): Use
	hash_map<int_hash<int, -1, -2>, int>.
	(original_copy_bb_pool): Remove.
	(initialize_original_copy_tables): Adjust.
	(reset_original_copy_tables): Likewise.
	(free_original_copy_tables): Likewise.
	(original_copy_tables_initialized_p): Likewise.
	(copy_original_table_clear): Simplify.
	(copy_original_table_set): Likewise.
	(get_bb_original): Likewise.
	(get_bb_copy): Likewise.
	(get_loop_copy): Likewise.
2020-10-21 10:45:08 +02:00
Richard Biener
4fa5dc951e Separate new_edges compute in copy_bbs
This separates out a loop finding new_edges from edges in copy_bbs,
making its complexity cheaper overall from total number of succs in
copied bbs times num_edges to num_edges times the complexity of
find_edge.

2020-10-21  Richard Biener  <rguenther@suse.de>

	* cfghooks.c (copy_bbs): Split out loop computing new_edges.
2020-10-21 10:45:08 +02:00