Commit Graph

14 Commits

Author SHA1 Message Date
Marcus Comstedt f1af1326d2 RISC-V: Update soft-fp config for big-endian
libgcc/
	* config/riscv/sfp-machine.h (__BYTE_ORDER): Set according
	to __BYTE_ORDER__.
2021-03-23 17:31:13 +08:00
Jakub Jelinek 99dee82307 Update copyright years. 2021-01-04 10:26:59 +01:00
Maciej W. Rozycki 090d3f5ab3 RISC-V/libgcc: Use `-fasynchronous-unwind-tables' for LIB2_DIVMOD_FUNCS
Use `-fasynchronous-unwind-tables' rather than `-fexceptions
-fnon-call-exceptions' in LIB2_DIVMOD_FUNCS compilation flags so as to
provide unwind tables for the affected functions while not pulling the
unwinder proper, which is not required here.

Beyond saving program space it fixes a RISC-V glibc build error due to
unsatisfied `malloc' and `free' references from the unwinder causing
link errors with `ld.so' where libgcc has been built at -O0.

	libgcc/
	* config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New
	variable.
2020-09-29 01:20:01 +01:00
Maciej W. Rozycki 9fa4023c7a RISC-V/libgcc: Reduce the size of RV64 millicode by 6 bytes
Rewrite code sequences throughout the 64-bit RISC-V `__riscv_save_*'
routines replacing `li t1, -48', `li t1, -64', and `li t1, -80',
instructions, which do not have a compressed encoding, respectively with
`li t1, 3', `li t1, 4', and `li t1, 4', which do, and then adjusting the
remaining code accordingly observing that `sub sp, sp, t1' takes the
same amount of space as an `slli t1, t1, 4'/`add sp, sp, t1' instruction
pair does, again due to the use of compressed encodings, saving 6 bytes
total.

This change does increase code size by 4 bytes for RISC-V processors
lacking the compressed instruction set, however their users couldn't
care about the code size or they would have chosen an implementation
that does have the compressed instructions, wouldn't they?

	libgcc/
	* config/riscv/save-restore.S [__riscv_xlen == 64]
	(__riscv_save_10, __riscv_save_8, __riscv_save_6, __riscv_save_4)
	(__riscv_save_2): Replace negative immediates used for the final
	stack pointer adjustment with positive ones, right-shifted by 4.
2020-07-31 23:52:20 +01:00
Jim Wilson 4013baf99c RISC-V: Make __divdi3 handle div by zero same as hardware.
The ISA manual specifies that divide by zero always returns -1 as the result.
We were failing to do that when the dividend was negative.

Original patch from Virginie Moser.

	libgcc/
	* config/riscv/div.S (__divdi3): For negative arguments, change bgez
	to bgtz.
2020-06-02 11:44:44 -07:00
Jakub Jelinek 8d9254fc8a Update copyright years.
From-SVN: r279813
2020-01-01 12:51:42 +01:00
Jim Wilson 8dc56a2244 RISC-V: Build soft-float divide routines for -mno-fdiv.
Using -mno-fdiv gives linker errors unless we build the missing divide
routines in libgcc always.  There is at least one university project
designing RISC-V parts without FP divide that wants to use the option.

	libgcc/
	* config/riscv/t-softfp32 (softfp_extra): Add FP divide routines

From-SVN: r277723
2019-11-01 13:35:12 -07:00
Jakub Jelinek a554497024 Update copyright years.
From-SVN: r267494
2019-01-01 13:31:55 +01:00
Kito Cheng 09baee1ab1 RISC-V: Add RV32E support.
Kito Cheng <kito.cheng@gmail.com>
	Monk Chiang  <sh.chiang04@gmail.com>

	gcc/
	* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
	Add support to parse rv32e*.  Clear MASK_RVE for rv32i and rv64i.
	* config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e.
	* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
	__riscv_32e when TARGET_RVE.  Handle ABI_ILP32E as soft-float ABI.
	* config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E.
	* config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE,
	compute save_libcall_adjustment properly.
	(riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E.
	(riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E.
	* config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E.
	(STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE.
	(GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise.
	(ABI_SPEC): Handle mabi=ilp32e.
	* config/riscv/riscv.opt (abi_type): Add ABI_ILP32E.
	(RVE): Add RVE mask.
	* doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info.
	<-march>: Add rv32e as an example.

	gcc/testsuite/
	* gcc.dg/stack-usage-1.c: Add support for rv32e.

	libgcc/
	* config/riscv/save-restore.S: Add support for rv32e.

Co-Authored-By: Jim Wilson <jimw@sifive.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r260384
2018-05-18 15:53:55 -07:00
Jakub Jelinek 85ec4feb11 Update copyright years.
From-SVN: r256169
2018-01-03 11:03:58 +01:00
Kito Cheng b8d7e076ed Use C version of multi3 for RVE support.
libgcc/
	* config/riscv/t-elf: Use multi3.c instead of multi3.S.
	* config/riscv/multi3.c: New file.
	* config/riscv/multi3.S: Remove.

From-SVN: r255598
2017-12-12 22:25:06 -08:00
Jim Wilson 3a4c600f38 Add .type and .size directives to riscv libgcc functions.
libgcc/
	* config/riscv/div.S: Use FUNC_* macros.
	* config/riscv/muldi3.S, config/riscv/multi3.S: Likewise
	* config/riscv/save-restore.S: Likewise.
	* config/riscv/riscv-asm.h: New.

From-SVN: r255521
2017-12-08 19:00:57 -08:00
Joseph Myers 883312dc79 Use ucontext_t not struct ucontext in linux-unwind.h files.
Current glibc no longer gives the ucontext_t type the tag struct
ucontext, to conform with POSIX namespace rules.  This requires
various linux-unwind.h files in libgcc, that were previously using
struct ucontext, to be fixed to use ucontext_t instead.  This is
similar to the removal of the struct siginfo tag from siginfo_t some
years ago.

This patch changes those files to use ucontext_t instead.  As the
standard name that should be unconditionally safe, so this is not
restricted to architectures supported by glibc, or conditioned on the
glibc version.

Tested compilation together with current glibc with glibc's
build-many-glibcs.py.

	* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state),
	config/alpha/linux-unwind.h (alpha_fallback_frame_state),
	config/bfin/linux-unwind.h (bfin_fallback_frame_state),
	config/i386/linux-unwind.h (x86_64_fallback_frame_state,
	x86_fallback_frame_state), config/m68k/linux-unwind.h (struct
	uw_ucontext), config/nios2/linux-unwind.h (struct nios2_ucontext),
	config/pa/linux-unwind.h (pa32_fallback_frame_state),
	config/riscv/linux-unwind.h (riscv_fallback_frame_state),
	config/sh/linux-unwind.h (sh_fallback_frame_state),
	config/tilepro/linux-unwind.h (tile_fallback_frame_state),
	config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Use
	ucontext_t instead of struct ucontext.

From-SVN: r249731
2017-06-28 10:21:16 +01:00
Palmer Dabbelt 0bd99911ee RISC-V Port: libgcc
libgcc/ChangeLog:

2017-02-06  Palmer Dabbelt <palmer@dabbelt.com>

        * config.host: Add RISC-V tuples.
        * config/riscv/atomic.c: New file.
        * config/riscv/crti.S: Likewise.
        * config/riscv/crtn.S: Likewise.
        * config/riscv/div.S: Likewise.
        * config/riscv/linux-unwind.h: Likewise.
        * config/riscv/muldi3.S: Likewise.
        * config/riscv/multi3.S: Likewise.
        * config/riscv/save-restore.S: Likewise.
        * config/riscv/sfp-machine.h: Likewise.
        * config/riscv/t-elf: Likewise.
        * config/riscv/t-elf32: Likewise.
        * config/riscv/t-elf64: Likewise.
        * config/riscv/t-softfp32: Likewise.
        * config/riscv/t-softfp64: Likewise.

From-SVN: r245226
2017-02-06 21:38:51 +00:00