Commit Graph

1315 Commits

Author SHA1 Message Date
Maciej W. Rozycki 090d3f5ab3 RISC-V/libgcc: Use `-fasynchronous-unwind-tables' for LIB2_DIVMOD_FUNCS
Use `-fasynchronous-unwind-tables' rather than `-fexceptions
-fnon-call-exceptions' in LIB2_DIVMOD_FUNCS compilation flags so as to
provide unwind tables for the affected functions while not pulling the
unwinder proper, which is not required here.

Beyond saving program space it fixes a RISC-V glibc build error due to
unsatisfied `malloc' and `free' references from the unwinder causing
link errors with `ld.so' where libgcc has been built at -O0.

	libgcc/
	* config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New
	variable.
2020-09-29 01:20:01 +01:00
GCC Administrator e84761c6f3 Daily bump. 2020-09-29 00:16:30 +00:00
Richard Sandiford 1923f615f7 aarch64: Add HF routines to libgcc_s.so
The libgcc HF support routines were being linked into libgcc_s.so,
but weren't being exported.

libgcc/
	* config/aarch64/libgcc-softfp.ver: New file.
	* config/aarch64/t-softfp (SHLIB_MAPFILES): Add it.
2020-09-28 11:26:53 +01:00
GCC Administrator 4383c595ce Daily bump. 2020-09-28 00:16:21 +00:00
Clément Chigot 3c11f25fb8 aix: Use $(AR) without -X32_64 to build FAT libraries.
AIX FAT libraries should be built with the version of AR chosen by configure.
The GNU Make $(AR) variable includes the AIX -X32_64 option needed
by the default Makefile rules to accept both 32 bit and 64 bit object files.
The -X32_64 option conflicts with ar archiving objects of the same name
used to build FAT libraries.

This patch changes the Makefile fragments for AIX FAT libraries to use $(AR),
but strips the -X32_64 option from the Make variable.

libgcc/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64.

libatomic/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/t-aix: Use $(AR) without -X32_64.

libgomp/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/t-aix: Use $(AR) without -X32_64.

libstdc++-v3/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/os/aix/t-aix: Use $(AR) without -X32_64.

libgfortran/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/t-aix: Use $(AR) without -X32_64.
2020-09-27 12:43:29 -04:00
GCC Administrator 521d271140 Daily bump. 2020-09-23 00:16:27 +00:00
Sergei Trofimovich 4ecf368f4b gcov: fix TOPN streaming from shared libraries
Before the change gcc did not stream correctly TOPN counters
if counters belonged to a non-local shared object.

As a result zero-section optimization generated TOPN sections
in a form not recognizable by '__gcov_merge_topn'.

The problem happens because in a case of multiple shared objects
'__gcov_merge_topn' function is present in address space multiple
times (once per each object).

The fix is to never rely on function address and predicate on TOPN
counter types.

libgcc/ChangeLog:

	PR gcov-profile/96913
	* libgcov-driver.c (write_one_data): Avoid function pointer
	comparison in TOP streaming decision.
2020-09-22 11:41:04 +01:00
GCC Administrator 2aad20c094 Daily bump. 2020-09-18 00:16:24 +00:00
Christophe Lyon 9fcedcc391 libgcc/config/arm/fp16.c: Make _internal functions static inline
This patch makes the *_internal functions 'static inline' to avoid these warnings during the build:
/libgcc/config/arm/fp16.c:169:1: warning: no previous prototype for '__gnu_h2f_internal' [-Wmissing-prototypes]
/libgcc/config/arm/fp16.c:194:1: warning: no previous prototype for '__gnu_f2h_ieee' [-Wmissing-prototypes]
/libgcc/config/arm/fp16.c:200:1: warning: no previous prototype for '__gnu_h2f_ieee' [-Wmissing-prototypes]
/libgcc/config/arm/fp16.c:206:1: warning: no previous prototype for '__gnu_f2h_alternative' [-Wmissing-prototypes]
/libgcc/config/arm/fp16.c:212:1: warning: no previous prototype for '__gnu_h2f_alternative' [-Wmissing-prototypes]
/libgcc/config/arm/fp16.c:218:1: warning: no previous prototype for '__gnu_d2h_ieee' [-Wmissing-prototypes]
/libgcc/config/arm/fp16.c:224:1: warning: no previous prototype for '__gnu_d2h_alternative' [-Wmissing-prototypes]

2020-09-11  Torbjörn SVENSSON  <torbjorn.svensson@st.com>
	    Christophe Lyon  <christophe.lyon@linaro.org>

	libgcc/
	* config/arm/fp16.c (__gnu_h2f_internal): Add 'static inline'
	qualifier.
	(__gnu_f2h_ieee, __gnu_h2f_ieee, __gnu_f2h_alternative)
	(__gnu_h2f_alternative,__gnu_d2h_ieee, __gnu_d2h_alternative): Add
	missing prototypes.
2020-09-17 12:23:36 +00:00
Wei Wentao ec7ef30421 aarch64: Fixed unused variable warning in aarch64-unwind.h
libgcc/
	* config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr): Fix
	unused variable warning.
2020-09-17 10:40:23 +01:00
GCC Administrator ecde1b0a46 Daily bump. 2020-09-17 00:16:31 +00:00
Jojo R 03380ecc38 C-SKY: Enable crtbegin/crtend.o of libgcc for elf target
libgcc/ChangeLog:

	* config.host (C-SKY): Enable crtbegin/crtend.o of libgcc for elf target.
2020-09-16 19:34:02 +08:00
GCC Administrator 80f86e78ac Daily bump. 2020-09-10 00:16:28 +00:00
Tom de Vries 7b9c26519e [nvptx, libgcc] Fix Wbuiltin-declaration-mismatch in atomic.c
When building for target nvptx, we get this and similar warnings for libgcc:
...
src/libgcc/config/nvptx/atomic.c:39:1: warning: conflicting types for \
  built-in function ‘__sync_val_compare_and_swap_1’; expected \
  ‘unsigned char(volatile void *, unsigned char,  unsigned char)’ \
  [-Wbuiltin-declaration-mismatch]
...

Fix this by making sure in atomic.c that the pointers used are of type
'volatile void *'.

Tested by rebuilding atomic.c.

libgcc/ChangeLog:

	* config/nvptx/atomic.c (__SYNC_SUBWORD_COMPARE_AND_SWAP): Fix
	Wbuiltin-declaration-mismatch.
2020-09-09 19:22:07 +02:00
GCC Administrator 57ea089421 Daily bump. 2020-08-27 00:16:27 +00:00
Jozef Lawrynowicz 703e049aa7 MSP430: Simplify and extend shift instruction patterns
The implementation of define_expand and define_insn patterns to handle
shifts in the MSP430 backend is inconsistent, resulting in missed
opportunities to make best use of the architecture's features.

There's now a single define_expand used as the entry point for all valid
shifts, and the decision to either use a helper function to perform the
shift (often required for the 430 ISA), or fall through to the
define_insn patterns can be made from that expander function.

Shifts by a constant amount have been grouped into one define_insn for
each type of shift, instead of having different define_insn patterns for
shifts by different amounts.

A new target option "-mmax-inline-shift=" has been added to allow tuning
of the number of shift instructions to emit inline, instead of using
a library helper function.

gcc/ChangeLog:

	* config/msp430/constraints.md (K): Change unused constraint to
	constraint to a const_int between 1 and 19.
	(P): New constraint.
	* config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove.
	(msp430_expand_shift): New.
	(msp430_output_asm_shift_insns): New.
	* config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs.
	(CSH): Remove.
	(msp430_expand_helper): Remove hard-coded generation of some inline
	shift insns.
	(use_helper_for_const_shift): New.
	(msp430_expand_shift): New.
	(msp430_output_asm_shift_insns): New.
	(msp430_print_operand): Add new 'W' operand selector.
	(msp430x_logical_shift_right): Remove.
	* config/msp430/msp430.md (HPSI): New define_mode_iterator.
	(HDI): Likewise.
	(any_shift): New define_code_iterator.
	(shift_insn): New define_code_attr.
	Adjust unnamed insn patterns searched for by combine.
	(ashlhi3): Remove.
	(slli_1): Remove.
	(430x_shift_left): Remove.
	(slll_1): Remove.
	(slll_2): Remove.
	(ashlsi3): Remove.
	(ashldi3): Remove.
	(ashrhi3): Remove.
	(srai_1): Remove.
	(430x_arithmetic_shift_right): Remove.
	(srap_1): Remove.
	(srap_2): Remove.
	(sral_1): Remove.
	(sral_2): Remove.
	(ashrsi3): Remove.
	(ashrdi3): Remove.
	(lshrhi3): Remove.
	(srli_1): Remove.
	(430x_logical_shift_right): Remove.
	(srlp_1): Remove.
	(srll_1): Remove.
	(srll_2x): Remove.
	(lshrsi3): Remove.
	(lshrdi3): Remove.
	(<shift_insn><mode>3): New define_expand.
	(<shift_insn>hi3_430): New define_insn.
	(<shift_insn>si3_const): Likewise.
	(ashl<mode>3_430x): Likewise.
	(ashr<mode>3_430x): Likewise.
	(lshr<mode>3_430x): Likewise.
	(*bitbranch<mode>4_z): Replace renamed predicate msp430_bitpos with
	const_0_to_15_operand.
	* config/msp430/msp430.opt: New option -mmax-inline-shift=.
	* config/msp430/predicates.md (const_1_to_8_operand): New predicate.
	(const_0_to_15_operand): Rename msp430_bitpos predicate.
	(const_1_to_19_operand): New predicate.
	* doc/invoke.texi: Document -mmax-inline-shift=.

libgcc/ChangeLog:

	* config/msp430/slli.S (__gnu_mspabi_sllp): New.
	* config/msp430/srai.S (__gnu_mspabi_srap): New.
	* config/msp430/srli.S (__gnu_mspabi_srlp): New.

gcc/testsuite/ChangeLog:

	* gcc.target/msp430/emulate-srli.c: Fix expected assembler text.
	* gcc.target/msp430/max-inline-shift-430-no-opt.c: New test.
	* gcc.target/msp430/max-inline-shift-430.c: New test.
	* gcc.target/msp430/max-inline-shift-430x.c: New test.
2020-08-26 20:50:58 +01:00
GCC Administrator b3cb56060b Daily bump. 2020-08-14 00:16:24 +00:00
Kwok Cheung Yeung 17dc08edc2 nvptx: Add support for subword compare-and-swap
This adds support for __sync_val_compare_and_swap and
__sync_bool_compare_and_swap for 1-byte and 2-byte long
values, which are not natively supported on nvptx.

Build and reg-tested on nvptx.
Build and reg-tested libgomp on x86_64 with nvptx accelerator.

2020-07-16  Kwok Cheung Yeung  <kcy@codesourcery.com>

	libgcc/
	* config/nvptx/atomic.c: New.
	* config/nvptx/t-nvptx (LIB2ADD): Add atomic.c.

	gcc/testsuite/
	* gcc.target/nvptx/ia64-sync-5.c: New.

	libgomp/
	* testsuite/libgomp.c-c++-common/reduction-16.c: New.
2020-08-13 11:11:55 +02:00
GCC Administrator 6a1ad710ad Daily bump. 2020-08-04 00:16:24 +00:00
Ian Lance Taylor 2b6a53238f libgcc: increase required stack space for x86_64 -fsplit-stack
This accomodates increased space required by use of the xsavec
instruction in the dynamic linker trampoline.

libgcc/ChangeLog:

	* config/i386/morestack.S (BACKOFF) [x86_64]: Add 2048 bytes.
2020-08-03 16:01:59 -07:00
Jakub Jelinek 90b43856fd aarch64: Fix up __aarch64_cas16_acq_rel fallback
As mentioned in the PR, the fallback path when LSE is unavailable writes
incorrect registers to the memory if the previous content compares equal
to x0, x1 - it writes copy of x0, x1 from the start of function, but it
should write x2, x3.

2020-08-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/96402
	* config/aarch64/lse.S (__aarch64_cas16_acq_rel): Use x2, x3 instead
	of x(tmp0), x(tmp1) in STXP arguments.

	* gcc.target/aarch64/pr96402.c: New test.
2020-08-03 22:55:28 +02:00
GCC Administrator 48cc2e468c Daily bump. 2020-08-01 00:16:25 +00:00
Maciej W. Rozycki 9fa4023c7a RISC-V/libgcc: Reduce the size of RV64 millicode by 6 bytes
Rewrite code sequences throughout the 64-bit RISC-V `__riscv_save_*'
routines replacing `li t1, -48', `li t1, -64', and `li t1, -80',
instructions, which do not have a compressed encoding, respectively with
`li t1, 3', `li t1, 4', and `li t1, 4', which do, and then adjusting the
remaining code accordingly observing that `sub sp, sp, t1' takes the
same amount of space as an `slli t1, t1, 4'/`add sp, sp, t1' instruction
pair does, again due to the use of compressed encodings, saving 6 bytes
total.

This change does increase code size by 4 bytes for RISC-V processors
lacking the compressed instruction set, however their users couldn't
care about the code size or they would have chosen an implementation
that does have the compressed instructions, wouldn't they?

	libgcc/
	* config/riscv/save-restore.S [__riscv_xlen == 64]
	(__riscv_save_10, __riscv_save_8, __riscv_save_6, __riscv_save_4)
	(__riscv_save_2): Replace negative immediates used for the final
	stack pointer adjustment with positive ones, right-shifted by 4.
2020-07-31 23:52:20 +01:00
Martin Liska bc2b1a232b libgcov: support overloaded malloc
gcc/ChangeLog:

	* gcov-io.h (GCOV_PREALLOCATED_KVP): New.

libgcc/ChangeLog:

	* libgcov-driver.c: Add __gcov_kvp_pool
	and __gcov_kvp_pool_index variables.
	* libgcov.h (allocate_gcov_kvp): New.
	(gcov_topn_add_value): Use it.

gcc/testsuite/ChangeLog:

	* gcc.dg/tree-prof/indir-call-prof-malloc.c: New test.
2020-07-31 10:57:50 +02:00
GCC Administrator 53256ee3d5 Daily bump. 2020-07-25 00:16:22 +00:00
Szabolcs Nagy edfb3a30a6 aarch64: add PAC GNU property note to libgcc lse.S
This note is not used anywhere currently but it is supposed to mark
objects if the return address is protected with PAC on the stack.
Since lse.S only has leaf functions the return address is never
saved on the stack so we can add the note.

The note is only added if pac-ret is enabled because it can cause
problems with old linkers and we don't have checks for that. This
can be changed later to be unconditional, for now it is consistent
with how gcc generates the notes.

libgcc/ChangeLog:

	* config/aarch64/lse.S: Add PAC property note.
2020-07-24 11:44:43 +01:00
GCC Administrator 9bb403dca6 Daily bump. 2020-07-24 00:16:20 +00:00
Martin Liska 24c35a5ef3
gcov: create folders with 0777.
libgcc/ChangeLog:

	PR gcov-profile/96035
	* libgcov-driver-system.c: Create gcov folders with 0777
	so that it respects a system umask.
2020-07-23 12:20:40 +02:00
GCC Administrator 8ca07a3072 Daily bump. 2020-07-15 00:16:35 +00:00
David Edelsohn 4f97bed9a7 aix: FAT libraries: test native compiler mode directly
The FAT libraries config fragments need to know which library is native
and which is a multilib to choose the correct multilib from which to
append the additional object file or shared object file.  Testing the
top-level archive is fragile because it will fail if rebuilding.  This
patch tests the compiler preprocessing macros for the 64 bit AIX specific
__64BIT__ to determine the native mode of the compiler in MULTILIBTOP.

2020-07-14  David Edelsohn  <dje.gcc@gmail.com>

libatomic/ChangeLog

	* config/t-aix: Set BITS from compiler cpp macro.

libgcc/ChangeLog

	* config/rs6000/t-slibgcc-aix: Set BITS from compiler cpp macro.

libgfortran/ChangeLog

	* config/t-aix: Set BITS from compiler cpp macro.

libgomp/ChangeLog

	* config/t-aix: Set BITS from compiler cpp macro.

libstdc++-v3/ChangeLog

	* config/os/aix/t-aix: Set BITS from compiler cpp macro.
2020-07-14 10:41:40 -04:00
GCC Administrator ea69fcf9a0 Daily bump. 2020-07-14 00:16:30 +00:00
Szabolcs Nagy b097c7a27f libgcc: fix the handling of return address mangling [PR94891]
Mangling, currently only used on AArch64 for return address signing,
is an internal representation that should not be exposed via

  __builtin_return_address return value,
  __builtin_eh_return handler argument,
  _Unwind_DebugHook handler argument.

Note that a mangled address might not even fit into a void *, e.g.
with AArch64 ilp32 ABI the return address is stored as 64bit, so
the mangled return address cannot be accessed via _Unwind_GetPtr.

This patch changes the unwinder hooks as follows:

MD_POST_EXTRACT_ROOT_ADDR is removed: root address comes from
__builtin_return_address which is not mangled.

MD_POST_EXTRACT_FRAME_ADDR is renamed to MD_DEMANGLE_RETURN_ADDR,
it now operates on _Unwind_Word instead of void *, so the hook
should work when return address signing is enabled on AArch64 ilp32.
(But for that __builtin_aarch64_autia1716 should be fixed to operate
on 64bit input instead of a void *.)

MD_POST_FROB_EH_HANDLER_ADDR is removed: it is the responsibility of
__builtin_eh_return to do the mangling if necessary.

2020-07-13  Szabolcs Nagy  <szabolcs.nagy@arm.com>

libgcc/ChangeLog:

	PR target/94891
	* config/aarch64/aarch64-unwind.h (MD_POST_EXTRACT_ROOT_ADDR): Remove.
	(MD_POST_FROB_EH_HANDLER_ADDR): Remove.
	(MD_POST_EXTRACT_FRAME_ADDR): Rename to ...
	(MD_DEMANGLE_RETURN_ADDR): This.
	(aarch64_post_extract_frame_addr): Rename to ...
	(aarch64_demangle_return_addr): This.
	(aarch64_post_frob_eh_handler_addr): Remove.
	* unwind-dw2.c (uw_update_context): Demangle return address.
	(uw_frob_return_addr): Remove.
2020-07-13 13:49:20 +01:00
GCC Administrator 3f8ca9cb86 Daily bump. 2020-07-10 00:16:28 +00:00
Szabolcs Nagy f0f62fa032 aarch64: Fix BTI support in libgcc [PR96001]
lse.S did not have the GNU property note markup and the BTI c
instructions that are necessary when it is built with branch
protection.

The notes are only added when libgcc is built with branch
protection, because old linkers mishandle the note (merge
them incorrectly or emit warnings), the BTI instructions
are added unconditionally.

Note: BTI c is only necessary at function entry if the function
may be called indirectly, currently lse functions are not called
indirectly, but BTI is added for ABI reasons e.g. to allow
linkers later to emit stub code with indirect jump.

2020-07-09  Szabolcs Nagy  <szabolcs.nagy@arm.com>

libgcc/ChangeLog:

	PR target/96001
	* config/aarch64/lse.S: Add BTI marking and related definitions,
	and add BTI c to function entries.
2020-07-09 09:50:25 +01:00
Szabolcs Nagy e73ec75548 aarch64: Fix noexecstack note in libgcc
lse.S did not have GNU stack note, this may cause missing
PT_GNU_STACK in binaries on Linux and FreeBSD.

2020-07-09  Szabolcs Nagy  <szabolcs.nagy@arm.com>

libgcc/ChangeLog:

	* config/aarch64/lse.S: Add stack note.
2020-07-09 09:50:25 +01:00
GCC Administrator b5f2473963 Daily bump. 2020-07-03 00:16:25 +00:00
Martin Liska ece21ff6ea
Do not stream all zeros for gcda files.
gcc/ChangeLog:

	PR gcov-profile/95348
	* coverage.c (read_counts_file): Read only COUNTERS that are
	not all-zero.
	* gcov-dump.c (tag_function): Change signature from unsigned to
	signed integer.
	(tag_blocks): Likewise.
	(tag_arcs): Likewise.
	(tag_lines): Likewise.
	(tag_counters): Likewise.
	(tag_summary): Likewise.
	* gcov.c (read_count_file): Read all non-zero counters
	sensitively.

libgcc/ChangeLog:

	PR gcov-profile/95348
	* libgcov-driver.c (merge_one_data): Merge only profiles
	that are not of non-zero type.
	(write_one_data): Write counters only if there's one non-zero
	value.
	* libgcov-util.c (tag_function): Change signature from unsigned
	to int.
	(tag_blocks): Likewise.
	(tag_arcs): Likewise.
	(tag_counters): Likewise.
	(tag_summary): Likewise.
	(tag_lines): Read only if COUNTERS is non-zero.
	(read_gcda_file): Handle negative length for COUNTERS type.
2020-07-02 10:16:02 +02:00
GCC Administrator d61ffe1244 Daily bump. 2020-06-26 00:16:23 +00:00
Martin Liska 88891c5ff0
gcov-tool: fix merge operation for summary
libgcc/ChangeLog:

	* libgcov-driver.c (merge_summary): Remove function as its name
	is misleading and doing something different.
	(dump_one_gcov): Add ATTRIBUTE_UNUSED for 2 args. Take read summary
	in gcov-tool.
	* libgcov-util.c (curr_object_summary): Remove.
	(read_gcda_file): Remove unused curr_object_summary.
	(gcov_merge): Merge summaries.
	* libgcov.h: Add summary argument for gcov_info struct.
2020-06-25 11:27:12 +02:00
GCC Administrator 2e546c261b Daily bump. 2020-06-25 00:16:30 +00:00
David Edelsohn acba4660b4 Fix typo in ChangeLog 2020-06-24 10:10:56 -04:00
H.J. Lu 1890f2f0e2 x86: Move cpuinfo.h from libgcc to common/config/i386
Both x86 backend and libgcc define enum processor_features.  libgcc sets
enum processor_feature and x86 backend checks enum processor_feature.
They are very easy out of sync and it has happened multiple times in the
past.

1. Move cpuinfo.h from libgcc to common/config/i386 so that we can share
the same enum processor_features in x86 backend and libgcc.
2. Change __cpu_features2 to an array to support more processor features.
3. Add more processor features to enum processor_features.

gcc/

	PR target/95259
	* common/config/i386/cpuinfo.h: New file.
	(__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
	(__processor_model2): New.
	(CHECK___builtin_cpu_is): New.  Defined as empty if not defined.
	(has_cpu_feature): New function.
	(set_cpu_feature): Likewise.
	(get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c.  Use
	CHECK___builtin_cpu_is.  Return AMD CPU name.
	(get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c.  Use
	Use CHECK___builtin_cpu_is.  Return Intel CPU name.
	(get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
	Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
	FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
	FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
	FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
	FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
	FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
	FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
	FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
	FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
	FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
	FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
	FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
	FEATURE_XSAVEOPT and FEATURE_XSAVES
	(cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
	Also update cpu_model2.
	* common/config/i386/i386-cpuinfo.h (processor_vendor): Add
	Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
	(processor_features): Moved from gcc/config/i386/i386-builtins.c.
	Renamed F_XXX to FEATURE_XXX.  Add FEATURE_3DNOW, FEATURE_3DNOWP,
	FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
	FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
	FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
	FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
	FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
	FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
	FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
	FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
	FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
	FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
	FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
	FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
	FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
	(SIZE_OF_CPU_FEATURES): New.
	* config/i386/i386-builtins.c (processor_features): Removed.
	(isa_names_table): Replace F_XXX with FEATURE_XXX.
	(fold_builtin_cpu): Change __cpu_features2 to an array.

libgcc/

	PR target/95259
	* config/i386/cpuinfo.c: Don't include "cpuinfo.h".  Include
	"common/config/i386/i386-cpuinfo.h" and
	"common/config/i386/cpuinfo.h".
	(__cpu_features2): Changed to array.
	(get_amd_cpu): Removed.
	(get_intel_cpu): Likewise.
	(get_available_features): Likewise.
	(__cpu_indicator_init): Call cpu_indicator_init.
	* config/i386/cpuinfo.h: Removed.
2020-06-24 05:47:34 -07:00
GCC Administrator 4543acc874 Daily bump. 2020-06-24 00:16:31 +00:00
David Edelsohn 17964eb3a0 build: Change conditional include and empty.mk to -include in Makefiles
GNU Make supports "-include" keyword to prevent warnings and errors due to
inclusion of non-existent files.  This patch changes gcc/ and libgcc/ to use
"-include" in place of the historical conditional inclusion and use of
empty.mk work-arounds.

gcc/ChangeLog

2020-06-23  David Edelsohn  <dje.gcc@gmail.com>

	* Makefile.in (LANG_MAKEFRAGS): Same.
	(tmake_file): Use -include.
	(xmake_file): Same.

libgcc/ChangeLog

2020-06-23  David Edelsohn  <dje.gcc@gmail.com>

	* Makefile.in: Remove uses of empty.mk. Use -include.
	* config/avr/t-avr: Use -include.
	* empty.mk: Delete.

libgcc/config/avr/libf7/ChangeLog

2020-06-23  David Edelsohn  <dje.gcc@gmail.com>

	* t-libf7: Same.
2020-06-23 17:28:09 +00:00
GCC Administrator f86e11a267 Daily bump. 2020-06-22 00:16:23 +00:00
David Edelsohn 47ddb895df aix: Add GCC64 configuration and FAT target libraries.
This patch adds the ability to configure GCC on AIX to build as a
64 bit application and to build target libraries "FAT" libraries in both
32 bit and 64 bit mode.

The patch adds makefile fragment hooks to target libraries that allows
them to include target-specific rules.  The target specific rules for
AIX place both 32 bit and 64 bit objects and shared objects
in archives at the top-level, not multilib subdirectories.  The
multilibs are built in subdirectories, but must be combined during the
last parts of the target library build process.  Because of the way
that GCC bootstrap works, the libraries must be combined during the
multiple stages of GCC bootstrap, not solely when installed in the
final destination, so the libraries are correct at the end of
each target library build stage, not solely an install recipe.

gcc/ChangeLog

2020-06-21  David Edelsohn  <dje.gcc@gmail.com>

	* config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
	* config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
	(ASM_SPEC32): New.
	(ASM_SPEC64): New.
	(ASM_CPU_SPEC): Remove vsx and altivec options.
	(CPP_SPEC_COMMON): Rename from CPP_SPEC.
	(CPP_SPEC32): New.
	(CPP_SPEC64): New.
	(CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
	(TARGET_DEFAULT): Only define if not BIARCH.
	(LIB_SPEC_COMMON): Rename from LIB_SPEC.
	(LIB_SPEC32): New.
	(LIB_SPEC64): New.
	(LINK_SPEC_COMMON): Rename from LINK_SPEC.
	(LINK_SPEC32): New.
	(LINK_SPEC64): New.
	(STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
	(ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
	(CPP_SPEC): Same.
	(CPLUSPLUS_CPP_SPEC): Same.
	(LIB_SPEC): Same.
	(LINK_SPEC): Same.
	(SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
	* config/rs6000/defaultaix64.h: New file.
	* config/rs6000/t-aix64: New file.

libgcc/ChangeLog

2020-06-21  David Edelsohn  <dje.gcc@gmail.com>

	* config.host (extra_parts): Add crtcxa_64 and crtdbase_64.
	* config/rs6000/t-aix-cxa: Explicitly compile 32 bit with -maix32
	and 64 bit with -maix64.
	* config/rs6000/t-slibgcc-aix: Remove extra @multilib_dir@ level.
	Build and install AIX-style FAT libraries.

libgomp/ChangeLog

2020-06-21  David Edelsohn  <dje.gcc@gmail.com>

	* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
	* Makefile.in: Regenerate
	* configure.ac (tmake_file): Substitute.
	* configure: Regenerate.
	* configure.tgt (powerpc-ibm-aix*): Define tmake_file.
	* config/t-aix: New file.

libstdc++-v3/ChangeLog

2020-06-21  David Edelsohn  <dje.gcc@gmail.com>

	* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
	* Makefile.in: Regenerate.
	* configure.ac (tmake_file): Substitute.
	* configure: Regenerate.
	* configure.host (aix*): Define tmake_file.
	* config/os/aix/t-aix: New file.

libatomic/ChangeLog

2020-06-21  David Edelsohn  <dje.gcc@gmail.com>

	* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
	* Makefile.in: Regenerate.
	* configure.ac (tmake_file): Substitute.
	* configure: Regenerate.
	* configure.tgt (powerpc-ibm-aix*): Define tmake_file.
	* config/t-aix: New file.

libgfortran/ChangeLog

2020-06-21  David Edelsohn  <dje.gcc@gmail.com>

	* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
	* Makefile.in: Regenerate.
	* configure.ac (tmake_file): Substitute.
	* configure: Regenerate.
	* configure.host: Add system configury stanza. Define tmake_file.
	* config/t-aix: New file.
2020-06-21 14:14:46 -04:00
GCC Administrator aff95ee7cc Daily bump. 2020-06-18 00:16:37 +00:00
Samuel Thibault 5e2eebc80d hurd: libgcc unwinding support over signal trampolines
libgcc/
	* config.host (md_unwind_header) <i[34567]86-*-gnu*>: Set to
	'i386/gnu-unwind.h'
	* config/i386/gnu-unwind.h: New file.

Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
2020-06-18 00:01:27 +02:00
Martin Liska 5fc312a98e
gcov: fix gcov-tool merge for TOPN counters
libgcc/ChangeLog:

	* libgcov-util.c (read_gcda_finalize): Remove const operator.
	(merge_wrapper): Add both counts and use them properly.
	(topn_to_memory_representation): New function.
	(gcov_merge): Covert on disk representation to in memory
	representation.
	* libgcov.h: Remove const operator.
2020-06-17 08:32:27 +02:00
GCC Administrator 6fb94d67f1 Daily bump. 2020-06-16 00:16:28 +00:00