PR c/79153
* tree.h (SWITCH_BREAK_LABEL_P): Define.
* gimplify.c (collect_fallthrough_labels): Handle GIMPLE_BIND
starting with a GIMPLE_SWITCH and ending with GIMPLE_LABEL with
SWITCH_BREAK_LABEL_P set on the label.
(gimplify_switch_expr): Set SWITCH_BREAK_LABEL_P on the label
added for default case if it was missing and not all cases covered.
Wrap GIMPLE_SWITCH and the switch_body_seq into a GIMPLE_BIND if
switch_body_seq ends with a GIMPLE_LABEL with SWITCH_BREAK_LABEL_P
set on the label.
* tree-chrec.c (evolution_function_is_univariate_p): Add return true;
to avoid -Wimplicit-fallthrough warning.
* config/i386/i386.c (ix86_expand_special_args_builtin): Add
FALLTHRU comment to avoid -Wimplicit-fallthrough warning.
c/
* c-parser.c: Include tree-iterator.h.
(c_parser_switch_statement): Emit LABEL_EXPR for the break label
into SWITCH_BODY instead of after it and set SWITCH_BREAK_LABEL_P
on it.
cp/
* cp-gimplify.c (genericize_switch_stmt): Emit LABEL_EXPR for the
break label into SWITCH_BODY instead of after it and set
SWITCH_BREAK_LABEL_P on it.
* parser.c (cp_parser_objc_expression): Add FALLTHRU comment to avoid
-Wimplicit-fallthrough warning.
fortran/
* match.c (gfc_match): Add FALLTHRU comment to avoid
-Wimplicit-fallthrough warning.
testsuite/
* c-c++-common/Wimplicit-fallthrough-7.c: Adjust expected warning
line.
* c-c++-common/Wimplicit-fallthrough-36.c: New test.
From-SVN: r255298
2017-12-01 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/83224
* frontend-passes.c (realloc_string_callback): Handle
case for which the RHS is an array expression.
2017-12-01 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/83224
* gfortran.dg/dependency_50.f90: New test.
From-SVN: r255294
PR c/83222
* c-tree.h (decl_constant_value_1): Declare.
* c-typeck.c (decl_constant_value_1): New function.
(decl_constant_value): Use it.
* c-fold.c (c_fully_fold_internal): If in_init, use
decl_constant_value_1 instead of decl_constant_value.
* gcc.c-torture/compile/pr83222.c: New test.
From-SVN: r255285
gcc/
2017-11-30 Maxim Ostapenko <m.ostapenko@samsung.com>
PR sanitizer/81697
* asan.c (asan_protect_global): Add new ignore_decl_rtl_set_p
parameter. Return true if ignore_decl_rtl_set_p is true and other
conditions are satisfied.
* asan.h (asan_protect_global): Add new parameter.
* varasm.c (categorize_decl_for_section): Pass true as second parameter
to asan_protect_global calls.
gcc/testsuite/
2017-11-30 Maxim Ostapenko <m.ostapenko@samsung.com>
PR sanitizer/81697
* c-c++-common/asan/pr81697.c: New test.
From-SVN: r255283
2017-11-30 Michael Meissner <meissner@linux.vnet.ibm.com>
PR libgcc/83112
* config/rs6000/float128-ifunc.c (__addkf3_resolve): Use the
correct type for all ifunc resolvers to silence -Wattribute-alias
warnings. Eliminate the forward declaration of the resolver
functions which is no longer needed.
(__subkf3_resolve): Likewise.
(__mulkf3_resolve): Likewise.
(__divkf3_resolve): Likewise.
(__negkf2_resolve): Likewise.
(__eqkf2_resolve): Likewise.
(__nekf2_resolve): Likewise.
(__gekf2_resolve): Likewise.
(__gtkf2_resolve): Likewise.
(__lekf2_resolve): Likewise.
(__ltkf2_resolve): Likewise.
(__unordkf2_resolve): Likewise.
(__extendsfkf2_resolve): Likewise.
(__extenddfkf2_resolve): Likewise.
(__trunckfsf2_resolve): Likewise.
(__trunckfdf2_resolve): Likewise.
(__fixkfsi_resolve): Likewise.
(__fixkfdi_resolve): Likewise.
(__fixunskfsi_resolve): Likewise.
(__fixunskfdi_resolve): Likewise.
(__floatsikf_resolve): Likewise.
(__floatdikf_resolve): Likewise.
(__floatunsikf_resolve): Likewise.
(__floatundikf_resolve): Likewise.
(__extendkftf2_resolve): Likewise.
(__trunctfkf2_resolve): Likewise.
PR libgcc/83103
* config/rs6000/quad-float128.h (TF): Don't define if long double
is IEEE 128-bit floating point.
(TCtype): Define as either TCmode or KCmode, depending on whether
long double is IEEE 128-bit floating point.
(__mulkc3_sw): Add declarations for software/hardware versions of
complex multiply/divide.
(__divkc3_sw): Likewise.
(__mulkc3_hw): Likewise.
(__divkc3_hw): Likewise.
* config/rs6000/_mulkc3.c (_mulkc3): If we are building ifunc
handlers to switch between using software emulation and hardware
float128 instructions, build the complex multiply/divide functions
for both software and hardware support.
* config/rs6000/_divkc3.c (_divkc3): Likewise.
* config/rs6000/float128-ifunc.c (__mulkc3_resolve): Likewise.
(__divkc3_resolve): Likewise.
(__mulkc3): Likewise.
(__divkc3): Likewise.
* config/rs6000/t-float128-hw (fp128_hardfp_src): Likewise.
(fp128_hw_src): Likewise.
(fp128_hw_static_obj): Likewise.
(fp128_hw_shared_obj): Likewise.
(_mulkc3-hw.c): Create _mulkc3-hw.c and _divkc3-hw.c from
_mulkc3.c and _divkc3.c, changing the function name.
(_divkc3-hw.c): Likewise.
* config/rs6000/t-float128 (clean-float128): Delete _mulkc3-hw.c
and _divkc3-hw.c.
From-SVN: r255282
The ARC ZOL implementation doesn't allow the last instruction to be a
control instruction or part of a delay slot. Thus, we add a note to
the last ZOL instruction which will prevent it to finish into a delay
slot.
2017-10-20 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (hwloop_optimize): Prevent the last
ZOL instruction to end into a delay slot.
* config/arc/arc.md (cond_delay_insn): Check if the instruction
can be placed into a delay slot against reg_note.
(in_delay_slot): Likewise.
testsuite/
2017-10-20 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/loop-3.c: New test.
* gcc.target/arc/loop-4.c: Likewise.
[FIX][ZOL] fix checking for jumps
From-SVN: r255275
Make sure we mark the hw-loop labels as beeing used.
gcc/
2017-09-19 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (hwloop_optimize): Update hw-loop's end/start
labels number of usages.
gcc/testsuite
2017-09-19 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/loop-2.cpp: New test.
From-SVN: r255274
Sometimes the memory equivalent is not valid due to a large offset.
For example replacing the ap register with its fp/sp-equivalent during
LRA step. To solve this we introduced TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV.
gcc/
2017-08-08 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_cannot_substitute_mem_equiv_p): New function.
(TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
gcc/testsuite
2017-08-08 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/lra-1.c: New test.
From-SVN: r255273
PR target/83210
* internal-fn.c (expand_mul_overflow): Optimize unsigned
multiplication by power of 2 constant into two shifts + comparison.
* gcc.target/i386/pr83210.c: New test.
From-SVN: r255269
The map zero value is a common symbol, and it doesn't really make
sense to have a constant common symbol. Current GCC has started to
reject this case, probably as part of the fix for PR 83100.
Reviewed-on: https://go-review.googlesource.com/80877
From-SVN: r255266
Eventually we should print the reason that any combination fails.
This is a good start (these happen often).
* combine.c (try_combine): Print a message to dump file whenever
I0, I1, or I2 cannot be combined into I3.
From-SVN: r255261
The fix for PR82621 makes us not split an I2 if one of the results of
those SETs is unused, since combine does not handle that properly. But
this results in degradation for i386 (or more in general, for any
target that does not have patterns for parallels with an unused result
as a CLOBBER instead of a SET for that result).
This patch instead makes us not split only if one of the results is set
again before I3. That fixes PR83156 and also fixes PR82621.
Unfortunately it undoes the nice optimisations that the previous patch
did on powerpc.
PR rtl-optimization/83156
PR rtl-optimization/82621
* combine.c (try_combine): Don't split an I2 if one of the dests is
set again before I3. Allow unused dests.
From-SVN: r255260
This adds a second variant of the adde insn pattern, this one with the
CA register as the second operand. The existing pattern has it as the
third operand. It would be ideal if RTL was always canonicalised like
that, but it isn't (and that is not trivial), and this is a simple and
harmless patch.
* config/rs6000/rs6000.md (*add<mode>3_carry_in_internal2): New.
From-SVN: r255259
2017-11-29 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/80818
* lra.c (collect_non_operand_hard_regs): New arg insn. Pass it
recursively. Use insn code for clobber.
(lra_set_insn_recog_data): Pass the new arg to
collect_non_operand_hard_regs.
(add_regs_to_insn_regno_info): Pass insn instead of uid. Use insn
code for clobber.
(lra_update_insn_regno_info): Pass insn to
add_regs_to_insn_regno_info.
From-SVN: r255258
gcc/cp/ChangeLog:
* parser.c (cp_parser_unary_expression): Generate a location for
"noexcept".
(cp_parser_trait_expr): Generate and return a location_t,
converting the return type from tree to cp_expr.
(cp_parser_static_assert): Pass location of the condition to
finish_static_assert, rather than that of the "static_assert"
token, where available.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1y/static_assert3.C: New test case.
libstdc++-v3/ChangeLog:
* testsuite/20_util/duration/literals/range.cc: Update expected
line of a static_assert failure.
From-SVN: r255255
Needed for the UT699 errata workaround to function correctly when
compiling with -fPIC.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (sparc_do_work_around_errata): Treat the
movsi_pic_gotdata_op instruction as a load for the UT699 errata
workaround.
From-SVN: r255239
The sequence
st
fdivd / fsqrtd
std
was generated in some cases with -mfix-ut699 when there was
a st before the div/sqrt. This sequence could trigger the b2bst errata.
Now the following safe sequence is generated instead:
st
nop
fdivd / fsqrtd
std
2017-11-29 Martin Aberg <maberg@gaisler.com>
gcc/
* config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
to prevent b2bst errata sequence.
(sqrtdf2_fix): Likewise.
From-SVN: r255238
This patch provides a workaround for the errata described in GRLIB-TN-0013.
If the workaround is enabled it will:
* Prevent div and sqrt instructions in the delay slot.
* Insert NOPs to prevent the sequence (div/sqrt) -> (two or three floating
point operations or loads) -> (div/sqrt).
* Not insert NOPs if any of the floating point operations have a dependency
on the destination register of the first (div/sqrt).
* Not insert NOPs if one of the floating point operations is a (div/sqrt).
* Insert NOPs to prevent (div/sqrt) followed by a branch.
It is applicable to GR712RC, UT700, and UT699.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (fpop_reg_depend_p): New function.
(div_sqrt_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0013 errata for
certain LEON3 processors.
(pass_work_around_errata::gate): Also test sparc_fix_lost_divsqrt.
(sparc_option_override): Set sparc_fix_lost_divsqrt appropriately.
* config/sparc/sparc.md (fix_lost_divsqrt): New attribute.
(in_branch_delay): Prevent div and sqrt in delay slot if
fix_lost_divsqrt.
* config/sparc/sparc.opt (sparc_fix_lost_divsqrt): New variable.
From-SVN: r255237
This patch provides a workaround for the errata described in GRLIB-TN-0010.
If the workaround is enabled it will:
* Insert a NOP between load instruction and atomic
instruction (swap, ldstub, casa).
* Insert a NOP at branch target if load in delay slot
and atomic instruction at branch target.
It is applicable to UT700.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (atomic_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0010 errata for
UT700.
* config/sparc/sync.md (atomic_compare_and_swap_leon3_1): Make
instruction referable in atomic_insns_p.
From-SVN: r255236
Jakub Jelinek
Thomas Koenig
Sergey Shalnov
Kirill Yukhin
Michael Meissner
GCC Administrator
Maxim Ostapenko
Jim Wilson
Jason Merrill
Jonathan Wakely
Glen Joseph Fernandes
Claudiu Zissulescu
Will Schmidt
Julia Koval
Jakub Jelinek
Jan Hubicka
Richard Biener
Ian Lance Taylor
John David Anglin
Segher Boessenkool
Vladimir Makarov
David Malcolm
Paolo Carlini
Qing Zhao
Daniel Cederman
Martin Aberg