The ARC ZOL implementation doesn't allow the last instruction to be a
control instruction or part of a delay slot. Thus, we add a note to
the last ZOL instruction which will prevent it to finish into a delay
slot.
2017-10-20 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (hwloop_optimize): Prevent the last
ZOL instruction to end into a delay slot.
* config/arc/arc.md (cond_delay_insn): Check if the instruction
can be placed into a delay slot against reg_note.
(in_delay_slot): Likewise.
testsuite/
2017-10-20 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/loop-3.c: New test.
* gcc.target/arc/loop-4.c: Likewise.
[FIX][ZOL] fix checking for jumps
From-SVN: r255275
Make sure we mark the hw-loop labels as beeing used.
gcc/
2017-09-19 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (hwloop_optimize): Update hw-loop's end/start
labels number of usages.
gcc/testsuite
2017-09-19 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/loop-2.cpp: New test.
From-SVN: r255274
Sometimes the memory equivalent is not valid due to a large offset.
For example replacing the ap register with its fp/sp-equivalent during
LRA step. To solve this we introduced TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV.
gcc/
2017-08-08 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_cannot_substitute_mem_equiv_p): New function.
(TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
gcc/testsuite
2017-08-08 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/lra-1.c: New test.
From-SVN: r255273
PR target/83210
* internal-fn.c (expand_mul_overflow): Optimize unsigned
multiplication by power of 2 constant into two shifts + comparison.
* gcc.target/i386/pr83210.c: New test.
From-SVN: r255269
The map zero value is a common symbol, and it doesn't really make
sense to have a constant common symbol. Current GCC has started to
reject this case, probably as part of the fix for PR 83100.
Reviewed-on: https://go-review.googlesource.com/80877
From-SVN: r255266
Eventually we should print the reason that any combination fails.
This is a good start (these happen often).
* combine.c (try_combine): Print a message to dump file whenever
I0, I1, or I2 cannot be combined into I3.
From-SVN: r255261
The fix for PR82621 makes us not split an I2 if one of the results of
those SETs is unused, since combine does not handle that properly. But
this results in degradation for i386 (or more in general, for any
target that does not have patterns for parallels with an unused result
as a CLOBBER instead of a SET for that result).
This patch instead makes us not split only if one of the results is set
again before I3. That fixes PR83156 and also fixes PR82621.
Unfortunately it undoes the nice optimisations that the previous patch
did on powerpc.
PR rtl-optimization/83156
PR rtl-optimization/82621
* combine.c (try_combine): Don't split an I2 if one of the dests is
set again before I3. Allow unused dests.
From-SVN: r255260
This adds a second variant of the adde insn pattern, this one with the
CA register as the second operand. The existing pattern has it as the
third operand. It would be ideal if RTL was always canonicalised like
that, but it isn't (and that is not trivial), and this is a simple and
harmless patch.
* config/rs6000/rs6000.md (*add<mode>3_carry_in_internal2): New.
From-SVN: r255259
2017-11-29 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/80818
* lra.c (collect_non_operand_hard_regs): New arg insn. Pass it
recursively. Use insn code for clobber.
(lra_set_insn_recog_data): Pass the new arg to
collect_non_operand_hard_regs.
(add_regs_to_insn_regno_info): Pass insn instead of uid. Use insn
code for clobber.
(lra_update_insn_regno_info): Pass insn to
add_regs_to_insn_regno_info.
From-SVN: r255258
gcc/cp/ChangeLog:
* parser.c (cp_parser_unary_expression): Generate a location for
"noexcept".
(cp_parser_trait_expr): Generate and return a location_t,
converting the return type from tree to cp_expr.
(cp_parser_static_assert): Pass location of the condition to
finish_static_assert, rather than that of the "static_assert"
token, where available.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1y/static_assert3.C: New test case.
libstdc++-v3/ChangeLog:
* testsuite/20_util/duration/literals/range.cc: Update expected
line of a static_assert failure.
From-SVN: r255255
Needed for the UT699 errata workaround to function correctly when
compiling with -fPIC.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (sparc_do_work_around_errata): Treat the
movsi_pic_gotdata_op instruction as a load for the UT699 errata
workaround.
From-SVN: r255239
The sequence
st
fdivd / fsqrtd
std
was generated in some cases with -mfix-ut699 when there was
a st before the div/sqrt. This sequence could trigger the b2bst errata.
Now the following safe sequence is generated instead:
st
nop
fdivd / fsqrtd
std
2017-11-29 Martin Aberg <maberg@gaisler.com>
gcc/
* config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
to prevent b2bst errata sequence.
(sqrtdf2_fix): Likewise.
From-SVN: r255238
This patch provides a workaround for the errata described in GRLIB-TN-0013.
If the workaround is enabled it will:
* Prevent div and sqrt instructions in the delay slot.
* Insert NOPs to prevent the sequence (div/sqrt) -> (two or three floating
point operations or loads) -> (div/sqrt).
* Not insert NOPs if any of the floating point operations have a dependency
on the destination register of the first (div/sqrt).
* Not insert NOPs if one of the floating point operations is a (div/sqrt).
* Insert NOPs to prevent (div/sqrt) followed by a branch.
It is applicable to GR712RC, UT700, and UT699.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (fpop_reg_depend_p): New function.
(div_sqrt_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0013 errata for
certain LEON3 processors.
(pass_work_around_errata::gate): Also test sparc_fix_lost_divsqrt.
(sparc_option_override): Set sparc_fix_lost_divsqrt appropriately.
* config/sparc/sparc.md (fix_lost_divsqrt): New attribute.
(in_branch_delay): Prevent div and sqrt in delay slot if
fix_lost_divsqrt.
* config/sparc/sparc.opt (sparc_fix_lost_divsqrt): New variable.
From-SVN: r255237
This patch provides a workaround for the errata described in GRLIB-TN-0010.
If the workaround is enabled it will:
* Insert a NOP between load instruction and atomic
instruction (swap, ldstub, casa).
* Insert a NOP at branch target if load in delay slot
and atomic instruction at branch target.
It is applicable to UT700.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (atomic_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0010 errata for
UT700.
* config/sparc/sync.md (atomic_compare_and_swap_leon3_1): Make
instruction referable in atomic_insns_p.
From-SVN: r255236
This patch provides a workaround for the errata described in GRLIB-TN-0011.
If the workaround is enabled it will:
* Insert .align 16 before atomic instructions (swap, ldstub, casa).
It is applicable to GR712RC.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sync.md (swapsi): 16-byte align if sparc_fix_gr712rc.
(atomic_compare_and_swap_leon3_1): Likewise.
(ldstub): Likewise.
From-SVN: r255235
This patch provides a workaround for the errata described in GRLIB-TN-0012.
If the workaround is enabled it will:
* Prevent any floating-point operation from being placed in the
delay slot of an annulled integer branch.
* Place a NOP at the branch target of an integer branch if it is
a floating-point operation or a floating-point branch.
It is applicable to GR712RC.
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (fpop_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0012 errata for
GR712RC.
(pass_work_around_errata::gate): Also test sparc_fix_gr712rc.
* config/sparc/sparc.md (fix_gr712rc): New attribute.
(in_branch_annul_delay): Prevent floating-point instructions
in delay slot of annulled integer branch.
From-SVN: r255234
2017-11-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/83202
* tree-vect-slp.c (scalar_stmts_set_t): New typedef.
(bst_fail): Use it.
(vect_analyze_slp_cost_1): Add visited set, do not account SLP
nodes vectorized to the same stmts multiple times.
(vect_analyze_slp_cost): Allocate a visited set and pass it down.
(vect_analyze_slp_instance): Adjust.
(scalar_stmts_to_slp_tree_map_t): New typedef.
(vect_schedule_slp_instance): Add a map recording the SLP node
representing the vectorized stmts for a set of scalar stmts.
Avoid code-generating redundancies.
(vect_schedule_slp): Allocate map and pass it down.
* gcc.dg/vect/costmodel/x86_64/costmodel-pr83202.c: New testcase.
From-SVN: r255233
The recently added store_pair_lanes causes ICEs in output_operand.
This is due to aarch64_classify_address treating it like a 128-bit STR
rather than a STP. The valid immediate offsets don't fully overlap,
causing it to return false. Eg. offset 264 is a valid 8-byte STP offset
but not a valid 16-byte STR offset since it isn't a multiple of 16.
The original instruction isn't passed in the printing code, so the context
is unclear. The solution is to add a new operand formatting specifier
which is used for LDP/STP instructions like this. This, like the Uml
constraint that applies to store_pair_lanes, uses PARALLEL when calling
aarch64_classify_address so that it knows it is an STP.
Also add the 'z' specifier for future use by load/store pair instructions.
gcc/
* config/aarch64/aarch64.c (aarch64_print_operand): Add new
cases for printing LDP/STP memory addresses.
(aarch64_print_address_internal): Renamed from
aarch64_print_operand_address, added parameter, add Pmode check.
(aarch64_print_ldpstp_address): New function for LDP/STP addresses.
(aarch64_print_operand_address): Indirect to
aarch64_print_address_internal.
* config/aarch64/aarch64-simd.md (store_pair_lanes): Use new
'y' operand output specifier.
From-SVN: r255230
2017-11-28 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR libgfortran/83168
* io/write.c (select_string): Bump size by one to avoid
overrun.
From-SVN: r255225
When fixing PR c/82050 I noticed a bug in how we print fix-it hints
for very long lines: we weren't taking into account the x-offset for
the line when printing the fix-it hint.
This could lead to output where instead of printing:
foo.c:14:3944: error: etc
= foo.field
^~~~~
replacement
where the lines have been offset to start printing at about column 3900,
the "replacement" line was erroneously *not* offset, and was thus
prefixed by thousands of spaces, leading to large whitespace gaps in
the output, and the replacement failing to line up with the source to be
replaced.
Fixed thusly.
gcc/ChangeLog:
* diagnostic-show-locus.c (layout::print_trailing_fixits): Handle
m_x_offset.
(layout::move_to_column): Likewise.
gcc/testsuite/ChangeLog:
* gcc.dg/plugin/diagnostic-test-show-locus-bw.c
(test_very_wide_line): Update expected output to include a
fix-it hint.
* gcc.dg/plugin/diagnostic-test-show-locus-color.c
(test_very_wide_line): Likewise.
* gcc.dg/plugin/diagnostic_plugin_test_show_locus.c
(test_show_locus): Add a fix-it hint to "test_very_wide_line".
From-SVN: r255219
PR sanitizer/81275
* cp-tree.h (SWITCH_STMT_ALL_CASES_P): Define.
(SWITCH_STMT_NO_BREAK_P): Define.
(note_break_stmt, note_iteration_stmt_body_start,
note_iteration_stmt_body_end): Declare.
* decl.c (struct cp_switch): Add has_default_p, break_stmt_seen_p
and in_loop_body_p fields.
(push_switch): Clear them.
(pop_switch): Set SWITCH_STMT_CANNOT_FALLTHRU_P if has_default_p
and !break_stmt_seen_p. Assert in_loop_body_p is false.
(note_break_stmt, note_iteration_stmt_body_start,
note_iteration_stmt_body_end): New functions.
(finish_case_label): Set has_default_p when both low and high
are NULL_TREE.
* parser.c (cp_parser_iteration_statement): Use
note_iteration_stmt_body_start and note_iteration_stmt_body_end
around parsing iteration body.
* pt.c (tsubst_expr): Likewise.
* cp-objcp-common.c (cxx_block_may_fallthru): Return false for
SWITCH_STMT which contains no BREAK_STMTs, contains a default:
CASE_LABEL_EXPR and where SWITCH_STMT_BODY isn't empty and
can't fallthru.
* semantics.c (finish_break_stmt): Call note_break_stmt.
* cp-gimplify.c (genericize_switch_stmt): Copy SWITCH_STMT_ALL_CASES_P
bit to SWITCH_ALL_CASES_P. Assert that if SWITCH_STMT_NO_BREAK_P then
the break label is not TREE_USED.
* g++.dg/warn/pr81275-1.C: New test.
* g++.dg/warn/pr81275-2.C: New test.
* g++.dg/warn/pr81275-3.C: New test.
* c-c++-common/tsan/pr81275.c: Skip for C++ and -O2.
From-SVN: r255218
PR sanitizer/81275
* tree.c (block_may_fallthru): Return false if SWITCH_ALL_CASES_P
is set on SWITCH_EXPR and !block_may_fallthru (SWITCH_BODY ()).
c/
* c-typeck.c (c_finish_case): Set SWITCH_ALL_CASES_P if
c_switch_covers_all_cases_p returns true.
c-family/
* c-common.c (c_switch_covers_all_cases_p_1,
c_switch_covers_all_cases_p): New functions.
* c-common.h (c_switch_covers_all_cases_p): Declare.
testsuite/
* c-c++-common/tsan/pr81275.c: New test.
From-SVN: r255217
The current F2018 draft (N2137) specifies behavior of the RECL=
specifier in the INQUIRE statement, where it previously was left as
undefined. Namely:
- If the unit is not connected, RECL= should be given the value -1.
- If the unit is connected with stream access, RECL= should be given
the value -2.
Further, as PR 53796 describes, the handling of RECL= is poor in other
ways as well. When the recl is set to the maximum possible
(GFC_INTEGER_8_HUGE / LLONG_MAX), which it does by default except for
preconnected units, and when INQUIRE(RECL=) is used with a 4 byte
integer, the value is truncated and the 4 byte value is thus
-1. Fixing this to generate an error is a lot of work, as currently
the truncation is done by the frontend, the library sees only an 8
byte value with no indication that the frontend is going to copy it to
a 4 byte one. Instead, this patch does a bit twiddling trick such that
the truncated 4 byte value is GFC_INTEGER_4_HUGE while still being
0.99999999 * GFC_INTEGER_8_HUGE which is large enough for all
practical purposes.
Finally, the patch removes GFORTRAN_DEFAULT_RECL which was used only
for preconnected units, and instead uses the same approach as describe
above.
Regtested on x86_64-pc-linux-gnu, Ok for trunk.
gcc/fortran/ChangeLog:
2017-11-28 Janne Blomqvist <jb@gcc.gnu.org>
PR fortran/53796
* gfortran.texi: Remove mentions of GFORTRAN_DEFAULT_RECL.
libgfortran/ChangeLog:
2017-11-28 Janne Blomqvist <jb@gcc.gnu.org>
PR fortran/53796
* io/inquire.c (inquire_via_unit): Set recl to -1 for unconnected
units.
* io/io.h (default_recl): New variable.
* io/open.c (new_unit): Set recl to default_recl for sequential,
-2 for stream access.
* io/transfer.c (read_block_form): Test against default_recl
instead of DEFAULT_RECL.
(write_block): Likewise.
* io/unit.c (init_units): Calculate max_offset, default_recl.
* libgfortran.h (DEFAULT_RECL): Remove.
* runtime/environ.c: Remove GFORTRAN_DEFAULT_RECL.
gcc/testsuite/ChangeLog:
2017-11-28 Janne Blomqvist <jb@gcc.gnu.org>
PR fortran/53796
* gfortran.dg/inquire_recl_f2018.f90: New test.
From-SVN: r255215
PR c/82050 reports a failed assertion deep within diagnostic_show_locus's
code for printing fix-it hints.
The root cause is a fix-it hint suggesting a textual replacement,
where the affected column numbers straddle the LINE_MAP_MAX_COLUMN_NUMBER
boundary, so that the start of the range has a column number, but the
end of the range doesn't.
The fix is to verify that the column numbers are sane when adding fix-it
hints to a rich_location, rejecting fix-it hints where they are not.
libcpp/ChangeLog:
PR c/82050
* include/line-map.h (LINE_MAP_MAX_COLUMN_NUMBER): Move here.
* line-map.c (LINE_MAP_MAX_COLUMN_NUMBER): ...from here.
(rich_location::maybe_add_fixit): Reject fix-it hints in which
the start column exceeds the next column.
From-SVN: r255214
